MEMS device architecture and preparation method

Abstract

The invention discloses an MEMS device architecture, which comprises a cap layer, a device layer and a substrate layer, the cap layer is bonded with the device layer, the bonded whole is bonded with the substrate layer, the cap layer is manufactured based on a first silicon substrate, the bottom of the cap layer is provided with a cavity structure, and the cap layer is internally provided with a high-deep groove structure. A silicon dioxide film is arranged on the groove wall of the high-deep groove structure, polycrystalline silicon is deposited and filled in the high-deep groove structure, and a silicon dioxide layer is arranged on the upper surface of the first silicon substrate; the device layer is manufactured based on an SOI wafer and comprises a first silicon structure layer composed of top layer silicon, a buried oxide layer and a second silicon structure layer composed of back substrate silicon. The substrate layer comprises a second silicon substrate, a bottom layer cavity is formed in the top face of the second silicon substrate, and exhaust holes are formed in the bottom face of the second silicon substrate. According to the method, deep groove etching, polycrystalline silicon groove filling and bonding technologies are combined, advanced materials such as the SOI wafer and the polyimide layer are utilized, and excellent signal isolation and flexibility of various MEMS IMU applications are achieved.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a MEMS device architecture and a preparation method thereof. Background Art

[0002] MEMS (micro-electromechanical system) IMU (inertial measurement unit) has a wide range of applications in modern technology, such as smart phones, drones, autonomous driving, industrial automation, aerospace and other fields. IMU can detect the acceleration and rotational angular velocity information of an object in real time by integrating accelerometers and gyroscopes. However, the existing MEMS IMU design faces many challenges, which limits its performance improvement and diversified application needs.

[0003] First of all, in MEMSIMU, it is usually necessary to integrate accelerometers and gyroscopes in the same package to achieve multi-axis measurement functions. However, traditional IMU packaging designs usually only support a single cavity environment (such as vacuum packaging or gas packaging). Accelerometers usually need to work in a gas-filled environment to utilize the damping characteristics of the gas to enhance stability and impact resistance; while gyroscopes need to work in a vacuum environment to reduce the impact of air damping, thereby improving sensitivity and signal quality. Such different requirements for working environments make it very complicated and costly to provide different environments for the two sensors in the same package. The Chinese patent with announcement number CN113816331B discloses an airtight packaging structure with a cavity device, and discloses a packaging structure that supports different air pressures in dual cavities.

[0004] Secondly, the design of MEMSIMU devices needs to take into account the sensitivity and stability in each axis direction, but it is often difficult to balance the design. Traditional single-layer or simple multi-layer structures limit the independent adjustment of device layer thickness and geometry, resulting in the sensitivity and response speed being affected during multi-axis measurement. In addition, the implementation of multi-axis measurement usually requires complex mechanical structure design to ensure appropriate flexibility and range of motion in specific directions, while maintaining sufficient rigidity in other directions to reduce interference.

[0005] In addition, as modern applications place increasing demands on sensor size, performance, and integration, the electrical isolation, signal transmission efficiency, and integrated packaging requirements of MEMSIMU devices are also increasing. How to achieve efficient isolation and transmission of electrical signals while maintaining the stability of the mechanical structure and avoiding signal interference between different sensors is a key challenge to improving MEMSIMU performance. Summary of the invention

[0006] The purpose of the present invention is to provide a MEMS device architecture and preparation method, which can effectively solve the problems of multi-axis measurement, vacuum and gas coexistence packaging, independent device layer design and efficient signal transmission, and has broad application prospects and technical value.

[0007] In order to solve the above problems, the present invention discloses a MEMS device architecture, including a cap layer, a device layer and a substrate layer, the cap layer and the device layer are bonded, and after bonding, the cap layer and the device layer are bonded to the substrate layer as a whole, and finally form an integrated structure, in which a cavity structure is arranged at the bottom of the cap layer in the final molding structure, a high-deep groove structure is arranged in the cap layer, a silicon dioxide film is arranged on the groove wall of the high-deep groove structure, polysilicon is deposited and filled in the high-deep groove structure, a silicon dioxide layer exists on the surface of the cap layer, a polyimide insulating material layer is coated on the silicon dioxide layer, and a conductive layer is provided on the polyimide insulating material layer; in the final molding structure, the device layer includes two independently adjustable silicon structure layers, a hybrid elastic structure can be optionally provided in the silicon structure, and mechanical connection and electrical isolation can be achieved on the same mass block, thereby supporting the development of multi-axis devices; at the same time, comb tooth structures with different heights can also achieve high-sensitivity vertical driving and sensing. The top surface of the substrate layer in the final molding structure is provided with a bottom cavity, and the bottom surface of the substrate layer is provided with an exhaust hole. The bottom surface of the second silicon substrate is provided with a silicon epitaxial growth layer. The MEMS device architecture can be used as a potential solution for high-performance MEMS accelerometers and gyroscopes, and also supports the co-processing of accelerometers and gyroscopes, and provides vacuum and gas packaging on the same chip, as an effective architecture for high-performance MEMS IMUs.

[0008] The present invention also discloses a method for preparing the MEMS device architecture, comprising the following steps:

[0009] S1, providing a first silicon substrate as a capping layer, placing it in an oxidation furnace for thermal oxidation, and generating a silicon dioxide layer on the surface of the first silicon substrate;

[0010] S2, forming a high and deep groove structure on the first silicon substrate by using photolithography and etching;

[0011] S3, performing secondary thermal oxidation in the high-deep groove structure to form a silicon dioxide film on the groove wall, and using a low-pressure chemical vapor deposition method to fill polysilicon into the high-deep groove structure, and then using chemical mechanical polishing to polish the upper surface of the polysilicon to be flush with the surface of the silicon dioxide layer;

[0012] S4, thinning the designated area on the back side of the first silicon substrate, then completing photolithography and etching, removing the oxide layer at a preset position, and then successively forming cavity structures of different depths for bonding with the device layer;

[0013] S5. Provide an SOI wafer as a device layer. The SOI wafer includes a top silicon layer, a buried oxide layer and a back substrate. Place the SOI wafer in an oxidation furnace for oxidation treatment to generate a layer of silicon dioxide insulation layer on the surface. In preparation for the subsequent realization of silicon structures with different heights, selectively thin the oxide layer in selected different areas.

[0014] S6, coating the device layer with photoresist, and transferring the patterns of the accelerometer and the gyroscope to the photoresist layer by a stepper lithography machine, and performing deep silicon etching in the area exposed by the photolithography pattern by a plasma etching device to form a device structure of the first silicon structure layer, and etching to the SOI buried oxide layer;

[0015] S7, continue to thin the top oxide layer until the silicon structure layer in the selected area is exposed, and etch the silicon structure layer to a preset height. Remove the oxide layer by wet etching or dry etching to obtain a silicon device structure with inconsistent height.

[0016] S8, providing a second silicon substrate as a substrate layer, etching a top surface of the second silicon substrate to form a bottom cavity for accommodating the movement of the device structure, etching a vent hole on the back surface of the second silicon substrate, and forming an oxide layer through a thermal oxidation process;

[0017] S10. Before bonding, the cap layer and the device layer are cleaned and then surface activated, and the cap layer and the device layer are directly bonded in a dust-free environment; the cap layer and the device layer are melt-bonded in a dust-free environment; and the bottom silicon layer after bonding is ground and thinned to a preset height.

[0018] S11. Perform deep silicon etching on the back of the bonded whole, and then remove the oxide layer by dry or wet etching to release the designed cantilever beam and free mass block structure to ensure the free movement of the device structure. At this time, the back substrate of the original SOI wafer can also be used as the second silicon structure layer to provide flexibility for the design of the device. The first and second silicon structures can be optionally provided with a hybrid elastic structure, and mechanical connection and electrical isolation can be achieved on the same mass block, thereby supporting the development of multi-axis devices.

[0019] S12, performing high-temperature fusion bonding of the bonded cap layer and device layer assembly to the substrate layer, and annealing at a high temperature of 800° C. for 3 hours.

[0020] As a further improvement of the above technical solution:

[0021] Also includes:

[0022] After the cap layer and the device layer are melt-bonded in a dust-free environment, annealing is further performed at 400° C. for 2 hours.

[0023] Also includes:

[0024] S13. After bonding is completed, the oxide layer of the sealed part of the substrate is removed by wet etching or dry etching. The silicon epitaxial process is used to adjust the pressure and gas environment in the epitaxial growth cavity to form a local vacuum environment or fill it with inert gases such as nitrogen. After the epitaxial growth is completed, the grooves and channels are quickly sealed to achieve vacuum or gas packaging in the closed cavity. The epitaxial layer is used as a sealing material to form a stable airtight packaging layer on the substrate, thereby closing the exhaust hole and forming the vacuum cavity required for the gyroscope. The gas environment is maintained in the area where the accelerometer is located to form a gas cavity, thereby achieving wafer packaging in which vacuum and gas coexist.

[0025] Preferably, different from the sealing method in S13, it further includes:

[0026] S14. An optional vacuum packaging method can also be achieved through laser packaging. The oxide layer of the substrate sealing part is removed by wet etching or dry etching, and the sealing area is heated by a precise laser beam to locally melt and seal the exhaust hole to form a stable sealing structure-the laser sealing layer. During the laser heating process, the silicon in the exhaust hole area is quickly melted and re-solidified to achieve sealing and ensure the vacuum state in the device cavity. This process controls the laser power, exposure time and focus position to accurately achieve the melting and sealing of local areas, without affecting the performance of other areas of the device, and can effectively maintain the required gas or vacuum environment.

[0027] Also includes:

[0028] S15. Deposit an oxide layer on the surface of the packaged wafer and coat it with a polyimide insulating material layer, and form a metal wiring pattern in the designated area by photolithography. Use sputtering or electroplating technology to deposit a conductive layer with a thickness of 1 μm on the surface to form a redistribution layer. Subsequently, perform surface flattening by chemical mechanical polishing.

[0029] Also includes:

[0030] S16. Cut the wafer, separate each IMU unit from the wafer, and use flip chip technology to package the IMU chip onto a substrate with pins.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] 1. Improve design flexibility: Through the design of two independently adjustable device layers, the thickness and structure of the device layer can be independently optimized to meet the specific needs of different sensors, greatly improving the design adaptability.

[0033] 2. Optimize sensor performance: The design of the flexible structure enables the device to have controllable movement in a specific direction while maintaining high rigidity in other directions, thereby improving the measurement accuracy and anti-interference ability of MEMSIMU and making it suitable for multi-axis measurement applications.

[0034] 3. Realize vacuum and gas coexistence packaging: Through dual-cavity design and partitioned packaging, it is possible to support vacuum cavity and gas cavity in the same package, providing the accelerometer and gyroscope with their own optimal working environment, thereby effectively improving the accuracy and stability of the sensor.

[0035] 4. Enhanced electrical isolation: Through TSV technology and multi-layer metallization design, efficient signal transmission and electrical isolation between the device layer and the external circuit are achieved, signal interference is reduced, and the stability and accuracy of the sensor are improved.

[0036] 5. Reduce manufacturing costs and improve integration: The use of bonding and stacked packaging technology simplifies the manufacturing process and reduces production costs. At the same time, the accelerometer and gyroscope can be efficiently integrated in the same chip, achieving a smaller size and high-performance MEMS IMU.

[0037] 6. Higher reliability and packaging quality: The use of epitaxial sealing or laser sealing technology achieves high-quality hermetic packaging, ensuring the stability and reliability of the device in long-term work and effectively extending the service life of the IMU. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 This is a schematic diagram of the overall structure of the silicon epitaxial package used in the present invention;

[0039] Figure 2 This is a schematic diagram of the overall structure of laser packaging used in the present invention;

[0040] Figure 3 This is one of the process flow diagrams of the capping layer of the present invention;

[0041] Figure 4 This is the second schematic diagram of the process flow of the capping layer of the present invention;

[0042] Figure 5 It is a schematic diagram of the device layer process flow of the present invention;

[0043] Figure 6 It is a schematic diagram of the process flow of the substrate layer of the present invention.

[0044] Figure numerals: 1. cap layer; 100. first silicon substrate; 101. silicon dioxide layer; 102. silicon dioxide film; 103. polysilicon; 104. cavity structure; 2. device layer; 201. top silicon; 202. buried oxide layer; 203. back substrate; 3. substrate layer; 300. second silicon substrate; 301. bottom cavity; 302. exhaust hole; 303. silicon epitaxial growth layer; 304. substrate oxide layer; 305. laser sealing layer; 401. polyimide insulating material layer; 402. conductive layer; 403. oxide layer. DETAILED DESCRIPTION

[0045] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further explained below in conjunction with specific implementation methods.

[0046] In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "two ends", "one end", "the other end" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0047] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0048] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0049] like Figure 1As shown, the MEMS device architecture of this embodiment includes a cap layer 1, a device layer 2 and a substrate layer 3. The cap layer 1 and the device layer 2 are bonded, and the device layer 2 and the substrate layer 3 are bonded. These three layers are bonded multiple times to form an overall structure. The cap layer 1, the device layer 2 and the substrate layer 3 are manufactured separately and then assembled. After the entire package, the device forms a zero-level airtightness, which ensures stable environmental control of the device during operation.

[0050] The cap layer 1 includes a first silicon substrate 100, a cavity structure 104 is arranged at the bottom of the first silicon substrate 100, a high-deep groove structure is arranged in the first silicon substrate 100, a silicon dioxide film 102 is arranged on the groove wall of the high-deep groove structure, polysilicon 103 is deposited and filled in the high-deep groove structure, a silicon dioxide layer 101 is arranged on the upper surface of the first silicon substrate 100, a polyimide insulating material layer 401 is coated on the silicon dioxide layer 101, and a conductive layer 402 is opened on the polyimide insulating material layer 401; the manufacturing of the cap layer is based on a highly doped silicon substrate. First, the silicon substrate is thermally oxidized to form a silicon dioxide layer with a uniform surface. Subsequently, a deep silicon etching process is used to form a deep groove structure with a high aspect ratio in the silicon wafer. The inner wall of the deep groove is thermally oxidized to generate a silicon dioxide film on its surface, which not only provides electrical insulation, but also can passivate dangling bonds and relieve stress. Next, chemical vapor deposition technology is used to fill polysilicon, and then chemical mechanical polishing is used to flatten the surface to ensure precise control of flatness and thickness. Finally, two deep etchings are performed on the selected areas on the back to create cavity structures of different depths to support subsequent device packaging.

[0051] The device layer 2 includes a top silicon 201, a buried oxide layer 202 and a back substrate 203. The device layer is manufactured using an SOI (Silicon-On-Insulator) substrate. A uniform silicon dioxide layer is formed on the single crystal silicon surface of the SOI substrate by thermal oxidation or chemical vapor deposition. Subsequently, a photolithography process is used to perform deep silicon etching in a specific area, and the device is structurally released by a dry or wet etching process, and finally a complete MEMS device structure (first silicon structure layer) is formed. The present invention specifically designs two independently adjustable device layers, and the back substrate 203 of the SOI can be used as the second silicon structure layer, or two independent device layers can be manufactured in the same chip by a double SOI wafer, and the thickness, geometry and function of the two device layers can be independently designed and optimized, thereby enhancing the design flexibility. In the manufacturing process of the device layer, a structure with directional flexibility is constructed by designing microstructures such as cantilever beams, elastic supports, and folded beams, combined with the anisotropic properties of the material. This structure enables the device to move freely in a specified direction while maintaining high rigidity in other directions. This design greatly improves the sensitivity and anti-interference ability of the accelerometer and gyroscope, and helps to improve the measurement accuracy of the device.

[0052] The substrate layer 3 includes a second silicon substrate 300, a bottom cavity 301 is provided on the top surface of the second silicon substrate 300, an exhaust hole 302 is provided on the bottom surface of the second silicon substrate 300, and a silicon epitaxial growth layer 303 is provided on the bottom surface of the second silicon substrate 300. The manufacturing process of the substrate layer is based on the silicon substrate. Through two deep silicon etchings on the front and back sides, the cavity and exhaust hole structures for packaging are formed respectively. These cavities and exhaust holes can help to form a vacuum environment during the packaging process, while ensuring the sealing of the package.

[0053] This embodiment discloses a method for preparing a MEMS device architecture, comprising the following steps:

[0054] S1, select a highly doped first silicon substrate 100 with a diameter of 100 mm and a thickness of 500 μm as the cap layer 1, such as Figure 3 As shown, it is placed in an oxidation furnace for thermal oxidation to form a silicon dioxide layer 101 with a thickness of 500 nm at a high temperature of 1100°C.

[0055] S2. Using photolithography and etching, a high and deep groove structure is formed on the first silicon substrate 100, with a depth of 300 μm, to facilitate subsequent filling of polysilicon.

[0056] S3. Perform secondary thermal oxidation in the deep trench structure to form a 200nm thick silicon dioxide film 102 on the trench wall to provide electrical insulation and stress buffering. Use low-pressure chemical vapor deposition to fill polysilicon 103 into the deep trench to achieve signal transmission and improve the mechanical strength and impact resistance of the structure. Use chemical mechanical polishing to polish the upper surface of the polysilicon 103 to be flush with the surface of the silicon dioxide layer 101 to ensure flatness.

[0057] S4, such as Figure 4 As shown, the back of the first silicon substrate 100 is first thinned in a designated area, and then photolithography and etching are completed. After the oxide layer is removed at a preset position, two different depths of cavity structures 104 with depths of 50 μm and 100 μm are formed respectively, which are used to provide sufficient movement space for the internal micromechanical structure (such as mass block, cantilever beam, etc.) so that it can vibrate or deflect freely without restriction. This cavity can also isolate the influence of the external environment and protect sensitive components from dust, moisture or other pollutants. Cavities of different depths are used to meet the different space requirements of moving parts, provide a suitable range of activities, thereby avoiding collisions and optimizing the gas damping effect. Deep cavities are usually used to reduce damping and increase Q values, while shallow cavities may be designed as stable areas that require certain damping. At the same time, the structural strength can be optimized by adjusting the stress distribution and isolating the motion or electrical signal path to achieve higher performance and reliability. After that, the oxide layer is removed and the surface is treated, and the cap layer 1 is flipped over for bonding with the device layer 2.

[0058] S5. Select a 100mm diameter, 500μm thick SOI wafer as device layer 2. The top silicon 201 of the SOI wafer is 40μm thick, the buried oxide layer 202 is 2μm thick, and the back substrate 203 is 460μm thick. Put the SOI wafer into an oxidation furnace and perform oxidation treatment at a high temperature of 1100℃ for 2 hours to generate a 200nm thick silicon dioxide insulating layer. In preparation for realizing silicon structures of different heights later, first perform selective oxidation layer thinning on selected different areas, such as Figure 5 shown.

[0059] S6. Use photoresist to coat the device layer, and transfer the designed patterns of the accelerometer and gyroscope to the photoresist layer through a stepper lithography machine. Use plasma etching equipment to perform deep silicon etching in the area exposed by the photolithography pattern. The etching depth is 40μm until the thickness of the top silicon 201 is reached, forming the cantilever beam and free mass block structure of the accelerometer and gyroscope.

[0060] S7, continue to thin the top silicon dioxide insulating layer until the silicon structure layer in the selected area is exposed, and etch the silicon structure layer to a preset height. Remove the top oxide layer by wet etching or dry etching to obtain a silicon device structure with inconsistent height.

[0061] S8, select a second silicon substrate 300 with a thickness of 500 μm as the substrate layer 3, such as Figure 6 As shown, a bottom cavity 301 with a depth of 300 μm is formed on the top surface to accommodate the movement of the device structure and provide protection for sensitive structures. Subsequently, an exhaust hole 302 with a depth of 200 μm is etched on the back surface to provide a gas flow channel in the subsequent vacuum sealing process.

[0062] S10, before bonding, the cap layer 1 and the device layer 2 are cleaned and then surface activated, the cap layer 1 and the device layer 2 are melt-bonded in a dust-free environment, and annealed at 400°C for 2 hours to improve the bonding strength. The bottom silicon layer after bonding is ground and thinned to 100 μm.

[0063] S11, perform deep silicon etching on the back of the bonded whole, and then remove the oxide layer by dry or wet etching to release the designed cantilever beam and free mass block structure to ensure the free movement of the device structure. At this time, the back substrate 203 of the original SOI wafer can also be used as the second silicon structure layer to provide flexibility for the design of the device. The first and second silicon structures can be optionally provided with a hybrid elastic structure, and mechanical connection and electrical isolation can be achieved on the same mass block, thereby supporting the development of multi-axis devices.

[0064] S12, performing high-temperature fusion bonding of the bonded assembly of the cap layer 1 and the device layer 2 to the substrate layer 3, and annealing at a high temperature of 800° C. for 3 hours.

[0065] S13. After bonding is completed, the oxide layer of the sealed part of the substrate is removed by wet etching or dry etching. The silicon epitaxial process is used to adjust the pressure and gas environment in the epitaxial growth cavity to form a local vacuum environment or fill it with inert gases such as nitrogen. After the epitaxial growth is completed, the grooves and channels are quickly sealed to achieve vacuum or gas packaging in the closed cavity. The epitaxial layer is used as a sealing material to form a stable airtight packaging layer on the substrate, thereby closing the exhaust hole and forming the vacuum cavity required for the gyroscope. The gas environment is maintained in the area where the accelerometer is located to form a gas cavity, thereby achieving packaging in which vacuum and gas coexist.

[0066] In addition, the optional vacuum packaging method can also be achieved through laser packaging, such as Figure 2 As shown, the oxide layer of the substrate sealing part is first removed by wet etching or dry etching, and the sealing area is heated by a precise laser beam to locally melt and seal the exhaust hole 302 to form a stable laser sealing layer 305. During the laser heating process, the silicon in the exhaust hole area is quickly melted and re-solidified, thereby achieving sealing and ensuring the vacuum state in the device cavity. This process controls the laser power, exposure time and focus position to accurately achieve the melting and sealing of the local area, without affecting the performance of other areas of the device, and can effectively maintain the required gas or vacuum environment.

[0067] S14. Coat a polyimide insulating material layer 401 on the surface of the packaged wafer, and form a metal wiring pattern in the designated area by photolithography. Deposit a conductive layer 402 on the surface by sputtering or electroplating technology with a thickness of 1 μm to form a redistribution layer. Subsequently, perform surface flattening by chemical mechanical polishing.

[0068] S15. Cut the wafer, separate each IMU unit from the wafer, and use flip chip technology to package the IMU chip onto a substrate with pins.

[0069] The above is only an embodiment of the present invention, and the common sense such as the known specific structure and characteristics in the scheme is not described in detail here. For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive, and the scope of the present invention is defined by the attached claims rather than the above description, so it is intended to include all changes within the meaning and scope of the equivalent elements of the claims. Any figure mark in the claims should not be regarded as limiting the claims involved.

Claims

1. A MEMS device architecture, characterized in that: The invention comprises a cap layer (1), a device layer (2) and a substrate layer (3), wherein the cap layer (1) and the device layer (2) are bonded, and the whole after bonding is bonded to the substrate layer (3). The cap layer (1) is manufactured based on a first silicon substrate (100), a cavity structure (104) is provided at the bottom of the cap layer (1), a high-deep groove structure is provided inside the cap layer (1), a silicon dioxide film (102) is provided on the groove wall of the high-deep groove structure, polysilicon (103) is deposited and filled in the high-deep groove structure, and a silicon dioxide layer (101) is provided on the upper surface of the first silicon substrate (100); The device layer (2) is manufactured based on an SOI wafer, and comprises a first silicon structure layer composed of a top silicon (201), a buried oxide layer (202), and a second silicon structure layer composed of a back substrate silicon (203); The substrate layer (3) comprises a second silicon substrate (300), the top surface of the second silicon substrate (300) is provided with a bottom cavity (301), and the bottom surface of the second silicon substrate (300) is provided with an exhaust hole (302).

2. The MEMS device architecture according to claim 1, characterized in that: The silicon dioxide layer (101) is coated with a polyimide insulating material layer (401), and a conductive layer (402) is provided on the polyimide insulating material layer (401).

3. The MEMS device architecture according to claim 1 or 2, characterized in that: A silicon epitaxial growth layer (303) is provided on the bottom surface of the second silicon substrate (300).

4. The MEMS device architecture according to claim 1 or 2, characterized in that: A laser sealing layer (305) is provided on the bottom surface of the second silicon substrate (300) for sealing the exhaust hole (302).

5. A method for preparing a MEMS device architecture as claimed in claim 3 or 4, characterized in that: The following steps are involved: S1. The cap layer (1) is manufactured based on a highly doped first silicon substrate (100), which is first placed in an oxidation furnace for thermal oxidation to generate a uniform silicon dioxide layer (101) on the surface of the first silicon substrate (100); S2, forming a high-depth trench structure with a high aspect ratio on the first silicon substrate (100) using photolithography and deep silicon etching processes; S3, performing secondary thermal oxidation in the high-deep groove structure to form a silicon dioxide film (102) on the groove wall, and using a low-pressure chemical vapor deposition method to fill polysilicon (103) into the high-deep groove structure, and then using chemical mechanical polishing to polish the upper surface of the polysilicon (103) to be flush with the surface of the silicon dioxide layer (101); S4, first thinning a designated area on the back side of the first silicon substrate (100), then completing photolithography and etching, removing the oxide layer at a preset position, and then successively forming cavity structures (104) of different depths to provide support for subsequent device packaging, removing the oxide layer and performing surface treatment, and flipping the cap layer (1) for bonding with the device layer (2); S5, providing an SOI wafer as a device layer (2), the SOI wafer comprising a top silicon layer (201), a buried oxide layer (202) and a back substrate (203); placing the SOI wafer in an oxidation furnace for oxidation treatment to form a silicon dioxide insulating layer on the surface; in preparation for realizing silicon structures with different heights later, selectively thinning the oxide layer in selected different areas; S6, coating the top of the oxide layer of the device layer (2) with photoresist, transferring the patterns of the accelerometer and the gyroscope onto the photoresist layer using a stepper lithography machine, performing deep silicon etching in the area exposed by the photolithography pattern using a plasma etching device to form a device structure of the first silicon structure layer, and etching to the SOI buried oxide layer (202); S7, continue to thin the top oxide layer until the silicon structure layer in the selected area is exposed, and etch the silicon structure layer to a preset height, and remove the oxide layer by wet etching or dry etching to obtain a silicon device structure with inconsistent height; S8, providing a second silicon substrate (300) as a substrate layer (3), etching a top surface of the second silicon substrate (300) to form a bottom cavity (301) for accommodating the movement of the device structure, etching a vent hole (302) on the back surface of the second silicon substrate (300); and forming an oxide layer (304) through a thermal oxidation process; S10, before bonding, the cap layer (1) and the device layer (2) are cleaned and then subjected to surface activation treatment, and the cap layer (1) and the device layer (2) are melt-bonded in a dust-free environment; Grind and thin the bottom silicon layer after bonding to a preset height; S11, performing deep silicon etching on the back of the entire bonded device, and then removing the oxide layer by dry or wet etching to release the designed cantilever beam and free mass block structure to ensure free movement of the device structure. At this time, the back substrate (203) of the original SOI wafer becomes the second silicon structure layer; A hybrid elastic structure is provided in the first silicon structure layer and the second silicon structure; S12, performing high-temperature fusion bonding of the bonded cap layer (1) and device layer (2) assembly to the substrate layer (3), and annealing at a high temperature of 800° C. for 3 hours.

6. The preparation method according to claim 5, characterized in that: After the cap layer (1) and the device layer (2) are melt-bonded in a dust-free environment, annealing is further performed at 400° C. for 2 hours.

7. The preparation method according to claim 5 or 6, characterized in that: Also includes: S13. After bonding is completed, the oxide layer of the sealed part of the substrate is removed by wet etching or dry etching. The silicon epitaxial process is used to adjust the pressure and gas environment in the epitaxial growth cavity to form a local vacuum environment or fill it with inert gases such as nitrogen. After the epitaxial growth is completed, the grooves and channels are quickly sealed to achieve vacuum or gas packaging in the closed cavity. The epitaxial layer is used as a sealing material to form a stable airtight packaging layer on the substrate, thereby closing the exhaust hole and forming the vacuum cavity required for the gyroscope. The gas environment is maintained in the area where the accelerometer is located to form a gas cavity, thereby achieving wafer packaging in which vacuum and gas coexist.

8. The preparation method according to claim 7, characterized in that: Also includes: S14. The packaging method is implemented by laser packaging. The oxide layer of the sealing part of the substrate is removed by wet etching or dry etching, and then the sealing area is heated by a precise laser beam to locally melt and seal the exhaust hole (302) to form a stable laser sealing layer (305). During the laser heating process, the silicon in the exhaust hole area is quickly melted and re-solidified, thereby achieving sealing and ensuring the vacuum state in the device cavity.

9. The preparation method according to claim 8, characterized in that: Also includes: S15, coating a polyimide insulating material layer (401) on the surface of the packaged wafer deposited oxide layer (403), forming a metal wiring pattern in a designated area by photolithography, depositing a conductive layer (402) on the surface by sputtering or electroplating technology, and then flattening the surface by chemical mechanical polishing.

10. The preparation method according to claim 9, characterized in that: Also includes: S16. Cut the wafer, separate each IMU unit from the wafer, and use flip chip technology to package the IMU chip onto a substrate with pins.

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