Wafer polishing method, polishing device and processing equipment

Abstract

The invention provides a wafer polishing method, a polishing device and processing equipment, the wafer polishing method is used for removing a target layer comprising a first layer and a second layer with similar friction coefficients, a primary polishing process comprises a first polishing stage and a second polishing stage, and the method comprises the following steps: determining first time; determining the material removal amount and the material removal rate of the wafer in the second polishing stage; calculating second time; adjusting the first time according to the second time to obtain third time; and polishing the current wafer, executing a first polishing stage according to a third time, and executing a second polishing stage according to a second time, so that the second layer reaches the target thickness. According to the polishing method, the chemical mechanical polishing efficiency and polishing precision of the specific wafer can be improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of chemical mechanical polishing and is used for processing semiconductor wafers. Specifically, it relates to a wafer polishing method, a polishing device and a processing equipment. Background Art

[0002] Chemical Mechanical Polish (CMP) equipment is one of the key processes in the manufacturing process of semiconductor devices, which is used to remove the excess material layer on the wafer surface and achieve wafer surface planarization. As the process nodes of integrated circuits continue to improve, the CMP process is used more and more in the entire manufacturing process, and the polishing requirements for different wafer types are also diverse.

[0003] In the CMP process, detecting the change of the driving motor torque is used as an end point detection (EPD) method to determine when the polishing is completed. However, when two films with similar friction coefficients need to be removed by CMP through two polishing stages, due to the similar friction coefficients of the two films, the end point detection method of detecting the change of the motor torque fails in the first polishing stage. Subsequently, only the polishing time of the first polishing stage can be set as a fixed value. Controlling only the polishing time of the second polishing stage is not only not conducive to the control of polishing accuracy, easily causing the wafer to be under-polished or over-polished, but also causing the polishing time of the second polishing stage to change drastically, affecting the production efficiency of the CMP equipment and even the entire production line. And as the polishing pad wears, the change curve of the motor torque will change, resulting in the failure of the end point detection method of detecting the change of the driving motor torque in the second polishing stage, further exacerbating the risk of the wafer being under-polished or over-polished. Summary of the Invention

[0004] In view of this, the present invention provides a wafer polishing method, a polishing device and a processing equipment, so as to solve or at least alleviate one or more of the above problems and other problems existing in the prior art.

[0005] The first aspect of the present invention provides a wafer polishing method, which is used for removing a target layer. The target layer includes a first layer and a second layer with similar friction coefficients. One polishing process of the target layer includes a first polishing stage and a second polishing stage, and the method includes the following steps: Determine a first time; Determine the material removal amount and material removal rate of the current wafer in the second polishing stage, and calculate a second time according to the material removal amount and material removal rate of the current wafer in the second polishing stage; Adjust the first time according to the second time to obtain a third time, including: when the second time falls within a predetermined threshold range, the third time is equal to the first time; when the second time does not fall within the predetermined threshold range, calculate an adjustment value, and determine the third time according to the adjustment value and the first time; Perform a first polishing stage according to the third time, and perform a second polishing stage according to the second time, so that the second layer reaches a target thickness.

[0006] Optionally, the determining of the first time includes: Determine the first predetermined time as the first time, and / or determine the third time of the previous wafer as the first time, and the first predetermined time falls within the predetermined threshold range.

[0007] Optionally, the wafer polishing method further includes: Measure the initial thickness of the second layer of the wafer before the first polishing stage as the pre-thickness value; Measure the remaining thickness of the second layer of the wafer after the second polishing stage ends as the post-thickness value.

[0008] Optionally, the first polishing stage removes a part of the first layer, and the second polishing stage removes the remaining part of the first layer and a part of the second layer. The determining of the material removal amount and the material removal rate of the wafer in the second polishing stage includes: Determine the thickness of the remaining part of the first layer; Determine the material removal amount of the wafer in the second polishing stage according to the pre-thickness value, the thickness of the remaining part of the first layer, and the target thickness; and / or, Determine the material removal amount of the wafer in the second polishing stage according to the pre-thickness value, the thickness of the remaining part of the first layer, and the post-thickness value; Determine the material removal rate according to the material removal amount of the wafer in the second polishing stage.

[0009] Optionally, the determining of the thickness of the remaining part of the first layer includes: After the first polishing stage of the first wafer ends, measure the thickness of the remaining part of the first layer of the first wafer; Determine the thickness of the remaining part of the first layer of the current wafer according to the thickness of the remaining part of the first layer of the previous wafer.

[0010] Optionally, the first time and the second time of the first wafer are determined through the following steps: Determine the first predetermined time as the first time of the first wafer; Determine the material removal amount of the first wafer in the second polishing stage based on the previous thickness value of the first wafer, the thickness of the remaining part of the first layer, and the target thickness; Determine the second time of the first wafer based on the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage.

[0011] Optionally, the determining the second time of the first wafer according to the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage includes: Determine the second time of the first wafer based on the thickness of the remaining part of the first layer of the first wafer and the theoretical removal rate of the first layer, and the previous thickness value of the first wafer, the target thickness, and the theoretical removal rate of the second layer.

[0012] Optionally, the first time and the second time of the current wafer are determined through the following steps, including: Determine the third time of the previous wafer as the first time of the current wafer; Determine the material removal amount of the current wafer in the second polishing stage based on the previous thickness value of the current wafer, the thickness of the remaining part of the first layer, and the target thickness; Calculate the actual material removal amount of the previous wafer in the second polishing stage based on the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer, and the post-thickness value; Calculate the actual material removal rate of the previous wafer in the second polishing stage based on the actual material removal amount of the previous wafer in the second polishing stage and the polishing time of the previous wafer in the second polishing stage; Determine the second time of the current wafer based on the material removal amount of the current wafer in the second polishing stage and the actual material removal rate of the previous wafer in the second polishing stage.

[0013] Optionally, the calculating the adjustment value and determining the third time according to the adjustment value and the first time includes: Calculate the difference between the second time and the first predetermined time; Determine an adjustment coefficient, where the adjustment coefficient is associated with one or more of the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, the thickness of the first layer, the thickness of the second layer, the thickness of the remaining part of the first layer, the target thickness, and the usage time of the polishing pad; Determine the adjustment value according to the adjustment coefficient and the difference; Use the sum of adding the adjustment value to the first time as the third time.

[0014] Optionally, determining the thickness of the remaining portion of the first layer of the current wafer based on the thickness of the remaining portion of the first layer of the previous wafer includes: Correcting the thickness of the remaining portion of the first layer of the previous wafer according to the adjustment value of the previous wafer; Determining the thickness of the remaining portion of the first layer of the corrected previous wafer as the thickness of the remaining portion of the first layer of the current wafer.

[0015] Optionally, calculating the actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the thickness of the remaining portion of the first layer, and the post-thickness value includes: calculating the actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the post-thickness value, and the thickness of the remaining portion of the first layer of the corrected previous wafer.

[0016] A second aspect of the present invention provides a wafer polishing apparatus for performing the wafer polishing method as described in the first aspect, including: a first polishing unit, a second polishing unit, and a measuring unit; The first polishing unit includes a first polishing head and a first polishing platen for performing the first polishing stage; The second polishing unit includes a second polishing head and a second polishing platen for performing the second polishing stage; The measuring unit includes a measuring device for measuring the previous thickness value and the post-thickness value.

[0017] A third aspect of the present invention provides a wafer processing device, including a controller, a memory, and the wafer polishing apparatus as described in the second aspect. The memory is used to store the previous thickness value and the post-thickness value measured by the measuring device, and the controller is used to control the wafer polishing apparatus to perform the wafer polishing method as described in the first aspect.

[0018] The wafer polishing method of the present invention has the following technical effects: It does not use the change in the torque of the large platen as the end measurement means, thereby avoiding the failure of the measurement means and reducing the risk of under-polished or over-polished wafers. And the present invention ensures timely and precise control of the polishing thickness by grading and linkage adjustment of the polishing times of the two polishing stages, improving the wafer production efficiency and polishing accuracy. At the same time, it avoids the problem of multiple wafers being too thin or too thick in thickness, increases the system fault tolerance and response time, and also extends the service life of the polishing pad, greatly reducing the production cost. Description of the Drawings

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments described in the embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings.

[0020] Figure 1 It is a schematic structural diagram of a wafer polishing unit.

[0021] Figure 2 It is a schematic flowchart of an embodiment of a wafer polishing method of the present invention.

[0022] Figure 3 It is Figure 1 a schematic flowchart of an embodiment of step S2 of the wafer polishing method in

[0023] Figure 4 It is Figure 1 a schematic flowchart of an embodiment of step S3 of the wafer polishing method in

[0024] Figure 5 It is a schematic diagram of the material removal situation during a single polishing process of the present invention.

[0025] Figure 6 It is a schematic flowchart of another embodiment of a wafer polishing method of the present invention.

[0026] Figure 7 It is a schematic structural diagram of a wafer polishing device 100 of the present invention.

[0027] Figure 8 It is a schematic structural diagram of a wafer processing device 1000 of the present invention.

[0028] Figure 9 It is a schematic flowchart of another embodiment of a wafer polishing method of the present invention.

[0029] Reference numerals: The first polishing unit 1; the second polishing unit 2; the measuring unit 3; the wafer buffer position 4; The polishing head 10; the polishing pad 20; the polishing disk 30; the polishing liquid supply device 40; the dressing device 50; The wafer polishing device 100; the controller 200; the memory 300; The wafer processing device 1000. Detailed embodiments

[0030] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art shall fall within the scope protected by the embodiments of the present invention.

[0031] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be construed as a limitation to the present invention.

[0032] In addition, in the description of the present invention, unless otherwise specified and defined, it should be noted that the terms "installation", "connection", and "connection" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the communication inside two elements. It can be directly connected, or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific situations.

[0033] Figure 1 is a schematic diagram of a wafer polishing unit in a CMP device. As shown in the figure, a polishing pad 20 covers the upper surface of a polishing platen 30. A polishing liquid supply device 40 disperses polishing liquid on the surface of the polishing pad 20. A dressing device 50 is used to dress the surface of the polishing pad to a state suitable for polishing. During the polishing operation, a polishing head 10 presses the surface of the wafer to be polished against the surface of the rotating polishing pad 20 and rotates and moves. The polishing liquid is distributed between the polishing pad and the wafer to complete the removal of the surface material of the wafer under the action of chemical mechanics, achieving the purpose of global and local planarization.

[0034] When continuous two-stage polishing of the wafer is required, two Figure 1 as shown in the figure of the wafer polishing units can be connected in series to form a dual-platen process, enabling the wafer to pass through two wafer polishing units in sequence and applying different polishing conditions respectively to achieve a specific polishing purpose: polishing in the first polishing unit at a material removal rate much greater than that in the second polishing unit to remove a thicker target layer and improve production efficiency; in the second polishing unit, the material removal rate is smaller to ensure the stability and accuracy of the polishing result.

[0035] Taking the fabrication of a shallow trench isolation structure as an example, the general process flow is as follows: First, a silicon nitride layer is deposited on the surface of a silicon substrate, then a shallow trench is etched, and then a silicon dioxide layer is deposited. At this time, the silicon dioxide fills the shallow trench in the wafer and covers the surface of the silicon nitride layer. Finally, the wafer is passed through two polishing units in sequence to remove the excess silicon dioxide and a certain amount of silicon nitride on the wafer surface, ensuring that there is no residual silicon dioxide covering the surface of the silicon nitride layer after polishing, while retaining the silicon dioxide in the shallow trench, that is, making the polishing finally stop stably on the silicon nitride layer to form a shallow trench isolation.

[0036] Since the friction coefficients of the silicon dioxide layer and the silicon nitride layer are close, the end-point detection method of measuring the change in the motor torque in the first polishing unit fails. Therefore, only its polishing time can be set to a fixed value. At the same time, since the polishing needs to stop on the silicon nitride layer, that is, the silicon nitride layer is not completely removed, the end-point detection method of controlling the polishing time by measuring the change in the motor torque in the second polishing unit is not accurate enough, or the final thickness cannot be adjusted in time, seriously affecting the polishing quality, or resulting in too long polishing time, and then causing a drastic change in the polishing time of the second unit, which cannot adapt to the production rhythm of the upstream and downstream during continuous production, thereby reducing the production efficiency of the CMP equipment and even the entire chip production line. In addition, once the change curve of the motor torque changes with the wear of the polishing pad, the control of the polishing time will directly fail, further increasing the risk of under-polishing or over-polishing the wafer, so that the produced wafers cannot meet the requirements of subsequent processes, resulting in a decrease in the yield.

[0037] The present invention provides a wafer polishing method for removing a target layer on the surface of a wafer. The target layer includes a double-layer film structure and the first layer and the second layer have close friction coefficients. The primary polishing process of the target layer in this method includes a first polishing stage and a second polishing stage, and is used to continuously polish the wafer so that the polished wafer has a second layer reaching the target thickness.

[0038] In one embodiment, as Figure 2 shown, the following steps are included: S1. Determine the first time; S2. Determine the material removal amount and material removal rate of the wafer in the second polishing stage; S3. Calculate the second time according to the material removal amount and material removal rate of the wafer in the second polishing stage; S4. Adjust the first time according to the second time to obtain the third time, including: when the second time falls within a predetermined threshold range, the third time is equal to the first time; when the second time does not fall within the predetermined threshold range, calculate an adjustment value, and determine the third time according to the adjustment value and the first time; S5. Perform the first polishing stage according to the third time, and perform the second polishing stage according to the second time, so that the second layer reaches the target thickness.

[0039] The polishing method of this embodiment does not rely on endpoint detection. After determining the second time by calculation, the first time is adjusted in linkage and graded manner according to the second time, which not only makes the polishing time of the first polishing stage adjustable, ensuring that the polishing accuracy can be controlled in a timely and accurate manner, but also ensures the stability and continuity of the first polishing stage as much as possible. According to the polishing method of this embodiment, when removing the target layer including a double-layer film structure with a similar friction coefficient, the polishing process can be stopped when the second layer reaches the target thickness, with low control complexity, high polishing accuracy, and high production efficiency.

[0040] Optionally, in step S1, the first predetermined time is determined as the first time, or the third time of the previous wafer is determined as the first time. Specifically, the current wafer may be the first wafer or the mth (m>1)th wafer. For the first wafer, the first time is set to the first predetermined time, and the first predetermined time may be an empirical value determined according to the actual processing conditions. For the mth wafer, the first time can be set to the first predetermined time, but it is preferably set to the third time of the m-1th wafer, so that the influence of the adjustment of the polishing time of the previous wafer is continued when polishing the current wafer, which is beneficial to the consistency of the wafer during continuous production.

[0041] Optional, such as Figure 3 As shown, step S2 and step S3 include the following steps: S21. Determine the material removal amount of the current wafer in the second polishing stage according to the thickness of the wafer. The material removal amount represents the volume removed from the wafer during the polishing process. Since the diameter of the wafer is known during processing, the material removal amount can be determined by measuring the thickness of the wafer.

[0042] In one embodiment, the wafer polishing method of the present invention also includes measuring the initial thickness of the second layer of the current wafer as a pre-thickness value PreThk before the first polishing stage, and then subtracting the target thickness TarThk of the second layer film after CMP determined by the wafer processing target from the pre-thickness value PreThk. The result obtained is the thickness of the material removed by polishing in the second polishing stage, and the corresponding volume is the material removal amount in the second polishing stage.

[0043] In one embodiment, the wafer polishing method of the present invention further includes measuring the remaining thickness of the second layer of the current wafer after the end of the second polishing stage as the post-thickness value PostThk. When determining the material removal amount of the previous wafer in the second polishing stage, since the previous wafer has been polished, that is, the post-thickness value PostThk has been measured, the material removal amount calculated by subtracting the post-thickness value PostThk from the pre-thickness value PreThk is the actual material removal amount of the previous wafer in the second polishing stage, and the result is more accurate.

[0044] S22. Determine the actual material removal rate of the previous wafer in the second polishing stage as the material removal rate of the current wafer in the second polishing stage.

[0045] The unit of the material removal rate (MRR) is usually expressed as a volume unit divided by a time unit, which is used to describe the volume of material that can be removed per unit time. Its calculation process is the material removal amount divided by the polishing time.

[0046] Specifically, for the first wafer, since there is no previous wafer, the theoretical material removal rate of the second layer can be directly used as the actual material removal rate of the previous wafer in the second polishing stage. The theoretical material removal rate can be obtained by using a model describing the material removal rate or by measuring and calculating through trial polishing.

[0047] For the m-th wafer, since the (m - 1)-th wafer has been polished, the actual material removal rate of the (m - 1)-th wafer in the second polishing stage can be calculated according to the material removal amount or actual material removal amount and polishing time of the (m - 1)-th wafer in the second stage. Compared with using the theoretical removal rate, it is more accurate and can reduce the decline in polishing accuracy caused by the change of the material removal rate due to the change of polishing conditions, which makes it impossible to calculate the accurate second time in the next step.

[0048] S23. Divide the material removal amount of the current wafer in the second polishing stage by the material removal rate to calculate the second time.

[0049] Optionally, in the polishing recipe of the dual-disk process, corresponding polishing conditions are set so that the polishing times of the first polishing stage and the second polishing stage are not very different, which can reduce the waiting time of the wafer in continuous production, thereby improving production efficiency. Therefore, in step S4, a predetermined threshold range can be set according to the polishing time of the first polishing stage or the second polishing stage in the polishing recipe. In this embodiment, a predetermined threshold range is set around the first predetermined time, that is, the first predetermined time falls within the predetermined threshold range. Preferably, the first predetermined time is set as the median of the predetermined threshold range. Further, the limit value of the polishing time of the second polishing stage is determined by means of trial polishing, and the predetermined threshold range is set according to the limit value of the polishing time. Furthermore, the second time of the first wafer falls within the predetermined threshold range, so the first time of the first wafer is not adjusted. Step S4 adjusts the first time according to the size relationship between the second time and the set predetermined threshold range, and only adjusts the first time when it exceeds the predetermined threshold range, so as to realize the hierarchical and linkage adjustment of the first time and the second time.

[0050] When the second time is less than the lower limit of the predetermined threshold range, the wafer is over-polished, and the desired adjustment direction of the polishing time of the second polishing stage is to decrease; when the second time is greater than the upper limit of the predetermined threshold range, the wafer is under-polished, and the desired adjustment direction of the polishing time of the second polishing stage is to increase. However, only adjusting the second time not only has a slow response speed, but also the second time has an adjustment limit. Therefore, in this embodiment, the adjustment direction of the polishing time of the first polishing stage is made the same as the desired adjustment direction of the polishing time of the second polishing stage, so as to reduce the adjustment amount of the second time, thereby realizing the control of the polishing accuracy of the wafer with a faster response speed, and also avoiding producing wafers that do not meet the requirements after the second time reaches the adjustment limit. The adjustment amplitude of the polishing time of the first polishing stage can be measured according to the difference between the second time and the first predetermined time, and the different influence degrees of the first polishing stage and the second polishing stage on the polishing process.

[0051] Specifically, as Figure 4 shown, in step S4, when the second time does not fall within the predetermined threshold range, calculate the adjustment value, and determine the third time according to the adjustment value and the first time, including the following steps: S41. Calculate the difference between the second time and the first predetermined time. The first predetermined time is the basic time of the first polishing stage, and the difference between the second time and the first predetermined time can represent the adjustment direction of the polishing time of the first polishing stage, and partially represent the adjustment amplitude of the polishing time of the first polishing stage.

[0052] S42. Determine the adjustment coefficient. The adjustment coefficient is used to measure the different effects of the first polishing stage and the second polishing stage on the polishing process, and thus partially represents the adjustment range of the polishing time in the first polishing stage. Optionally, the adjustment coefficient is determined according to the material removal rates of the first polishing stage and the second polishing stage when removing the corresponding material layers, so as to balance the different effects of the same polishing time between the first polishing stage and the second polishing stage on the polishing result by the adjustment coefficient. Preferably, the adjustment coefficient is an empirical value determined according to trial polishing and is associated with one or more of the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, the actual material removal rate of the first polishing stage, the actual material removal rate of the second polishing stage, the thickness of the first layer, the thickness of the second layer, the target thickness, and the usage time of the polishing pad. Further, the adjustment coefficient is the ratio of the theoretical removal rate of the second layer to the theoretical removal rate of the first layer, or the adjustment coefficient is the ratio of the actual material removal rate of the second polishing stage to the actual material removal rate of the first polishing stage. Furthermore, since the polishing pad wears continuously with the usage time and the polishing pad will be replaced after reaching the service life, the adjustment coefficient also changes according to the usage times of the polishing pads in the first polishing stage and the second polishing stage respectively. In a preferred embodiment, since the first polishing stage wears the polishing pad more severely, the adjustment coefficient can be expressed as a decreasing function of the polishing time. For example, the ratio of the theoretical removal rate of the second layer to the theoretical removal rate of the first layer is multiplied by a gradually decreasing constant in stages according to time as the adjustment coefficient.

[0053] S43. Determine the adjustment value according to the adjustment coefficient and the difference. Optionally, the product or quotient of the adjustment coefficient and the difference is determined as the adjustment value to represent the degree of expected adjustment in the first polishing stage.

[0054] S44. Take the sum of the adjustment value and the first time as the third time, that is: the third time = the first time + the adjustment value.

[0055] The first predetermined time falls within the predetermined threshold range. When the second time is less than the lower limit of the predetermined threshold range, there is a risk of over-polishing or over-polishing of the wafer. The difference calculated in step S41 is negative, and the adjustment value is also negative. The third time calculated according to the formula in step S44 is less than the first time, that is, the polishing time in the first polishing stage is reduced. Thus, the material removal amount in the first polishing stage is reduced, the risk of over-polished wafers can be reduced with a faster response speed, and the post-thickness of the wafer can also approach the target thickness faster. When the second time is greater than the upper limit of the predetermined threshold range, there is a risk of under-polishing or under-polishing of the wafer. The difference calculated in step S41 is positive, and the adjustment value is also positive. The third time calculated according to the formula in step S34 is greater than the first time, that is, the polishing time in the first polishing stage is increased.

[0056] The technical solution of the present invention adjusts the polishing time of the first stage only when the adjustment range of the second time is relatively large, that is, hierarchical adjustment, so as to ensure the stability and continuity of the first polishing stage as much as possible; at the same time, it can automatically adjust the polishing time of the first polishing stage according to the adjustment expectation and adjustment range of the second time, that is, linkage adjustment, so that the wafer can reach the target thickness faster, and the faster control response speed significantly reduces the risk of under-polished or over-polished wafers, further improving the polishing accuracy and production efficiency of chemical mechanical polishing.

[0057] In advanced processes, in order to meet the requirements of subsequent processes, the first layer must be completely polished away during the polishing process, and the polishing must stop stably on the second layer. To this end, as Figure 5 shown, by removing most of the first layer at a relatively large material removal rate in the first polishing stage, and then removing the remaining part of the first layer and part of the second layer at a relatively small material removal rate in the second polishing stage, the balance between polishing efficiency and polishing effect is achieved. This means that in the second polishing stage, not only the second layer is removed, but also the remaining part Offset of the first layer is removed first. Therefore, there will be an error if only the part of the second layer removed is considered when calculating the material removal amount in the second polishing stage, which affects the polishing effect.

[0058] In order to eliminate the adverse effect of the above error on the polishing accuracy, in one embodiment, as Figure 6 shown, the first time and the second time of the wafer are determined through the following steps.

[0059] S61. Determine the first predetermined time as the first time of the first wafer.

[0060] S62. Determine the material removal amount of the first wafer in the second polishing stage according to the previous thickness value of the first wafer, the thickness of the remaining part of the first layer, and the target thickness.

[0061] For the first wafer, perform the first polishing stage according to the first predetermined time, and measure the thickness value of the remaining first layer film after the end of the first polishing stage as the median thickness MidThk of the first wafer. The material removal amount of the first wafer in the second polishing stage = previous thickness value + median thickness - target thickness.

[0062] S63. Determine the second time of the first wafer according to the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage.

[0063] Optionally, an estimated value of the material removal rate in the second polishing stage is obtained by weighted averaging the theoretical removal rate of the first layer and the theoretical removal rate of the second layer, and then the second time is calculated by dividing the material removal amount of the first wafer in the second polishing stage calculated by S62 by the estimated value of the material removal rate in the second polishing stage.

[0064] Preferably, the polishing time of the remaining part of the first layer and the polishing time of the removed part of the second layer can be calculated separately, and then the two polishing times are added to determine the second time of the first wafer. That is, the polishing time of the remaining part of the first layer is calculated by dividing the median thickness by the theoretical removal rate of the first layer, and the polishing time of the removed part of the second layer is calculated by dividing the difference between the previous thickness value and the target thickness by the theoretical removal rate of the second layer. Then, the polishing time of the remaining part of the first layer and the polishing time of the removed part of the second layer are summed to calculate the second time.

[0065] S64. Determine the third time of the previous wafer as the first time of the current wafer.

[0066] For the m-th wafer (m>1), determine the third time of the (m - 1)-th wafer as the first time of the m-th wafer.

[0067] S65. Determine the material removal amount of the current wafer in the second polishing stage according to the previous thickness value of the current wafer, the thickness of the remaining part of the first layer, and the target thickness.

[0068] S66. Calculate the actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer, and the post-thickness value.

[0069] For the m-th wafer (m>1), when calculating the material removal amount of the current wafer in the second polishing stage and the material removal amount of the previous wafer in the second polishing stage, the material removal amount in the second stage is corrected based on the remaining part of their respective first layers to calculate the actual material removal amount of the previous wafer in the second polishing stage. Preferably, since measuring the median thickness between the two polishing stages for each wafer will greatly affect the production efficiency, the median thickness of the first wafer can be used for all, or the median thickness is measured every several wafers, and then the thickness of the remaining part of the first layer of the previous wafer and the current wafer is determined according to the median thickness.

[0070] S67. Calculate the actual material removal rate of the previous wafer in the second polishing stage according to the actual material removal amount of the previous wafer in the second polishing stage and the polishing time of the previous wafer in the second polishing stage.

[0071] When calculating the time material removal rate of the previous wafer, divide the actual material removal amount of the (m - 1)-th wafer in the second polishing stage calculated in step S66 by the actual polishing time of the (m - 1)-th wafer in the second polishing stage to calculate the actual material removal rate of the (m - 1)-th wafer in the second polishing stage.

[0072] S68. Determine the second time of the current wafer based on the material removal amount of the current wafer in the second polishing stage and the actual material removal rate of the previous wafer in the second polishing stage.

[0073] Divide the material removal amount of the m-th wafer in the second polishing stage calculated in step S65 by the actual material removal rate of the (m - 1)-th wafer in the second polishing stage calculated in step S67, and the second time of the current wafer can be calculated.

[0074] Through the correction of the material removal amount of the wafer in the second stage in this embodiment, it is ensured that most of the first layer can be quickly removed in the first polishing stage, and the polishing can be stably stopped at the target thickness of the second layer in the second polishing stage, improving the accuracy of polishing control.

[0075] In one embodiment, in order to further improve the control accuracy, the thickness of the remaining part of the first layer of the previous wafer can be corrected according to the adjustment value of the previous wafer; then the thickness of the remaining part of the first layer of the corrected previous wafer is determined as the thickness of the remaining part of the first layer of the current wafer.

[0076] Optionally, the adjustment value is used to reduce or increase the first time, so that the change amount of the material removal amount of the first layer in the first polishing stage after adjustment can be calculated according to the adjustment value and the theoretical removal rate of the first layer, that is, the change amount of the increase or decrease of the thickness of the remaining part of the first layer of the (m - 1)-th wafer is calculated, so as to correct the thickness of the remaining part of the first layer of the (m - 1)-th wafer. Determining the thickness of the remaining part of the first layer of the corrected (m - 1)-th wafer as the thickness of the remaining part of the first layer of the m-th wafer is closer to the actual value than using the thickness median of the first wafer, and there is no need to repeatedly measure the thickness median, while improving the polishing accuracy and polishing efficiency. It can be understood that when calculating the actual material removal rate of the (m - 1)-th wafer in the second polishing stage, the thickness of the remaining part of the first layer of the corrected (m - 1)-th wafer can also be used to replace the value before correction, further improving the polishing accuracy and polishing efficiency. In wafer processing, the improvement of polishing accuracy means that the wafer can better meet the requirements of subsequent process technologies, thereby improving the processing yield of the wafer.

[0077] The present invention also provides a wafer polishing apparatus 100 for implementing the wafer polishing method of the present invention. In one embodiment, as Figure 6 shown, it includes: a first polishing unit 1, a second polishing unit 2, and a measuring unit 3. The first polishing unit 1 includes a first polishing head and a first polishing platen, and is used to perform the first polishing stage; the second polishing unit 2 includes a second polishing head and a second polishing platen, and is used to perform the second polishing stage. It can be understood that the first polishing platen and the second polishing platen also include their respective polishing liquid supply devices and dressing devices.

[0078] The measuring unit 3 includes a measuring component, which is preferably an optical measuring component, to measure the thickness of the wafer placed on the measuring unit, including the pre-thickness value, the mid-thickness value, and the post-thickness value.

[0079] When the mid-thickness value does not need to be measured, the transmission route of the wafer in the wafer polishing apparatus 100 is in sequence: the measuring unit 3, the first polishing unit 1, the second polishing unit 2, the measuring unit 3. When the mid-thickness value needs to be measured, the transmission route of the wafer in the wafer polishing apparatus 100 is in sequence: the measuring unit 3, the first polishing unit 1, the measuring unit 3, the second polishing unit 2, the measuring unit 3. Optionally, a wafer buffer 4 is further provided between any two of the first polishing unit 1, the second polishing unit 2, and the measuring unit 3 to interact with the wafer by means of a manipulator, a first polishing head, and a second polishing head, so as to realize the transmission of the wafer.

[0080] The present invention further provides a wafer processing apparatus 1000, as Figure 7 shown. The wafer processing apparatus includes a wafer polishing apparatus 100, a controller 200, and a memory 300. The polishing recipe of the wafer and the thickness of the wafer measured by the measuring unit 3 are stored in the memory 300. The controller 200 is electrically connected to the wafer polishing apparatus 100 and the memory 300, and is configured to control the wafer polishing apparatus 100 to execute the wafer polishing method according to any embodiment of the present invention.

[0081] Figure 8 is a schematic flow chart of a wafer polishing method for manufacturing a shallow trench isolation structure according to another embodiment of the present invention. The following combines Figure 8 to specifically describe the wafer polishing apparatus 100, the wafer processing apparatus 1000, and the wafer polishing method of the present invention.

[0082] In this embodiment, the first layer of the wafer to be polished is a silicon dioxide layer, and the second layer is a silicon nitride layer. Since the diameter of the wafer is a fixed value during the processing of wafers in the same batch, for simplicity and clarity of description, the material removal amount is directly represented by the thickness of the removed material, and the material removal rate represents the thickness of the removed material per unit time.

[0083] Before starting wafer polishing, the theoretical material removal rate of the silicon dioxide layer is determined to be RR1 through trial grinding, and the theoretical material removal rate of the silicon nitride layer is determined to be RR2. The adjustment coefficient X = RR2 / RR1. In addition, it is known that the target thickness TarThk = ThkT, the first predetermined time is set as Dt, and the predetermined threshold range is [T1, T2], Dt ∈ [T1, T2], which are stored in the memory 300 together with the polishing recipe.

[0084] Under the control of the controller 200, the first wafer is transferred to the measuring unit 3 of the wafer polishing apparatus 100, and the pre-thickness value PreThk1 of the first wafer, that is, the thickness of the silicon nitride layer of the first wafer is PreThk1, is measured and stored in the memory 300.

[0085] The controller determines the first time of the first wafer as t11 = Dt, and uses it as the polishing time for the first stage in the polishing recipe, and controls the first polishing head to adsorb the first wafer and start the first polishing stage on the first polishing platen.

[0086] After completing the first polishing stage, the first wafer is transferred to the measuring unit, and the mid-thickness value MidThk of the first wafer is measured, that is, the thickness of the remaining part of the silicon dioxide layer after the first wafer completes the first polishing stage, that is, Offset1 = MidThk. It can be known that the material removal amount RRT1 of the second polishing stage of the first wafer = PreThk1 + Offset1 - ThkT.

[0087] The controller calculates the second time t21 of the first wafer. The calculation method is to calculate the remaining polishing time of the first layer by dividing the thickness of the remaining part of the first layer by the theoretical material removal rate of the first layer, and calculate the polishing time of the second layer by dividing the material removal amount of the second layer by the theoretical material removal rate of the second layer, and then sum the remaining polishing time of the first layer and the polishing time of the second layer to calculate the second time, that is, t21 = Offset1 / RR1 + (PreThk1 - ThkT) / RR2. When setting the predetermined threshold range, the calculated second time of the first wafer should fall within the predetermined threshold range, that is, t21 ∈ [T1, T2], so that the third time t31 = t11.

[0088] The controller uses the second time t21 as the polishing time for the second stage in the polishing recipe, and controls the second polishing head to adsorb the first wafer and start the second polishing stage on the second polishing platen according to the polishing recipe.

[0089] After completing the second polishing stage, under the control of the controller, the first wafer is transferred to the measuring unit again for thickness measurement, and the measured thickness is the post-thickness value PostThk1 of the first wafer.

[0090] So far, one polishing process of the first wafer is completed, and the polishing time and measurement values are stored in the memory. It can be understood that subsequently, under the control of the controller, the second wafer is transferred to the measuring unit 3, and one polishing process of the second wafer is started. The polishing process of the m-th wafer starting from the second wafer is as follows (m > 1).

[0091] When polishing the m-th wafer under the control of the controller 200, a polishing process of the (m - 1)-th wafer has been completed. The first time t1 of the (m - 1)-th wafer is stored in the memory m-1 , the third time t3 m-1 and the second time t2 m-1 ; and the previous thickness value PreThk m-1 , the thickness Offset of the remaining part of the first layer m-1 , the post-thickness value PostThk m-1 . It is also known that the adjustment value is Δt m-1 =t3 m-1 -t1 m-1 , where when the first time is increased, the adjustment value is positive; when the first time is decreased, the adjustment value is negative; when the first time is not adjusted, t3 m-1 is 0.

[0092] The controller sets the first time of the m-th wafer to t1 m =t3 m-1 , and corrects the thickness Offset m-1 of the remaining part of the first layer of the (m - 1)-th wafer to determine the thickness Offset m of the remaining part of the first layer of the m-th wafer, specifically Offset m =(1 - Δt m-1 / t1 m-1 )*Offset m-1 =(2 - t3 m-1 / t1 m-1 )*Offset m-1 .

[0093] Under the control of the controller, the m-th wafer is transferred to the measuring unit 3 to measure the previous thickness value PreThk m of the m-th wafer, and then the controller sequentially performs the following calculation steps: Calculate the actual material removal amount in the second polishing stage of the m-th wafer, specifically RRT m =PreThk1 - ThkT + Offset m ; Based on the thickness of the remaining part of the first layer of the (m - 1)-th wafer after correction, calculate the actual material removal amount of the (m - 1)-th wafer, and then calculate the actual material removal rate of the (m - 1)-th wafer in the second polishing stage according to its second polishing time t2 m-1 , after correction: RR m-1 =(PreThk m-1 -PostThk m-1 +Offset m ) / t2 m-1。

[0094] The second time of the m-th wafer is calculated based on the actual material removal amount of the m-th wafer in the second polishing stage and the actual material removal rate of the (m - 1)-th wafer, specifically t2 m =RRT m / RR m-1 。

[0095] Compare the second time t2 m with the predetermined threshold range [T1, T2]. If t2 m ∈[T1, T2], the first time t1 is not adjusted m ; if t2 m <T1, calculate the adjustment value, and reduce the first time t1 according to the adjustment value m ; if t2 m >T2, calculate the adjustment value, and increase the first time t1 according to the adjustment value m 。Specifically, first calculate the difference between the second time t2 m and the first predetermined time Dt, and then determine the adjustment value Δt according to the adjustment coefficient X and the difference m , and the calculation formula is Δt m =(t2 m -Dt)*X. Preferably, the third time can be calculated by the formula t3 m =t1 m +Δt m =t3 m-1 +Δt m It can be seen that if t2 m <T1, Δt m is negative, and the polishing time of the first polishing stage will be reduced; if t2 m >T2, Δt m is positive, and the polishing time of the first polishing stage will be increased.

[0096] The controller controls the wafer polishing device 100 to use the third time and the second time as the polishing times of the first polishing stage and the second polishing stage in the polishing recipe of the m-th wafer respectively, and completes one polishing process of the m-th wafer on the first polishing plate and the second polishing plate.

[0097] Finally, the controller controls to transfer the m-th wafer to the measuring unit again for thickness measurement, and the measured thickness is the post-thickness value PostThk of the m-th wafer m 。

[0098] To verify the polishing effect of the polishing method of this embodiment, wafers of the same batch are divided into two parts. The wafers in the first part are polished using the wafer polishing method of this embodiment, with a target thickness of 700 angstroms (Å), a first predetermined time Dt = 100 s, an adjustment coefficient X = 25, a lower limit T1 = 80 of the predetermined threshold range, and an upper limit T2 = 110 of the predetermined threshold range for polishing. The polishing results are shown in Table 1 below.

[0099] Table 1

[0100] As shown in Table 1, over-polishing occurred at the (N - 2)th wafer. When calculating the second time of the (N - 2)th wafer through the post-thickness value, the polishing time of the second polishing stage was automatically adjusted. However, since the second time of the (N - 2)th wafer fell within the threshold range, its first time was not adjusted, that is, the third time was equal to the first predetermined time of 100 s.

[0101] When calculating the second time of the (N - 1)th wafer, the polishing time of the second polishing stage was continuously and automatically reduced. The second time of the (N - 1)th wafer was less than the lower limit of the predetermined threshold range, so the first time was reduced, and the calculated third time was 99 s.

[0102] The situation of over-polishing still existed. Therefore, the situations of the Nth and (N + 1)th wafers were similar. When adjusted to the (N + 1)th wafer, the post-thickness value was only 2 Å different from the target thickness.

[0103] Since the existing polishing method is not applicable to the polishing scenario targeted by this embodiment, for the comparative example composed of the wafers in the second part, only the polishing time of the second stage was adjusted, and it was set that the value after each adjustment was the same as the second time of the wafers in the first part. The polishing results are shown in Table 2 below.

[0104] Table 2

[0105] It can be seen that only adjusting the second time results in a 10 Å difference between the post-thickness value and the target thickness at the (N + 1)th wafer, which is 5 times that of the polishing method of this embodiment. The control response speed is far slower than that of this embodiment, and more wafers are required to adjust the post-thickness value to the same level as this embodiment, seriously affecting the polishing accuracy. It can be understood that although better polishing accuracy can be obtained by reducing the second time by a larger margin, there is a limit to the adjustment amount of the second time, and the difference between the first time and the second time will become larger and larger, still having an adverse impact on the control accuracy and production efficiency.

[0106] It can be seen that the wafer polishing method of the present invention realizes the independent adjustment of the polishing time in the first polishing stage and the second polishing stage, and the polishing times of the two stages are adjusted in a linked and hierarchical manner. The linked adjustment can adjust more quickly and control more precisely the polishing thickness, making the final thickness of the wafer have better consistency. At the same time, it reduces the total polishing time for the wafer to reach the target thickness, avoiding the situation that only adjusting the polishing time in the second polishing stage cannot precisely control the polishing thickness or cannot adjust the final thickness in time, which may affect the production efficiency and yield rate of the wafer. The hierarchical adjustment enables the linked adjustment to be carried out only when the adjustment range is large, ensuring the stability and continuity of the first polishing stage as much as possible, and at the same time not significantly increasing the control complexity of the wafer processing equipment. While greatly improving the production efficiency of chemical mechanical polishing, the yield rate of the wafer is also improved and guaranteed.

[0107] Meanwhile, the wafer polishing method of the present invention does not use the change of the large disk torque as the end-point measurement means, ensuring that the polishing can stop stably at the second layer, and also avoiding the measurement failure caused by the damage of the polishing pad, reducing the risk of under-polishing or over-polishing the wafer. Moreover, since the present invention uses a two-disk process to implement the two polishing stages, that is, the polishing times of the two disks are adjusted in a linked manner. Therefore, when the polishing conditions deteriorate due to the wear of the polishing pad on one of the polishing disks, the two-disk linked adjustment can be automatically carried out, not only avoiding the problem that multiple wafers have too thin or too thick thickness, increasing the system fault tolerance and response time, but also prolonging the service life of the polishing pad and greatly reducing the production cost.

[0108] The above embodiments are only used to illustrate the embodiments of the present invention, rather than to limit the embodiments of the present invention. Those of ordinary skill in the relevant technical fields can make various changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, all equivalent technical solutions also belong to the scope of the embodiments of the present invention. The patent protection scope of the embodiments of the present invention shall be defined by the claims.

Claims

1. A wafer polishing method, characterized in that, The described wafer polishing method is used for the removal of a target layer, where the target layer includes a first layer and a second layer with similar friction coefficients. The single polishing process of the target layer includes a first polishing stage and a second polishing stage, and comprises the following steps: Determine a first time; Determine the material removal amount and material removal rate of the wafer in the second polishing stage; Calculate a second time based on the material removal amount and material removal rate of the wafer in the second polishing stage; Adjust the first time according to the second time to obtain a third time, including: when the second time falls within a predetermined threshold range, the third time is equal to the first time; when the second time does not fall within the predetermined threshold range, calculate an adjustment value, and determine the third time based on the adjustment value and the first time; Execute the first polishing stage according to the third time and execute the second polishing stage according to the second time, so that the second layer reaches a target thickness.

2. The wafer polishing method according to claim 1, characterized in that, The determination of the first time includes: Determine the first predetermined time as the first time, and / or determine the third time of the previous wafer as the first time, where the first predetermined time falls within the predetermined threshold range.

3. The wafer polishing method according to claim 2, characterized in that, It further includes: Measure the initial thickness of the second layer of the wafer before the first polishing stage as the pre-thickness value; Measure the remaining thickness of the second layer of the wafer after the second polishing stage as the post-thickness value.

4. The wafer polishing method according to claim 3, characterized in that, The first polishing stage removes a part of the first layer, and the second polishing stage removes the remaining part of the first layer and a part of the second layer. The determination of the material removal amount and material removal rate of the wafer in the second polishing stage includes: Determine the thickness of the remaining part of the first layer; Determine the material removal amount of the wafer in the second polishing stage based on the pre-thickness value, the thickness of the remaining part of the first layer, and the target thickness; and / or Determine the material removal amount of the wafer in the second polishing stage based on the pre-thickness value, the thickness of the remaining part of the first layer, and the post-thickness value; Determine the material removal rate based on the material removal amount of the wafer in the second polishing stage.

5. The wafer polishing method according to claim 4, characterized in that, The determination of the thickness of the remaining part of the first layer includes: After the first polishing stage of the first wafer, measure the thickness of the remaining part of the first layer of the first wafer; Determine the thickness of the remaining part of the first layer of the current wafer based on the thickness of the remaining part of the first layer of the previous wafer.

6. The wafer polishing method according to claim 5, characterized in that, The first time and the second time of the first wafer are determined through the following steps: Determine the first predetermined time as the first time of the first wafer; Determine the material removal amount of the first wafer in the second polishing stage based on the pre-thickness value, the thickness of the remaining part of the first layer, and the target thickness of the first wafer; Determine the second time of the first wafer based on the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage.

7. The wafer polishing method according to claim 6, characterized in that, The determination of the second time of the first wafer based on the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, and the material removal amount of the first wafer in the second polishing stage includes: Determine the second time of the first wafer according to the thickness of the remaining part of the first layer of the first wafer and the theoretical removal rate of the first layer, as well as the previous thickness value of the first wafer, the target thickness, and the theoretical removal rate of the second layer.

8. The wafer polishing method according to claim 6, characterized in that, The first time and the second time of the current wafer are determined through the following steps, including: Determine the third time of the previous wafer as the first time of the current wafer; Determine the material removal amount of the current wafer in the second polishing stage according to the previous thickness value of the current wafer, the thickness of the remaining part of the first layer, and the target thickness; Calculate the actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer, and the post-thickness value; Calculate the actual material removal rate of the previous wafer in the second polishing stage according to the actual material removal amount of the previous wafer in the second polishing stage and the polishing time of the previous wafer in the second polishing stage; Determine the second time of the current wafer according to the material removal amount of the current wafer in the second polishing stage and the actual material removal rate of the previous wafer in the second polishing stage.

9. The wafer polishing method according to any one of claims 5 - 8, characterized in that, The calculation of the adjustment value and the determination of the third time according to the adjustment value and the first time include: Calculate the difference between the second time and the first predetermined time; Determine an adjustment coefficient, which is associated with one or more of the theoretical removal rate of the first layer, the theoretical removal rate of the second layer, the thickness of the first layer, the thickness of the second layer, the thickness of the remaining part of the first layer, the target thickness, and the usage time of the polishing pad; Determine the adjustment value according to the adjustment coefficient and the difference; Use the sum of the adjustment value and the first time as the third time.

10. The wafer polishing method according to claim 9, characterized in that, The determination of the thickness of the remaining part of the first layer of the current wafer according to the thickness of the remaining part of the first layer of the previous wafer includes: Correct the thickness of the remaining part of the first layer of the previous wafer according to the adjustment value of the previous wafer; Determine the thickness of the remaining part of the first layer of the previous wafer after correction as the thickness of the remaining part of the first layer of the current wafer.

11. The wafer polishing method according to claim 10, characterized in that, The calculation of the actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the thickness of the remaining part of the first layer, and the post-thickness value includes: Calculate the actual material removal amount of the previous wafer in the second polishing stage according to the previous thickness value of the previous wafer, the post-thickness value, and the thickness of the remaining part of the first layer of the previous wafer after correction.

12. A wafer polishing apparatus for performing the wafer polishing method according to any one of claims 1 - 11, characterized in that, Include: A first polishing unit, a second polishing unit, and a measurement unit; The first polishing unit includes a first polishing head and a first polishing platen, and is used to perform the first polishing stage; The second polishing unit includes a second polishing head and a second polishing platen, and is used to perform the second polishing stage; The measurement unit includes a measuring device, which is used to measure the initial thickness of the second layer of the wafer as the pre-thickness value before the first polishing stage, and to measure the remaining thickness of the second layer of the wafer as the post-thickness value after the end of the second polishing stage.

13. A wafer processing device, characterized in that, It includes a controller, a memory, and the wafer polishing device as described in claim 12. The memory is used to store the pre-thickness value and the post-thickness value measured by the measuring device, and the controller is used to control the wafer polishing device to execute the wafer polishing method as described in any one of claims 1-11.

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