Power supply architecture, electronic equipment, management method and device, medium and program product

Abstract

The invention discloses a power supply framework, electronic equipment, a management method and device, a medium and a program product, and relates to the technical field of power supply. The power module and the super-capacitor module are electrically connected with the computing node through the bus, so that the super-capacitor module is independent of the power module and the computing node, the defect that a capacitor is added at the computing node end to occupy space is overcome, and fault isolation between the computing node and the super-capacitor module can be achieved. The output current of the power supply module is polled, the operation mode is determined, and then the working state of each part is dynamically adjusted, so that the super capacitor module discharges to bear the dynamic current and reduce the pressure of the power supply module when the calculation node is in high load, charges to store energy when the calculation node is in low load, and current fluctuation can be regulated and controlled from the source without modifying power distribution infrastructure. The technical problems that a capacitor lacks fault isolation and dynamic current impacts a power grid in the prior art are solved, and the technical effects of stably distributing the bus current, weakening the power grid impact, isolating and optimally utilizing the calculation node space are achieved.

Description

Technical Field

[0001] This application relates to the technical field of power supply, and particularly to a power supply architecture, an electronic device, a management method, a device, a medium, and a program product. Background Art

[0002] High-power all-in-one cabinet servers are high-performance computing solutions designed to support large-scale artificial intelligence computing tasks. Their core architecture integrates multiple high-power computing nodes to meet the high-intensive computing requirements such as deep learning training and inference. However, during the operation of such servers, the simultaneous operation of multiple high-performance computing nodes will generate huge dynamic currents, causing a severe impact on the power grid and seriously threatening the stability of the power supply system.

[0003] To meet the dynamic current demand and alleviate the power grid impact, currently two main solutions are adopted: one is to add capacitors at the power supply rack of the all-in-one cabinet or at the computing node end, and passively store energy to absorb the dynamic current; the other is to deploy an active power filter at the power distribution end of the data center to actively compensate for the power grid fluctuations. For the first solution: if capacitors are integrated in the power supply rack, there is a lack of a fault isolation mechanism, and a short-circuit fault will cause the power supply of the entire cabinet to collapse; if capacitors are added at the computing node end, it will seriously occupy the hardware layout space, and the surge current generated during the charging and discharging of the capacitors during hot plugging is extremely likely to damage electronic devices. For the second solution: it is necessary to transform the power distribution infrastructure, which cannot be adapted to old or leased data centers, and this solution belongs to a passive compensation strategy on the power grid side, and cannot eliminate the generation mechanism of dynamic current from the root, and the optimization space is limited. Summary of the Invention

[0004] This application provides a power supply architecture, an electronic device, a management method, a device, a medium, and a program product, which at least solves the technical problems of the lack of fault isolation of capacitors and the impact of dynamic current on the power grid in the related art, and achieves the technical effects of stably distributing the bus current, weakening the power grid impact, isolating and optimizing the use of the computing node space.

[0005] This application provides a power supply architecture, including: a power supply module, a supercapacitor module, a bus, and a computing node; the supercapacitor module includes a plurality of parallel-connected capacitor string groups, and each capacitor string group includes a plurality of series-connected capacitors; the bus is electrically connected to the power supply module, the supercapacitor module, and the computing node.

[0006] This application provides an electronic device, including the above-mentioned power supply architecture.

[0007] The present application provides a method for managing current, which is applied to the above power supply architecture. The method for managing current includes: polling the output current of the power module, determining the current operating mode of the computing node according to the output current and a preset current range; and dynamically adjusting the operating states of the power module and the supercapacitor module according to the current operating mode to adjust the distribution state of the bus current.

[0008] The present application also provides a device for managing current, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above methods for managing current when executing the computer program.

[0009] The present application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above methods for managing current.

[0010] The present application also provides a computer program product including a computer program, which, when executed by a processor, implements the steps of any of the above methods for managing current.

[0011] Through the present application, since both the power module and the supercapacitor module are electrically connected to the computing node through the bus, the supercapacitor module is independent of the power module and the computing node, avoiding the defect of occupying space by adding capacitors at the computing node end, and also enabling fault isolation between the supercapacitor module and the computing node; polling the output current of the power module to determine the operating mode, and then dynamically adjusting the operating states of each part, enabling the supercapacitor module to discharge and bear dynamic current when the computing node is under high load, reducing the pressure on the power module, and charging and storing energy when under low load, regulating current fluctuations from the source without the need to transform the power distribution infrastructure, solving the technical problems of lack of fault isolation of capacitors and impact of dynamic current on the power grid in the related art, achieving the technical effects of stable distribution of bus current, weakening the impact on the power grid, isolating and optimizing the use of the space of the computing node. Description of the Drawings

[0012] To more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0013] Figure 1 It is an overall schematic diagram of an electronic device provided by an embodiment of the present application; Figure 2 It is a schematic diagram when the supercapacitor module discharges provided by an embodiment of the present application; Figure 3 It is a schematic diagram when the supercapacitor module charges provided by an embodiment of the present application; Figure 4 It is a block diagram of an architecture of a supercapacitor module provided by an embodiment of the present application; Figure 5 It is a flowchart of a method for managing current provided by an embodiment of the present application; Figure 6 It is a schematic diagram of a charge and discharge circuit provided by an embodiment of the present application; Figure 7 It is a specific flowchart of a method for managing current provided by an embodiment of the present application; Figure 8 It is a schematic diagram of an entity of a supercapacitor module provided by an embodiment of the present application; Figure 9 It is a schematic diagram of a device for managing current provided by an embodiment of the present application; Figure 10 It is a schematic diagram of a computer-readable storage medium provided by an embodiment of the present application. Detailed implementation manners

[0014] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present application.

[0015] It should be noted that in the description of the present application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in the present application are used to distinguish similar objects, rather than to describe a specific order or sequence.

[0016] In order to enable those skilled in the art of the present technology to better understand the solution of the present application, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0017] As Figure 1 , the present application provides a power supply architecture, including: a power module 11, a supercapacitor module 12, a bus, and a computing node 13; the supercapacitor module 12 includes a plurality of parallel capacitor string groups, and each capacitor string group includes a plurality of series-connected capacitors; the bus is electrically connected to the power module 11, the supercapacitor module 12, and the computing node 13.

[0018] The power supply module 11 serves as the main power supply unit, connecting to the external power grid or power supply infrastructure. It is responsible for converting the input electrical energy (such as through an AC-DC conversion module and a DC-DC conversion module) into a stable voltage suitable for system operation (such as a 54V bus voltage), and providing basic power support for the computing node 13 through the bus. Its function is to achieve flexible power supply for dynamic loads in cooperation with the supercapacitor module 12, avoiding impact on the power grid due to solely bearing instantaneous high current demands. The voltage on the bus can be, but is not limited to, 54V.

[0019] The supercapacitor module 12 adopts a modular architecture of multi-stage series and parallel connection. First, multiple lithium-ion capacitors are connected in series to form a capacitor string group to increase the output voltage level of a single capacitor string group and meet the rated voltage requirements of the bus; then, multiple capacitor string groups are connected in parallel to form a complete supercapacitor module 12, significantly expanding the energy storage capacity while ensuring the voltage. The supercapacitor module 12 can be connected in parallel to the bus through an independent charge and discharge circuit, and has the characteristics of hot pluggability and redundancy design. That is, when a single capacitor string group or module fails, it can be independently replaced without affecting the overall operation of the system, and it supports maintenance during equipment operation. Its role is to serve as a dynamic energy storage buffer unit, quickly releasing electrical energy (discharge mode) when the computing node 13 is running at high load, sharing the instantaneous current pressure of the power supply module 11; absorbing the excess electrical energy of the power supply module 11 (charging mode) at low load to maintain the stable balance of the bus current.

[0020] The computing node 13, as the main power consumption entity, usually integrates high-power computing devices (such as GPU (Graphics Processing Unit), CPU (Central Processing Unit), etc.). When it operates, it generates dynamic current demands with periodic fluctuations. After being electrically connected to the power supply module 11 and the supercapacitor module 12 through the bus, it can dynamically obtain electrical energy according to its own load status; when the computing node 13 is running at high load, it is jointly powered by the power supply module 11 and the supercapacitor module 12, and the latter undertakes part of the dynamic current to reduce the instantaneous output pressure of the power supply module 11; at low load, it is mainly powered by the power supply module 11, and at the same time charges and stores energy for the supercapacitor module 12.

[0021] The three form a collaborative power supply network of the main supply of the power supply module 11 + dynamic compensation of the supercapacitor module 12 through the bus. Among them, the series and parallel architecture of the supercapacitor module 12 takes into account the voltage level, capacity requirements and hardware reliability, and the bus connection method realizes the flexible distribution of the power supply path. Finally, through the dynamic cooperation of the power supply module 11 and the supercapacitor module 12, the current fluctuation problem during the operation of the computing node 13 is effectively solved, ensuring the stable operation of the system and weakening the impact on the power grid.

[0022] This power supply architecture realizes a stable power supply system with dynamic buffering capabilities by connecting the power module 11, the supercapacitor module 12, and the computing node 13 to the bus. Among them, the supercapacitor module 12 is composed of multiple capacitor strings connected in parallel, and each capacitor string includes multiple capacitors connected in series, thus having both high voltage tolerance and large-capacity characteristics; in this architecture, the bus serves as the core electrical path and forms an electrical connection with the power module 11, the supercapacitor module 12, and the computing node 13, enabling the power module 11 to directly supply power to the computing node 13 while the supercapacitor module 12 can also participate in the energy flow, providing energy buffering or absorbing instantaneous power during load fluctuations or unstable output of the power module 11, realizing short-term storage and release of electrical energy, and effectively improving the stability and reliability of the power supply system.

[0023] For example Figure 1 , in an exemplary embodiment, it further includes: a charge-discharge circuit disposed between the supercapacitor module 12 and the bus, configured to switch the current transmission path between the supercapacitor module 12 and the bus according to the output current of the power module 11.

[0024] Specifically, the power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module 12 and the bus. The charge-discharge circuit is configured to switch the current transmission path between the supercapacitor module 12 and the bus according to the output current of the power module 11; when the output current of the power module 11 reaches a high load level, the charge-discharge circuit allows the supercapacitor module 12 to release current to the bus to assist the power module 11 in supplying power to the computing node 13 (such as Figure 2 ); when the output current of the power module 11 is in a low load state, it switches to the charging path, enabling the power module 11 to supplement energy to the supercapacitor module 12 through the bus via the charge-discharge circuit (such as Figure 3 ), thereby realizing dynamic distribution of the bus current and bidirectional energy regulation.

[0025] Specifically, in this power supply architecture, the power module 11 can receive external AC input power, convert the AC power into stable DC power through an internally integrated AC-DC conversion module (AC-DC), and further adjust the voltage level through a subsequent DC-DC conversion module (DC-DC), and finally output a DC voltage of 54V to the bus to provide the main power supply capacity for the entire system; at the same time, the supercapacitor module 12 serves as an energy buffer unit, contains several capacitor arrays inside, has the ability of fast charge and discharge, and the positive and negative electrodes of its capacitors are connected to the bus through the arranged charge-discharge circuit. The charge-discharge circuit constitutes the current path between the supercapacitor module 12 and the bus, and can realize bidirectional energy regulation when the system load changes or the main power current fluctuates (such as Figure 1): When the load suddenly increases or the power supply is insufficient, it quickly releases the stored energy current and injects it into the bus, effectively improving the power supply stability and dynamic response ability of the system, ensuring that the computing node 13 continuously obtains stable and reliable power supply (such as Figure 2 ); when the load is light or the power supply is surplus, the supercapacitor module 12 absorbs part of the electric energy through this circuit for charging and energy storage (such as Figure 3 ).

[0026] Such as Figure 4 , each capacitor string group can be correspondingly provided with an independent charge and discharge circuit, and the positive and negative electrodes of the charge and discharge circuit are respectively connected to the positive and negative electrodes of the corresponding capacitor string group, thus forming multiple independent and controllable energy paths; during the operation of the system, by detecting the output current of the power supply module 11, it can be judged in real time whether there is a shortage in the current power supply, and the required compensation current can be calculated accordingly; according to the magnitude of the compensation current, one or more capacitor string groups and their corresponding charge and discharge circuits can be selected to enable the selected capacitor string groups to participate in the bus power supply process, and inject the required current into the bus in a parallel discharge manner to assist the power supply module 11 to meet the load requirements of the computing node 13; this structure not only improves the regulation accuracy and response speed of the supercapacitor module 12, but also can realize strategic grouping scheduling according to factors such as the health status and remaining power of the capacitor string groups, further enhancing the energy management flexibility and power supply security of the system.

[0027] Such as Figure 5 , the voltage at both ends of the bus is Vbasbar, and the voltage at both ends of the supercapacitor module 12 is Vcap. In an exemplary embodiment, the charge and discharge circuit includes a first capacitor C1, a second capacitor C2, a first inductor L1, a first switching tube Q1, a second switching tube Q2, a first diode D1, and a second diode D2; the first end of the first capacitor C1 is respectively connected to the positive electrode of the bus and the first end of the first inductor L1, the second end of the first inductor L1 is respectively connected to the first end of the first switching tube Q1, the anode of the first diode D1, the second end of the second switching tube Q2, and the cathode of the second diode D2, the second end of the first switching tube Q1 is respectively connected to the cathode of the first diode D1, the first end of the second capacitor C2, and the positive electrode of the supercapacitor module 12, and the second end of the first capacitor C1 is respectively connected to the second end of the second capacitor C2, the first end of the second switching tube Q2, and the anode of the second diode D2, the negative electrode of the bus, and the negative electrode of the supercapacitor module 12. An energy conversion path based on inductance-capacitance coupling and bidirectional control of double switching tubes is constructed, providing a current path basis for the charging and discharging of the supercapacitor module 12, having good energy regulation ability and topological flexibility, and being suitable for bidirectional energy transfer between the bus and the supercapacitor.

[0028] Such as Figure 6As shown in the figure, an embodiment of the present application provides a method for managing current, which is applied to the above power supply architecture. The method for managing current includes: S11: Poll the output current of the power supply module, and determine the current operating mode of the computing node according to the output current and the preset current range.

[0029] Specifically, by monitoring the output current of the power supply module in real time and comparing it with the preset current range, the dynamic identification and classification of the operating mode of the computing node are realized.

[0030] First, deploy current sensors (such as Hall sensors or shunt resistors) in the bus circuit to collect the output current of the power supply module in real time, forming a high-frequency sampling data stream (the sampling frequency needs to cover the fluctuation period of the dynamic current of the computing node, usually in milliseconds). Pre-calibrate the current characteristic intervals of the computing node in different operating modes. For example, the current range I1 (such as 0 - 50A) in the low-load mode corresponds to the standby or light-load state of the computing node (such as GPU video memory preheating); the current range I2 (such as 50 - 150A) in the medium-load mode corresponds to regular computing tasks (such as image classification inference); the current range I3 (such as >150A) in the peak-load mode corresponds to high-intensive computing (such as neural network training). These threshold intervals are calibrated based on the hardware specifications of the computing node (such as the GPU power consumption curve) and the measured current data of typical application scenarios, and are dynamically adjusted through an adaptive algorithm (such as optimizing the threshold boundary according to historical operation data). Subsequently, map the real-time current value into the preset threshold system, and realize pattern recognition through multi-dimensional feature matching. For example, if the current value remains stable in the I1 interval for t1 time, it is determined to be in the low-load mode; if the current jumps from I2 to I3 within t2 time and the fluctuation amplitude > ΔI (such as 30A), it is determined to be in the peak-load mode; calculate the current change rate dI / dt through the sliding window algorithm, and combine the Kalman filter to predict the current trend of the next n sampling points, and anticipate the pattern switching critical point in advance (such as when dI / dt > threshold and I(t + n) ∈ I3, trigger the peak response strategy in advance).

[0031] Through the closed loop of monitoring, comparison, and classification, the continuous current data is converted into discrete operating mode labels, providing a decision basis for subsequent control strategies. For example, when it is identified as the peak-load mode, the fast discharge response of the supercapacitor module can be immediately activated to ensure that the current sharing switch is completed in a short time, thereby effectively suppressing the bus voltage fluctuation. Meet the uninterrupted operation requirements of the data center.

[0032] S12: Dynamically adjust the working states of the power supply module and the supercapacitor module according to the current operating mode to adjust the distribution state of the bus current.

[0033] Specifically, based on the determined operating mode of the computing node, the control strategies of the power supply module and the supercapacitor module are determined, and the dynamic redistribution of the bus current is achieved through bidirectional energy flow regulation. Its logic is a control architecture of mode-driven - strategy matching - closed-loop regulation.

[0034] When it is determined that the computing node is in a low-load mode (such as the current is in a preset low-threshold range), the control strategy preferentially activates the constant-voltage charging mode of the power supply module, and delivers a stable current to the supercapacitor module through the bus, enabling the supercapacitor module to enter the energy storage state. At this time, the bus current is mainly provided by the power supply module with a reserved capacity margin to ensure that the supercapacitor module reserves energy for subsequent high-load scenarios; if it is identified as a medium-load mode (the current is in the intermediate threshold range), the mechanism of main power supply by the power supply module + floating compensation by the supercapacitor module can be started. The power supply module undertakes the first preset proportion of the steady-state current, and the supercapacitor module dynamically releases or absorbs a small current according to the current fluctuation amplitude, forming a cooperative power supply mode of base-load power supply + dynamic buffer; when a peak-load mode (the current exceeds the high threshold) is detected, the control strategy immediately triggers the fast-discharge response of the supercapacitor module to provide a discharge current, forming a parallel power supply architecture with the power supply module to jointly undertake the instantaneous high-current demand of the computing node (the current distribution ratio between the power supply module and the supercapacitor module is dynamically adjusted according to the real-time load rate), thereby limiting the peak output current of the power supply module within a preset proportion of the rated continuous current and avoiding the voltage drop caused by overload.

[0035] In an exemplary embodiment, the current power consumption state of the computing node is determined according to the output current and the preset current range, including: determining whether the output current is less than the maximum value of the preset current range; if the output current is greater than or equal to the maximum value, it is determined that the current operating mode of the computing node is the dynamic mode, and in the dynamic mode, the power supply module outputs a dynamic current.

[0036] Specifically, the power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the bus. According to the current operating mode, the working states of the power supply module and the supercapacitor module are dynamically adjusted to regulate the distribution state of the bus current, including: in the dynamic mode, controlling the charge-discharge circuit to work in the discharge mode, enabling the supercapacitor module to output a discharge current to the bus through the charge-discharge circuit; the bus current includes the output current of the power supply module and the discharge current output by the supercapacitor module.

[0037] Specifically, based on the rated power of the computing node and typical operating conditions, the maximum value of the preset current range (such as 150% of the rated current) is set. This threshold comprehensively considers the hardware safety margin (to avoid long-term overload) and dynamic load characteristics (to allow short-term peak currents). For example, when the rated current of the computing node is 100A, 150A is set as the dynamic mode trigger threshold to reserve a buffer space for the sudden high power consumption of devices such as GPUs. The real-time monitoring module continuously collects the output current of the power supply module and compares it with this threshold in real time. If the output current of the power supply module ≥ 150A, it indicates that the computing node may be in a high-load operation scenario (such as deep learning model training, large-scale data parallel computing). At this time, the dynamic current demand increases significantly, triggering the dynamic mode determination logic.

[0038] In the dynamic mode, the dynamic current output characteristics of the power supply module are activated (such as relaxing the upper limit of the instantaneous current output), and at the same time, the supercapacitor module is awakened to enter the discharge state. The two are connected in parallel through the bus to supply power to the computing node. The power supply module provides a basic constant current (such as a 100A rated value), and the supercapacitor module dynamically compensates for the part exceeding the rated value (such as a 50A peak current), thereby controlling the actual output current of the power supply module within a safe range and avoiding the sudden drop in output voltage or grid-side current impact caused by a single power supply module bearing all the dynamic current.

[0039] This determination mechanism realizes the rapid identification of the high-dynamic load state of the computing node through the design of single-threshold comparison + mode triggering, provides an immediate decision-making basis for the subsequent collaborative discharge control of the supercapacitor module, effectively suppresses the bus current fluctuation while ensuring hardware safety, and forms a closed-loop control link of monitoring - determination - response.

[0040] In an exemplary embodiment, before controlling the charge and discharge circuit to operate in the discharge mode, it further includes: obtaining the capacitance voltage of the supercapacitor module and determining whether the capacitance voltage is greater than the minimum voltage value; if it is greater than the minimum voltage value, enter the step of controlling the charge and discharge circuit to operate in the discharge mode until the capacitance voltage is less than or equal to the minimum voltage value or the output current of the power supply module is less than the maximum value.

[0041] Specifically, by constructing a safety boundary and exit mechanism for the discharge of the supercapacitor module, it ensures that the energy storage unit participates in dynamic current regulation efficiently and reliably. First, the capacitance voltage is continuously collected in real time through a voltage sensor deployed at the supercapacitor module end, and this voltage value directly reflects the energy storage state. The preset minimum voltage value (such as 30% of the rated voltage) is a critical threshold determined based on the capacitance discharge characteristics and system safety requirements; when it is lower than this value, the internal resistance of the capacitor increases sharply, resulting in a sharp drop in discharge efficiency and possibly triggering the risk of voltage collapse (such as the bus voltage dropping below 48V, affecting the stability of the computing node).

[0042] When it is detected that the capacitor voltage > the minimum voltage value, it is determined that the effective discharge condition is met, and the switch of the charge-discharge circuit is triggered to conduct the discharge loop, and the supercapacitor module releases electrical energy in a controlled manner (such as constant current discharge mode). During the discharge process, dual-condition monitoring is continuously executed. One is: when the capacitor voltage drops to the minimum voltage value, the discharge loop is immediately cut off to prevent over-discharge from damaging the capacitor life; the other is: if the output current of the power supply module < the maximum value (such as a 150A threshold) due to the reduction of the calculation node load, it indicates that the dynamic current demand has subsided. At this time, the discharge is terminated in advance to reserve the energy storage margin to ensure coping with the next load peak.

[0043] In this embodiment, it is ensured that the supercapacitor module participates in current regulation within the effective energy storage range, and at the same time, by predicting the load change in advance, frequent charge-discharge cycles are avoided. While improving the dynamic response ability of the system, the service life of the supercapacitor module is extended, and the balance optimization of energy storage efficiency and hardware reliability is achieved.

[0044] In an exemplary embodiment, the current power consumption state of the calculation node is determined according to the output current and the preset current range, including: judging whether the output current is greater than the minimum value of the preset current range; if the output current is less than or equal to the minimum value, it is determined that the current operating mode of the calculation node is the light load mode. The power supply architecture also includes a charge-discharge circuit disposed between the supercapacitor module and the bus. According to the current operating mode, the working states of the power supply module and the supercapacitor module are dynamically adjusted to adjust the distribution state of the bus current, including: in the light load mode, controlling the charge-discharge circuit to work in the charging mode, so that the power supply module supplies power to the calculation node through the bus, and charges the supercapacitor module through the bus and the charge-discharge circuit.

[0045] Specifically, the light load condition is identified through the current threshold, and an intelligent charging control loop is constructed to realize the dynamic optimal distribution of electrical energy. First, based on the basic power consumption characteristics of the calculation node (such as the standby current of the GPU), the minimum value of the preset current range is calibrated (for example, 50% of the rated current). When it is detected in real time that the output current of the power supply module ≤ this threshold (such as 50A), it is determined that the calculation node is in the light load mode (such as the model inference gap period), and at this time the dynamic current demand is extremely low. After the light load mode is triggered, the control logic immediately switches the charge-discharge circuit to the charging mode, that is, the bus voltage (such as 54V) is stepped down to the safe charging voltage of the supercapacitor module (such as 48V), and at the same time, the constant current-constant voltage charging algorithm is activated. In the initial stage, the maximum charging current is used for rapid energy storage (constant current stage, the battery level is 0%-80%). When the capacitor voltage approaches the rated value, it automatically switches to the constant voltage mode (constant voltage stage, such as 48V voltage limit). The charging current is dynamically adjusted through an adaptive PID (Proportional-Integral-Derivative) controller to ensure that the capacitor is fully charged within the safe voltage withstand range (≤50V).

[0046] In this embodiment, the power supply module undertakes a dual power supply task: on the one hand, it provides a stable basic current for the computing node, and on the other hand, it efficiently converts the remaining electrical energy into capacitive energy storage. Through the strategic reserve of energy storage during light load periods, the pre-charged energy is released during subsequent peak loads, effectively suppressing the bus current fluctuations. The entire control loop constructs a closed-loop energy scheduling mechanism of energy storage during light load - energy release during peak load through current threshold triggering, multi-mode charging management (supporting hot-swap online maintenance), and bidirectional energy flow. Without increasing additional hardware costs, it significantly improves the system's adaptability to dynamic loads and realizes the intelligent spatio-temporal reallocation of power resources.

[0047] In an exemplary embodiment, before controlling the charge and discharge circuit to operate in the charging mode, it further includes: obtaining the capacitance voltage of the supercapacitor module and determining whether the capacitance voltage is less than the maximum voltage value; if it is less than the maximum voltage value, enter the step of controlling the charge and discharge circuit to operate in the charging mode until the capacitance voltage is greater than or equal to the maximum voltage value or the output current of the power supply module is greater than the minimum value.

[0048] Specifically, a safety access mechanism and a dynamic termination strategy for charging the supercapacitor module are set to achieve efficient management of the energy storage unit and reasonable distribution of electrical energy. First, by obtaining the capacitance voltage of the supercapacitor module in real time and comparing it with the preset maximum voltage value, which is jointly determined by the rated working voltage and the safety margin of the supercapacitor, it is used to ensure that the capacitor does not exceed its voltage withstand limit during charging, avoiding performance degradation or safety risks caused by overcharging. When it is detected that the capacitance voltage is less than the maximum voltage value, it indicates that the supercapacitor module still has energy storage space, and then the charge and discharge circuit is controlled to enter the charging mode, so that the power supply module can supply electrical energy to the supercapacitor module through the bus while providing basic power supply for the computing node.

[0049] During the charging process, two key conditions are continuously monitored. One is whether the capacitance voltage reaches or exceeds the maximum voltage value. If it reaches, it means that the supercapacitor module is full and the charging needs to be terminated immediately to protect the capacitor life. The other is whether the output current of the power supply module is greater than the preset minimum value, which corresponds to the basic current demand during the light load operation of the computing node. If the output current exceeds this value, it indicates that the load of the computing node may increase and the dynamic current demand increases. At this time, the charging mode needs to be exited in advance so that the supercapacitor module is ready to enter the discharge state at any time to cope with potential current fluctuations.

[0050] In this embodiment, this dual - condition monitoring mechanism not only ensures that the supercapacitor module can safely and effectively store energy during light - load periods but also can respond quickly when the load state changes, avoiding the problem that the energy - storage unit cannot participate in dynamic current regulation in a timely manner due to continuous charging. Thus, on the premise of ensuring hardware safety, the energy flow between the power module and the supercapacitor module is optimized, ensuring that the bus - bar current distribution can be flexibly adjusted according to the actual load requirements of the computing nodes, and improving the stability and response ability of the entire power - supply system.

[0051] In an exemplary embodiment, the power - supply architecture further includes a charge - discharge circuit disposed between the supercapacitor module and the bus - bar. The method for managing current further includes: when the supercapacitor module is in a static state, controlling the charge - discharge circuit to adjust the capacitor voltage of the supercapacitor module from the normal voltage to the highest voltage, and recording the adjustment time; wherein, the static state is a state without charge - discharge; calculating the current capacity of the supercapacitor module according to the normal voltage, the highest voltage, and the adjustment time.

[0052] Specifically, through active voltage regulation and time - parameter acquisition, a real - time capacity measurement mechanism for the supercapacitor module is constructed. When the supercapacitor module is in a static state (i.e., not participating in charge - discharge operations and with a stable charge distribution), the charge - discharge circuit is controlled to enter a special test mode, and the capacitor voltage is gradually increased from the current stable normal voltage to the highest voltage within the safe range. This process ensures the controllability and linearity of voltage change through constant - current source or constant - power control. During the adjustment process, the adjustment time required for the voltage to rise from the normal voltage to the highest voltage is recorded. This time parameter directly reflects the energy - storage capacity of the supercapacitor module within a specific voltage range. By substituting the real - time acquired normal voltage, highest voltage, and adjustment time into a preset algorithm, the current capacity of the supercapacitor module can be dynamically calculated.

[0053] In this embodiment, by actively creating voltage - change conditions and capturing process parameters, non - invasive online measurement of the actual capacity of the energy - storage unit is achieved, avoiding the interference of traditional offline testing on system operation and providing a key basis for the adaptive adjustment of subsequent charge - discharge control strategies. For example, when it is detected that the capacity decay exceeds the threshold, the redundant module can be automatically switched or the upper limit of the charge - discharge current can be adjusted to ensure that the supercapacitor module always participates in bus - bar current regulation in a reliable state, improving the stability and fault - tolerance ability of the entire power - supply system.

[0054] In an exemplary embodiment, calculating the current capacity of the supercapacitor module according to the normal voltage, the highest voltage, and the adjustment time includes: according to calculating the current capacity of the supercapacitor module; wherein, is the current capacity, Pin is the input power of the supercapacitor module, T is the adjustment time, is the highest voltage, is the normal voltage.

[0055] Specifically, a capacity measurement model of the supercapacitor module is constructed based on the law of conservation of energy, and real-time capacity evaluation is achieved through the coupled calculation of the controllable voltage regulation process and the power-time parameters. When the supercapacitor module is in a static state, the charge-discharge circuit is controlled to regulate its voltage with a constant input power Pin, so that the capacitor voltage gradually rises from the stable normal voltage to the highest voltage within the safe range , and the regulation time T of this process is accurately recorded. The current capacity of the supercapacitor module can be calculated according to the above formula.

[0056] It can be seen that in this embodiment, by converting the voltage change amplitude, input power, and regulation time into a mathematical expression of capacitance, a quantitative evaluation of the actual energy storage capacity of the supercapacitor module is achieved. This online measurement mechanism does not require interrupting the system operation or relying on additional detection equipment, and can capture the dynamic changes of the capacitor capacity in real time (such as capacity attenuation caused by aging), providing key parameter support for subsequent charge-discharge control strategies. For example, when the measured capacity is lower than the design threshold, the upper limit of the discharge current can be automatically adjusted to avoid overuse, or redundant modules can be triggered to operate to ensure that the supercapacitor module always maintains reliable energy storage performance in dynamic current regulation, thereby improving the stability and adaptive ability of the entire power supply system.

[0057] In an exemplary embodiment, after calculating the current capacity of the supercapacitor module according to the normal voltage, the highest voltage, and the regulation time, it further includes: determining the life of the supercapacitor module according to the deviation between the current capacity and the rated capacity; if the life of the supercapacitor module is less than the preset life threshold, a life warning is issued.

[0058] Specifically, a life evaluation mechanism of the supercapacitor module is constructed through the capacity attenuation degree, and a quantitative correlation is established between the physical parameter changes and the functional reliability. After calculating the current capacity through the voltage regulation process , it is compared with the rated capacity of the supercapacitor module when it leaves the factory, and the degree of capacity degradation is quantified through a deviation formula (such as attenuation rate = ). When the attenuation rate reaches or exceeds 70% (i.e., the current capacity ≤ 30% of the rated capacity), it is determined that the module enters the end of its life. It should be understood that this threshold is set based on the supercapacitor aging characteristic curve. At this time, the internal resistance of the capacitor increases significantly, and the charge-discharge efficiency drops sharply, and it can no longer meet the energy storage and response capabilities required for dynamic current regulation.

[0059] It should be understood that the internal mechanism of the life assessment logic is that the capacity attenuation of the supercapacitor is a comprehensive manifestation of the aging processes such as the reduction of the activity of the internal electrode material and the decline of the ion migration ability of the electrolyte. When the capacity attenuates to 30% of the rated value, the actual energy that can be released is insufficient to support the dynamic current compensation requirements of the peak load of the computing node (such as the bus voltage fluctuation exceeding the limit due to insufficient discharge depth), and continuous operation may trigger chain failures such as voltage dips. Therefore, a preventive maintenance mechanism is established by real-time monitoring the capacity deviation. When it is detected that the capacity attenuation exceeds the threshold, a redundant strategy (such as switching to the backup module for power supply) is triggered or a replacement warning is issued to avoid the decline of power supply stability caused by the failure of the supercapacitor module. This method of combining physical parameter measurement with functional reliability assessment realizes the dynamic prediction of the life state of the supercapacitor module, provides a key guarantee for the long-term stable operation of electronic devices, and ensures that the energy storage unit is always in the effective working range during the dynamic current regulation process.

[0060] In an exemplary embodiment, during the static capacity test of the supercapacitor module, if the adjustment time exceeds the preset maximum allowable time (such as 100 s), it is determined that there is capacity attenuation or poor internal contact in the supercapacitor module, and the redundant module switching is automatically triggered and the fault log is recorded.

[0061] In this embodiment, a diagnostic mechanism for the health state of the supercapacitor module is constructed through the quantitative correlation between the adjustment time and the physical characteristics of the capacitor. When the supercapacitor module is in a static state (not participating in charge and discharge), its voltage is adjusted (from the normal voltage to the highest voltage) at a constant power through the charge and discharge circuit. The theoretical adjustment time of this process is jointly determined by the capacitance, the voltage change range, and the input power. The preset maximum allowable time (such as 100 s) is set based on the rated capacity of the module and the theoretical time under ideal working conditions, reflecting the longest time required for the module to complete voltage adjustment in the normal state.

[0062] If the actual adjustment time exceeds this threshold, it indicates that the actual energy storage capacity or energy transfer efficiency of the module has decreased significantly. The internal reasons include two categories: one may be capacity attenuation. When the internal capacitance of the module decreases due to aging, resulting in a reduction of the active material on the electrode plate or a decline in the ion migration ability of the electrolyte, the actual capacitance is lower than the rated value. According to the formula, the time required to complete the same voltage adjustment will be prolonged proportionally (such as when the capacity attenuates by 50%, the time is extended to 2 times); the other may be poor internal contact. If the welding points of the capacitor string are loose, the conductive connectors are oxidized, or the internal line contact resistance increases, the equivalent internal resistance of the charge and discharge circuit will increase significantly. At this time, even if the capacity does not decrease significantly, the power transfer efficiency will decrease due to the internal resistance voltage division and heat generation, thereby prolonging the voltage adjustment time.

[0063] Based on the above failure mechanisms, the abnormal response can be achieved through the following logic. First, real-time monitoring and determination. During the voltage regulation process, a timer is started. When the time reaches the preset maximum allowable time and the regulation is still not completed, the fault determination logic is triggered, and the fault type is distinguished by combining historical capacity test data (such as whether the capacity attenuation rate in the last three times exceeds 10%); the second is the redundant switching mechanism. If it is determined that the capacity attenuation exceeds the threshold or there is poor contact, a control signal is immediately sent to the charge and discharge circuit of the redundant module to seamlessly take over the energy storage task, and at the same time, the electrical connection of the faulty module is cut off to prevent the fault from expanding due to continuous charge and discharge.

[0064] Subsequently, the system log module records the fault occurrence time, the measured regulation time, the historical capacity data, and the fault type identifier, providing accurate basis for subsequent maintenance (such as locating the poor contact point of a specific string group through contact resistance testing, or predicting the remaining life of the module through the capacity attenuation curve).

[0065] In this embodiment, through the closed-loop control of time threshold warning, redundant fast switching, and accurate fault recording, the early identification and isolation of potential faults of the supercapacitor module are realized, avoiding the decline of system power supply stability caused by the failure of a single module. At the same time, it provides data support for preventive maintenance, significantly improving the reliability and maintainability of electronic devices.

[0066] In an exemplary embodiment, the capacity attenuation curve is fitted according to the current capacity and historical capacity data to predict the remaining available charge and discharge cycle times. When the remaining times are lower than the preset times, a maintenance reminder is triggered.

[0067] Specifically, the prediction management of the remaining life of the supercapacitor module is realized through the capacity attenuation trend analysis driven by historical data. The supercapacitor module is regularly subjected to static capacity testing (such as after each charging in the light load mode), and the current capacity value is recorded to form a historical data sequence (such as the capacity change records of the last 100 charge and discharge cycles). These data reflect the law that the module capacity gradually decreases with the increase of the number of uses, which is the cumulative effect of physical processes such as the decrease of the activity of the internal electrode material of the capacitor and the degradation of the electrolyte performance.

[0068] By analyzing the changing trends of historical data (such as whether the capacity decline rate is accelerating, whether it presents a stable attenuation rate, etc.), a capacity attenuation model is established. For example, if it is found that the capacity decreases linearly with the increase in the number of cycles (that is, the capacity reduction after each cycle is basically the same), the remaining available number of cycles is calculated based on the current capacity value and the historical average attenuation rate; if the attenuation rate accelerates over time (such as the capacity decline accelerates significantly in the later period), an exponential decay model can be used to predict the remaining life. The preset number threshold (such as 500 times) is set according to the module design life and safe operation requirements. When the predicted number of remaining cycles is lower than the threshold, it indicates that the supercapacitor module is approaching the end of its service life. At this time, a maintenance reminder is automatically triggered (such as displaying a warning sign on the management interface, sending a notification to the operation and maintenance personnel, etc.), prompting timely replacement of the module or adjustment of the operation strategy (such as reducing the discharge depth during peak load).

[0069] This embodiment achieves a forward-looking assessment of the health status of the supercapacitor module by continuously tracking capacity changes, analyzing attenuation patterns, and combining them with preset standards, thereby avoiding the impact of sudden module failure on system stability. At the same time, downtime is reduced by planning maintenance plans in advance. This synergizes with the capacity testing, charge and discharge control, and other technologies disclosed in the patent to build a complete reliability assurance system covering status monitoring, trend prediction, and proactive maintenance.

[0070] In an exemplary embodiment, the power supply architecture further includes a charge and discharge circuit arranged between the supercapacitor module and the bus. Before polling the output current of the power supply module, it also includes: controlling the charge and discharge circuit to operate in a charging mode, and adjusting the charging state of the charge and discharge circuit according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module, and the target voltage gradually increases from an initial value to a pre-charging target value within a preset time.

[0071] Specifically, a controllable progressive charging strategy is used to achieve safe pre-activation of the supercapacitor module, avoiding transient power-on shocks and ensuring the effectiveness of subsequent dynamic regulation.

[0072] Before polling the output current of the power supply module, first control the charge-discharge circuit to enter the charging mode to pre-charge the supercapacitor module and establish an energy transfer channel between the power supply module and the supercapacitor module. At this time, the adjustment of the charging state follows the voltage ramp control logic, and the target voltage of the supercapacitor module is set to gradually increase from the initial value (such as the current capacitor rest voltage) to the pre-charge target value (such as the adapted value of the bus rated voltage) in a linear or non-linear manner within a preset time. This progressive boost mechanism, on the one hand, by limiting the voltage change rate per unit time, avoids the inrush current (i.e., the large current impact at the moment of power-on) caused by the excessive difference between the initial voltage of the capacitor and the bus voltage, thus protecting the power supply module, the power devices (such as switching transistors) in the charge-discharge circuit, and the supercapacitor itself from being damaged by excessive current stress; on the other hand, ensures that the supercapacitor module reaches a suitable initial energy storage state before being officially connected to the system power supply network, enabling it to respond to the charge-discharge demands in a timely manner (such as quickly discharging to compensate for dynamic current) when the load of the subsequent computing node changes. During the pre-charging process, the charge-discharge circuit dynamically adjusts the charging current or power through real-time feedback regulation (such as the PID control algorithm) to make the target voltage strictly climb according to the preset time-voltage curve until the pre-charge target value is reached.

[0073] The pre-charging mechanism provided in this embodiment constructs a buffer transition link in the system startup stage, which not only ensures the safe access of the hardware circuit but also lays a stable energy storage foundation for the subsequent dynamic current management strategy based on the output current of the power supply module, ensuring that the entire power supply system can enter a controllable energy scheduling state at the initial stage of startup and improving the reliability and stability of the operation of the electronic device.

[0074] Such as Figure 5As shown, in an exemplary embodiment, the charge and discharge circuit includes a first capacitor C1, a second capacitor C2, a first inductor L1, a first switching transistor Q1, a second switching transistor Q2, a first diode D1, and a second diode D2; the first end of the first capacitor C1 is respectively connected to the positive pole of the bus and the first end of the first inductor L1, the second end of the first inductor L1 is respectively connected to the first end of the first switching transistor Q1, the anode of the first diode D1, the second end of the second switching transistor Q2, and the cathode of the second diode D2, the second end of the first switching transistor Q1 is respectively connected to the cathode of the first diode D1, the first end of the second capacitor C2, and the positive pole of the supercapacitor module 12, the second end of the first capacitor C1 is respectively connected to the second end of the second capacitor C2, the first end of the second switching transistor Q2, the anode of the second diode D2, the negative pole of the bus, and the negative pole of the supercapacitor module 12; controlling the charge and discharge circuit to operate in the charging mode, and adjusting the charging state of the charge and discharge circuit according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module, including: controlling the first switching transistor Q1 to turn off; determining the target duty cycle according to the bus voltage and the target voltage, and controlling the state of the second switching transistor Q2 according to the target duty cycle.

[0075] Specifically, a controllable pre-charging mechanism for the supercapacitor module is constructed based on the charge and discharge circuit topology, and flexible matching of the bus voltage and the capacitor voltage is achieved through switch timing and duty cycle control. When entering the pre-charging stage, the control logic first turns off the first switching transistor Q1 and places it in the cut-off state, thereby blocking the direct electrical connection between the supercapacitor module and the bus and ensuring that energy can only be transmitted through a specific path. At this time, the charge and discharge circuit is configured in the Boost boost mode, and the second switching transistor Q2 serves as the main control element, and its on and off states are modulated by a PWM (Pulse Width Modulation) signal. The control algorithm dynamically calculates the target duty cycle according to the bus voltage and the target voltage of the supercapacitor module. This duty cycle determines the ratio of the on-time of the second switching transistor Q2 to the switching period, and thus controls the energy transfer rate from the bus to the supercapacitor module. When the second switching transistor Q2 is on, the current starts from the positive pole of the bus, passes through the first inductor L1 to store energy, and then returns to the negative pole of the bus through the second switching transistor Q2. At this time, the inductor stores magnetic energy; when the second switching transistor Q2 is off, the first inductor L1 releases magnetic energy, which is superimposed on the bus voltage and forms a freewheeling path through the first diode D1 to transfer the energy to the second capacitor C2 and the supercapacitor module to achieve voltage boost.

[0076] By dynamically adjusting the duty cycle, the charging current and the voltage rising rate can be precisely controlled, enabling the voltage of the supercapacitor module to smoothly rise to the target value within a preset time. This not only avoids the impact of inrush current on the circuit but also realizes efficient energy transmission. This charging control strategy, by coordinating inductive energy storage and switching timing, achieves flexible matching of the bus voltage and the supercapacitor module voltage without relying on additional voltage conversion equipment, laying a stable energy storage foundation for subsequent dynamic current regulation.

[0077] In an exemplary embodiment, determining the target duty cycle based on the bus voltage and the target voltage includes: determining the target duty cycle according to Vcap = Vbasbar / (1 - A2), where Vcap is the target voltage of the supercapacitor module, Vbasbar is the bus voltage, and A2 is the target duty cycle.

[0078] This converts the precise control of the target voltage into a quantitative adjustment of the switching tube timing based on the physical characteristics of the circuit. Specifically, when the target voltage is higher than the bus voltage (meeting the Boost boost requirement), the energy transfer efficiency is improved by increasing A2; when the target voltage is close to the bus voltage, A2 is reduced to lower the charging rate and avoid voltage overshoot. This mechanism establishes a direct relationship between the control parameters and the target indicators using the inherent characteristics of the circuit, enabling linear ramping of the supercapacitor module voltage without complex feedback algorithms, ensuring that the voltage changes smoothly according to the preset law during the pre-charging process. This not only guarantees the safety of the charging process (avoiding stress shocks caused by voltage mutations) but also achieves a balance between energy transfer efficiency and voltage control accuracy through real-time adjustment of the duty cycle, providing stable initial energy storage conditions for subsequent dynamic current regulation.

[0079] When the charge-discharge circuit operates in the discharge mode, the circuit operates in the Buck mode. Q2 is turned off, and the current flows through D2 for freewheeling. At this time, Vbasbar = Vcap × A1, where A1 is the duty cycle of Q1.

[0080] In one embodiment, both the first switching tube and the second switching tube are integrated with temperature sensors. When the junction temperature of the switching tube exceeds the threshold, the PWM duty cycle of the corresponding switching tube is adjusted to reduce the switching frequency to control the temperature rise.

[0081] Specifically, in the charge-discharge circuit, the first switching tube and the second switching tube are internally integrated with high-precision temperature sensors (such as thermocouples or semiconductor temperature sensors) to real-time monitor the junction temperature of the switching tube (i.e., the PN junction temperature inside the chip, which directly reflects the heating state of the device). A preset junction temperature safety threshold is set based on the heat resistance limit of the switching tube material and the requirements for long-term reliable operation. When the sensor detects that the junction temperature exceeds the threshold, it indicates that the switching tube is overheating abnormally due to high-frequency switching losses or excessive load, and a thermal suppression strategy needs to be immediately implemented.

[0082] The specific control logic is to synchronously reduce the switching frequency and duty cycle by adjusting the signal parameters of the PWM duty cycle of the switching tube. Among them, reducing the switching frequency can reduce the number of switching operations per unit time, thereby reducing the switching loss (each switching operation is accompanied by energy loss and heat generation); reducing the duty cycle can shorten the single conduction time of the switching tube and reduce the conduction loss. The combined effect of the two can effectively reduce the average power consumption of the switching tube and suppress the temperature rise rate. For example, when the junction temperature reaches 130 °C, the switching frequency is reduced from 100 kHz to 50 kHz, and the duty cycle is reduced from 60% to 40%, so that the power consumption of the switching tube is reduced, and the junction temperature gradually drops back to the safe range.

[0083] In this embodiment, through the closed-loop link of temperature sensing, parameter adjustment, and heat loss control, without relying on additional heat dissipation hardware, the dynamic balance of the thermal state of the switching tube is achieved: both avoiding the risk of device failure caused by too high junction temperature (such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor) breakdown, IGBT (Insulated Gate Bipolar Transistor) desaturation), and maintaining the basic functions of the charge and discharge circuit (such as continuously charging or discharging the supercapacitor module), ensuring that the electronic device can still operate stably under high-load conditions. At the same time, this control strategy can be linked with the charge and discharge mode of the supercapacitor module (such as automatically switching to the low-power charging mode during temperature overrun), further optimizing the system-level thermal management efficiency.

[0084] As Figure 7 shown, first, it is judged whether it is the initial power-on. If it is the initial power-on, pre-charge the supercapacitor module; then judge whether Vcap > the pre-charge target value (Vcap is the capacitor voltage of the supercapacitor module). If Vcap > the pre-charge target value, it is determined that the pre-charge of the supercapacitor module is completed, otherwise, the pre-charge is looped.

[0085] If it is not the initial power-on, enter the step of obtaining the output current of the power supply module. Then judge whether the output current ≥ 150% of the rated current. If the output current ≥ 150% of the rated current, further judge whether Vcap ≤ Vmin (Vmin is the minimum voltage value); if Vcap > Vmin, the supercapacitor module discharges and the charge and discharge circuit works in the discharge mode. Then judge whether Vcap ≤ Vmin. If Vcap ≤ Vmin, the charge and discharge circuit is turned off and the discharge ends, otherwise, continue to discharge, otherwise, continue to execute the step of discharging the supercapacitor module.

[0086] If the output current < 150% of the rated current, determine if the output current ≤ 50% of the rated current. If the output current ≤ 50% of the rated current, determine if Vcap ≥ Vmax (Vmax is the maximum voltage value); if Vcap < Vmax, the supercapacitor module is charged and the charge-discharge circuit operates in the charging mode, then determine if Vcap ≥ Vmax. If Vcap ≥ Vmax, the charge-discharge circuit is turned off and the charging ends. Otherwise, continue to execute the steps of charging the supercapacitor module.

[0087] From the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0088] Such as Figure 9 , an embodiment of the present application also provides a current management device, including: a memory 101 for storing a computer program; a processor 102 for implementing the steps of any one of the above current management methods when executing the computer program.

[0089] For the description of the features in the embodiments corresponding to the current management device, reference can be made to the relevant descriptions in the embodiments corresponding to the current management method, which will not be elaborated here one by one.

[0090] Such as Figure 10 , an embodiment of the present application also provides a computer-readable storage medium 201. A computer program 202 is stored in the computer-readable storage medium 201. Among them, the computer program 202 is configured to execute the steps in any one of the above current management method embodiments when running.

[0091] In an exemplary embodiment, the above computer-readable storage medium 201 may include, but is not limited to: USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks, or optical disks and other media that can store the computer program 202.

[0092] An embodiment of the present application also provides a computer program product. The above computer program product includes a computer program, and the computer program implements the steps in any one of the above current management method embodiments when executed by a processor.

[0093] For the description of the features in the embodiments corresponding to the computer-readable storage medium, reference can be made to the relevant descriptions in the embodiments corresponding to the current management method, which will not be elaborated here one by one.

[0094] Embodiments of the present application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above embodiments of the current management method.

[0095] For the description of the features in the corresponding embodiments of the computer program product, reference can be made to the relevant description of the corresponding embodiments of the current management method, which will not be elaborated here one by one.

[0096] The present application also provides an electronic device including the power supply architecture as described above.

[0097] In an exemplary embodiment, an independent balancing circuit (the balancing circuit includes a balancing switch) is provided between each capacitor string group of the supercapacitor module. During the charging and discharging process, the voltage difference between each capacitor string group is monitored in real time. When the voltage difference exceeds the threshold, the balancing switch is automatically turned on, and voltage balance is achieved by discharging or supplementing the current across the capacitor string groups, avoiding overcharging / overdischarging between capacitor string groups.

[0098] Such as Figure 8 , in an exemplary embodiment, a fan is further included in the supercapacitor module and is disposed at the rear window. The fan is configured to dissipate heat from the supercapacitor module in an internal air extraction manner.

[0099] Specifically, through targeted heat dissipation structure design and air flow organization strategy, an efficient thermal management system for the supercapacitor module is constructed. The fan is disposed at the rear window of the supercapacitor module and uses the internal air extraction method. Its function is to form a directional forced convection inside the module to accelerate heat exchange.

[0100] Specifically, when the fan operates, through the suction effect, the heat generated by the charging and discharging of the lithium-ion supercapacitors inside the module is discharged along with the air flow towards the rear window. At the same time, the external cold air naturally replenishes from the air inlets at the front end or side of the module, forming a through-type heat dissipation channel with air entering from the front and exiting from the rear. This internal air extraction design is adapted to the longitudinal welding layout of the supercapacitor module. The lithium-ion supercapacitors are longitudinally arranged on the board, and their heat dissipation surfaces are perpendicular to the air flow direction, maximizing the air contact area and improving the heat exchange efficiency; the modular structure supporting blind plugging ensures that the fan and air duct design do not affect the quick disassembly and assembly of the module, and the overall heat dissipation system does not need to be interrupted during maintenance. The air-cooling heat dissipation method dynamically adjusts the fan speed (such as according to the feedback of the capacitor temperature sensor), enhances the air extraction force during the high-load operation of the supercapacitor module, and reduces energy consumption during the low-load operation, forming an adaptive heat dissipation mechanism.

[0101] The advantage of internal air extraction compared to external air blowing is that by controlling the air flow direction, it avoids direct impact of external dust and debris on the capacitor surface, reducing the influence of dust accumulation on the heat dissipation efficiency. At the same time, taking advantage of the structural features of the rear window position, it directly directs the heat to the outside of the device, preventing heat accumulation inside the chassis. Thus, it effectively controls the operating temperature of the supercapacitor module, ensures its operation within a safe temperature range, extends its service life, and maintains stable energy storage performance, providing reliable thermal environment support for high-frequency charge and discharge operations during dynamic current regulation.

[0102] In an exemplary embodiment, it further includes a cabinet, and the power supply architecture is arranged in the cabinet.

[0103] In this embodiment, the cabinet serves as a physical carrier, integrating components of the power supply architecture such as the current management device, power module, supercapacitor module, and computing node inside. Each component realizes electrical connection and signal interaction through busbars and control lines, forming an efficient and collaborative power supply and computing system.

[0104] For the description of the features in the corresponding embodiments of the electronic device, reference can be made to the relevant descriptions in the corresponding embodiments of the current management method, which will not be elaborated here one by one.

[0105] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in this article can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0106] The above has introduced in detail a power supply architecture, an electronic device, a management method, a device, a medium, and a program product provided by this application. Specific examples are used in this article to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A power supply architecture, characterized in that, Including: A power supply module, a supercapacitor module, a bus, and a computing node; The supercapacitor module includes a plurality of parallel-connected capacitor string groups, and each capacitor string group includes a plurality of series-connected capacitors; the bus is electrically connected to the power supply module, the supercapacitor module, and the computing node.

2. The power supply architecture according to claim 1, characterized in that, It further includes: A charge and discharge circuit disposed between the supercapacitor module and the bus, configured to switch the current transmission path between the supercapacitor module and the bus according to the output current of the power supply module.

3. The power supply architecture according to claim 2, characterized in that The charge and discharge circuit includes a first capacitor, a second capacitor, a first inductor, a first switch tube, a second switch tube, a first diode, and a second diode; The first end of the first capacitor is respectively connected to the positive pole of the bus and the first end of the first inductor. The second end of the first inductor is respectively connected to the first end of the first switch tube, the anode of the first diode, the second end of the second switch tube, and the cathode of the second diode. The second end of the first switch tube is respectively connected to the cathode of the first diode, the first end of the second capacitor, and the positive pole of the supercapacitor module. The second end of the first capacitor is respectively connected to the second end of the second capacitor, the first end of the second switch tube, the anode of the second diode, the negative pole of the bus, and the negative pole of the supercapacitor module.

4. An electronic device, characterized in that, It includes the power supply architecture according to any one of claims 1-3.

5. The electronic device according to claim 4, characterized in that, It further includes a cabinet, and the power supply architecture is disposed in the cabinet.

6. A method for managing current, characterized in that, Applied to the power supply architecture according to any one of claims 1-3, the method for managing the current includes: Polling the output current of the power supply module, and determining the current operating mode of the computing node according to the output current and a preset current range; According to the current operating mode, dynamically adjusting the working states of the power supply module and the supercapacitor module to adjust the distribution state of the bus current.

7. The method for managing current according to claim 6, characterized in that, Determining the current operating mode of the computing node according to the output current and a preset current range includes: Judging whether the output current is less than the maximum value of the preset current range; If the output current is greater than or equal to the maximum value, determining that the current operating mode of the computing node is the dynamic mode, and in the dynamic mode, the power supply module outputs a dynamic current.

8. The method for managing current according to claim 7, characterized in that, The power supply architecture further includes a charge and discharge circuit disposed between the supercapacitor module and the bus. According to the current operating mode, dynamically adjusting the working states of the power supply module and the supercapacitor module to adjust the distribution state of the bus current includes: In the dynamic mode, controlling the charge and discharge circuit to work in the discharge mode, so that the supercapacitor module outputs a discharge current to the bus through the charge and discharge circuit; the bus current includes the output current of the power supply module and the discharge current output by the supercapacitor module.

9. The method for managing current according to claim 8, wherein Before controlling the charge and discharge circuit to work in the discharge mode, it further includes: Obtaining the capacitor voltage of the supercapacitor module, and judging whether the capacitor voltage is greater than the minimum voltage value; If it is greater than the minimum voltage value, enter the step of controlling the charge-discharge circuit to work in the discharge mode until the capacitor voltage is less than or equal to the minimum voltage value or the output current of the power supply module is less than the maximum value.

10. The method for managing current according to claim 6, wherein, Determine the current operating mode of the computing node according to the output current and the preset current range, including: Judge whether the output current is greater than the minimum value of the preset current range; If the output current is less than or equal to the minimum value, determine that the current operating mode of the computing node is the light load mode; The power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the bus; according to the current operating mode, dynamically adjust the working states of the power supply module and the supercapacitor module to adjust the distribution state of the bus current, including: In the light load mode, control the charge-discharge circuit to work in the charging mode, so that the power supply module supplies power to the computing node through the bus, and charges the supercapacitor module through the bus and the charge-discharge circuit.

11. The method for managing current according to claim 10, characterized in that, Before controlling the charge-discharge circuit to work in the charging mode, it further includes: Obtain the capacitor voltage of the supercapacitor module, and judge whether the capacitor voltage is less than the maximum voltage value; If it is less than the maximum voltage value, enter the step of controlling the charge-discharge circuit to work in the charging mode until the capacitor voltage is greater than or equal to the maximum voltage value or the output current of the power supply module is greater than the minimum value.

12. The method for managing current according to claim 6, wherein The power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the bus, and the current management method further includes: When the supercapacitor module is in the static state, control the charge-discharge circuit to adjust the capacitor voltage of the supercapacitor module from the normal voltage to the highest voltage, and record the adjustment time; wherein, the static state is the state without charge and discharge; Calculate the current capacity of the supercapacitor module according to the normal voltage, the highest voltage and the adjustment time.

13. The method for managing current according to claim 12, characterized in that, Calculating the current capacity of the supercapacitor module according to the normal voltage, the highest voltage and the adjustment time includes: According to C Bulk = 2Pin × T / (Vin max ² - Vin nom ²), calculate the current capacity of the supercapacitor module; Among them, C Bulk is the current capacity, Pin is the input power of the supercapacitor module, T is the regulation time, and Vin max is the highest voltage, and Vin nom is the normal voltage.

14. The method for managing current according to claim 12, wherein After calculating the current capacity of the supercapacitor module according to the normal voltage, the highest voltage and the adjustment time, it further includes: Determine the lifespan of the supercapacitor module according to the deviation between the current capacity and the rated capacity; If the lifespan of the supercapacitor module is less than the preset lifespan threshold, issue a lifespan warning.

15. The method for managing current according to claim 6, characterized in that, The power supply architecture further includes a charge-discharge circuit disposed between the supercapacitor module and the bus. Before polling the output current of the power supply module, it further includes: Control the charge-discharge circuit to work in the charging mode, and adjust the charging state of the charge-discharge circuit according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module; the target voltage gradually increases from the initial value to the pre-charge target value within a preset time.

16. The method for managing current according to claim 15, characterized in that, The charge and discharge circuit includes a first capacitor, a second capacitor, a first inductor, a first switch tube, a second switch tube, a first diode, and a second diode. The first end of the first capacitor is respectively connected to the positive pole of the bus and the first end of the first inductor. The second end of the first inductor is respectively connected to the first end of the first switch tube, the anode of the first diode, the second end of the second switch tube, and the cathode of the second diode. The second end of the first switch tube is respectively connected to the cathode of the first diode, the first end of the second capacitor, and the positive pole of the supercapacitor module. The second end of the first capacitor is respectively connected to the second end of the second capacitor, the first end of the second switch tube, the anode of the second diode, the negative pole of the bus, and the negative pole of the supercapacitor module; Controlling the charge and discharge circuit to work in the charging mode and adjusting the charging state of the charge and discharge circuit according to the target voltage of the supercapacitor module to pre-charge the supercapacitor module includes: Controlling the first switch tube to turn off; Determining a target duty cycle according to the bus voltage and the target voltage, and controlling the state of the second switch tube according to the target duty cycle.

17. The method for managing current according to claim 16, wherein, Determining a target duty cycle according to the bus voltage and the target voltage includes: Determining the target duty cycle according to Vcap = Vbasbar / (1 - A2), where Vcap is the target voltage of the supercapacitor module, Vbasbar is the bus voltage, and A2 is the target duty cycle.

18. A current management device, characterized in that, Includes: A memory for storing a computer program; A processor for implementing the steps of the current management method according to any one of claims 6 to 17 when executing the computer program.

19. A computer-readable storage medium, characterized in that, A computer program is stored in the computer-readable storage medium, wherein the computer program implements the steps of the current management method according to any one of claims 6 to 17 when executed by a processor.

20. A computer program product comprising a computer program, characterized in that, The computer program implements the steps of the current management method according to any one of claims 6 to 17 when executed by a processor.

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