Ultra-high-speed ultra-wideband differential signal subpicosecond-level isochronous matching PCB wiring structure

Abstract

The invention relates to the technical field of high-speed circuit board design, and discloses a PCB (printed circuit board) wiring structure capable of realizing differential signal subpicosecond-level isochronous matching in an ultra-high-speed ultra-wideband range, which comprises a first transmission line and a second transmission line in a differential signal transmission line pair, the first transmission line is a linear path, and the second transmission line is a linear path. The second transmission line is a curve path formed by periodically splicing a plurality of arc-shaped structures, the arc-shaped structure of a single period is formed by splicing a plurality of arc segments through rotation copying and mirror image copying, and the first transmission line and the second transmission line are equal in physical length; wherein the arc segment satisfies the following two key parameter conditions: (a) the radius of the arc segment is Rgt; w is the line width of the transmission line; (b) a central included angle AOBlt corresponding to the arc line segment; the temperature is 40 DEG C; the invention provides a design method of a PCB wiring structure which is simple in structure, can be widely applied and can realize subpicosecond-level isochronous matching of differential signals in an ultra-wideband range.

Description

Technical Field

[0001] The present invention relates to the technical field of high-speed circuit board design, and in particular to a PCB routing structure suitable for SerDes differential signals and an isochronous matching design method thereof. The structure can achieve sub-picosecond transmission delay matching within an ultra-wideband range and is suitable for communication systems with ultra-high speeds of 224Gbps PAM4 and above. Background Art

[0002] With the rapid development of technologies such as artificial intelligence, big data, and cloud computing, the demand for data transmission rates is increasing. Currently, high-speed SerDes interfaces with speeds such as 56Gbps and 112Gbps PAM4 are widely used in data centers, servers, switches, and other equipment. Active technical exploration and preliminary verification of even higher-speed SerDes interfaces with speeds of 224Gbps and 448Gbps PAM4 are also underway.

[0003] To ensure high-speed, high-quality signal transmission, current SerDes chips generally utilize differential signaling, which relies on two adjacent transmission lines, P and N, for signal transmission. Because the SerDes receiver uses the difference between the signals on the two transmission lines for processing and decision-making, it significantly reduces common-mode noise interference on the transmission link. The use of two transmission lines also means that there will inevitably be some degree of transmission delay difference between them. To minimize the impairment of differential signals in the transmission link, it is always desirable for the signals on the two transmission lines to be transmitted completely isochronously. The delay difference between the two transmission lines on differential lines is limited by factors such as the glass fiber effect of the printed circuit board (PCB) material and the PCB processing technology. With improvements in material performance and PCB processing technology, these design-induced delay differences have been significantly reduced. However, the transmission delay difference introduced by the PCB differential routing design remains significant. When the high-speed SerDes interface rate continues to upgrade to 224Gbps or even 448Gbps PAM4, the length of a UI will be reduced to half or even a quarter of the previous length (referring to 112Gbps). The control of the delay difference between P and N will inevitably become more stringent, which directly affects the quality of the 224Gbps and 448Gbps transmission signals.

[0004] Currently, "winding compensation" is often used to achieve equal lengths between P / N paths in differential signal routing at 112Gbps, 56Gbps, and below. A common approach is to bend the shorter wire for compensation. However, these solutions often only consider equal length compensation, ignoring the impact of the bend pattern on isochronous transmission. They typically only achieve compensation at the picosecond level, making it difficult to effectively control sub-picosecond delay variability. Other compensation solutions exist (such as drilling), but these are complex to implement and offer limited effectiveness in controlling PN delay variability, failing to achieve sub-picosecond levels. Currently, available PN delay compensation solutions either fail to achieve corrections below picoseconds or only provide effective compensation within a very limited bandwidth. No solution can achieve sub-picosecond intra-pair isochronous matching of differential signals within ultra-wideband bandwidths. Summary of the Invention

[0005] The purpose of the present invention is to provide a design method for a PCB routing structure that is simple in structure, widely applicable, and capable of achieving sub-picosecond isochronous matching of differential signals within an ultra-wideband range, so as to solve the problems of excessive PN delay difference, complex design, and difficult processing under ultra-wideband conditions in the prior art.

[0006] The present application discloses a PCB routing structure for ultra-high-speed and ultra-wideband differential signals, including a first transmission line and a second transmission line in a pair of differential signal transmission lines, wherein:

[0007] The first transmission line is a straight path, and the second transmission line is a curved path formed by periodically splicing a plurality of arc structures, wherein a single period of the arc structure is formed by splicing a plurality of arc segments by rotational replication and mirror replication, and the first transmission line and the second transmission line are equal in physical length;

[0008] The arc segment satisfies the following two key parameter conditions:

[0009] (a) The radius of the arc segment R>10×W, where W is the line width of the transmission line;

[0010] (b) The central angle AOB corresponding to the arc segment is less than 40°.

[0011] In a preferred embodiment, the PCB trace structure is suitable for achieving sub-picosecond isochronous matching of differential signals within an ultra-wideband range.

[0012] In a preferred example, the line width W of the first transmission line is equal to that of the second transmission line.

[0013] In a preferred example, the line width W is initially set to 4 mil.

[0014] In a preferred example, an initial distance S between the first transmission line and the second transmission line is 2.5×W, and the initial distance S is the shortest distance between the first transmission line and the second transmission line.

[0015] In a preferred embodiment, the initial spacing S between the first transmission line and the second transmission line is set to 10 mil.

[0016] In a preferred embodiment, the arc-shaped structure is axially symmetrical as a whole, and one side of the axial symmetry is centrally symmetrical.

[0017] In a preferred example, the arc structure includes 4 arc segments.

[0018] In a preferred embodiment, the rotation copy is a 180-degree rotation copy along a boundary point of one of the arc segments, and the mirror copy is a mirror-symmetrical copy along another boundary point of the arc segment in the opposite direction.

[0019] In a preferred example, the radius R of the arc segment is selected to be 60 mil, and the central angle corresponding to the arc segment is selected to be 30 degrees.

[0020] In a preferred example, the second transmission line is a curved path formed by periodically splicing 10 arc-shaped structures.

[0021] In a preferred embodiment, the ultra-wideband refers to a 180 GHz broadband or at least a 180 GHz broadband.

[0022] In a preferred example, the ultra-high speed refers to 224Gbps PAM4 and above ultra-high speed.

[0023] Compared with the prior art, the present invention has at least the following significant advantages:

[0024] 1. Sub-picosecond matching of PN delay difference can be achieved with only two parameters;

[0025] 2. Simple design, easy for EDA automated layout;

[0026] 3. Easy to etch the circuit in the actual PCB processing technology;

[0027] 4. Wide bandwidth coverage, meeting future high-speed communication needs of 224Gbps and above;

[0028] 5. Applicable to various high-density PCB systems to improve signal integrity.

[0029] It should be understood that within the scope of the present invention, the above-mentioned technical features of the present invention and the technical features described in detail below (such as in the embodiments) can be combined with each other to form new or preferred technical solutions. Due to space limitations, they will not be listed here one by one. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. It should be understood that the drawings described below are merely some implementation examples of the present invention, and those skilled in the art can also derive other implementation examples based on these drawings without inventive effort.

[0031] Figure 1 (a) is a schematic diagram of the structure of a transmission line in one embodiment of the present application. Figure 1 Middle (b) is a schematic diagram of arc segments spliced into an arc structure.

[0032] Figure 2 (a) is the simulation result of PN delay difference under three different parameter combinations. Figure 2 (b) is the simulation result of differential-to-common mode under three different parameter combinations. DETAILED DESCRIPTION

[0033] In the following description, many technical details are provided to help readers better understand this application. However, those skilled in the art will understand that even without these technical details and various changes and modifications based on the following embodiments, the technical solutions claimed in this application can be implemented.

[0034] It should be noted that in this patent application, relational terms such as first and second, etc., are used solely to distinguish one entity or operation from another, and do not necessarily require or imply any actual relationship or order between these entities or operations. Furthermore, the terms "comprise," "include," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. Without further limitation, an element specified by the phrase "comprising a" does not preclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element. In this patent application, reference to performing an action in accordance with an element means performing the action in accordance with at least that element, including two situations: performing the action in accordance with that element alone, and performing the action in accordance with that element and other elements. Expressions such as "plurality," "multiple times," and "many" include "two," "twice," "two kinds," and "more than two," "more than two times," and "more than two kinds."

[0035] In this application, all directional indications (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0036] Description of some concepts:

[0037] SerDes stands for SERializer / DESerializer. It is a mainstream time-division multiplexing (TDM) and point-to-point (P2P) serial communication technology. At the transmitting end, multiple low-speed parallel signals are converted into high-speed serial signals. These signals are then transmitted through the transmission medium (fiber optic cable or copper wire) and reconverted back into low-speed parallel signals at the receiving end. This point-to-point serial communication technology fully utilizes the channel capacity of the transmission medium, reduces the number of transmission channels and device pins, and increases signal transmission speed, thereby significantly reducing communication costs.

[0038] PCB (Printed Circuit Board), also known as printed circuit board in Chinese, is an important electronic component. It is the support body of electronic components and the carrier for the electrical connection between electronic components. Because it is made using electronic printing technology, it is called a "printed" circuit board.

[0039] Unit Interval (UI): A unit of time commonly used in digital communication systems, representing the time required to transmit one bit of data. It is inversely proportional to the data rate and reflects the duration of each symbol.

[0040] PAM4 (4-Level Pulse Amplitude Modulation): PAM4 signal technology uses four different signal levels for signal transmission, two more levels than traditional NRZ (Non-Return-to-Zero) signals. Therefore, at the same clock frequency (baud rate), the PAM4 signal bit rate is twice that of the NRZ signal, doubling the transmission efficiency.

[0041] Gbps and GHz: Gbps is a unit of data transmission rate, indicating the data transmission rate in gigabits per second. GHz is a unit of frequency, indicating the rate of change of alternating current (electromagnetic waves) per second. For a 224Gbps PAM4 data transmission rate, the corresponding clock frequency is 56GHz. For a 448Gbps PAM4 data transmission rate, the corresponding clock frequency is 112GHz.

[0042] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0043] One embodiment of the present application provides a PCB trace structure for achieving sub-picosecond isochronous matching of differential signals within an ultra-high-speed and ultra-wideband range. The PCB trace structure includes a first transmission line and a second transmission line in a pair of differential signal transmission lines. The first transmission line is a straight path, and the second transmission line is a curved path formed by periodically splicing a plurality of arc-shaped structures. A single period of the arc-shaped structure is constructed by splicing a plurality of arc segments through rotational replication and mirror replication.

[0044] For example, in one embodiment, a PCB trace structure includes a pair of P and N wires, where the P wire is a straight path and the N wire is a curved path, and the P and N wires generally extend in the same direction (e.g., longitudinally). In other embodiments, the P wire may be a curved path and the N wire a straight path, with the corresponding PN delay differences being opposite.

[0045] It should be noted that despite passing through a straight path and a curved path respectively, the first transmission line and the second transmission line are equal in physical length. That is, the total length of the straight path and the curved path is equal, and the curved path is shorter than the straight path in the extension direction. Considering that the P pin and N pin of the SerDes interface are not parallel or high-speed routing on the PCB, the bends in the PCB layout may cause the length difference of PN in the extension direction to be non-fixed. In actual specific operation, the technical solution of this application can appropriately fine-tune the arc segment (such as the corresponding center angle or radius) or the number of cycles of the arc structure to achieve global matching of P and N in the extension direction.

[0046] In one embodiment, the line width W of the first transmission line is equal to that of the second transmission line. The initial distance S between the first transmission line and the second transmission line is approximately 2.5×W. The initial distance S refers to the shortest distance between the first transmission line and the second transmission line. Since the arc structure in the second transmission line bends in a direction away from the first transmission line (that is, the arc structure is an outwardly protruding structure), the relative distance between the second transmission line and the second transmission line will be greater than the initial distance at some positions. For example, in one embodiment, the line width W is initially set to 2mil to 6mil, preferably 4mil. The initial spacing S between the first transmission line and the second transmission line is set to 5mil to 15mil, preferably 10mil. The differential target impedance formed by the first transmission line and the second transmission line is 90Ω. The preferred parameter bending method can control the fluctuation of the differential impedance to be less than 0.5Ω, which is much smaller than the impedance control deviation introduced by the current PCB processing. Therefore, the differential impedance matching problem caused by this preferred parameter can be ignored.

[0047] The arc structure of the second transmission line is axially symmetrical as a whole, that is, it is a bilaterally symmetrical structure. Moreover, one side of the axial symmetry is centrally symmetrical, and the left half and the right half of the arc structure are both centrally symmetrical. In a preferred embodiment, the arc structure includes 4 arc segments. During wiring design, a second arc segment is obtained by rotating to the left (or forward) along a boundary point of an arc segment (for example, rotating 180 degrees). After splicing the two arc segments, mirror copying is performed to the right (or backward, that is, in the opposite direction of the rotation copy) along another boundary point of the arc segment to obtain the third and fourth arc segments. The four arc segments are spliced to obtain the basic unit of the curved path (a single-cycle arc structure).

[0048] In this embodiment, the second transmission line is, for example, a curved path formed by periodically splicing 10 arc-shaped structures, that is, the boundary points of each arc-shaped structure are spliced end to end.

[0049] It is important to note that the arc segments in this application must meet the following two key parameter conditions at the same time:

[0050] (a) The radius of the arc segment R>10×W, where W is the line width of the transmission line;

[0051] (b) The central angle AOB corresponding to the arc segment is <40°.

[0052] It should be noted that in this embodiment, the radius R of the arc segment is relatively large and the central angle is relatively small. The above two key parameters must be met at the same time to achieve sub-picosecond isochronous matching. It is difficult to achieve the technical effect of this application if only one of them is met.

[0053] In a preferred embodiment, the radius R of the arc segment is selected to be 60 mil, and the center angle corresponding to the arc segment is selected to be 30 degrees.

[0054] The PCB trace structure and isochronous matching design method for SerDes differential signals disclosed in the present application are suitable for high-speed communication systems of 224Gbps and above. The PCB trace structure is suitable for achieving sub-picosecond isochronous matching of differential signals within an ultra-wideband range (e.g., a bandwidth range of at least 180GHz).

[0055] In order to better understand the technical solution of the present application, a specific example is provided below for illustration. The details listed in the example are mainly for ease of understanding and are not intended to limit the scope of protection of the present application.

[0056] This application proposes a very simple design structure and design method (relying on the adjustment of only two key parameters), covering at least 180GHz bandwidth, and capable of achieving sub-picosecond isochronous matching. This method is not only applicable to the single-channel 224Gbps PAM4 rate requirement, but even meets the single-channel 448Gbps PAM4 rate requirement.

[0057] The winding structure proposed in this application is as follows Figure 1 As shown in (a), it is assumed that the P line is a normal straight line, and the N line is composed of several arc segments. The straight length of the P line and the curved length of the N line are physically the same, so the straight length of the N line forms a length difference with the straight length of the P line. Here, the line width of the P line and the N line are both recorded as W, and the initial setting of W is 4 mil. The spacing between the P line and the N line is recorded as S, and the initial setting of S is 10 mil. The structure of a single cycle of the N line is as follows Figure 1As shown in (b), the center of the circle is marked as O, and points A and B are two points on the arc segment. The arc segment AB is rotated and replicated as well as mirrored to form an arc structure of a single period of N lines. It should be noted that rotational replication refers to replicating along a boundary point of the arc segment (such as point A) by rotating, for example, 180 degrees. Mirror replication refers to replicating along another boundary point of the arc segment (such as point B) in an axisymmetric manner. The arc segment is first rotated and replicated along the boundary point on the left (such as point A), and the overall structure after rotational replication is mirrored along the boundary point on the right (such as point B) of the arc segment to obtain an arc structure, so that the arc structure is axisymmetric as a whole.

[0058] Here, the first key parameter that needs to be adjusted is defined as the arc segment radius R (that is, the length of OA or OB), and the second key parameter that needs to be adjusted is defined as the angle AOB (that is, the angle formed by arc segment AB and point O). This application clearly requires that to achieve sub-picosecond PN isochronous matching covering at least 180GHz bandwidth, the key parameter radius R must be at least 10 times the line width W, and the key parameter angle AOB must be at least less than 40 degrees, and both key parameters must be met simultaneously.

[0059] The following three sets of data are provided for comparison. The P lines are all normal straight lines, and the N lines are all wrapped in an arc structure with 10 cycles. Figure 2 Figures (a) and (b) show the simulation results for PN skew under three different parameter combinations. (A) shows the simulation results for differential-to-common mode transmission under three different parameter combinations. (B) shows the simulation results for differential-to-common mode transmission under three different parameter combinations. (B) shows the simulation results for differential-to-common mode transmission under three different parameter combinations. (B) shows the simulation results for differential-to-common mode transmission under three different parameter combinations. (B) The first set of data (black triangles) corresponds to an AOB angle of 50 degrees and a radius R of 10 mil. The second set of data (black squares) corresponds to an AOB angle of 30 degrees and a radius R of 10 mil. The third set of data (black circles) corresponds to an AOB angle of 30 degrees and a radius R of 60 mil.

[0060] The first set of data only refers to the routing structure of this application, but the two key parameters of the arc segment center angle AOB and radius R do not meet the conditions proposed by this application. Figure 2 In Figure 2 (a), the first parameter combination exhibits a delay difference of 0.37 to 1.1 ps within an 180 GHz bandwidth. In Figure 2 (b), the differential-to-common mode conversion for the first parameter combination within an 180 GHz bandwidth reaches a maximum of -10.9 dB. If the entire system has a 50-cycle arc winding, the PN line delay difference will be 1.85 to 5.5 ps across the entire 180 GHz bandwidth. This is equivalent to the length of one UI for a 224 Gbps PAM4 signal, representing a very severe PN delay mismatch.

[0061] The second set of data refers to the routing structure of this application and the center angle AOB of the arc segment refers to the constraint conditions proposed in this application, but the radius R does not meet the conditions proposed in this application. Figure 2 (a)

[0062] The second parameter combination achieves a delay skew of 0.3 to 0.47 ps within an 180 GHz bandwidth. In Figure 2(b), the second parameter combination achieves a maximum differential-to-common-mode conversion of -15.8 dB within an 180 GHz bandwidth. While the second parameter combination shows an improvement in PN delay skew compared to the first parameter combination, the improvement in differential-to-common-mode conversion is less pronounced. Furthermore, in practical systems, if the number of bends exceeds 20, the entire system still cannot achieve sub-picosecond isochronous matching.

[0063] The third set of data refers to the routing structure of this application, and the two key parameters of the arc segment's center angle AOB and radius R both meet the conditions proposed in this application. Figure 2 In (a), the delay difference of the third parameter combination within the 180GHz bandwidth is 0.06~0.17ps. Figure 2 In (b), the third set of parameter combinations has a maximum differential to common mode conversion of only -28.5dB within a 180GHz bandwidth. Compared with the second set of parameters, the third set of parameters has significantly optimized both the PN delay difference and the conversion from differential to common mode. For a practical system, even with a 50-cycle arc winding, the delay difference of the PN line is still controlled at 0.3ps to 0.85ps within the entire 180GHz bandwidth. From the comparison of the above three sets of data, it can be seen that sub-picosecond isochronous matching is achieved only when the two key parameters of the center angle AOB and the radius R proposed in this application are met at the same time.

[0064] In summary, this application proposes a PCB routing design method that achieves sub-picosecond isochronous matching for ultra-high-speed, ultra-wideband differential signals by adjusting only two key parameters. This design method is simple and easy to layout. It also demonstrates excellent performance, achieving sub-picosecond isochronous matching within the ultra-wideband range.

[0065] The specification of this application records a large number of technical features, which are distributed in various technical solutions. If all possible combinations of technical features of this application (i.e., technical solutions) are to be listed, the specification will be too lengthy. In order to avoid this problem, the various technical features disclosed in the above-mentioned invention content of this application, the various technical features disclosed in the various embodiments and examples below, and the various technical features disclosed in the accompanying drawings can be freely combined with each other to form various new technical solutions (these technical solutions should all be deemed to have been recorded in this specification), unless such a combination of technical features is technically infeasible. For example, in one example, feature A+B+C is disclosed, and in another example, feature A+B+D+E is disclosed. Features C and D are equivalent technical means that play the same role. Technically, only one of them can be used, and it is impossible to use them at the same time. Feature E can be technically combined with feature C. Then, the solution of A+B+C+D should not be deemed to have been recorded because it is technically infeasible, while the solution of A+B+C+E should be deemed to have been recorded.

[0066] The description includes combinations of the various embodiments described herein. Separate references to an embodiment (e.g., "one embodiment" or "some embodiments" or "preferred embodiment") do not necessarily refer to the same embodiment; however, these embodiments are not mutually exclusive unless indicated as such or clear to one skilled in the art. It should be noted that the word "or" is used in this description in a non-exclusive sense unless the context clearly indicates or requires otherwise.

[0067] All documents mentioned in this specification are considered to be included in their entirety in the disclosure of this application so that they can be used as a basis for modification when necessary. In addition, it should be understood that the above description is only a preferred embodiment of this specification and is not intended to limit the scope of protection of this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments of this specification should be included in the scope of protection of one or more embodiments of this specification.

Claims

1. A PCB trace structure with sub-picosecond isochronous matching for ultra-high-speed and ultra-wideband differential signals, characterized in that: The invention comprises a first transmission line and a second transmission line in a pair of differential signal transmission lines, wherein: The first transmission line is a straight path, and the second transmission line is a curved path formed by periodically splicing a plurality of arc structures, wherein a single period of the arc structure is formed by splicing a plurality of arc segments by rotational replication and mirror replication, and the first transmission line and the second transmission line are equal in physical length; The arc segment satisfies the following two key parameter conditions: (a) The radius of the arc segment R>10×W, where W is the line width of the transmission line; (b) The central angle AOB corresponding to the arc segment is less than 40 degrees.

2. The PCB routing structure according to claim 1, wherein: The PCB routing structure is suitable for achieving sub-picosecond isochronous matching of differential signals within an ultra-wideband range.

3. The PCB routing structure according to claim 1, wherein: The line width W of the first transmission line and the second transmission line is equal, and the line width W is initially set to 4 mil.

4. The PCB routing structure according to claim 1, wherein: An initial distance S between the first transmission line and the second transmission line is 2.5×W, and the initial distance S is the shortest distance between the first transmission line and the second transmission line.

5. The PCB routing structure according to claim 1, wherein: The single periodic arc structure is axially symmetrical as a whole, and one side of the axial symmetry is centrally symmetrical.

6. The PCB routing structure according to claim 1, wherein: The single periodic arc structure includes four arc segments.

7. The PCB routing structure according to claim 1, wherein: The rotation copy is a 180-degree rotation copy along a boundary point of one of the arc segments, and the mirror copy is a mirror-symmetrical copy along another boundary point of the arc segment in the opposite direction.

8. The PCB routing structure according to claim 1, wherein: The ultra-wideband refers to a 180 GHz broadband.

9. The PCB routing structure according to claim 1, wherein: The ultra-high speed refers to ultra-high speeds of 224Gbps PAM4 and above.

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