Dynamic reverse bias test method and system for power semiconductor device

Abstract

The invention discloses a dynamic reverse bias test method and system for a power semiconductor device, and relates to the technical field of power semiconductor device testing, and the method comprises the steps: obtaining a test parameter of a tested device, and carrying out the test circuit configuration based on the test parameter of the tested device; performing a dynamic reverse bias test based on the configured test circuit to obtain a test result; and analyzing and evaluating a test result. According to the method, the accuracy and reliability of a test result are improved, a solid foundation is provided for a subsequent dynamic reverse bias test, potential problems of the device can be found in time, it is ensured that the test result has an actual reference value, real-time data support is provided for subsequent evaluation and analysis, the performance state of the device can be accurately judged, and the reliability of the device is improved. The safety of the test process is ensured, the integrity and sufficiency of the test are ensured, and misjudgment caused by insufficient test is avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductor device testing, and in particular to a dynamic reverse bias testing method and system for a power semiconductor device. Background Art

[0002] Power semiconductor devices are core components in modern power electronics systems, and their reliability is directly related to the performance and safety of the entire system. To ensure the reliability of power semiconductor devices, a series of tests must be performed before the devices are put into use. Dynamic reverse bias testing is an important means of evaluating the reliability of devices in high-speed switching applications. By applying a rapidly changing reverse voltage across the device, the various stresses that the device may encounter in actual applications are simulated, thereby evaluating the device's electrical stress resistance and reliability. In recent years, with the continuous development of power semiconductor device technology, higher requirements have been placed on dynamic reverse bias testing technology, such as higher test accuracy, wider test range, and more flexible test configuration.

[0003] However, most of the existing test devices are independent test machines, which are expensive and have low test efficiency, making it difficult to meet the needs of large-scale production; existing test devices usually use fixed test parameters, which are difficult to adjust according to different devices under test and test requirements, and lack flexibility; existing test devices are difficult to achieve precise control of the dynamic reverse bias voltage amplitude, frequency and change rate, making it difficult to meet the test requirements of different devices; existing test devices are difficult to monitor the key parameters of the device, such as leakage current, gate voltage, etc., in real time during the test process, making it difficult to conduct in-depth analysis and evaluation of the dynamic reverse bias characteristics of the device; existing test devices are difficult to monitor the leakage current change curve of the device in real time, making it difficult to determine whether the device has failed. In response to the above problems, the present invention provides a dynamic reverse bias test method for power semiconductor devices, which aims to solve the shortcomings of existing testing technologies and achieve more efficient, flexible and accurate dynamic reverse bias testing. Summary of the Invention

[0004] In view of the above-mentioned problems, the present invention is proposed.

[0005] Therefore, the technical problem solved by the present invention is: the existing dynamic reverse bias test technology has incomplete test results, inflexible test parameter settings, insufficient analysis accuracy, and how to achieve efficient, flexible and accurate dynamic reverse bias testing.

[0006] To solve the above technical problems, the present invention provides the following technical solutions: a dynamic reverse bias test method for a power semiconductor device, comprising obtaining test parameters of the device under test and configuring a test circuit based on the test parameters of the device under test; performing a dynamic reverse bias test based on the configured test circuit to obtain test results; and analyzing and evaluating the test results; the test results include a recorded voltage amplitude of the device under test, a recorded leakage current of the device under test, and a recorded number of test cycles.

[0007] As a preferred solution of the dynamic reverse bias test method for power semiconductor devices described in the present invention, the obtaining of the test parameters of the device under test includes obtaining the reverse bias voltage, test cycle and reverse bias voltage change rate required by the device under test.

[0008] As a preferred solution of the dynamic reverse bias test method of the power semiconductor device described in the present invention, the test circuit configuration includes designing a test circuit, including two controllable DC voltage sources connected in series, an RC charge and discharge circuit in parallel with the voltage source, a control IGBT of the charge and discharge circuit, and a device to be tested in parallel with the charge and discharge circuit, wherein the charge and discharge circuit and the device to be tested constitute a test branch.

[0009] The lower DC controlled voltage source provides a constant reverse voltage bias component across the device under test. The reverse voltage bias amplitude is equal to the set value of the lower DC controlled voltage source. The upper DC controlled voltage source is connected in parallel with the RC charge and discharge circuit to provide a dynamic reverse bias voltage for the device under test.

[0010] The RC charge and discharge circuit includes a high-voltage DC diode D1, a charging resistor R2, a discharging resistor R3, a capacitor component C1, a charge and discharge control IGBT and its supporting drive circuit. The output signal of the drive circuit is controlled by the host computer.

[0011] The charging resistor R2 is used to control the charging speed of the capacitor component C1, and the discharging resistor is used to control the discharging speed of the capacitor component C1, thereby controlling the changing speed dV / dt of the dynamic reverse bias voltage at both ends of the device under test.

[0012] The charge and discharge control IGBT is used to control the working state of the RC charge and discharge circuit, thereby controlling the rise / fall of the voltage at the terminal of the device under test. In one test cycle, the IGBT is controlled to be disconnected only once, and the switching frequency determines the test cycle of the device under test.

[0013] The high-voltage DC diode D1 is used to clamp the current flow direction to prevent the current of the capacitor component C1 from flowing into the upper-side DC controllable voltage source during the discharge phase.

[0014] Set the amplitudes of the two DC controllable voltages, the resistance of the charging resistor R2, the resistance of the discharging resistor R3, and the number of test cycles in the test conditions.

[0015] The host computer controls the drive module through the control module to provide gate drive input and set the switching frequency and duty cycle in the test conditions.

[0016] As a preferred solution of the dynamic reverse bias test method for power semiconductor devices described in the present invention, the dynamic reverse bias test based on the test circuit includes measuring the reverse leakage current, gate leakage current, gate voltage, current test cycle number, output voltage of the DC controllable voltage source and the shell surface temperature of the device under test.

[0017] When the charge and discharge control IGBT is turned off, the resistance is approximately infinite, the capacitor component is charged, the voltage at the capacitor terminal increases, and the voltage at the device under test terminal increases. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage rise rate dV / dt of the device under test is determined by the resistance value of the charging resistor R2, and the amplitude of the dynamic voltage component is determined by the amplitude of the upper DC controllable voltage source.

[0018] When the charge and discharge control IGBT switches from the off state to the on state, the capacitor component discharges, the voltage at the capacitor terminal drops, and the voltage at the device under test drops. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage drop rate dV / dt of the device under test is determined by the discharge resistor R3. The resistance values of the charging resistor R2 and the discharge resistor R3 are selected in combination with the set value of the upper DC controllable voltage source.

[0019] As a preferred solution of the dynamic reverse bias test method for power semiconductor devices described in the present invention, the analysis and evaluation of the test results includes comparing the recorded voltage amplitude of the device under test with the set value to obtain a first judgment result.

[0020] If the first judgment result shows that the voltage amplitude meets the test standard, no action is taken and the test continues; if the amplitude deviation exceeds 5%, the IGBT is controlled to turn on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test ends.

[0021] As a preferred solution of the dynamic reverse bias test method for power semiconductor devices described in the present invention, the analysis and evaluation of the test results also includes comparing the recorded leakage current of the device under test with the failure standard to obtain a second judgment result.

[0022] If the second judgment result shows that the device under test reaches the failure standard, the IGBT is controlled to be turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test is ended.

[0023] If the display shows that the test standard is not met, no action will be taken and the test will continue.

[0024] The analyzing and evaluating the test results further includes comparing the recorded number of test cycles with the set number of cycles to obtain a third judgment result.

[0025] If the third judgment result shows that the test cycle number is greater than or equal to the set cycle number, the IGBT is turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source is immediately turned off on the upper and lower sides to end the dynamic reverse bias test.

[0026] If the displayed test cycle number is less than or equal to the set cycle number, no action will be taken and the test will continue.

[0027] Another object of the present invention is to provide a dynamic reverse bias test system for power semiconductor devices, which can solve the problems of current dynamic reverse bias test technology, such as inaccurate test result analysis, inflexible test process and insufficient test safety, by analyzing and evaluating the test results.

[0028] As a preferred solution of the dynamic reverse bias test system for power semiconductor devices described in the present invention, it includes: a circuit configuration module, a test module, and an analysis and evaluation module.

[0029] The circuit configuration module is used to obtain the test parameters of the device under test and configure the test circuit; the test module is used to perform dynamic reverse bias testing based on the test circuit; and the analysis and evaluation module is used to analyze and evaluate the test results.

[0030] As a preferred solution of the dynamic reverse bias test system for power semiconductor devices described in the present invention, the acquisition of the test parameters of the device under test includes acquiring the reverse bias voltage, test cycle and reverse bias voltage change rate required by the device under test.

[0031] As a preferred solution of the dynamic reverse bias test system for power semiconductor devices described in the present invention, the test circuit configuration includes designing a test circuit, including two controllable DC voltage sources connected in series, an RC charge and discharge circuit in parallel with the voltage source, a control IGBT of the charge and discharge circuit, and a device to be tested in parallel with the charge and discharge circuit, wherein the charge and discharge circuit and the device to be tested constitute a test branch.

[0032] The lower DC controlled voltage source provides a constant reverse voltage bias component across the device under test. The reverse voltage bias amplitude is equal to the set value of the lower DC controlled voltage source. The upper DC controlled voltage source is connected in parallel with the RC charge and discharge circuit to provide a dynamic reverse bias voltage for the device under test.

[0033] The RC charge and discharge circuit includes a high-voltage DC diode D1, a charging resistor R2, a discharging resistor R3, a capacitor component C1, a charge and discharge control IGBT and its supporting drive circuit. The output signal of the drive circuit is controlled by the host computer.

[0034] The charging resistor R2 is used to control the charging speed of the capacitor component C1, and the discharging resistor is used to control the discharging speed of the capacitor component C1, thereby controlling the changing speed dV / dt of the dynamic reverse bias voltage at both ends of the device under test.

[0035] The charge and discharge control IGBT is used to control the working state of the RC charge and discharge circuit, thereby controlling the rise / fall of the voltage at the terminal of the device under test. In one test cycle, the IGBT is controlled to be disconnected only once, and the switching frequency determines the test cycle of the device under test.

[0036] The high-voltage DC diode D1 is used to clamp the current flow direction to prevent the current of the capacitor component C1 from flowing into the upper-side DC controllable voltage source during the discharge phase.

[0037] Set the amplitudes of the two DC controllable voltages, the resistance of the charging resistor R2, the resistance of the discharging resistor R3, and the number of test cycles in the test conditions.

[0038] The host computer controls the drive module through the control module to provide gate drive input and set the switching frequency and duty cycle in the test conditions.

[0039] As a preferred solution of the dynamic reverse bias test system for power semiconductor devices described in the present invention, the dynamic reverse bias test based on the test circuit includes measuring the reverse leakage current, gate leakage current, gate voltage, current test cycle number, output voltage of the DC controllable voltage source and the shell surface temperature of the device under test.

[0040] When the charge and discharge control IGBT is turned off, the resistance is approximately infinite, the capacitor component is charged, the voltage at the capacitor terminal increases, and the voltage at the device under test terminal increases. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage rise rate dV / dt of the device under test is determined by the resistance value of the charging resistor R2, and the amplitude of the dynamic voltage component is determined by the amplitude of the upper DC controllable voltage source.

[0041] When the charge and discharge control IGBT switches from the off state to the on state, the capacitor component discharges, the voltage at the capacitor terminal drops, and the voltage at the device under test drops. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage drop rate dV / dt of the device under test is determined by the discharge resistor R3. The resistance values of the charging resistor R2 and the discharge resistor R3 are selected in combination with the set value of the upper DC controllable voltage source.

[0042] As a preferred solution of the dynamic reverse bias test system for power semiconductor devices described in the present invention, the analysis and evaluation of the test results includes comparing the recorded voltage amplitude of the device under test with the set value to obtain a first judgment result.

[0043] If the first judgment result shows that the voltage amplitude meets the test standard, no action is taken and the test continues; if the amplitude deviation exceeds 5%, the IGBT is controlled to turn on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test ends.

[0044] As a preferred solution of the dynamic reverse bias test system for power semiconductor devices described in the present invention, the analysis and evaluation of the test results also includes comparing the recorded leakage current of the device under test with the failure standard to obtain a second judgment result.

[0045] If the second judgment result shows that the device under test reaches the failure standard, the IGBT is controlled to be turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test is ended.

[0046] If the display shows that the test standard is not met, no action will be taken and the test will continue.

[0047] The analyzing and evaluating the test results further includes comparing the recorded number of test cycles with the set number of cycles to obtain a third judgment result.

[0048] If the third judgment result shows that the test cycle number is greater than or equal to the set cycle number, the IGBT is turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source is immediately turned off on the upper and lower sides to end the dynamic reverse bias test.

[0049] If the displayed test cycle number is less than or equal to the set cycle number, no action will be taken and the test will continue.

[0050] In addition, the present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement a step of a dynamic reverse bias test method for a power semiconductor device.

[0051] In addition, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the dynamic reverse bias testing method for a power semiconductor device.

[0052] Beneficial effects of the present invention: The dynamic reverse bias test method for power semiconductor devices provided by the present invention performs a dynamic reverse bias test on the device under test through a configured test circuit, simulating voltage changes under actual working conditions, and can comprehensively evaluate the electrical performance of the device under test, solving the problem of incomplete test results in the prior art, thereby more accurately evaluating the device's ability to resist electrical stress and reliability; according to different devices under test and test requirements, the reverse bias voltage, test cycle, and reverse bias voltage change rate parameters can be flexibly set to meet the test requirements of different devices; by precisely controlling parameters such as the DC voltage source and the RC charge and discharge circuit in the test circuit, precise control of the voltage and current of the device under test can be achieved, thereby improving the accuracy of the test results. The present invention achieves better results in terms of test accuracy and controllability, test efficiency and safety, and data analysis and device optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0054] Figure 1 This is an overall flow chart of a dynamic reverse bias testing method for a power semiconductor device provided by the first embodiment of the present invention.

[0055] Figure 2 A test circuit diagram of a dynamic reverse bias test method for a power semiconductor device provided in the first embodiment of the present invention.

[0056] Figure 3 A dynamic reverse bias test timing diagram of a dynamic reverse bias test method for a power semiconductor device provided by the second embodiment of the present invention.

[0057] Figure 4 This is an overall flow chart of a dynamic reverse bias test system for a power semiconductor device provided by the third embodiment of the present invention. DETAILED DESCRIPTION

[0058] To make the above-mentioned objects, features, and advantages of the present invention more clearly understood, the following detailed description of the specific embodiments of the present invention is given in conjunction with the accompanying drawings. It is obvious that the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in this field without creative work should fall within the scope of protection of the present invention.

[0059] Example 1, with reference to Figure 1-Figure 2, as an embodiment of the present invention, provides a dynamic reverse bias test method for a power semiconductor device, such as Figure 1 As shown, including:

[0060] S1: Acquire test parameters of the device under test, and configure a test circuit based on the test parameters of the device under test.

[0061] Furthermore, obtaining the test parameters of the device under test includes obtaining the reverse bias voltage, test cycle, and reverse bias voltage change rate required by the device under test.

[0062] It should be noted that if Figure 2 As shown, constructing a test circuit and configuring the test circuit includes designing a circuit, including two controllable DC voltage sources connected in series, an RC charge-discharge circuit connected in parallel with the voltage source, a control IGBT of the charge-discharge circuit, and a device under test connected in parallel with the charge-discharge circuit. The charge-discharge circuit and the device under test form a test branch.

[0063] The lower DC controlled voltage source provides a constant reverse voltage bias component across the device under test. The reverse voltage bias amplitude is equal to the set value of the lower DC controlled voltage source. The upper DC controlled voltage source is connected in parallel with the RC charge and discharge circuit to provide a dynamic reverse bias voltage for the device under test.

[0064] The RC charge and discharge circuit includes a high-voltage DC diode D1, a charging resistor R2, a discharging resistor R3, a capacitor component C1, a charge and discharge control IGBT and its supporting drive circuit. The output signal of the drive circuit is controlled by the host computer.

[0065] The charging resistor R2 is used to control the charging speed of the capacitor component C1, and the discharging resistor is used to control the discharging speed of the capacitor component C1, thereby controlling the changing speed dV / dt of the dynamic reverse bias voltage at both ends of the device under test.

[0066] The charge and discharge control IGBT is used to control the working state of the RC charge and discharge circuit, thereby controlling the rise / fall of the voltage at the terminal of the device under test. In one test cycle, the IGBT is controlled to be disconnected only once, and the switching frequency determines the test cycle of the device under test.

[0067] The high-voltage DC diode D1 is used to clamp the current flow direction to prevent the current of the capacitor component C1 from flowing into the upper-side DC controllable voltage source during the discharge phase.

[0068] Set the amplitudes of the two DC controllable voltages, the resistance of the charging resistor R2, the resistance of the discharging resistor R3, and the number of test cycles in the test conditions.

[0069] The host computer controls the drive module through the control module to provide gate drive input and set the switching frequency and duty cycle in the test conditions.

[0070] It should also be noted that by accurately obtaining the key test parameters of the device under test, including reverse voltage, test duration and voltage change rate, a solid foundation is laid for the subsequent dynamic reverse bias test. The accurate acquisition of these parameters ensures that the test circuit can simulate the electrical characteristics of the device under test in the actual working environment, thereby improving the pertinence and effectiveness of the test; when configuring the test circuit, two controllable DC voltage sources in series, an RC charge and discharge circuit in parallel with the voltage source, a control IGBT of the charge and discharge circuit and a device under test in parallel with the charge and discharge circuit are used. This configuration method not only realizes the Precise control of the device under test also ensures safety and stability during the test process. By rationally selecting the resistance values of the charging resistor R2 and the discharging resistor R3, as well as the set value of the upper DC controllable voltage source, precise control of the voltage change rate and amplitude of the device under test is achieved, ensuring the accuracy and consistency of the test conditions and providing a reliable foundation for subsequent tests. Flexible circuit configuration adapts to the test requirements of different devices under test, improving the versatility and scalability of the test system. It also ensures the smooth progress of dynamic reverse bias testing and avoids test errors and safety hazards caused by improper circuit configuration.

[0071] S2: Perform a dynamic reverse bias test based on the configured test circuit to obtain the test results.

[0072] Furthermore, the dynamic reverse bias test based on the test circuit includes measuring the reverse leakage current, gate leakage current, gate voltage, current test cycle number, output voltage of the DC controllable voltage source and the housing surface temperature of the device under test.

[0073] When the charge and discharge control IGBT is turned off, the resistance is approximately infinite, the capacitor component is charged, the voltage at the capacitor terminal increases, and the voltage at the device under test terminal increases. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage rise rate dV / dt of the device under test is determined by the resistance value of the charging resistor R2, and the amplitude of the dynamic voltage component is determined by the amplitude of the upper DC controllable voltage source.

[0074] When the charge and discharge control IGBT switches from the off state to the on state, the capacitor component discharges, the voltage at the capacitor terminal drops, and the voltage at the device under test drops. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage drop rate dV / dt of the device under test is determined by the discharge resistor R3. The resistance values of the charging resistor R2 and the discharge resistor R3 are selected in combination with the set value of the upper DC controllable voltage source.

[0075] It should be noted that a dynamic reverse bias test is performed on the device under test based on the configured test circuit, simulating the voltage changes under actual working conditions and comprehensively evaluating the electrical performance of the device under test. During the test, by real-time monitoring of key parameters such as the reverse leakage current and gate leakage current of the device under test, potential problems are discovered in a timely manner, providing real-time data support for subsequent evaluation and analysis. The characteristic of the dynamic reverse bias test is that it can truly simulate the voltage changes of the device under actual working conditions, thereby accurately evaluating the performance of the device under extreme conditions. During the test, by controlling the on and off of the IGBT, the charging and discharging control of the capacitor component C1 is achieved, thereby achieving precise regulation of the voltage of the device under test. At the same time, by monitoring the voltage and current changes of the device under test and recording relevant data in real time, a reliable data basis is provided for subsequent analysis and evaluation. By precisely controlling the test conditions, the reliability and repeatability of the test are improved, providing a guarantee for large-scale production and quality inspection.

[0076] S3: Analyze and evaluate the test results.

[0077] The test results include the recorded voltage amplitude of the device under test, the recorded leakage current of the device under test, and the recorded number of test cycles.

[0078] Furthermore, analyzing and evaluating the test results includes comparing the recorded voltage amplitude of the device under test with a set value to obtain a first judgment result.

[0079] If the first judgment result shows that the voltage amplitude meets the test standard, no action is taken and the test continues; if the amplitude deviation exceeds 5%, the IGBT is controlled to turn on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test ends.

[0080] It should be noted that analyzing and evaluating the test results includes comparing the recorded leakage current of the device under test with the failure standard to obtain the second judgment result.

[0081] If the second judgment result shows that the device under test reaches the failure standard, the IGBT is controlled to be turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test is ended.

[0082] If the display shows that the test standard is not met, no action will be taken and the test will continue.

[0083] It should also be noted that analyzing and evaluating the test results also includes comparing the recorded number of test cycles with the set number of cycles to obtain a third judgment result.

[0084] If the third judgment result shows that the test cycle number is greater than or equal to the set cycle number, the IGBT is turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source is immediately turned off on the upper and lower sides to end the dynamic reverse bias test.

[0085] It should also be noted that the data collected during the dynamic reverse bias test are deeply analyzed and evaluated to achieve accurate judgment and evaluation of the performance of the device under test. By comparing the recorded voltage amplitude and leakage current of the device under test with the set standard, the performance status of the device can be accurately judged, providing a basis for subsequent decision-making; the recorded voltage amplitude of the device under test is compared with the set value to obtain a first judgment result; if the voltage amplitude meets the test standard, the test is continued; if the amplitude deviation exceeds 5%, the IGBT is controlled to turn on through the RC charge and discharge circuit, and the capacitor component is discharged, ending the dynamic reverse bias test; this judgment ensures the accuracy and consistency of the test and avoids test errors caused by voltage amplitude deviation; the recorded leakage current of the device under test is compared with the failure standard to obtain a second judgment result. If the leakage current reaches the failure standard, the IGB is controlled through the RC charge and discharge circuit. T is turned on, the capacitor component is discharged, and the dynamic reverse bias test is ended. This judgment promptly discovers potential problems of the device and avoids device failure and safety hazards caused by excessive leakage current; the recorded number of test cycles is compared with the set number of cycles to obtain a third judgment result. If the number of test cycles is greater than or equal to the set number of cycles, the IGBT is controlled to be turned on through the RC charge and discharge circuit, the capacitor component is discharged, and the dynamic reverse bias test is ended. This judgment ensures the integrity and adequacy of the test and avoids misjudgment caused by insufficient testing; through multi-faceted analysis and evaluation, a comprehensive and accurate judgment of the performance of the device under test is achieved, providing a basis for device optimization and improvement; timely termination of abnormal tests ensures the safety of the test process and the protection of the device under test; through comprehensive evaluation of test results, the reliability and reference value of the test are improved, providing strong data support for practical applications.

[0086] Example 2, reference Figure 3 , which is an embodiment of the present invention, provides a test diagram of a dynamic reverse bias test method for a power semiconductor device. In order to verify the beneficial effects of the present invention, scientific demonstration is carried out through economic benefit calculation and simulation experiments.

[0087] First, six different types of N-type MOSFET devices (NMOS-1 to NMOS-6) were selected as experimental objects. Before the experiment, the devices were first subjected to standardized pretreatment, including dehumidification, baking and surface purification, to ensure the consistency of test conditions. The experimental equipment was configured as follows: a high-precision programmable DC power supply was used to provide a constant reverse voltage. Two controllable DC voltage sources were configured in series to provide a constant reverse voltage bias component at both ends of the device under test. At the same time, an RC charge and discharge circuit was designed in parallel with the voltage source, including a high-voltage DC diode D1, a charging resistor R2, a discharging resistor R3, a capacitor component C1, and a charge and discharge control IGBT and its supporting drive circuit. This circuit and the device under test constitute a test branch to simulate the voltage changes in the actual working environment. Figure 3 As shown, the host computer controls the RC charge and discharge control IGBT gate drive input at 20Hz, the upper side DC controlled voltage source and the lower side DC controlled voltage source are both set to 500V, the charging resistor R2 has a resistance of 1000 ohms, and the discharge resistor R3 has a resistance of 8 ohms; the experimental process is as follows: the capacitor component C1 is pre-charged to the set voltage, and the charging speed is controlled by the charging resistor R2; the test is started, and the capacitor component C1 is charged and discharged by controlling the on and off of the IGBT, thereby applying a dynamic reverse bias voltage to the device under test; the voltage change rate is controlled by the charging resistor The test results show that the present invention not only improves the accuracy and reliability of the test, but also effectively simulates the actual working conditions of the device through real-time monitoring and flexible circuit configuration, and provides strong data support for the optimization and improvement of the device.

[0088] Example 3, reference Figure 4 , as an embodiment of the present invention, provides a dynamic reverse bias test system for a power semiconductor device, including a circuit configuration module, a test module, and an evaluation and analysis module.

[0089] Among them, the circuit configuration module is used to obtain the test parameters of the device under test and configure the test circuit based on the test parameters of the device under test; the test module is used to perform dynamic reverse bias testing based on the configured test circuit to obtain test results; the evaluation and analysis module is used to analyze and evaluate the test results, which include the recorded voltage amplitude of the device under test, the recorded leakage current of the device under test, and the recorded number of test cycles.

[0090] It should be noted that obtaining the test parameters of the device under test includes obtaining the reverse bias voltage, test cycle, and reverse bias voltage change rate required by the device under test.

[0091] The test circuit configuration includes designing a test circuit, including two controllable DC voltage sources connected in series, an RC charge-discharge circuit connected in parallel with the voltage source, a control IGBT of the charge-discharge circuit, and a device under test connected in parallel with the charge-discharge circuit. The charge-discharge circuit and the device under test form a test branch.

[0092] The lower DC controlled voltage source provides a constant reverse voltage bias component across the device under test. The reverse voltage bias amplitude is equal to the set value of the lower DC controlled voltage source. The upper DC controlled voltage source is connected in parallel with the RC charge and discharge circuit to provide a dynamic reverse bias voltage for the device under test.

[0093] The RC charge and discharge circuit includes a high-voltage DC diode D1, a charging resistor R2, a discharging resistor R3, a capacitor component C1, a charge and discharge control IGBT and its supporting drive circuit. The output signal of the drive circuit is controlled by the host computer.

[0094] The charging resistor R2 is used to control the charging speed of the capacitor component C1, and the discharging resistor is used to control the discharging speed of the capacitor component C1, thereby controlling the changing speed dV / dt of the dynamic reverse bias voltage at both ends of the device under test.

[0095] The charge and discharge control IGBT is used to control the working state of the RC charge and discharge circuit, thereby controlling the rise / fall of the voltage at the terminal of the device under test. In one test cycle, the IGBT is controlled to be disconnected only once, and the switching frequency determines the test cycle of the device under test.

[0096] The high-voltage DC diode D1 is used to clamp the current flow direction to prevent the current of the capacitor component C1 from flowing into the upper-side DC controllable voltage source during the discharge phase.

[0097] Set the amplitudes of the two DC controllable voltages, the resistance of the charging resistor R2, the resistance of the discharging resistor R3, and the number of test cycles in the test conditions.

[0098] The host computer controls the drive module through the control module to provide gate drive input and set the switching frequency and duty cycle in the test conditions.

[0099] The dynamic reverse bias test based on the test circuit includes measuring the reverse leakage current, gate leakage current, gate voltage, current test cycle number, output voltage of the DC controllable voltage source and the shell surface temperature of the device under test.

[0100] When the charge and discharge control IGBT is turned off, the resistance is approximately infinite, the capacitor component is charged, the voltage at the capacitor terminal increases, and the voltage at the device under test terminal increases. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage rise rate dV / dt of the device under test is determined by the resistance value of the charging resistor R2, and the amplitude of the dynamic voltage component is determined by the amplitude of the upper DC controllable voltage source.

[0101] When the charge and discharge control IGBT switches from the off state to the on state, the capacitor component discharges, the voltage at the capacitor terminal drops, and the voltage at the device under test drops. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage drop rate dV / dt of the device under test is determined by the discharge resistor R3. The resistance values of the charging resistor R2 and the discharge resistor R3 are selected in combination with the set value of the upper DC controllable voltage source.

[0102] Analyzing and evaluating the test results includes comparing the recorded voltage amplitude of the device under test with a set value to obtain a first judgment result.

[0103] If the first judgment result shows that the voltage amplitude meets the test standard, no action is taken and the test continues; if the amplitude deviation exceeds 5%, the IGBT is controlled to turn on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test ends.

[0104] Analyzing and evaluating the test results also includes comparing the recorded leakage current of the device under test with a failure standard to obtain a second judgment result.

[0105] If the second judgment result shows that the device under test reaches the failure standard, the IGBT is controlled to be turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test is ended.

[0106] If the display shows that the test standard is not met, no action will be taken and the test will continue.

[0107] Analyzing and evaluating the test results also includes comparing the recorded number of test cycles with the set number of cycles to obtain a third judgment result.

[0108] If the third judgment result shows that the test cycle number is greater than or equal to the set cycle number, the IGBT is turned on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source is immediately turned off on the upper and lower sides to end the dynamic reverse bias test.

[0109] If the displayed test cycle number is less than or equal to the set cycle number, no action will be taken and the test will continue.

[0110] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, and other media that can store program code.

[0111] The logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0112] More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic devices), a portable computer disk cartridge (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disc read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering, or processing in another suitable manner as necessary, and then stored in a computer memory.

[0113] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having logic gate circuits for implementing logical functions on data signals, an application-specific integrated circuit having suitable combinational logic gate circuits, a programmable gate array (PGA), a field-programmable gate array (FPGA), etc. It should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention and are not intended to be limiting. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced with equivalents without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications should be encompassed by the claims of the present invention.

[0114] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A dynamic reverse bias test method for a power semiconductor device, characterized in that: include: Obtaining test parameters of the device under test, and configuring a test circuit based on the test parameters of the device under test; Perform dynamic reverse bias test based on the configured test circuit to obtain test results; Analyze and evaluate test results; The test results include the recorded voltage amplitude of the device under test, the recorded leakage current of the device under test, and the recorded number of test cycles.

2. The dynamic reverse bias test method for a power semiconductor device according to claim 1, wherein: The obtaining of the test parameters of the device under test includes: Obtain the reverse bias voltage, test cycle, and reverse bias voltage change rate required by the device under test.

3. The dynamic reverse bias test method of a power semiconductor device according to claim 2, wherein: The test circuit configuration includes: Design a test circuit, including two controllable DC voltage sources connected in series, an RC charge-discharge circuit connected in parallel with the voltage source, an IGBT controlling the charge-discharge circuit, and a device under test connected in parallel with the charge-discharge circuit. The charge-discharge circuit and the device under test form a test branch. The lower DC controllable voltage source provides a constant reverse voltage bias component across the device under test. The reverse voltage bias amplitude is equal to the set value of the lower DC controllable voltage source. The upper DC controllable voltage source is connected in parallel with the RC charge and discharge circuit to provide a dynamic reverse bias voltage for the device under test. The RC charge and discharge circuit includes a high-voltage DC diode D1, a charging resistor R2, a discharging resistor R3, a capacitor component C1, a charge and discharge control IGBT, and its supporting drive circuit. The output signal of the drive circuit is controlled by the host computer. The charging resistor R2 is used to control the charging speed of the capacitor component C1, and the discharging resistor is used to control the discharging speed of the capacitor component C1, thereby controlling the changing speed dV / dt of the dynamic reverse bias voltage across the device under test; The charge and discharge control IGBT is used to control the working state of the RC charge and discharge circuit, thereby controlling the rise / fall of the voltage at the device under test. In one test cycle, the IGBT is controlled to be disconnected only once, and the switching frequency determines the test cycle of the device under test; The high-voltage DC diode D1 is used to clamp the current flow to prevent the current of the capacitor component C1 from flowing into the upper DC controllable voltage source during the discharge phase; Set the amplitudes of the two DC controllable voltages, the resistance of the charging resistor R2, the resistance of the discharging resistor R3, and the number of test cycles in the test conditions; The host computer controls the drive module through the control module to provide gate drive input and set the switching frequency and duty cycle in the test conditions.

4. The dynamic reverse bias test method for a power semiconductor device according to claim 3, wherein: The dynamic reverse bias test based on the test circuit includes: Measure the reverse leakage current, gate leakage current, gate voltage, current test cycle number, output voltage of the DC controllable voltage source and the case surface temperature of the device under test; When the charge and discharge control IGBT is turned off, the resistance is close to infinity, the capacitor component is charged, the capacitor terminal voltage increases, and the voltage at the device under test increases. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage rise rate dV / dt of the device under test is determined by the resistance value of the charging resistor R2, and the amplitude of the dynamic voltage component is determined by the amplitude of the upper DC controllable voltage source. When the charge and discharge control IGBT switches from the off state to the on state, the capacitor component discharges, the voltage at the capacitor terminal drops, and the voltage at the device under test drops. The voltage value is equal to the sum of the values of the lower DC controllable voltage source and the dynamic voltage of the capacitor. The voltage drop rate dV / dt of the device under test is determined by the discharge resistor R3. The resistance values of the charging resistor R2 and the discharge resistor R3 are selected in combination with the set value of the upper DC controllable voltage source.

5. The dynamic reverse bias test method of a power semiconductor device according to claim 4, wherein: The analysis and evaluation of the test results include: Comparing the recorded voltage amplitude of the device under test with the set value to obtain a first judgment result; If the first judgment result shows that the voltage amplitude meets the test standard, no action is taken and the test continues; if the amplitude deviation exceeds 5%, the IGBT is controlled to turn on through the RC charge and discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test ends.

6. The dynamic reverse bias test method of a power semiconductor device according to claim 5, wherein: The analyzing and evaluating the test results further includes: comparing the recorded leakage current of the device under test with a failure standard to obtain a second judgment result; If the second judgment result shows that the device under test has reached the failure standard, the IGBT is turned on through the RC charge-discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source on the upper and lower sides is turned off, and the dynamic reverse bias test ends; If the display shows that the test standard is not met, no action will be taken and the test will continue; The analyzing and evaluating the test results further includes comparing the recorded number of test cycles with the set number of cycles to obtain a third judgment result; If the third judgment result shows that the test cycle number is greater than or equal to the set cycle number, the IGBT is turned on through the RC charge-discharge circuit, and the capacitor component C1 is discharged. After the discharge is completed, the DC controllable voltage source is immediately turned off on the upper and lower sides to end the dynamic reverse bias test; If the displayed test cycle number is less than or equal to the set cycle number, no action will be taken and the test will continue.

7. A dynamic reverse bias test system for a power semiconductor device, characterized in that: include: Circuit configuration module, test module, evaluation and analysis module; The circuit configuration module is used to obtain test parameters of the device under test and configure the test circuit based on the test parameters of the device under test; The test module is used to perform a dynamic reverse bias test based on the configured test circuit to obtain a test result; The evaluation and analysis module is used to analyze and evaluate the test results, which include the recorded voltage amplitude of the device under test, the recorded leakage current of the device under test, and the recorded number of test cycles.

8. The dynamic reverse bias test system for a power semiconductor device according to claim 7, wherein: When obtaining the test parameters of the device under test, the circuit configuration module is specifically used to: Obtain the reverse bias voltage, test cycle, and reverse bias voltage change rate required by the device under test.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the dynamic reverse bias testing method for a power semiconductor device according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the dynamic reverse bias testing method for a power semiconductor device according to any one of claims 1 to 7 are implemented.

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