Zero common-mode voltage regulation and control method and system based on carrier waves

Abstract

The invention belongs to the related technical field of inverter regulation and control, and provides a zero common-mode voltage regulation and control method and system based on carrier waves, which adopt a virtual three-level modulation strategy to ensure that the actual five-level common-mode voltage is always 0, and eliminate the common-mode voltage; according to the magnitude of output current of each phase of the five-level active neutral-point clamped inverter, zero sequence voltage and carrier wave types injected into virtual three levels are determined, so that the actual five-level dual-commutation state can be transferred to a bridge arm with the minimum current absolute value, switching loss caused by dual commutation can be reduced, and the switching efficiency is improved. And unexpected switching reversing times caused by switching of adjacent sectors are reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field related to inverter control, and in particular relates to a carrier-based zero common-mode voltage control method and system. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] Five-level active neutral point clamped (5L-ANPC) inverters are widely used in medium and high voltage fields, such as motor drives and photovoltaic power generation, due to their advantages such as high and low frequency units, easy capacitor voltage balance, uniform switching losses, and multiple redundant switch combinations.

[0004] In practical applications, high-frequency common-mode voltage generates leakage current, leading to bearing wear, power grid contamination, reduced equipment life, and even threats to personnel safety. Therefore, common-mode voltage suppression is essential. Modulation techniques that employ only a zero common-mode vector effectively eliminate common-mode voltage without requiring additional hardware. This modulation method is widely used in space vector modulation (SVPWM). SVPWM uses a table lookup to determine the sector, determine the zero common-mode vector, and calculate the duty cycle. The computational complexity associated with this algorithm is a major limitation to hardware implementation. Carrier-based PWM (CBPWM), on the other hand, has a simpler algorithm and requires significantly fewer hardware resources to execute on real-time platforms. When a certain zero-sequence voltage is injected, CBPWM exhibits characteristics similar to SVPWM. However, CBPWM offers superior performance when real-time functionality is required.

[0005] However, CBPWM presents numerous challenges when it comes to eliminating common-mode voltage. To reduce current harmonics, a symmetrical switching sequence is often required. When eliminating common-mode voltage, the symmetrical five-segment switching sequence consisting of the nearest three vectors induces two switching commutations in a single phase leg. This type of double commutation is difficult to achieve using standard triangular carrier or zero-sequence voltage injection. Due to the additional switching process, double commutation increases switching losses in the corresponding leg. To reduce this loss, double commutation must occur in the leg with the smallest absolute current. Furthermore, switching between adjacent sectors can introduce undesirable commutations, further increasing switching losses. This requirement can be achieved in SVPWM by rearranging the sequence of the zero common-mode vectors, but CBPWM lacks this flexibility.

[0006] Therefore, how to use carrier-based modulation technology to eliminate the common-mode voltage in the 5L-ANPC inverter and reduce switching losses is a problem that needs to be solved. Summary of the Invention

[0007] To overcome the deficiencies of the above-mentioned prior art, the present invention provides a carrier-based zero common-mode voltage control method and system. In a virtual three-level system, discontinuous modulation technology is adopted and applied to an actual 5L-ANPC inverter through simple calculations, which can effectively eliminate the common-mode voltage and reduce switching losses.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions: In a first aspect, the present invention provides a carrier-based zero common-mode voltage control method, comprising: The vector state of the five-level active neutral point clamped inverter is converted into a virtual three-level line voltage space vector diagram to be equivalent to the actual five-level zero common mode space vector diagram; Based on the output current of each phase of the five-level active neutral point clamped inverter, the zero-sequence voltage and carrier type injected into the virtual three-level circuit are determined. The injected zero-sequence voltage is used to concentrate the double commutation of the five-level active neutral point clamped inverter at the bridge arm with the smallest absolute current value. The equivalent modulation signal of the corresponding five-level active neutral point clamped inverter is calculated according to the modulation signal of the virtual three-electric system, and the redundant switch combination is selected according to the equivalent modulation signal.

[0009] In a second aspect, the present invention provides a carrier-based zero common-mode voltage control system, comprising: A conversion module is configured to: convert the vector state of the five-level active neutral point clamped inverter into a virtual three-level line voltage space vector diagram to be equivalent to an actual five-level zero common mode space vector diagram; a determination module configured to: determine a zero-sequence voltage and a carrier type to be injected into the virtual three-level inverter according to the magnitude of the output current of each phase of the five-level active neutral point clamped inverter, and concentrate the double commutation of the five-level active neutral point clamped inverter at the bridge arm with the smallest absolute value of the current through the injected zero-sequence voltage; The switch combination control module is configured to calculate the equivalent modulation signal of the corresponding five-level active neutral point clamped inverter according to the modulation signal of the virtual three-electric system, and select the redundant switch combination according to the equivalent modulation signal.

[0010] In a third aspect, the present invention provides an electronic device comprising a memory and a processor, and computer instructions stored in the memory and executed on the processor, wherein the computer instructions, when executed by the processor, perform the method described in the first aspect.

[0011] In a fourth aspect, the present invention provides a computer-readable storage medium for storing computer instructions, wherein when the computer instructions are executed by a processor, the method described in the first aspect is performed.

[0012] One or more of the above technical solutions have the following beneficial effects: In the present invention, a virtual three-level modulation strategy is adopted to ensure that the common-mode voltage of the actual five-level inverter is always zero, thereby eliminating the common-mode voltage. The zero-sequence voltage and carrier type injected into the virtual three-level inverter are determined according to the magnitude of the output current of each phase of the five-level active neutral point clamped inverter. In this way, the double commutation state of the actual five-level inverter can be transferred to the bridge arm with the smallest absolute current value, which can reduce the switching losses caused by double commutation and the number of undesirable switching commutations caused by switching between adjacent sectors.

[0013] In this invention, a carrier-based modulation technique achieves five-level modulation using three levels, which is computationally simple and easy to implement. Furthermore, the carrier-based modulation technique does not change the shape of the triangular carrier, but instead injects a simple zero-sequence voltage to achieve double commutation in the arm with the minimum absolute current value.

[0014] In the present invention, two schemes are designed to reduce the loss when switching between adjacent sub-sectors, and the carrier directions corresponding to the two schemes are also designed. In the low-modulation area, unnecessary switching will not occur; in the high-modulation area, unnecessary switching can be avoided in three consecutive sub-sectors.

[0015] Advantages of additional aspects of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0017] Figure 1 This is the topology diagram of the 5L-ANPC inverter; Figure 2 The zero common mode space vector diagram of the 5L-ANPC inverter; Figure 3 (a) is the phase voltage space vector diagram of the virtual three-level; Figure 3 (b) is the line voltage space vector diagram of the virtual three-level; FIG4 (a) shows the sequence order scheme 1 proposed in the first embodiment of the present invention; FIG4 ( b ) shows the sequence order scheme 2 proposed in the first embodiment of the present invention; Figure 5 The relationship between the reference voltage and the reference current proposed in the first embodiment of the present invention; Figure 6 The 5L-ANPC redundant switch combination selection strategy proposed in the first embodiment of the present invention; Figure 7 This is a flow chart of the strategy proposed in Example 1 of the present invention; FIG8 (a) is an experimental verification of the strategy proposed in Example 1 of the present invention when the power factor is 0.99 and the time is 10 milliseconds / grid; FIG8 ( b ) is an experimental verification of the strategy proposed in the first embodiment of the present invention when the power factor is 0.99 and the time is 500 milliseconds / grid; FIG9 (a) is an experimental verification of the strategy proposed in Example 1 of the present invention when the power factor is 0.88 and the time is 10 milliseconds / grid; FIG9( b ) is an experimental verification of the strategy proposed in the first embodiment of the present invention when the power factor is 0.88 and the time is 500 milliseconds / grid. DETAILED DESCRIPTION

[0018] It should be noted that the following detailed descriptions are exemplary and intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present invention belongs.

[0019] It should be noted that the terms used herein are for describing particular embodiments only and are not intended to limit the exemplary embodiments according to the present invention.

[0020] In the absence of conflict, the embodiments of the present invention and the features thereof may be combined with each other.

[0021] Example 1 This embodiment discloses a carrier-based zero common-mode voltage control method, including: The vector state of the five-level active neutral point clamped inverter is converted into a virtual three-level line voltage space vector diagram to be equivalent to the actual five-level zero common mode space vector diagram; Based on the output current of each phase of the five-level active neutral point clamped inverter, the zero-sequence voltage and carrier type injected into the virtual three-level circuit are determined. The injected zero-sequence voltage is used to concentrate the double commutation of the five-level active neutral point clamped inverter at the bridge arm with the smallest absolute current value. The equivalent modulation signal of the corresponding five-level active neutral point clamped inverter is calculated according to the modulation signal of the virtual three-electric system, and the redundant switch combination is selected according to the equivalent modulation signal.

[0022] The following is a detailed description of a carrier-based zero common mode voltage control method proposed in this embodiment: S1: Based on the virtual three-level phase voltage space vector diagram, the vector state of the five-level active neutral point clamped inverter is converted into a virtual three-level line voltage space vector diagram, which can be equivalent to the actual five-point zero common mode space vector diagram.

[0023] Specifically, the topology of the three-phase 5L-ANPC is as follows: Figure 1 As shown, the DC side voltage is defined asU dc It can output 5 voltages:- U dc / 2,- U dc / 4, 0 U dc / 4, U dc / 2, from small to large, they are defined as switch states u y ( y = ab , bc , ca ): 2, -1, 0, 1 and 2. Since the common mode voltage needs to be eliminated, only the zero common mode vector needs to be used. The 5L-ANPC inverter contains a total of 19 zero common mode vectors, and the space vector diagram they form is as follows Figure 2 As shown, the vector state of each vector can be expressed as ( u ab u bc u ca ).

[0024] The switch state of the virtual three-level is defined as u x ( x = a , b , c ), the virtual three-level has three switching states, namely -1, 0, and 1. There is no corresponding output voltage in this state. For the convenience of calculation, the vector state in the virtual three-level can be defined as ( u a u b u c ), the virtual three-level space vector diagram they form is shown in Figure 3(a). This space vector diagram is essentially a virtual three-level phase voltage space vector diagram. According to formula (1), the virtual three-level line voltage space vector diagram can be obtained, as shown in Figure 3(b).

[0025] (1) According to Figure 3(b) and Figure 2 It can be found that the line voltage space vector diagram of the virtual three-level circuit is the same as the vector state in the actual five-level zero common mode space vector diagram, so the common mode voltage of the actual five-level circuit can be eliminated by the virtual three-level circuit.

[0026] The specific operation is to use the same direction dual carrier, the amplitude is between [1,0] and [0,-1], and the three switching states of the virtual three-level can be obtained by comparing with the modulation wave. u x , which is converted into three switching states of the actual five-level through formula (1) u y , need to pay attention u x As mentioned above, it does not correspond to the actual output voltage. u y Five output voltages corresponding to the actual five levels - U dc / 2,- U dc / 4, 0 U dc / 4, U dc / 2, so this method can make 5L-ANPC output five voltages.

[0027] More importantly, the value of the common mode voltage is one third of the sum of the vector switching states. The three switching states of the five levels obtained by this method are u ab , u bc , u ca According to formula (1), we can find that u ab , u bc , u ca The sum of the five-level common-mode voltages is always 0, so the virtual three-level modulation strategy can ensure that the common-mode voltage of the actual five-level is always 0.

[0028] S2: Determine the zero-sequence voltage and carrier type injected into the virtual three-level inverter based on the output current of each phase of the five-level active neutral point clamped inverter. Use the injected zero-sequence voltage to concentrate the double commutation of the five-level active neutral point clamped inverter on the bridge arm with the smallest absolute current value.

[0029] Take the gray area in the virtual three-level phase voltage and line voltage space vector diagram in Figure 3 as an example. In Figure 3(b), the three vectors are (000), (10-1), and (01-1), and when the reference voltage is in this gray sector, they can form a symmetrical five-segment sequence.

[0030] There are three five-segment sequences according to the commutation bridge arm: (000)-(10-1)-(01-1)-(10-1)-(000), bridge arm a undergoes double commutation 0-1-0-1-0; (000)-(01-1)-(10-1)-(01-1)-(000), bridge arm b undergoes double commutation 0-1-0-1-0; (01-1)-(000)-(10-1)-(000)-(01-1), bridge arm c undergoes double commutation (-1)-0-(-1)-0-(-1).

[0031] Taking the double commutation of bridge arm a as an example, if we want to obtain the actual five-level sequence (000)-(10-1)-(01-1)-(10-1)-(000), according to the virtual three-level phase voltage space vector diagram and formula (1), the corresponding virtual three-level five-segment sequence in the gray sector is (-1-1-1)-(0-1-1)-(00-1)-(0-1-1)-(-1-1-1) or (000)-(100)-(110)-(100)-(000). It can be found that in the corresponding virtual three-level, bridge arm c is clamped. By summarizing, it can be found that the actual five-level commutation bridge arm is related to the clamped virtual three-level bridge arm, and has nothing to do with the clamping state. Their relationship is shown in formula (2): (2) As shown in formula (2), the relationship between the virtual three-level clamping bridge arm and the current size and the double commutation bridge arm in the actual 5L-ANPC is revealed. Based on this, it can be seen that the solution proposed in this embodiment can be implemented in the range of power factor greater than 0.866.

[0032] The three-level circuit can clamp the bridge arm at -1, 0 or 1. In order to simplify the injected zero-sequence voltage, the bridge arm can be clamped at -1 or 1.

[0033] The following describes how to achieve the clamping state: -1 or 1. The virtual three-level modulation signal is: (3) in, m To adjust the system, is the phase voltage angle of the virtual three-level bridge arm a.

[0034] Formula (3) must satisfy the following relationship: (4) In order to clamp the bridge arm at -1 or 1, the injected zero-sequence voltage can be expressed as: (5) Therefore, the final modulated wave signal is: (6) It can be found that injection u z Finally, a DPWM strategy is essentially adopted in the virtual three-level circuit.

[0035] By switching carrier types to achieve two different sequences, switching losses can be reduced when switching between adjacent sectors. Specifically, to reduce losses during sub-sector conversion under non-unity power factor (PF) conditions and ensure that double commutation still occurs in the bridge arm with the smallest absolute current value, this embodiment proposes two different clamping strategies, namely Scheme 1 and Scheme 2, as shown in Figures 4(a) and 4(b).

[0036] In order to reduce unnecessary commutation during the sub-sector conversion process, the vector sequences of the two clamping schemes in each sub-sector are specially designed, as shown by the arrows in Figure 4 (a) and Figure 4 (b). Specifically, Scheme 1: In sectors 0-60°, 120°-180°, and 240°-300°, the a, b, and c bridge arms of the virtual three-level are clamped at 1 and a concave carrier is used; in sectors 60°-120°, 180°-240°, and 300°, the a, b, and c bridge arms of the virtual three-level are clamped at 1 and a concave carrier is used. Scheme 2: In sectors 0-60°, 120°-180°, and 240°-300°, the c, a, and b bridge arms of the virtual three-level circuit are clamped at -1, and a convex carrier is used; in sectors 60°-120°, 180°-240°, and 300°-360°, the b, c, and a bridge arms of the virtual three-level circuit are clamped at 1, and a concave carrier is used.

[0037] To achieve the desired vector sequence, convex and concave carriers are used in each sub-sector, with their corresponding relationships also shown in Figures 4(a) and 4(b). Based on the vector sequence shown in Figures 4(a) and 4(b), unnecessary commutations do not occur in the low-modulation region; in the high-modulation region, unnecessary commutations are avoided in three consecutive sub-sectors.

[0038] Since the modulation wave is generated based on the three-level phase voltage reference, but the result is a three-level line voltage, under the condition of unity power factor, the equivalent five-level modulation wave V5ref of the 5L-ANPC converter has a phase lead of π / 6 relative to the original three-level modulation wave V3ref.

[0039] Figure 5 The figure shows the relationship between V5ref, V3ref and the power factor angle φ. When the current reference Iref is between V3ref and V5ref, that is, when PF>0.866, Iref actually leads V3ref by (π / 6 – φ).

[0040] As can be seen from Figure 4 (a) - Figure 4 (b), each clamping scheme covers 2π / 3 of the virtual three-level space vector diagram. u a Taking ' = 1 as an example, this condition belongs to sector I in solution 1 and sector VI in solution 2. Therefore, when PF>0.866, it is guaranteed that the corresponding five-segment clamping vector sequence can be generated.

[0041] Although the implementation of the vector sequence in Figure 4 (a) and Figure 4 (b) is relatively complex, these two clamping strategies are actually very easy to implement. u a ' = 1 as an example (see Figure 4 (a) - Figure 4 (b)), both schemes use convex carriers, and u a The clamping condition for ' = 1 can be determined directly using Equation (2). Therefore, all required functions can be implemented based solely on the output current relationship. The final current-based criteria are summarized in Table 1.

[0042] Table 1 Zero-sequence voltage injection and carrier determination basis

[0043] S3: Calculate the equivalent modulation signal of the corresponding five-level active neutral point clamped inverter according to the modulation signal of the virtual three-electric system, and select the redundant switch combination according to the equivalent modulation signal.

[0044] The virtual three-level modulation wave is converted into an actual five-level modulation wave, and the capacitor voltage in the 5L-ANPC is balanced based on this, and the switch tube in the 5L-ANPC is enabled to operate in high and low frequency states respectively.

[0045] In the virtual three-level DPWM strategy, once the phase voltage reference value is determined u x , the corresponding actual 5L-ANPC equivalent modulation signal can be obtained using formula (1) u y . Subsequently, according to u y Select the appropriate switch combination to ensure the normal operation of the 5L-ANPC inverter. As shown in Table 2, there are eight switch combinations available for the 5L-ANPC inverter.

[0046] The selected switch combination should meet two goals at the same time: one is to achieve capacitor voltage balance, and the other is to reasonably distribute the high and low frequency working states of the power switch. A threshold can be defined K , used to balance the flying capacitor voltage ( U xf ) and midpoint voltage ( Up , U n ). The method proposed in this embodiment requires the use of the 5L-ANPC equivalent modulation signal derived from formula (1) using formula (3) u y ∗ Perform subsequent calculations.

[0047] On this basis, the control factor is defined f , which is expressed as follows: (7) in,

[0048] In order to realize the different frequency operation of the power switch, the method of this embodiment uses u y ∗ The positive and negative signs are used to distinguish +0 and −0, and the final switch combination strategy is as follows Figure 6 As shown, Figure 6 The switch combinations at adjacent ends of the arrows can be switched, while switch combinations at non-adjacent ends are not allowed to be switched. Specifically, switch combinations 1 and 2, 1 and 3, 3 and 4, 4 and 2, 5 and 7, 7 and 8, 8 and 6, and 6 and 5 are all switchable.

[0049] The switch combination strategy is: when u * y <0andu y =-2, select switch combination 1; when u * y <0,u y =-1 and f>0, select switch combination 2; when u * y <0,u y =-1 and f<0, select switch combination 3; when u * y <0andu y =0, select switch combination 4. * y >0 and u y =0, select switch combination 5; u * y >0,u y =1, and f<0, select switch combination 7, u * y >0, and u y =2, select switch combination 8; u* y >0,u y =1, and f>0, select switch combination 6.

[0050] The DPWM strategy flow chart proposed in this embodiment is as follows: Figure 7 shown.

[0051] Table 2: Eight switch combinations of 5L-ANPC

[0052] In this embodiment, the DC side voltage is 100V, the external load is a resistor and an inductor, and the power factor is adjusted by changing the inductor. The load resistance is 8Ω, and the formula (7) is K is 1V. In the modulation m =0.8, the experimental results when PF is 0.99 and 0.88 are shown in Figure 8 (a) - Figure 8 (b) and Figure 9 (a) - Figure 9 (b) respectively. In Figure 8 (a) - Figure 8 (b), the waveforms from top to bottom are the common mode voltage CMV, the capacitor voltage on the DC side U p , bridge arm a floating capacitor voltage U af , the output phase voltage of bridge arm a U ao , the line voltage between bridge arms a and b U ab And the output current of bridge arm a i a ; In Figure 9 (a)-Figure 9 (b), U ao , U bo , U co Represent the output phase voltages of bridge arms a, b, and c respectively, i a , i b , i c Represent the output current of bridge arms a, b, and c respectively.

[0053] As shown in Figure 8(a)-Figure 8(b), when PF = 0.99, the phase voltage U ao Presents a five-level waveform, line voltage U ab It presents a nine-level waveform; the voltage of each capacitor is maintained near its reference value, achieving good voltage balance, and the common mode voltage is effectively eliminated, and the output current i aThe total harmonic distortion (THD) of the phase voltage is 1.42% and the double commutation occurs in the bridge arm with the smallest absolute current value. As shown in Figure 9(a)-Figure 9(b), when PF = 0.88, the output current THD is reduced to 0.63%, and the current lag is more obvious than the voltage, but the double commutation still occurs in the bridge arm with the smallest current amplitude.

[0054] This embodiment adopts discontinuous power modulation (DPWM) in a virtual three-level system and is applied to an actual 5L-ANPC inverter through simple calculations, thereby effectively eliminating common-mode voltage and reducing switching losses.

[0055] This embodiment uses CBPWM, which has high timeliness, fast calculation, and reduced hardware requirements. The proposed CBPWM achieves five-level modulation through three levels, is simple to calculate, and easy to implement. The proposed CBPWM does not change the shape of the triangular carrier, but injects a simple zero-sequence voltage to achieve double commutation in the bridge arm with the minimum absolute current value.

[0056] Example 2 The purpose of this embodiment is to provide a carrier-based zero common-mode voltage control system, including: A conversion module is configured to: convert the vector state of the five-level active neutral point clamped inverter into a virtual three-level line voltage space vector diagram to be equivalent to an actual five-level zero common mode space vector diagram; a determination module configured to: determine the zero-sequence voltage and carrier type injected into the virtual three-level inverter according to the magnitude of the output current of each phase of the five-level active neutral point clamped inverter, and concentrate the double commutation of the five-level active neutral point clamped inverter on the bridge arm with the smallest absolute value of the current; The switch combination control module is configured to calculate the equivalent modulation signal of the corresponding five-level active neutral point clamped inverter according to the modulation signal of the virtual three-electric system, and select the redundant switch combination according to the equivalent modulation signal.

[0057] In further embodiments, there is also provided: An electronic device includes a memory and a processor, and computer instructions stored in the memory and executed by the processor. When the computer instructions are executed by the processor, the method described in Example 1 is performed. For the sake of brevity, no further details are given here.

[0058] It should be understood that in this embodiment, the processor may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), off-the-shelf field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0059] The memory may include a read-only memory and a random access memory, and provides instructions and data to the processor. A portion of the memory may also include a non-volatile random access memory. For example, the memory may also store information about the device type.

[0060] A computer-readable storage medium is used to store computer instructions, and when the computer instructions are executed by a processor, the method described in embodiment 1 is performed.

[0061] The method in Example 1 can be directly implemented as being executed by a hardware processor, or by a combination of hardware and software modules within the processor. The software module can be located in a storage medium well-established in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. The storage medium is located in the memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method. To avoid repetition, a detailed description is not given here.

[0062] A computer program product includes a computer program, and when the computer program is executed by a processor, the method described in embodiment 1 is implemented.

[0063] The present invention also provides at least one computer program product tangibly stored on a non-transitory computer-readable storage medium. The computer program product includes computer-executable instructions, such as instructions contained in program modules, which are executed in a device on a real or virtual processor of a target to perform the process / method described above. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, etc. that perform specific tasks or implement specific abstract data types. In various embodiments, the functionality of program modules can be combined or divided between program modules as needed. The machine-executable instructions for the program modules can be executed in local or distributed devices. In distributed devices, program modules can be located in local and remote storage media.

[0064] The computer program code for implementing the method of the present invention can be written in one or more programming languages. These computer program codes can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device so that when the program code is executed by the computer or other programmable data processing device, the functions / operations specified in the flow chart and / or block diagram are implemented. The program code can be executed entirely on a computer, partially on a computer, as an independent software package, partially on a computer and partially on a remote computer, or entirely on a remote computer or server.

[0065] In the context of the present invention, computer program code or related data can be carried by any appropriate carrier to enable a device, apparatus, or processor to perform the various processes and operations described above. Examples of carriers include signals, computer-readable media, and the like. Examples of signals include electrical, optical, radio, acoustic, or other forms of propagated signals, such as carrier waves, infrared signals, and the like.

[0066] Those skilled in the art will appreciate that the units and algorithm steps of the various examples described in conjunction with this embodiment can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0067] Although the above describes the specific embodiments of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without any creative work are still within the scope of protection of the present invention.

Claims

1. A carrier-based zero common mode voltage control method, characterized in that: include: The vector state of the five-level active neutral point clamped inverter is converted into a virtual three-level line voltage space vector diagram to be equivalent to the actual five-level zero common mode space vector diagram; Based on the output current of each phase of the five-level active neutral point clamped inverter, the zero-sequence voltage and carrier type injected into the virtual three-level circuit are determined. The injected zero-sequence voltage is used to concentrate the double commutation of the five-level active neutral point clamped inverter at the bridge arm with the smallest absolute current value. The equivalent modulation signal of the corresponding five-level active neutral point clamped inverter is calculated according to the modulation signal of the virtual three-electric system, and the redundant switch combination is selected according to the equivalent modulation signal.

2. The carrier-based zero common mode voltage control method according to claim 1, wherein: The vector state of the five-level active neutral point clamped inverter is converted into a virtual three-level line voltage space vector diagram to be equivalent to the actual five-level zero common mode space vector diagram, specifically: By comparing the co-directional dual carrier wave with the modulated wave, three switching states of the virtual three-level are obtained; The three switching states of the virtual three-level are converted into three switching states of an actual five-level active neutral point clamped inverter, corresponding to five output voltages of the actual five-level active neutral point clamped inverter.

3. The carrier-based zero common mode voltage control method according to claim 1, wherein: The relationship between the commutation bridge arm of the five-level active neutral point clamped inverter and the clamped virtual three-level bridge arm is as follows: the dual commutation bridge arm a of the five-level active neutral point clamped inverter corresponds to the virtual three-level clamped bridge arm c; the dual commutation bridge arm b of the five-level active neutral point clamped inverter corresponds to the virtual three-level clamped bridge arm a; and the dual commutation bridge arm c of the five-level active neutral point clamped inverter corresponds to the virtual three-level clamped bridge arm b.

4. The carrier-based zero common mode voltage control method according to claim 1, wherein: According to the output current of each phase of the five-level active neutral point clamped inverter, the zero-sequence voltage and carrier type injected into the virtual three-level inverter are determined. The injected zero-sequence voltage is used to concentrate the double commutation of the five-level active neutral point clamped inverter at the bridge arm with the smallest absolute current value. Specifically, when i a > i b > i c ,or i b > i c > i a ,or i c > i a > i b When the zero-sequence voltage injected into the virtual three-level is u z =1- u max , the corresponding carrier type is concave carrier; when i b > i a > i c ,or i c > i b > i a ,or i a > i c > i b , the zero-sequence voltage injected into the virtual three-level is u z =-1- u min , the corresponding carrier type is convex carrier; in, i a 、 i b 、 i c are the output currents of each phase of the five-level active neutral point clamped inverter, u max is the maximum value of the virtual three-level modulation signal, u min is the minimum value of the virtual three-level modulation signal.

5. A carrier-based zero common mode voltage control method according to claim 1 or 4, characterized in that: Two different sequences are implemented by switching the carrier type to reduce the switching loss when switching between adjacent sub-sectors. Specifically: Solution 1: Clamp the a, b, and c bridge arms of the virtual three-level circuit to 1 in sectors 0-60°, 120°-180°, and 240°-300°, respectively, and use a concave carrier. In sectors 60°-120°, 180°-240°, and 00°-360°, the c, a, and b bridge arms of the virtual three-level are clamped at -1, and a convex carrier is used; Solution 2: Clamp the c, a, and b bridge arms of the virtual three-level circuit to -1 in sectors 0-60°, 120°-180°, and 240°-300°, respectively, and use a convex carrier. In sectors 60°-120°, 180°-240°, and 300°-360°, the b, c, and a bridge arms of the virtual three-level circuit are clamped at 1, and a concave carrier is used.

6. The carrier-based zero common mode voltage control method according to claim 1, wherein: The equivalent modulation signal of the corresponding five-level active neutral point clamped inverter is calculated based on the modulation signal of the virtual three-electric system. The redundant switch combination is selected based on the equivalent modulation signal. Specifically, when u * y <0 and u y =-2, select switch combination 1; when u * y <0, u y =-1 and f When >0, select switch combination 2; when u * y <0, u y =-1 and f When <0, select switch combination 3; when u * y <0 and u y =0, select switch combination 4; when u * y >0 and u y =0, select switch combination 5; when u * y >0, u y =1, and f When <0, select switch combination 7; when u * y >0, and u y =2, select switch combination 8; when u * y >0, u y =1, and f >0, select switch combination 6; in, u * y is the calculated equivalent modulation signal of the five-level active neutral point clamped inverter, u y is the equivalent modulation signal of the actual five-level active neutral point clamped inverter, f is the control factor; switch combination 1 is (0,0,0,0), switch combination 2 is (0,0,0,1), switch combination 3 is (0,0,1,0), switch combination 4 is (0,0,1,1), switch combination 5 is (1,1,0,0), switch combination 6 is (1,1,0,1), switch combination 7 is (1,1,10), and switch combination 8 is (1,1,1,1).

7. The carrier-based zero common mode voltage control method according to claim 6, wherein: A control factor is determined according to the difference between the flying capacitor voltage and one-quarter of the DC side voltage of the five-level active neutral point clamped inverter and a preset threshold.

8. A carrier-based zero common mode voltage control system, characterized in that: include: A conversion module is configured to: convert the vector state of the five-level active neutral point clamped inverter into a virtual three-level line voltage space vector diagram to be equivalent to an actual five-level zero common mode space vector diagram; a determination module configured to: determine the zero-sequence voltage and carrier type injected into the virtual three-level inverter according to the magnitude of the output current of each phase of the five-level active neutral point clamped inverter, and concentrate the double commutation of the five-level active neutral point clamped inverter on the bridge arm with the smallest absolute value of the current; The switch combination control module is configured to calculate the equivalent modulation signal of the corresponding five-level active neutral point clamped inverter according to the modulation signal of the virtual three-electric system, and select the redundant switch combination according to the equivalent modulation signal.

9. An electronic device, characterized in that: The method comprises a memory and a processor, and computer instructions stored in the memory and executed on the processor, wherein when the computer instructions are executed by the processor, the method according to any one of claims 1 to 7 is completed.

10. A computer-readable storage medium, characterized in that Used to store computer instructions, which, when executed by a processor, complete the method according to any one of claims 1 to 7.

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