Carrier-attached copper foil with planar resistor, preparation method thereof and circuit board

Abstract

The invention relates to a carrier-attached copper foil with a planar resistor, a preparation method of the carrier-attached copper foil and a circuit board. The carrier-attached copper foil is formed by sequentially stacking a carrier, a stripping layer, an ultra-thin copper layer and a resistor layer, the carrier is metal of which the surface is coated with a resin layer; and the resistance layer is distributed in a partial region on the ultra-thin copper layer. The carrier-attached copper foil provided by the invention not only can improve the dimensional accuracy of the resistor, but also can greatly improve signal loss caused by ferromagnetic elements; and the improved carrier can be recycled after being stripped, so that the production cost is saved.

Description

Technical Field

[0001] The present invention belongs to the technical field of printed circuit boards, and in particular relates to a carrier-attached copper foil with a planar resistor, a preparation method thereof, and a circuit board. Background Art

[0002] With the increase in packaging density and the further miniaturization of electronic devices, embedded resistor technology has been widely used, usually using embedded resistor copper foil. The conventional method is to deposit the resistor material on the roughened surface of the copper foil to obtain a resistor layer, then press the resistor layer with the substrate, and finally etch to obtain the resistor pattern, such as Figure 1A -C. Doing so will lead to two problems: first, the resistor material is deposited on the surface of the copper foil. Since the resistor material usually contains ferromagnetic elements, it will affect the signal transmission of the circuit; second, due to the difference in etching rate between the copper foil and the resistor material, and the influence of side etching, the dimensional accuracy of the resistor is difficult to guarantee. At present, the use of ultra-thin carrier-attached copper foil technology combined with the improved semi-additive process (mSAP) process can improve the dimensional accuracy of the resistor to a certain extent, but the carrier of the carrier-attached copper foil cannot be effectively utilized after peeling off, resulting in a waste of resources. Therefore, it is urgent to develop a new carrier-attached copper foil product and circuit board that can not only significantly improve the signal loss caused by ferromagnetic elements, but also avoid the waste of resources after the carrier is peeled off. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a copper foil with a carrier and a preparation method thereof with a planar resistor, as well as a circuit board. The copper foil with a carrier can not only improve the dimensional accuracy of the resistor, but also significantly improve the signal loss caused by ferromagnetic elements; the improved carrier can also be recycled after peeling, saving production costs.

[0004] The present invention provides a copper foil with a carrier and a planar resistor. The copper foil with a carrier is sequentially stacked with a carrier, a peeling layer, an ultra-thin copper layer and a resistor layer; the carrier is a metal with a resin layer coated on the surface; the resistor layer is distributed in a partial area on the ultra-thin copper layer.

[0005] Preferably, the metal includes any one of gold, silver, copper, aluminum, nickel and titanium.

[0006] Preferably, the resin layer contains resin and ceramic filler.

[0007] Furthermore, the resin includes any one of epoxy resin, BT resin, phenolic resin, cyanate resin, polyphenylene ether resin, acrylic resin, and hydrocarbon resin, or a mixture of at least two of them.

[0008] Furthermore, the ceramic filler includes any one of barium titanate, aluminum oxide, silicon dioxide, titanium dioxide, and zirconium oxide, or a mixture of at least two thereof.

[0009] Preferably, the release layer includes carbon, oxygen, nitrogen and / or at least one metal element.

[0010] Preferably, the resistance layer includes any one of nickel phosphorus, nickel molybdenum phosphorus, nickel tungsten phosphorus, nickel chromium, nickel chromium aluminum silicon, chromium silicon oxide, nickel chromium carbon tungsten, and nickel phosphorus copper alloy.

[0011] Preferably, the surface of the resistor layer away from the ultra-thin copper layer is roughened and anti-oxidation treated.

[0012] Preferably, the separation force between the ultra-thin copper layer and the carrier is 0.15-0.3 N / mm; the separation force between the ultra-thin copper layer and the insulating substrate is 0.7-1 N / mm.

[0013] Preferably, the thickness of the carrier is 10-60 μm; the thickness of the ultra-thin copper layer is 1-5 μm; and the thickness of the resistance layer is 0.05-1 μm.

[0014] The present invention also provides a method for preparing a copper foil with a carrier and a planar resistor, comprising the following steps:

[0015] S1. Pre-treat the metal surface;

[0016] S2, coating the metal surface with a resin layer to obtain a carrier;

[0017] S3, preparing a peeling layer on the carrier;

[0018] S4, preparing an extremely thin copper layer on the peeling layer;

[0019] S5. Preparing a resistance layer on the ultra-thin copper layer.

[0020] Preferably, the pretreatment in step S1 includes pickling and micro-etching. A dilute sulfuric acid solution is used for pickling, and a micro-etching solution is used for micro-etching.

[0021] Furthermore, the sulfuric acid content in the dilute sulfuric acid solution is 3 vol%-10 vol%.

[0022] Furthermore, the contents of the components of the micro-etching solution are as follows: 40-200 g / L sulfuric acid, 20-100 g / L hydrogen peroxide, 10-30 g / L copper ion, 5-30 g / L complexing agent, 5-20 g / L corrosion inhibitor, and the rest is pure water.

[0023] Furthermore, the complexing agent and corrosion inhibitor can be selected from mature technical solutions in the industry, and are not limited here.

[0024] Furthermore, after micro-etching, the roughness of the metal surface was measured by a non-contact method and found to be Rz < 1.5 μm.

[0025] Preferably, in step S2, a resin layer glue solution is first prepared: the ceramic filler, resin and solvent are evenly mixed to obtain the resin layer glue solution.

[0026] Preferably, in step S2, the resin layer glue is applied to one surface of the metal.

[0027] Furthermore, the step S2 further includes drying the resin layer glue at a temperature of 90° C. to 150° C. for 1 to 3 hours, and finally obtaining a metal with a surface coated with a resin layer, namely a carrier.

[0028] Preferably, in step S3, a peeling layer is prepared on the other surface of the metal, the non-metallic elements in the peeling layer are obtained by coating a solution containing an organic substance, and the metal elements in the peeling layer are obtained by immersion plating a solution containing a metal salt.

[0029] Furthermore, the solution containing organic matter includes at least two of serine, alanine, proline, tyrosine, valine, glutamic acid, lysine, and histidine, and the total content of the organic matter is 0.5-5 g / L.

[0030] Furthermore, the metal salt-containing solution includes at least two of nickel sulfate, cobalt sulfate, sodium molybdate, zinc sulfate, stannous sulfate, and chromium trichloride, the total concentration of the metal salts is 50-150 g / L, the metal salt-containing solution also contains a complexing agent with a concentration of 100-200 g / L, and the solution pH is 2-5.

[0031] Furthermore, the coating conditions include: temperature 20-30° C., time 20-60 s.

[0032] Furthermore, the immersion plating conditions include: current density 0.5-8A / dm 2 , time 5-10s, temperature 30-50℃.

[0033] Preferably, in step S4, a very thin copper layer is deposited on the peeling layer by electroplating or sputtering.

[0034] Preferably, in step S5, the resistor layer is deposited on the ultra-thin copper layer by electroplating or sputtering.

[0035] Furthermore, before depositing the resistor layer on the ultra-thin copper layer, a first photoresist is used to transfer the resistor pattern on the film to the ultra-thin copper layer through exposure and development, and then a layer of resistor material is deposited. The resistor material has a square resistance of 25-250Ω / □. Finally, the first photoresist film is removed to obtain the resistor layer. The resistor layer is distributed in a partial area on the ultra-thin copper layer.

[0036] Furthermore, in step S5, the resistor layer is roughened to enhance its bonding strength with the substrate. The roughening treatment forms a layer of fine particles on the surface of the resistor layer. The ratio of the total surface area to the projected area of ​​the roughened surface is 1.05-1.3.

[0037] Furthermore, in step S5, a layer of silane coupling agent is coated on the surface of the roughened resistor layer to form an anti-oxidation layer.

[0038] The present invention also provides a circuit board with a carrier copper foil using a planar resistor. Preferably, the circuit board is prepared as follows:

[0039] (1) Laminating the resistor layer with carrier copper foil to the substrate;

[0040] (2) The carrier with the carrier copper foil is pressed together with another carrier at the same time;

[0041] (3) After the resin layers of the substrate and the carrier with the copper foil attached to the carrier are cured, the carrier with the copper foil attached to the carrier is peeled off;

[0042] (4) Embedded resistor circuit processing;

[0043] (5) Embedded capacitor circuit processing.

[0044] Furthermore, the substrate in step (1) includes any one of epoxy resin prepreg, hydrocarbon resin prepreg, PTFE resin prepreg, polyphenylene ether resin prepreg, bismaleimide and polymaleimide resin prepreg, LCP liquid crystal polymer, cyanate resin prepreg, ABF resin prepreg, and phenolic resin prepreg.

[0045] Furthermore, in the step (2), the resin layer of the carrier is subjected to the aforementioned drying treatment, and the resin layers are pressed relative to each other.

[0046] Furthermore, in step (3), after the resin layers of the substrate and the carrier are completely cured, the carrier is peeled off to obtain a laminate with embedded resistors and a stacked carrier, wherein the laminate with embedded resistors includes a substrate, an ultra-thin copper layer and a resistor layer.

[0047] Furthermore, in step (4), a second photoresist is used to transfer the resistor window pattern on the film to the ultra-thin copper layer through exposure and development, and then the ultra-thin copper layer is flash-etched, and finally the second photoresist film is removed to obtain a windowed embedded resistor.

[0048] Furthermore, in step (4), a third photoresist is used to transfer the conductive circuit pattern on the film to the ultra-thin copper layer through exposure and development, and then the ultra-thin copper layer is electroplated to thicken the layer, and the thickness of the thickened copper layer is 35-105 μm.

[0049] Furthermore, in step (4), the third photoresist film is removed, and the ultra-thin copper layer in the non-conductive circuit area is removed by flash etching. Since the ultra-thin copper layer is very thin, the amount of side etching is very limited, which is conducive to ensuring the accuracy of line width and line spacing, and finally obtaining an embedded resistor circuit board.

[0050] Furthermore, in step (5), the metals on both sides of the obtained laminated carrier are processed into circuits, and the resin layer contains high-dielectric ceramic fillers, so the carrier can be used as a raw material for embedded capacitor circuit boards.

[0051] Beneficial effects

[0052] (1) The copper foil with carrier of the present invention can not only improve the dimensional accuracy of the resistor, but also significantly improve the signal loss caused by ferromagnetic elements; the improved carrier can also be recycled after peeling, saving production costs.

[0053] (2) The resistive layer of the copper foil with a carrier of the present invention is distributed in a partial area on the ultra-thin copper layer, that is, the resistive layer is introduced in the window area. Resistors can only be formed in the window area, but not in other areas, which greatly improves the signal loss caused by ferromagnetic elements.

[0054] (3) The metal side surface of the carrier of the present invention is coated with a resin layer, which serves as a carrier for the ultra-thin copper layer, thereby improving the support and making the ultra-thin copper layer less susceptible to damage during transportation and lamination.

[0055] (4) The resin layer of the carrier of the present invention includes a high-dielectric ceramic filler. After the carrier is peeled off, it can be used as a raw material for manufacturing embedded capacitor circuit boards, thereby reducing production waste and saving production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1A -C is a schematic diagram of the traditional embedded resistor manufacturing process.

[0057] Figure 2A -K is a schematic diagram of the process flow of Example 1.

[0058] Figure 3 Schematic diagram of the structure of the copper foil with a carrier and a planar resistor according to the present invention.

[0059] Among them, 1-copper foil, 2-resistance material, 3-substrate, 4-carrier, 41-metal, 42-resin layer, 5-peeling layer, 6-ultra-thin copper layer, 7-resistance layer, 8-thickened copper layer, 100-laminated board with embedded resistors, 200-laminated carrier, 300-embedded resistor circuit board, 400-board with embedded capacitors, 500-copper foil with carrier and planar resistors. DETAILED DESCRIPTION

[0060] Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiments are only used to illustrate the present invention and are not used in limiting the scope of the present invention.In addition, should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall equally within the scope limited by the appended claims of the application.

[0061] Example 1

[0062] Step S1:

[0063] An 18-μm copper foil 41 was pretreated by pickling and micro-etching. The pickling process used a 5 vol% dilute sulfuric acid solution. The micro-etching solution contained the following components: 120 g / L sulfuric acid, 50 g / L hydrogen peroxide, 20 g / L copper ions, 20 g / L complexing agent, 10 g / L corrosion inhibitor, and the remainder pure water. The complexing agent was sodium citrate, and the corrosion inhibitor was pyridine. After micro-etching, the copper foil had a surface roughness Rz of 0.8 μm.

[0064] Step S2:

[0065] First, ceramic filler, resin and solvent are mixed evenly to obtain a resin layer glue, wherein the ceramic filler is barium titanate, the resin is epoxy resin, and the solvent is a mixture of ethyl acetate and acetone in a volume ratio of 6:4;

[0066] Then, the resin layer glue was evenly coated on one side of the copper foil and vacuum baked at 120° C. for 2 hours to obtain a carrier 4. The total thickness of the carrier was 50 μm.

[0067] Step S3:

[0068] 1) Immerse the carrier in a solution containing metal salts for electroplating. The electroplating surface is the other side of the copper foil. The solution includes nickel sulfate and sodium molybdate. The total concentration of the metal salts is 80 g / L. The concentration of the complexing agent sodium citrate is 120 g / L. The pH of the solution is 3.5. The current density of the immersion plating is 1 A / dm 2 , time is 8s, temperature is 40℃.

[0069] 2) Applying an organic solution containing serine and tyrosine to the surface of the electroplated copper foil, with a total organic content of 5 g / L, a coating temperature of 25° C., and a coating time of 30 seconds, to obtain an inorganic & organic composite release layer 5 having good conductivity, allowing a very thin copper layer to be directly deposited on the release layer.

[0070] Step S4:

[0071] An ultra-thin copper layer 6 is deposited on the peeling layer by direct current electroplating. The thickness of the ultra-thin copper layer is 3 μm.

[0072] Step S5:

[0073] Using a first photoresist, the resistor pattern on the film is transferred to an ultra-thin copper layer through exposure and development. A Ni-Cr alloy layer with a thickness of 0.08 μm and a sheet resistance of 50 Ω / □ is then sputtered. Finally, the first photoresist film is removed to form the resistor layer 7. After roughening the resistor layer, the ratio of its total surface area to projected area is 1.1. A layer of γ-aminopropyltriethoxysilane is applied to the roughened resistor layer as an anti-oxidation layer. Finally, a copper foil with a carrier and planar resistor 500 is obtained.

[0074] Step S6:

[0075] The resistance layer of the copper foil with a carrier obtained in step S6 is pressed together with the polyphenylene ether resin prepreg 3 .

[0076] Step S7:

[0077] At the same time, the carrier resin layer 42 with the carrier copper foil of S6 is pressed against another carrier resin layer. Figure 2F .

[0078] Step S8:

[0079] After the polyphenylene ether resin prepreg 3 and the resin layer 42 of the carrier are completely cured, the carrier is peeled off to obtain the laminate 100 with embedded resistors. The separation force between the ultra-thin copper layer and the carrier is 0.2N / mm, and the separation force between the ultra-thin copper layer and the insulating substrate is 0.8N / mm. Step S9:

[0080] 1) Using a second photoresist, the resistor pattern on the film is transferred to the ultra-thin copper layer of the circuit board where the resistor is embedded through exposure and development. The ultra-thin copper layer of the resistor area is then flash-etched. Finally, the second photoresist film is removed to obtain the embedded resistor. Figure 2G .

[0081] 2) Using a third photoresist, the conductive circuit pattern on the film is transferred to the ultra-thin copper layer through exposure and development, and then the ultra-thin copper layer is thickened by electroplating. The thickness of the thickened copper layer 8 is 35 μm.

[0082] 3) Remove the third photoresist film, flash-etch and remove the extremely thin copper layer 6 of the non-conductive circuit to obtain a complete conductive circuit and embedded resistor circuit board (300). Figure 2H -J.

[0083] Step S10:

[0084] The copper foils on both sides of the laminated carrier 200 obtained in step S8 are processed to obtain a plate 400 with embedded capacitors. Figure 2K .

[0085] Example 2

[0086] Step S1:

[0087] A 35μm copper foil was pretreated by pickling and microetching. The pickling process used an 8vol% dilute sulfuric acid solution. The microetching solution contained the following components: 150g / L sulfuric acid, 60g / L hydrogen peroxide, 30g / L copper ions, 30g / L complexing agent, 15g / L corrosion inhibitor, and the remainder pure water. The complexing agent was sodium citrate, and the corrosion inhibitor was pyridine. After microetching, the copper foil achieved a surface roughness Rz of 1.1μm.

[0088] Step S2:

[0089] First, ceramic filler, resin and solvent are evenly mixed to obtain a resin layer glue solution, wherein the ceramic filler is titanium dioxide, the resin is acrylic resin, and the solvent is ethyl acetate;

[0090] Then, the resin layer glue was evenly coated on one side of the copper foil and vacuum baked at 120° C. for 1 hour to obtain a carrier with a total thickness of 55 μm.

[0091] Step S3:

[0092] 1) Immerse the carrier in a solution containing metal salts for electroplating. The electroplating surface is the other side of the copper foil. The solution contains nickel sulfate and chromium trichloride. The total concentration of the metal salts is 100 g / L, the concentration of the complexing agent EDTA is 130 g / L, the pH of the solution is 2.5, and the current density of the immersion plating is 1 A / dm 2 , time is 6s, temperature is 35℃.

[0093] 2) applying an organic solution containing serine and tyrosine to the surface of the electroplated copper foil, with a total organic content of 5 g / L, at a coating temperature of 25° C. for 30 seconds; thereby obtaining an inorganic and organic composite release layer having good conductivity, capable of directly depositing an extremely thin copper layer on the release layer.

[0094] Step S4:

[0095] A very thin copper layer is deposited on the stripping layer by direct current electroplating, and the thickness of the very thin copper layer is 3 μm.

[0096] Step S5:

[0097] Using a first photoresist, the resistor pattern on the film is transferred to an ultra-thin copper layer through exposure and development. A Ni-P alloy layer is then electroplated to a thickness of 0.1 μm and a sheet resistance of 50 Ω / □. Finally, the first photoresist film is removed to form a resistor layer. The resistor layer is roughened to a total surface area to projected area ratio of 1.2. A layer of γ-aminopropyltriethoxysilane is applied to the roughened resistor layer as an anti-oxidation layer. This results in a copper foil with a carrier and planar resistors. Step S6:

[0098] The resistance layer of the copper foil with a carrier obtained in step S6 is pressed onto the PTFE resin prepreg.

[0099] Step S7:

[0100] At the same time, the carrier resin layer of the copper foil with a carrier of S6 is pressed against another carrier resin layer.

[0101] Step S8:

[0102] After the PTFE resin prepreg and the carrier resin layer are completely cured, the carrier is peeled off to obtain a laminate with embedded resistors. The separation force between the ultra-thin copper layer and the carrier is 0.15N / mm, and the separation force between the ultra-thin copper layer and the insulating substrate is 0.9N / mm.

[0103] Step S9:

[0104] 1) Using a second photoresist, the resistor pattern on the film is transferred to the ultra-thin copper layer of the circuit board where the resistor is embedded through exposure and development. The ultra-thin copper layer in the resistor area is then flash-etched, and the second photoresist film is finally removed to obtain the embedded resistor.

[0105] 2) Using a third photoresist, the conductive circuit pattern on the film is transferred to the ultra-thin copper layer through exposure and development, and then the ultra-thin copper layer is thickened by electroplating. The thickness of the thickened copper layer is 35 μm.

[0106] 3) Remove the third photoresist film and remove the extremely thin copper layer of the non-conductive circuit by flash etching to obtain a complete conductive circuit and embedded resistor circuit board.

[0107] Step S10:

[0108] The copper foils on both sides of the laminated carrier obtained in step S8 are processed into circuits to obtain a plate with embedded capacitors.

[0109] Example 3

[0110] Step S1:

[0111] An 18μm copper foil was pretreated by pickling and microetching. The pickling process used a 5vol% dilute sulfuric acid solution. The microetching solution contained the following components: 120g / L sulfuric acid, 50g / L hydrogen peroxide, 10g / L copper ions, 10g / L complexing agent, 10g / L corrosion inhibitor, and the remainder pure water. The complexing agent was sodium citrate, and the corrosion inhibitor was pyridine. After microetching, the copper foil achieved a surface roughness Rz of 0.9μm.

[0112] Step S2:

[0113] First, ceramic filler, resin and solvent are evenly mixed to obtain a resin layer glue solution, wherein the ceramic filler is silica, the resin is BT resin and the solvent is acetone;

[0114] Then, the resin layer glue is evenly coated on one side surface of the copper foil, and vacuum baked at 120° C. for 3 hours to obtain a carrier. The total thickness of the carrier is 50 μm.

[0115] Step S3:

[0116] 1) Immerse the carrier in a solution containing metal salts for electroplating. The electroplating surface is the other side of the copper foil. The solution includes nickel sulfate and stannous sulfate. The total concentration of the metal salts is 100 g / L. The concentration of the complexing agent sodium pyrophosphate is 160 g / L. The pH of the solution is 5.5. The current density of the immersion plating is 1 A / dm 2 , time is 10s, temperature is 45℃.

[0117] 2) applying an organic solution containing serine and lysine to the surface of the electroplated copper foil, with a total organic content of 3 g / L, at a coating temperature of 25°C and a coating time of 45 seconds; thereby obtaining an inorganic and organic composite release layer having good conductivity, capable of directly depositing an extremely thin copper layer on the release layer.

[0118] Step S4:

[0119] A very thin copper layer is deposited on the stripping layer by direct current electroplating, and the thickness of the very thin copper layer is 3 μm.

[0120] Step S5:

[0121] Using a first photoresist, the resistor pattern on the film is transferred to an ultra-thin copper layer through exposure and development. A 0.2μm thick CrSiO alloy layer with a sheet resistance of 50Ω / □ is then sputtered. Finally, the first photoresist film is removed to form the resistor layer. The resistor layer is roughened to a total surface area to projected area ratio of 1.1. A layer of γ-mercaptopropyltrimethoxysilane is applied to the roughened resistor layer as an oxidation protection layer. The result is a copper foil with a carrier and planar resistors.

[0122] Step S6:

[0123] The resistance layer of the copper foil with carrier obtained in step S6 is pressed together with the epoxy resin prepreg.

[0124] Step S7:

[0125] At the same time, the carrier resin layer of the copper foil with a carrier of S6 is pressed against another carrier resin layer.

[0126] Step S8:

[0127] After the epoxy resin prepreg and the carrier resin layers are fully cured, the carrier is peeled off to obtain a laminate with embedded resistors. The separation force between the ultra-thin copper layer and the carrier is 0.15N / mm, and the separation force between the ultra-thin copper layer and the insulating substrate is 0.8N / mm.

[0128] Step S9:

[0129] 1) Using a second photoresist, the resistor pattern on the film is transferred to the ultra-thin copper layer of the circuit board where the resistor is embedded through exposure and development. The ultra-thin copper layer in the resistor area is then flash-etched, and the second photoresist film is finally removed to obtain the embedded resistor.

[0130] 2) Using a third photoresist, the conductive circuit pattern on the film is transferred to the ultra-thin copper layer through exposure and development, and then the ultra-thin copper layer is thickened by electroplating. The thickness of the thickened copper layer is 18 μm.

[0131] 3) Remove the third photoresist film and remove the extremely thin copper layer of the non-conductive circuit by flash etching to obtain a complete conductive circuit and embedded resistor circuit board.

[0132] Step S10:

[0133] The copper foils on both sides of the laminated carrier obtained in step S8 are processed into circuits to obtain a plate with embedded capacitors.

[0134] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the embodiments of the present invention are not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the embodiments of the present invention. Therefore, although the embodiments of the present invention are described in more detail through the above embodiments, the embodiments of the present invention are not limited to the above embodiments. Without departing from the concept of the embodiments of the present invention, the embodiments of the present invention may also include more other equivalent embodiments, and the scope of the embodiments of the present invention is determined by the scope of the appended claims.

Claims

1. A copper foil with a carrier and a planar resistor, characterized in that: The copper foil with carrier is stacked with a carrier, a peeling layer, an ultra-thin copper layer and a resistance layer in sequence; the carrier is a metal with a resin layer coated on the surface; the resistance layer is distributed in a partial area on the ultra-thin copper layer.

2. The copper foil with a carrier and a planar resistor according to claim 1, wherein: The metal includes any one of gold, silver, copper, aluminum, nickel and titanium.

3. The copper foil with a carrier and a planar resistor according to claim 1, wherein: The resin layer contains resin and ceramic filler; the resin includes any one of epoxy resin, BT resin, phenolic resin, cyanate resin, polyphenylene ether resin, acrylic resin, and hydrocarbon resin, or a mixture of at least two of them; the ceramic filler includes any one of barium titanate, aluminum oxide, silicon dioxide, titanium dioxide, and zirconium oxide, or a mixture of at least two of them.

4. The copper foil with a carrier and a planar resistor according to claim 1, wherein: The release layer includes carbon, oxygen, nitrogen elements and / or at least one metal element.

5. The copper foil with a carrier and a planar resistor according to claim 1, wherein: The resistance layer includes any one of nickel phosphorus, nickel molybdenum phosphorus, nickel tungsten phosphorus, nickel chromium, nickel chromium aluminum silicon, chromium silicon oxide, nickel chromium carbon tungsten, and nickel phosphorus copper alloy.

6. The copper foil with a carrier and a planar resistor according to claim 1, wherein: The thickness of the carrier is 10-60 μm; the thickness of the ultra-thin copper layer is 1-5 μm; and the thickness of the resistance layer is 0.05-1 μm.

7. A method for preparing a copper foil with a carrier and a planar resistor, comprising the following steps: S1. Pre-treat the metal surface; S2, coating the metal surface with a resin layer to obtain a carrier; S3, preparing a peeling layer on the carrier; S4, preparing an extremely thin copper layer on the peeling layer; S5. Preparing a resistance layer on the ultra-thin copper layer.

8. The preparation method according to claim 7, characterized in that: The pretreatment in step S1 includes pickling and micro-etching.

9. A circuit board using the copper foil with a carrier and a planar resistor as claimed in claim 1.

10. The circuit board according to claim 9, wherein: The preparation method of the circuit board is as follows: (1) Laminating the resistor layer with carrier copper foil to the substrate; (2) The carrier with the carrier copper foil is pressed together with another carrier at the same time; (3) After the resin layers of the substrate and the carrier with the copper foil attached to the carrier are cured, the carrier with the copper foil attached to the carrier is peeled off; (4) Embedded resistor circuit processing; (5) Embedded capacitor circuit processing.

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