LED epitaxial structure and manufacturing method thereof, LED chip and light-emitting device

Abstract

The invention provides an LED epitaxial structure and a manufacturing method thereof, an LED chip and a light-emitting device. The LED epitaxial structure comprises an epitaxial laminated layer positioned on the surface of one side of the substrate; the epitaxial laminated layer comprises an N-type limiting layer, an N-surface waveguide layer, an active layer, a P-surface waveguide layer and a P-type limiting layer; the P-plane waveguide layer comprises a first waveguide layer, a second waveguide layer and a third waveguide layer which are sequentially arranged in the direction away from the active layer; the first waveguide layer comprises AlGalnP, and the Al component of the AlGalnP in the first waveguide layer is gradually increased from a first preset value to a second preset value along the direction deviating from the active layer; the second waveguide layer comprises AlGalnP, and the Al component of the AlGalnP in the second waveguide layer is a second preset value; the third waveguide layer comprises AlGalnP, and the Al component of the AlGalnP in the third waveguide layer is gradually reduced from the second preset value to a third preset value in the direction away from the active layer. The LED epitaxial structure is helpful for improving the distribution uniformity of current carriers, reducing the current crowding phenomenon and inhibiting the leakage of electrons, thereby improving the stability and luminous efficiency of the LED epitaxial structure.

Description

Technical Field

[0001] The present invention relates to the technical field of light emitting diodes, and more particularly to an LED epitaxial structure and a manufacturing method thereof, an LED chip and a light emitting device. Background Art

[0002] A light-emitting diode (LED) chip is a solid-state semiconductor light-emitting device that converts electrical energy into light energy by releasing energy through the recombination of electrons and holes. Since the development of the first visible light LED chip in the early 1960s, LED chip technology has experienced rapid development, from low brightness to high brightness, and from single color to full-color display. Due to its compact size, high energy efficiency, and long lifespan, it has found widespread application in communications equipment, transportation transmission, signal indication, and outdoor lighting.

[0003] AlGalnP is a key material for red LED chips. Its luminous efficiency and stability are crucial to their performance. However, limited by material properties and structural design, light extraction efficiency still leaves much room for improvement. The design of the waveguide layer directly impacts carrier confinement and luminous efficiency. Therefore, designing the waveguide layer to improve the luminous efficiency of red LED chips has become a pressing issue. Summary of the Invention

[0004] In view of this, the present invention provides an LED epitaxial structure and a manufacturing method thereof, an LED chip and a light-emitting device, so as to improve the luminous efficiency of a red LED chip.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0006] An LED epitaxial structure is located on one side surface of a substrate and includes

[0007] An epitaxial stack located on one side surface of the substrate; the epitaxial stack includes an N-type confinement layer, an N-side waveguide layer, an active layer, a P-side waveguide layer and a P-type confinement layer stacked in layers;

[0008] The P-plane waveguide layer includes a first waveguide layer, a second waveguide layer and a third waveguide layer sequentially arranged in a direction away from the active layer;

[0009] The first waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the first waveguide layer gradually increases from a first preset value to a second preset value along a direction away from the active layer;

[0010] The second waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the second waveguide layer is a second preset value;

[0011] The third waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the third waveguide layer gradually decreases from a second preset value to a third preset value along a direction away from the active layer.

[0012] Optionally, the first preset value is in the range of 0.2-0.4, including endpoint values;

[0013] The second preset value has a value range of 0.5-0.7, including the endpoint value;

[0014] The third preset value ranges from 0.2 to 0.4, including the endpoint value.

[0015] Optionally, the AlGalnP in the first waveguide layer is (Al X1 Ga (1-X1) ) 0.5 In 0.5 P, X1 gradually increases from the first preset value to the second preset value;

[0016] The AlGalnP in the second waveguide layer is (Al X2 Ga (1-X2) ) 0.5 In 0.5 P, X2 is the second preset value;

[0017] The AlGalnP in the third waveguide layer is (Al X3 Ga (1-X3) ) 0.5 In 0.5 P, X3 gradually decreases from the second preset value to the third preset value.

[0018] Optionally, the growth temperature of the first waveguide layer is T1, the growth temperature of the second waveguide layer is T2, and the growth temperature of the third waveguide layer is T3;

[0019] Among them, T1<T2, T3<T2.

[0020] Optionally, a difference between the growth temperature of the second waveguide layer and the growth temperature of the first waveguide layer is in the range of: 70° C. ≤ T2-T1 ≤ 80° C.;

[0021] The difference between the growth temperature of the second waveguide layer and the growth temperature of the third waveguide layer is in the range of 30° C. ≤ T2-T3 ≤ 50° C.

[0022] Optionally, the growth temperature of the first waveguide layer is in the range of 680° C. ≤ T1 ≤ 700° C.;

[0023] The growth temperature of the second waveguide layer is in the range of 750° C. ≤ T2 ≤ 780° C.;

[0024] The growth temperature of the third waveguide layer ranges from 700°C to T3 and from 750°C to T4.

[0025] Optionally, the epitaxial stack further includes a buffer layer located on a side of the N-type confinement layer away from the active layer;

[0026] and / or the epitaxial stack further includes an etching stop layer located on a side of the N-type confinement layer away from the active layer;

[0027] And / or the epitaxial stack further includes an ohmic contact layer located on a side of the N-type confinement layer away from the active layer;

[0028] and / or the epitaxial stack further includes an N-type current spreading layer located on a side of the N-type confinement layer away from the active layer;

[0029] And / or the epitaxial stack further includes a P-type window layer located on a side of the P-type confinement layer away from the active layer.

[0030] The present invention also provides a method for manufacturing an LED epitaxial structure, which comprises:

[0031] providing a substrate;

[0032] Growing an epitaxial stack on one side surface of the substrate; growing the epitaxial stack includes growing an N-type confinement layer, an N-side waveguide layer, an active layer, a P-side waveguide layer and a P-type confinement layer arranged in a stacked manner;

[0033] The P-plane waveguide layer includes a first waveguide layer, a second waveguide layer and a third waveguide layer sequentially arranged in a direction away from the active layer;

[0034] The first waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the first waveguide layer gradually increases from a first preset value to a second preset value along a direction away from the active layer;

[0035] The second waveguide layer includes AlGalnP, and the Al composition of the AlGalnP in the second waveguide layer is a second preset value;

[0036] The third waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the third waveguide layer gradually decreases from a second preset value to a third preset value along a direction away from the active layer.

[0037] Optionally, the first preset value is in the range of 0.2-0.4, including endpoint values;

[0038] The second preset value has a value range of 0.5-0.7, including the endpoint value;

[0039] The third preset value is in the range of 0.2-0.4, including the endpoint value;

[0040] The AlGalnP in the first waveguide layer is (Al X1 Ga (1-X1) ) 0.5 In 0.5 P, X1 gradually increases from the first preset value to the second preset value;

[0041] The AlGalnP in the second waveguide layer is (Al X2 Ga (1-X2) ) 0.5 In 0.5 P, X2 is the second preset value;

[0042] The AlGalnP in the third waveguide layer is (Al X3 Ga (1-X3) ) 0.5 In 0.5 P, X3 gradually decreases from the second preset value to the third preset value.

[0043] Optionally, the growth temperature of the first waveguide layer is T1, the growth temperature of the second waveguide layer is T2, and the growth temperature of the third waveguide layer is T3; wherein T1<T2, T3<T2;

[0044] The difference between the growth temperature of the second waveguide layer and the growth temperature of the first waveguide layer is in the range of 70° C. ≤ T2 − T1 ≤ 80° C.;

[0045] The difference between the growth temperature of the second waveguide layer and the growth temperature of the third waveguide layer is in the range of 30° C. ≤ T2-T3 ≤ 50° C.;

[0046] The growth temperature of the first waveguide layer is in the range of 680°C ≤ T1 ≤ 700°C;

[0047] The growth temperature of the second waveguide layer is in the range of 750° C. ≤ T2 ≤ 780° C.;

[0048] The growth temperature of the third waveguide layer ranges from 700°C to T3 and from 750°C to T4.

[0049] The present invention further provides an LED chip, comprising any one of the above-mentioned LED epitaxial structures, a first electrode, and a second electrode.

[0050] The present invention also provides a light-emitting device, which includes the above-mentioned LED chip.

[0051] Compared with the existing technology, the technical solution provided by the present invention has at least the following advantages:

[0052] The LED epitaxial structure is located on one side surface of the substrate and includes an epitaxial stack located on one side surface of the substrate; the epitaxial stack includes an N-type confinement layer, an N-side waveguide layer, an active layer, a P-side waveguide layer, and a P-type confinement layer arranged in a stacked manner; the P-side waveguide layer includes a first waveguide layer, a second waveguide layer, and a third waveguide layer arranged in sequence in a direction away from the active layer; the first waveguide layer includes AlGalnP, and the Al composition of the AlGalnP in the first waveguide layer gradually increases from a first preset value to a second preset value in a direction away from the active layer; the second waveguide layer includes AlGalnP, and the Al composition of the AlGalnP in the second waveguide layer is a second preset value; and the third waveguide layer includes AlGalnP, and the Al composition of the AlGalnP in the third waveguide layer gradually decreases from the second preset value to a third preset value in a direction away from the active layer. The inventors took into account that the fixed, non-gradient Al component of the P-side waveguide layer and the flat refractive index distribution will increase optical losses, and the carrier concentration on both sides is easily unbalanced, resulting in uneven carrier distribution, leading to carrier accumulation and recombination losses. However, the unidirectional gradient of the Al component of the P-side waveguide layer makes it difficult to simultaneously meet the requirements of high potential barrier confinement of electrons and high crystal quality. Therefore, the LED epitaxial structure is designed, including a P-side waveguide layer with a three-stage Al component gradient distribution, that is, the Al component increases from low to high, remains stable, and then decreases, forming a "rise-stable-fall" potential barrier. This gradient structure helps to improve the uniformity of carrier distribution, reduce current crowding and suppress electron leakage, thereby improving the stability and luminous efficiency of the LED epitaxial structure.

[0053] Specifically, the Al composition of the first waveguide layer is gradually introduced from low to high, which optimizes the energy level structure, enhances the ability to confine electrons, effectively suppresses the leakage of electrons to the P-type region, and improves the recombination efficiency of electrons and holes; the second waveguide layer forms a high Al composition layer with a constant composition, while maintaining the effect of blocking electrons while reducing the accumulation of interface stress; the third waveguide layer is gradually introduced from high to low Al composition, forming a reverse tilt of the energy band, improving the injection efficiency of holes from the P-type region to the active layer, and at the same time improving the uniformity of carrier distribution. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0055] Figure 1This is a schematic structural diagram of an embodiment of the LED epitaxial structure of the present application;

[0056] Figure 2 This is a schematic structural diagram of another embodiment of the LED epitaxial structure of the present application;

[0057] Figure 3-11 for Figure 2 Schematic diagram of the fabrication process of the LED epitaxial structure shown.

[0058] Reference numerals:

[0059] Substrate 1; N-type confinement layer 2; N-side waveguide layer 3; active layer 4; P-side waveguide layer 5; first waveguide layer 51; second waveguide layer 52; third waveguide layer 53; P-type confinement layer 6; buffer layer 7; corrosion stop layer 8; ohmic contact layer 9; N-type current spreading layer 10; P-type window layer 11. DETAILED DESCRIPTION

[0060] To make the content of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0061] In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present application. Therefore, the present application is not limited to the specific embodiments disclosed below.

[0062] Secondly, this application is described in detail with reference to schematic diagrams. When describing the embodiments of this application, for ease of explanation, cross-sectional views of device structures may be partially enlarged and not to scale. Furthermore, these schematic diagrams are merely illustrative and should not limit the scope of protection of this application. Furthermore, in actual production, three-dimensional dimensions, including length, width, and depth, should be included.

[0063] As mentioned in the background, AlGaInP is a key material for red LED chips. Its luminous efficiency and stability are crucial to their performance. However, due to limitations in material properties and structural design, there is still much room for improvement in light extraction efficiency. The design of the waveguide layer directly affects the carrier confinement capability and luminous efficiency. Therefore, designing the waveguide layer to improve the luminous efficiency of red LED chips has become a pressing issue.

[0064] To solve the above problems, the present application provides an LED epitaxial structure and a manufacturing method thereof, an LED chip, and a light-emitting device. The LED epitaxial structure is located on one side surface of a substrate 1. The LED epitaxial structure includes an epitaxial stack located on one side surface of the substrate 1.

[0065] like Figure 1 As shown, the epitaxial stack includes an N-type confinement layer 2, an N-face waveguide layer 3, an active layer 4, a P-face waveguide layer 5, and a P-type confinement layer 6, which are stacked. The P-face waveguide layer 5 includes a first waveguide layer 51, a second waveguide layer 52, and a third waveguide layer 53, which are sequentially arranged in a direction away from the active layer 4. The first waveguide layer 51 includes AlGaInP, and the Al composition of the AlGaInP in the first waveguide layer 51 gradually increases from a first preset value to a second preset value in a direction away from the active layer 4. The second waveguide layer 52 includes AlGaInP, and the Al composition of the AlGaInP in the second waveguide layer 52 is a second preset value. The third waveguide layer 53 includes AlGaInP, and the Al composition of the AlGaInP in the third waveguide layer 53 gradually decreases from the second preset value to a third preset value in a direction away from the active layer 4.

[0066] The epitaxial stack includes a stacked N-type confinement layer 2, an N-side waveguide layer 3, an active layer 4, a P-side waveguide layer 5, and a P-type confinement layer 6. The N-type confinement layer 2 can be closer to the substrate 1, or the P-type confinement layer 6 can be closer to the substrate 1. The N-type confinement layer 2 is closer to the substrate 1, meaning that the N-type confinement layer 2, N-side waveguide layer 3, active layer 4, P-side waveguide layer 5, and P-type confinement layer 6 are stacked in sequence, away from the substrate 1. Other functional layers may also be provided as needed, and this application does not limit this. The P-type confinement layer 6 is closer to the substrate 1, meaning that the P-type confinement layer 6, P-side waveguide layer 5, active layer 4, N-side waveguide layer 3, and N-type confinement layer 2 are stacked in sequence, away from the substrate. Other functional layers may also be provided as needed, and this application does not limit this. The substrate 1 in the embodiments of the present application can be either a temporary substrate or a target substrate. A temporary substrate is a substrate temporarily used for epitaxial stack growth and is subsequently removed, while a target substrate is a substrate that supports the epitaxial stack and does not need to be removed. This application uses the N-type restriction layer 2 closer to the substrate and the substrate is a temporary substrate as an example. It should be understood that the LED epitaxial structure of this example is transferred to the target substrate, and the LED epitaxial structure after removing the temporary substrate, or the LED epitaxial structure after directly removing the temporary substrate without bonding is all within the scope of protection of this application.

[0067] In this embodiment, the Al component is expressed in atomic percentages. Optionally, the AlGalnP in the first waveguide layer 51 is (Al X1 Ga (1-X1) ) 0.5 In 0.5P. The AlGalnP in the second waveguide layer 52 is (Al X2 Ga (1-X2) ) 0.5 In 0.5 P. The AlGalnP in the third waveguide layer 53 is (Al X3 Ga (1-X3) ) 0.5 In 0.5 That is, in the first waveguide layer 51, X1 gradually increases from a first preset value to a second preset value; in the second waveguide layer 52, X2 is the second preset value; and in the third waveguide layer 53, X3 gradually decreases from the second preset value to a third preset value. Furthermore, the P-plane waveguide layer 5 of this embodiment is not doped.

[0068] The inventors considered that the fixed, non-gradient Al composition of the AlGalnP in the P-side waveguide layer 5, resulting in a flat refractive index profile, would increase optical losses, easily lead to imbalanced carrier concentrations on both sides, and uneven carrier distribution, resulting in carrier accumulation and recombination losses. Furthermore, a unidirectional gradient of the Al composition of the AlGalnP in the P-side waveguide layer 5 makes it difficult to simultaneously achieve both a high potential barrier's ability to confine electrons and high crystal quality. Therefore, the inventors designed this LED epitaxial structure, including a P-side waveguide layer 5 with a three-stage Al composition gradient distribution. Specifically, the Al composition increases from low to high, remains stable, and then decreases, forming a "rising-stable-falling" potential barrier. This gradient structure helps improve the uniformity of carrier distribution, reduce current crowding, and suppress electron leakage, thereby enhancing the stability and luminous efficiency of the LED epitaxial structure.

[0069] Specifically, the Al component of AlGalnP in the first waveguide layer 51 is gradually introduced from low to high, which optimizes the energy level structure, enhances the ability to confine electrons, effectively suppresses the leakage of electrons to the P-type region, and improves the recombination efficiency of electrons and holes; the second waveguide layer 52 forms a high Al component layer with a constant composition, while maintaining the effect of blocking electrons and reducing the accumulation of interface stress; the Al component of AlGalnP in the third waveguide layer 53 is gradually introduced from high to low, forming a reverse tilt of the energy band, thereby improving the injection efficiency of holes from the P-type region to the active layer, and improving the uniformity of carrier distribution.

[0070] Optionally, the substrate includes but is not limited to a GaAs substrate, a sapphire substrate, a silicon carbide substrate and a silicon substrate. This application takes a GaAs temporary substrate as an example for explanation. The N-type confinement layer 2 includes but is not limited to an N-type AlInP, and the P-type confinement layer 6 includes but is not limited to a P-type AlInP. The N-side waveguide layer 3 includes but is not limited to AlGaInP, and can be specifically (Al y Ga (1-y) ) 0.5 In 0.5The active layer can be made of multiple quantum wells. The above is just an example. In actual use, you can choose the appropriate material according to your needs.

[0071] Further optionally, the thickness of the first waveguide layer 51 is in the range of 40 nm to 50 nm, inclusive. The thickness of the second waveguide layer 52 is in the range of 20 nm to 30 nm, inclusive. The thickness of the third waveguide layer 53 is in the range of 40 nm to 50 nm, inclusive.

[0072] Based on the above embodiment, in a preferred embodiment, the first preset value ranges from 0.2 to 0.4, inclusive. The second preset value ranges from 0.5 to 0.7, inclusive. The third preset value ranges from 0.2 to 0.4, inclusive.

[0073] Based on any of the above embodiments, in a preferred embodiment, the growth temperature of the first waveguide layer 51 is T1, the growth temperature of the second waveguide layer 52 is T2, and the growth temperature of the third waveguide layer 53 is T3, wherein T1<T2 and T3<T2.

[0074] Because the growth temperature of AlGaInP is correlated with its composition, a single growth temperature can easily lead to reduced crystal quality and luminous efficiency. This LED epitaxial structure adjusts the growth temperature of the first waveguide layer 51, the second waveguide layer 52, and the third waveguide layer 53 in stages, optimizing the crystal quality at each stage and reducing crystal defects, thereby improving the stability and luminous efficiency of the LED epitaxial structure. The second waveguide layer 52 is a high-Al composition layer with a constant composition. When grown at a lower temperature, it is prone to dislocation defects, leading to increased non-radiative recombination. Therefore, the growth temperature of the second waveguide layer 52 is set higher than the growth temperature of the first waveguide layer 51 and the third waveguide layer 53, reducing dislocation defects and improving crystal quality and the stability of the LED epitaxial structure. Both the first waveguide layer 51 and the third waveguide layer 53 in the Al composition gradient region are grown at lower temperatures to reduce In volatilization and improve interface crystal quality.

[0075] Based on the above embodiment, in a preferred embodiment, the growth temperature of the first waveguide layer 51 is in the range of 680°C ≤ T1 ≤ 700°C. The growth temperature of the second waveguide layer 52 is in the range of 750°C ≤ T2 ≤ 780°C. The growth temperature of the third waveguide layer 53 is in the range of 700°C ≤ T3 ≤ 750°C. It should be understood that T1, T2, and T3 are within the above ranges, and T1 < T2 and T3 < T2.

[0076] Based on any of the above embodiments, in a preferred embodiment, the difference between the growth temperature T2 of the second waveguide layer 52 and the growth temperature T1 of the first waveguide layer 51 is in the range of 70°C ≤ T2-T1 ≤ 80°C. The difference between the growth temperature T2 of the second waveguide layer 52 and the growth temperature T3 of the third waveguide layer 53 is in the range of 30°C ≤ T2-T3 ≤ 50°C. Alternatively, T1, T2, and T3 may be within the ranges provided in the above embodiments, with 70°C ≤ T2-T1 ≤ 80°C and 30°C ≤ T2-T3 ≤ 50°C.

[0077] Based on any of the above embodiments, in a preferred embodiment, the epitaxial stack further includes a buffer layer 7 located on the side of the N-type confinement layer 2 away from the active layer 4; and / or the epitaxial stack further includes a corrosion stop layer 8 located on the side of the N-type confinement layer 2 away from the active layer 4; and / or the epitaxial stack further includes an ohmic contact layer 9 located on the side of the N-type confinement layer 2 away from the active layer 4; and / or the epitaxial stack further includes an N-type current spreading layer 10 located on the side of the N-type confinement layer 2 away from the active layer 4; and / or the epitaxial stack further includes a P-type window layer 11 located on the side of the P-type confinement layer 6 away from the active layer 4. That is, the epitaxial stack includes one or more combinations of the buffer layer 7, the corrosion stop layer 8, the ohmic contact layer 9, the N-type current spreading layer 10 and the P-type window layer 11, which can be selected according to actual needs. Figure 2 As shown, the present application uses the example of an epitaxial stack further including a buffer layer 7, an etching stop layer 8, an ohmic contact layer 9, an N-type current spreading layer 10, and a P-type window layer 11 to illustrate the positional relationship of the various layers. The N-type current spreading layer 10 is located on the surface of the N-type confinement layer 2 facing away from the active layer 4, the ohmic contact layer 9 is located on the surface of the N-type current spreading layer 10 facing away from the active layer 4, the etching stop layer 8 is located on the surface of the ohmic contact layer 9 facing away from the active layer 4, and the buffer layer 7 is located on the surface of the etching stop layer 8 facing away from the active layer 4. The P-type window layer 11 is located on the surface of the P-type confinement layer 6 facing away from the active layer 4. The provision of the etching stop layer 8 facilitates the subsequent removal of the temporary substrate.

[0078] Optionally, the material of the buffer layer 7 includes but is not limited to N-type GaAs. The material of the corrosion stop layer 8 includes but is not limited to N-type GaInP. The material of the ohmic contact layer 9 includes but is not limited to N-type GaAs. The material of the N-type current spreading layer 10 includes but is not limited to N-type AlGalnP, which can be specifically N-type (Al z Ga 1-z ) 0.5 In 0.5 The material of the P-type window layer 11 includes but is not limited to P-type GaP.

[0079] The present application also provides a method for manufacturing an LED epitaxial structure, which comprises:

[0080] S01: providing a substrate 1;

[0081] S02: Figure 1 As shown, an epitaxial stack is grown on one side of a substrate 1. The grown epitaxial stack includes an N-type confinement layer 2, an N-side waveguide layer 3, an active layer 4, a P-side waveguide layer 5, and a P-type confinement layer 6. Alternatively, the epitaxial stack can be grown using a metal organic chemical vapor deposition (MOCVD) method.

[0082] The P-plane waveguide layer 5 includes a first waveguide layer 51, a second waveguide layer 52, and a third waveguide layer 53, which are sequentially arranged in a direction away from the active layer 4 substrate. The first waveguide layer 51 includes AlGainP, and the Al composition of the AlGainP in the first waveguide layer 51 gradually increases from a first preset value to a second preset value in a direction away from the active layer 4. The second waveguide layer 52 includes AlGainP, and the Al composition of the AlGainP in the second waveguide layer 52 is the second preset value. The third waveguide layer 53 includes AlGainP, and the Al composition of the AlGainP in the third waveguide layer 53 gradually decreases from the second preset value to a third preset value in a direction away from the active layer 4.

[0083] Among them, the N-type confinement layer 2, N-face waveguide layer 3, active layer 4, P-face waveguide layer 5, and P-type confinement layer 6 are grown in a stacked arrangement, and either the N-type confinement layer 2 is closer to the substrate or the P-type confinement layer 6 is closer to the substrate. The N-type confinement layer 2 is closer to the substrate, that is, the N-type confinement layer 2, N-face waveguide layer 3, active layer 4, P-face waveguide layer 5, and P-type confinement layer 6 are grown in sequence in a direction away from the growth substrate. The P-type confinement layer 6 is closer to the substrate, that is, the P-type confinement layer 6, P-face waveguide layer 5, active layer 4, N-face waveguide layer 3, and N-type confinement layer 2 are grown in sequence in a direction away from the substrate. This application is described using the example of the N-type confinement layer 2 being closer to the substrate and the substrate being a temporary substrate.

[0084] In this embodiment, the Al component is expressed in atomic percentages. Optionally, the AlGalnP in the first waveguide layer 51 is (Al X1 Ga (1-X1) ) 0.5 In 0.5 P. The AlGalnP in the second waveguide layer 52 is (Al X2 Ga (1-X2) ) 0.5 In 0.5 P. The AlGalnP in the third waveguide layer 53 is (Al X3 Ga (1-X3) ) 0.5 In 0.5That is, in the first waveguide layer 51, X1 gradually increases from a first preset value to a second preset value; in the second waveguide layer 52, X2 is the second preset value; and in the third waveguide layer 53, X3 gradually decreases from the second preset value to a third preset value. Furthermore, the P-plane waveguide layer 5 of this embodiment is not doped.

[0085] Optionally, the substrate includes but is not limited to a GaAs substrate, a sapphire substrate, a silicon carbide substrate, and a silicon substrate, etc., and this application does not limit this. This application takes a GaAs temporary substrate as an example for explanation. The N-type confinement layer 2 includes but is not limited to an N-type AlInP, and the P-type confinement layer 6 includes but is not limited to a P-type AlInP. The N-side waveguide layer 3 includes but is not limited to AlGaInP, and can be specifically (Al y Ga (1-y) ) 0.5 In 0.5 The active layer is a multi-quantum well. The above is just an example. In actual use, you can choose the appropriate material according to your needs.

[0086] Further optionally, the thickness of the first waveguide layer 51 is in the range of 40 nm to 50 nm, inclusive. The thickness of the second waveguide layer 52 is in the range of 20 nm to 30 nm, inclusive. The thickness of the third waveguide layer 53 is in the range of 40 nm to 50 nm, inclusive.

[0087] Based on the previous embodiment, in a preferred embodiment, the first preset value ranges from 0.2 to 0.4, including the endpoint value; the second preset value ranges from 0.5 to 0.7, including the endpoint value; and the third preset value ranges from 0.2 to 0.4, including the endpoint value.

[0088] Based on any of the above embodiments, in a preferred embodiment, the growth temperature of the first waveguide layer 51 is T1, the growth temperature of the second waveguide layer 52 is T2, and the growth temperature of the third waveguide layer 53 is T3; wherein T1<T2, T3<T2.

[0089] Based on the above embodiment, in a preferred embodiment, the growth temperature of the first waveguide layer 51 is in the range of 680°C ≤ T1 ≤ 700°C; the growth temperature of the second waveguide layer 52 is in the range of 750°C ≤ T2 ≤ 780°C; and the growth temperature of the third waveguide layer 53 is in the range of 700°C ≤ T3 ≤ 750°C. It should be understood that T1, T2, and T3 are within the above ranges, and T1 < T2 and T3 < T2.

[0090] Based on any of the above embodiments, in a preferred embodiment, the difference between the growth temperature of the second waveguide layer 52 and the growth temperature of the first waveguide layer 51 is in the range of 70°C ≤ T2-T1 ≤ 80°C; and the difference between the growth temperature of the second waveguide layer 53 and the growth temperature of the third waveguide layer 52 is in the range of 30°C ≤ T2-T3 ≤ 50°C. Alternatively, T1, T2, and T3 may be within the ranges provided in the above embodiments, with 70°C ≤ T2-T1 ≤ 80°C and 30°C ≤ T2-T3 ≤ 50°C.

[0091] Based on any of the above embodiments, in a preferred embodiment, step S02 further includes growing a buffer layer 7 on the side of the N-type confinement layer 2 facing away from the active layer 4. And / or step S02 further includes growing an ohmic contact layer 9 on the side of the N-type confinement layer 2 facing away from the active layer 4. And / or step S02 further includes growing an N-type current spreading layer 10 on the side of the N-type confinement layer 2 facing away from the active layer 4. And / or step S02 further includes growing a P-type window layer 11 on the side of the P-type confinement layer 6 facing away from the active layer 4. That is, the epitaxial stack includes one or more combinations of the following: the buffer layer 7, the etching stop layer 8, the ohmic contact layer 9, the N-type current spreading layer 10, and the P-type window layer 11, and the specific selection can be based on actual needs.

[0092] The present application illustrates the growth process of the epitaxial stack by taking an example in which the epitaxial stack further includes a buffer layer 7 , an etching stop layer 8 , an ohmic contact layer 9 , an N-type current spreading layer 10 and a P-type window layer 11 .

[0093] The epitaxial stack growth process includes:

[0094] like Figure 3 As shown, a buffer layer 7 is grown on one side of the substrate 1. Optionally, the material of the buffer layer 7 includes but is not limited to N-type GaAs, and TMGa and AsH3 are introduced during growth, with the growth temperature maintained at 700°C-750°C, including end values.

[0095] like Figure 4 As shown, an etch-stop layer 8 is grown on the surface of the buffer layer 7 facing away from the substrate 1. Optionally, the material of the etch-stop layer 8 includes, but is not limited to, N-type GaInP. TMGa, TMIn, and PH3 are introduced during growth, and the growth temperature is maintained at 700°C-750°C, inclusive. The provision of the etch-stop layer 8 facilitates subsequent removal of the temporary substrate.

[0096] like Figure 5 As shown, an ohmic contact layer 9 is grown on the surface of the etching stop layer 8 facing away from the substrate. Optionally, the material of the ohmic contact layer 9 includes, but is not limited to, N-type GaAs. TMGa and AsH3 are introduced during growth, and the growth temperature is maintained at 700°C-750°C, inclusive.

[0097] like Figure 6 As shown, an N-type current spreading layer 10 is grown on the surface of the ohmic contact layer 9 away from the substrate. Optionally, the material of the N-type current spreading layer 10 includes but is not limited to N-type AlGalnP, specifically N-type (Al z Ga 1-z ) 0.5 In 0.5 P. TMAl, TMGa, TMIn and PH3 are introduced during growth, and the growth temperature is maintained at 700°C-750°C, including the end value.

[0098] like Figure 7 As shown, an N-type confinement layer 2 is grown on the surface of the N-type current spreading layer 10 facing away from the substrate. Optionally, the N-type confinement layer 2 includes, but is not limited to, N-type AlInP. TMAl, TMIn, and PH3 are introduced during growth, and the growth temperature is maintained at 700°C-750°C, inclusive.

[0099] like Figure 8 As shown, an N-side waveguide layer 3 is grown on the surface of the N-type confinement layer 2 facing away from the substrate. Optionally, the N-side waveguide layer 3 includes but is not limited to AlGaInP, and can be specifically (Al y Ga (1-y) ) 0.5 In 0.5 During the growth, TMAl, TMGa, TMIn and PH3 are introduced, and the growth temperature is maintained at 700°C-750°C, including the end value.

[0100] like Figure 9 As shown, an active layer 4 is grown on the surface of the N-side waveguide layer 3 facing away from the substrate. The active layer 4 is a multi-quantum well. During the growth, TMAl, TMGa, TMIn, and PH3 are introduced, and the growth temperature is maintained at 680°C-700°C, inclusive.

[0101] like Figure 10 As shown, a P-plane waveguide layer 5 is grown on the surface of the active layer 4 facing away from the substrate. TMAl, TMGa, TMIn, and PH3 are introduced to grow the first waveguide layer 51 at a temperature in the range of 680°C to 700°C (inclusive), the second waveguide layer 52 at a temperature in the range of 750°C to 780°C (inclusive), and the third waveguide layer 53 at a temperature in the range of 700°C to 750°C (inclusive).

[0102] like Figure 11 As shown, a P-type confinement layer 6 is grown on the surface of the P-plane waveguide layer 5 facing away from the substrate. Optionally, the P-type confinement layer 6 includes but is not limited to P-type AlInP, and TMAl, TMIn, and PH3 are introduced during growth, with the growth temperature maintained at 700°C-750°C, inclusive.

[0103] like Figure 2 As shown, a P-type window layer 11 is grown on the surface of the P-type confinement layer 6 facing away from the substrate. Optionally, the material of the P-type window layer 11 includes but is not limited to P-type GaP, and TMGa and PH3 are introduced during growth, with the growth temperature maintained at 700°C-750°C, including the end values.

[0104] The present application also provides an LED chip, which includes the LED epitaxial structure, the first electrode and the second electrode described in any of the above embodiments. The LED chip is made by using any of the above LED epitaxial structures, so the LED chip has the beneficial effects of any of the above LED epitaxial structures. For example: Optionally, Figure 2 Taking the LED epitaxial structure shown as an example, that is, the substrate 1 shown in the figure is a temporary substrate, after the P-type window layer is bonded to the target substrate, the substrate 1, the buffer layer 7 and the etching stop layer 8 are removed, and then the first electrode and the second electrode are made to form the LED chip. The first electrode can be electrically connected to the ohmic contact layer 9, and the second electrode can be electrically connected to the P-type window layer 11. Optionally, Figure 2 Taking the LED epitaxial structure shown as an example, that is, the substrate 1 shown in the figure is a temporary substrate, the substrate 1, the buffer layer 7 and the etching cut-off layer 8 are removed, and then the first electrode is formed on the surface of the ohmic contact layer 9 away from the active layer, and the second electrode is formed on the surface of the P-type window layer away from the active layer.

[0105] The present application also provides a light emitting device, comprising the above-mentioned LED chip, thus having all the beneficial effects of the above-mentioned LED chip. The light emitting device may include a display device, such as an LED display screen, or a lighting fixture.

[0106] It should be understood by those skilled in the art that, in the disclosure of the present invention, the terms "horizontal", "vertical", "upper", "lower", etc. indicating orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the above terms cannot be understood as limiting the present invention.

[0107] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referenced to each other.

[0108] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An LED epitaxial structure located on one side of a substrate, characterized in that: include An epitaxial stack located on one side surface of the substrate; the epitaxial stack includes an N-type confinement layer, an N-side waveguide layer, an active layer, a P-side waveguide layer and a P-type confinement layer stacked in layers; The P-plane waveguide layer includes a first waveguide layer, a second waveguide layer and a third waveguide layer sequentially arranged in a direction away from the active layer; The first waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the first waveguide layer gradually increases from a first preset value to a second preset value along a direction away from the active layer; The second waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the second waveguide layer is a second preset value; The third waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the third waveguide layer gradually decreases from a second preset value to a third preset value along a direction away from the active layer.

2. The LED epitaxial structure according to claim 1, wherein: The first preset value has a value range of 0.2-0.4, including the endpoint value; The second preset value has a value range of 0.5-0.7, including the endpoint value; The third preset value ranges from 0.2 to 0.4, including the endpoint value.

3. The LED epitaxial structure according to claim 1, wherein: The AlGalnP in the first waveguide layer is (Al X1 Ga (1-X1) ) 0.5 In 0.5 P, X1 gradually increases from the first preset value to the second preset value; The AlGalnP in the second waveguide layer is (Al X2 Ga (1-X2) ) 0.5 In 0.5 P, X2 is the second preset value; The AlGalnP in the third waveguide layer is (Al X3 Ga (1-X3) ) 0.5 In 0.5 P, X3 gradually decreases from the second preset value to the third preset value.

4. The LED epitaxial structure according to claim 1, wherein: The growth temperature of the first waveguide layer is T1, the growth temperature of the second waveguide layer is T2, and the growth temperature of the third waveguide layer is T3; Among them, T1<T2, T3<T2.

5. The LED epitaxial structure according to claim 4, wherein: The difference between the growth temperature of the second waveguide layer and the growth temperature of the first waveguide layer is in the range of 70° C. ≤ T2-T1 ≤ 80° C.; The difference between the growth temperature of the second waveguide layer and the growth temperature of the third waveguide layer is in the range of 30° C. ≤ T2-T3 ≤ 50° C.

6. The LED epitaxial structure according to claim 4, wherein: The growth temperature of the first waveguide layer is in the range of 680°C ≤ T1 ≤ 700°C; The growth temperature of the second waveguide layer is in the range of 750° C. ≤ T2 ≤ 780° C.; The growth temperature of the third waveguide layer ranges from 700°C to T3 and from 750°C to T4.

7. The LED epitaxial structure according to claim 1, wherein: The epitaxial stack further includes a buffer layer located on a side of the N-type confinement layer away from the active layer; and / or the epitaxial stack further includes an etching stop layer located on a side of the N-type confinement layer away from the active layer; And / or the epitaxial stack further includes an ohmic contact layer located on a side of the N-type confinement layer away from the active layer; and / or the epitaxial stack further includes an N-type current spreading layer located on a side of the N-type confinement layer away from the active layer; And / or the epitaxial stack further includes a P-type window layer located on a side of the P-type confinement layer away from the active layer.

8. A method for manufacturing an LED epitaxial structure, characterized in that: include providing a substrate; Growing an epitaxial stack on one side surface of the substrate; growing the epitaxial stack includes growing an N-type confinement layer, an N-side waveguide layer, an active layer, a P-side waveguide layer and a P-type confinement layer arranged in a stacked manner; The P-plane waveguide layer includes a first waveguide layer, a second waveguide layer and a third waveguide layer sequentially arranged in a direction away from the active layer; The first waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the first waveguide layer gradually increases from a first preset value to a second preset value along a direction away from the active layer; The second waveguide layer includes AlGalnP, and the Al composition of the AlGalnP in the second waveguide layer is a second preset value; The third waveguide layer includes AlGalnP, and an Al component of the AlGalnP in the third waveguide layer gradually decreases from a second preset value to a third preset value along a direction away from the active layer.

9. The method for manufacturing an LED epitaxial structure according to claim 8, wherein: The first preset value has a value range of 0.2-0.4, including the endpoint value; The second preset value has a value range of 0.5-0.7, including the endpoint value; The third preset value is in the range of 0.2-0.4, including the endpoint value; The AlGalnP in the first waveguide layer is (Al X1 Ga (1-X1) ) 0.5 In 0.5 P, X1 gradually increases from the first preset value to the second preset value; The AlGalnP in the second waveguide layer is (Al X2 Ga (1-X2) ) 0.5 In 0.5 P, X2 is the second preset value; The AlGalnP in the third waveguide layer is (Al X3 Ga (1-X3) ) 0.5 In 0.5 P, X3 gradually decreases from the second preset value to the third preset value.

10. The LED epitaxial structure according to claim 8, wherein: The growth temperature of the first waveguide layer is T1, the growth temperature of the second waveguide layer is T2, and the growth temperature of the third waveguide layer is T3; wherein T1<T2, T3<T2; The difference between the growth temperature of the second waveguide layer and the growth temperature of the first waveguide layer is in the range of 70° C. ≤ T2 − T1 ≤ 80° C.; The difference between the growth temperature of the second waveguide layer and the growth temperature of the third waveguide layer is in the range of 30° C. ≤ T2-T3 ≤ 50° C.; The growth temperature of the first waveguide layer is in the range of 680°C ≤ T1 ≤ 700°C; The growth temperature of the second waveguide layer is in the range of 750° C. ≤ T2 ≤ 780° C.; The growth temperature of the third waveguide layer ranges from 700° C. to T3 to 750° C.

11. An LED chip, characterized in that: The LED epitaxial structure comprises the LED epitaxial structure according to any one of claims 1 to 7, a first electrode and a second electrode.

12. A light emitting device, characterized in that: The LED chip comprises the LED chip according to claim 11.

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