Audio frequency integrated signal processing system based on VPX architecture

Abstract

The invention provides an audio frequency integrated signal processing system based on a VPX architecture, and the system comprises a case which accords with the OpenVPX standard and is internally provided with a backboard, and the backboard is integrated with a high-speed serial RapidIO bus and an Ethernet interface; the plurality of heterogeneous computing board cards are connected into the case through VPX slots, the board cards are in point-to-point communication through high-speed serial RapidIO buses, and the heterogeneous computing board cards comprise different types of computing chips and execute different types of audio signal processing tasks; and the multi-machine stacking expansion module is connected with the case through a backboard Ethernet interface, and is connected with an external processor through the backboard Ethernet interface to carry out distributed calculation when it is detected that the calculation capability of any heterogeneous calculation board card cannot meet the audio signal processing requirement. By implementing the scheme, the overall signal processing efficiency of the system can be improved, and the error-tolerant rate and reliability of the system can be improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of audio signal processing, and in particular relates to an audio integrated signal processing system based on VPX architecture. Background Art

[0002] The audio integrated signal processing system serves as the computing hub and software runtime for the sonar system. It receives large-scale sonar array sensing signal data streams, performs signal processing and calculations, and, in real-time, combines intelligent processing to complete functions such as surface and underwater target detection, identification, and positioning, underwater acoustic communication, and underwater environment measurement. Underwater acoustic signal processing is centered around the underwater acoustic sensor array and beam-domain real-time data stream processing process, with many algorithms closely linked. Therefore, it is necessary to integrate multiple computing nodes internally to achieve efficient processing requirements.

[0003] Traditional audio signal processing systems typically utilize a relatively simple computing architecture with limited computing power, making it difficult to handle multiple complex audio signal processing tasks simultaneously. Furthermore, traditional systems suffer from poor scalability. When faced with more complex tasks or the need to process larger amounts of data, it's difficult to simply increase the system's computing power. Adding new functional modules or upgrading computing chips often requires a major overhaul of the entire system, which is both costly and time-consuming.

[0004] To address these issues, researchers are seeking a more efficient, flexible, and scalable audio signal processing system architecture. The emergence of the VPX standard offers new insights into the development of audio signal processing systems. The VPX standard offers advantages such as high-speed data transmission, excellent scalability, and compatibility, meeting the high-performance and flexibility requirements of modern audio signal processing systems. However, current audio signal processing systems based on the VPX standard still have some shortcomings in practical applications. For example, while the VPX standard provides high-speed data transmission channels, in practical systems, fully utilizing these channels to achieve efficient communication between heterogeneous computing boards to improve overall system processing efficiency remains a challenge. Furthermore, further research and optimization are needed to rationally allocate tasks across heterogeneous computing boards based on varying audio signal processing requirements, as well as to effectively scale out computing power when computing power is insufficient. Summary of the Invention

[0005] In view of this, an object of the present invention is to provide an audio integrated signal processing system and device based on the VPX architecture to meet the requirements of improving the processing efficiency and system reliability of the overall system.

[0006] In order to achieve the above object, the present invention provides the following technical solutions: The present invention provides an audio integrated signal processing system based on a VPX architecture, comprising: a chassis that complies with the OpenVPX standard, a backplane disposed inside the chassis, the backplane integrating a high-speed serial RapidIO bus and an Ethernet interface; a plurality of heterogeneous computing boards, the heterogeneous computing boards being connected to the chassis via VPX slots, the boards communicating point-to-point via the high-speed serial RapidIO bus, the heterogeneous computing boards containing different types of computing chips for executing different types of audio signal processing tasks; and a multi-machine stacking expansion module connected to the chassis via a backplane Ethernet interface, for connecting to an external processor via the backplane Ethernet interface to perform distributed computing when it is detected that the computing capacity of any heterogeneous computing board cannot meet the audio signal processing requirements, the external processor being formed by stacking a plurality of modules with audio signal processing functions.

[0007] The present invention provides an integrated audio signal processing system based on the VPX architecture. This system utilizes the OpenVPX integration specification as its bus integration architecture and features openness. It can accommodate various loads within a single chassis, offering strong scalability. The chassis backplane integrates a high-speed Serial RapidIO bus, enabling point-to-point communication between heterogeneous computing boards. This bus supports addressing models and message transmission, ensuring efficient and fast data transmission. This system meets the demand for rapid transmission of large amounts of data in audio signal processing. The data plane integrates the high-speed Serial RapidIO bus with 10 Gigabit Ethernet and Ethernet, ensuring low latency, ultra-high bandwidth, and independent links, thereby improving the overall signal processing efficiency of the system. Furthermore, the heterogeneous computing boards contain different types of computing chips, which can be optimized for different audio signal processing tasks, leveraging the strengths of each chip to achieve efficient audio signal processing. Finally, a 40G interface is introduced through the data plane for multi-machine stacking, flexibly expanding the computing platform's computing power. This distributed computing architecture allows the system to continue audio signal processing through functioning boards or modules even if some computing boards or modules fail, thereby improving the system's fault tolerance and reliability.

[0008] Other advantages, objectives and features of the present invention will be described in the following description and will be apparent to those skilled in the art to some extent, or those skilled in the art can be taught from the practice of the present invention. The objectives and other advantages of the present invention can be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to make the purpose, technical solutions and beneficial effects of the present invention more clear, the present invention provides the following drawings for illustration: Figure 1 Schematic diagram of the virtual structure of an audio integrated signal processing system based on the VPX architecture in the present invention; Figure 2This is an example diagram of the process of connecting an external processor via a backplane Ethernet interface to perform distributed computing in the present invention; Figure 3 This is a connection diagram of requirements 1 to 5 of the modules in the audio signal processing requirement association relationship of the present invention. DETAILED DESCRIPTION

[0010] The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0011] In the description of the present invention, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; internal connections between two components; wireless connections or wired connections. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0012] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0013] This embodiment provides an audio integrated signal processing system based on VPX architecture, such as Figure 1 Shown, including: Chassis 101, compliant with the OpenVPX standard, has a backplane integrated with a high-speed serial RapidIO bus and Ethernet interface. Multiple heterogeneous computing boards 102, which are connected to the chassis through VPX slots. The boards communicate with each other point-to-point via a high-speed serial RapidIO bus. The heterogeneous computing boards contain different types of computing chips for performing different types of audio signal processing tasks; The multi-machine stacking expansion module 103 is connected to the chassis through the backplane Ethernet interface. When it is detected that the computing power of any heterogeneous computing board cannot meet the audio signal processing requirements, it is connected to an external processor through the backplane Ethernet interface to perform distributed computing. The external processor is composed of a stack of multiple modules with audio signal processing functions.

[0014] For example, the OpenVPX standard, an open standard based on the VPX architecture, was developed by the VITA organization to provide a universal hardware platform standard for high-reliability, high-performance embedded computing systems. The chassis strictly adheres to the OpenVPX standard and supports the plug-in and unplugging of 3U or 6U heterogeneous computing boards. The chassis body is constructed of high-strength aluminum alloy, providing excellent heat dissipation and electromagnetic shielding. The chassis is equipped with redundant fan modules. An intelligent temperature control system monitors the internal temperature in real time and automatically adjusts the fan speed when the temperature exceeds the threshold, ensuring stable operation of the system in a wide temperature range of -40°C to 70°C. For example, support for 6U heterogeneous computing boards is used. In the VPX (VITA46) protocol, all P1-P6 of 6U heterogeneous computing boards, except P0, can be customized.

[0015] The backplane serves as the system's core hub, integrating a high-speed Serial RapidIO bus and Ethernet interfaces. The RapidIO bus supports multiple rate modes, including 1x, 4x, and 16x, with a maximum data transfer rate of 28 Gbps. It supports multiple topologies, including point-to-point and switched, and allows for flexible configuration of communication links between boards. Features of the high-speed Serial RapidIO (SRIO) bus include: SRIO physical ID addressing, inter-processor communication using DMA, messaging, and doorbell methods, and can be based on direct or switched connections; low-latency, reliable communication, eliminating the software overhead associated with packet loss and retries in traditional networks; and high-speed bandwidth.

[0016] The Ethernet interface complies with the IEEE 802.3 standard and supports 10G / 40G Ethernet protocols, enabling network connectivity between internal chassis cards and external devices via the backplane. The backplane also integrates a power management module, providing stable power to each card and offering overvoltage, overcurrent, and short-circuit protection to ensure system power supply safety. Ethernet-based communication programming utilizes a SOCKT programming interface, ensuring consistent programming across various operating systems and hardware platforms.

[0017] Multiple heterogeneous computing boards connect to the chassis via VPX slots. These boards integrate various types of computing chips, including general-purpose processors, digital signal processors, and field-programmable gate arrays (FPGAs), known as CPUs, GPUs, and FPGAs. Communication bandwidth between boards is symmetrical and consistent. Different types of computing chips are optimized for specific audio signal processing tasks. For example, FPGAs excel at real-time signal processing and can quickly perform operations such as filtering, modulation, and demodulation of audio signals. GPUs are suitable for large-scale parallel computing and can efficiently process deep learning algorithms for audio signals. Different audio signal processing tasks include underwater target detection, identification, positioning, underwater acoustic communications, and underwater environment measurement. Point-to-point communication between the heterogeneous computing boards is achieved via a high-speed serial RapidIO bus. The boards integrate RapidIO controllers, supporting various communication modes such as messaging and streaming.

[0018] The multi-machine stacking expansion module is connected to the chassis through the backplane Ethernet interface. The module adopts a modular design and consists of multiple functional units. When the system detects that the computing power of any heterogeneous computing board cannot meet the audio signal processing requirements, the multi-machine stacking expansion module starts the distributed computing process. Specifically, it sends a task request to the external processor through the backplane Ethernet interface. The external processor is composed of multiple stacked modules with audio signal processing functions. These modules can be dynamically combined according to task requirements.

[0019] In this embodiment, due to the full interconnection achieved through various high-speed serial buses, inter-module interoperability is extremely convenient, enabling distributed resource sharing and remote calls with far greater convenience than before. Traditional Ethernet-based distributed software processes can theoretically be ported to VPX / OpenVPX systems, significantly expanding the application areas of commercial COTSA technology. Furthermore, the system proposed in this embodiment boasts high structural density and flexibility, allowing for diverse architectures while ensuring compatibility with existing systems. The high pin density and faster transmission rates of VPX high-speed serial connectors enable integration and application with higher computing density and higher transmission rates. The modules have more custom signal pins, supporting more complex boards and systems.

[0020] The present invention provides an integrated audio signal processing system based on the VPX architecture. This system utilizes the OpenVPX integration specification as its bus integration architecture and features openness. It can accommodate various loads within a single chassis, offering strong scalability. The chassis backplane integrates a high-speed Serial RapidIO bus, enabling point-to-point communication between heterogeneous computing boards. This bus supports addressing models and message transmission, ensuring efficient and fast data transmission. This system meets the demand for rapid transmission of large amounts of data in audio signal processing. The data plane integrates the high-speed Serial RapidIO bus with 10 Gigabit Ethernet and Ethernet, ensuring low latency, ultra-high bandwidth, and independent links, thereby improving the overall signal processing efficiency of the system. Furthermore, the heterogeneous computing boards contain different types of computing chips, which can be optimized for different audio signal processing tasks, leveraging the strengths of each chip to achieve efficient audio signal processing. Finally, a 40G interface is introduced through the data plane for multi-machine stacking, flexibly expanding the computing platform's computing power. This distributed computing architecture allows the system to continue audio signal processing through functioning boards or modules even if some computing boards or modules fail, thereby improving the system's fault tolerance and reliability.

[0021] As an optional implementation, the multi-machine stacking expansion module includes: Ethernet interface component, used to connect to the Ethernet interface on the chassis backplane to achieve physical connection with the external processor; Data transmission circuit, including high-speed signal processing chip and transmission route, used for pre-processing and transmission of data; Protocol conversion circuit, used to realize conversion between different protocols, so that the multi-machine stacking module can communicate with different types of external processors; The computing resource detection module is used to monitor the computing resource status of the heterogeneous computing boards in the chassis; The logic controller is used to send a connection request and task allocation information to an external processor through the backplane Ethernet interface according to a preset strategy when the computing resource detection module detects that the computing resources are insufficient.

[0022] For example, the Ethernet interface component serves as a physical bridge connecting the chassis backplane with the external processor and adopts a high-performance 40G Ethernet connector, such as a QSFP+ interface.

[0023] The data transmission circuit utilizes a high-performance field-programmable gate array (FPGA) as its core processing chip. This chip boasts powerful parallel processing capabilities and abundant I / O resources, supporting high-speed serial interfaces up to 28Gbps. This meets the high-data-volume, high-real-time transmission requirements of audio signal processing. The FPGA integrates dedicated high-speed data processing modules, including data cache, codec units, and error checking modules. The transmission path utilizes a multi-layer PCB design and impedance matching technology to ensure the integrity of high-speed signals during transmission. Signal lines utilize differential pair routing to reduce crosstalk and electromagnetic radiation. For critical high-speed signal paths, such as 40G Ethernet data transmission lines, microstrip or stripline structures are employed, with strict control over parameters such as line width, spacing, and dielectric thickness to meet the requirements of high-speed signal transmission.

[0024] The protocol conversion circuit utilizes an architecture that combines a dedicated protocol conversion chip with an FPGA. Dedicated protocol conversion chips, such as the Cavium Octeon series network processors, offer powerful protocol processing capabilities and support multiple protocol stacks, including TCP / IP, UDP, and RapidIO. When a multi-machine stack expansion module communicates with different types of external processors, the protocol conversion circuit first parses the incoming data to identify the protocol type. It then configures and executes the protocol conversion logic within the FPGA based on the target protocol's format and requirements. For example, if the external processor uses RapidIO and the chassis internally uses Ethernet, the protocol conversion circuit converts Ethernet packets into RapidIO-formatted message packets and performs the appropriate address mapping and data reassembly.

[0025] The computing resource detection module utilizes a distributed monitoring architecture, deploying monitoring agents on each heterogeneous computing board within the chassis. These monitoring agents collect real-time information about the boards' computing resource usage, including key metrics such as CPU utilization, memory usage, GPU computing load, and FPGA logic resource utilization, through management interfaces on the boards, such as I2C and SPI. This data is transmitted via the backplane's low-speed management bus to the computing resource detection module's main control unit. This unit, powered by a high-performance ARM processor, aggregates, analyzes, and processes the computing resource data from each board. The main control unit employs intelligent algorithms, such as prediction algorithms based on historical data and threshold judgment algorithms, to assess the overall computing resource status within the chassis in real time. If the computing resource utilization of one or more heterogeneous computing boards exceeds a preset threshold, or if the overall system computing resources cannot meet the current audio signal processing task, the computing resource detection module immediately sends an insufficient computing resource warning to the logic controller, along with a detailed resource usage report, to inform the logic controller's decision-making.

[0026] The logic controller, the core control unit of the multi-machine stack expansion module, first analyzes and allocates the current audio signal processing tasks according to a preset strategy upon receiving an alarm indicating insufficient computing resources. This strategy can be customized based on factors such as task priority, real-time requirements, and computational complexity. For example, audio signal preprocessing tasks with high real-time requirements are prioritized for allocation to external processor modules with high computing performance and low latency.

[0027] The logic controller sends a connection request and task allocation information to the external processor through the backplane Ethernet interface. The connection request contains the module's identity authentication information, communication parameter configuration, etc., to ensure a secure and reliable connection with the external processor. The task allocation information describes in detail the type of task to be processed, data input and output requirements, computing resource requirements, etc. The external processor receives tasks and allocates resources based on this information.

[0028] In addition to the aforementioned processes, the logic controller also monitors the external processor's task execution status in real time during task execution. Through heartbeat detection and task progress feedback mechanisms, it ensures smooth and consistent task execution. If an external processor failure or task execution anomaly is detected, the logic controller immediately initiates a recovery strategy, such as task reallocation or switching to a backup processor, to ensure the continuity and reliability of audio signal processing tasks.

[0029] An embodiment of the present invention provides an audio integrated signal processing system based on the VPX architecture, wherein the Ethernet interface component is connected to the Ethernet interface on the chassis backplane, providing a standard and convenient physical connection method between the system and the external processor, facilitating system expansion; the high-speed signal processing chip in the data transmission circuit is combined with the transmission route to realize data preprocessing and high-speed transmission, ensuring the rapid flow of audio signals to meet real-time processing requirements; the protocol conversion circuit eliminates communication barriers between different protocols, enhancing the compatibility and interoperability of the system with various external processors; the computing resource detection module monitors the heterogeneous computing board resources in the chassis in real time, and the logic controller sends connection requests and task allocation information to the external processor according to a preset strategy when resources are insufficient, realizing dynamic task allocation and improving resource utilization; the logic controller acts as an intelligent core, coordinating the entire scheduling and management process, enabling the system to flexibly adapt to different loads and task requirements, and effectively improving the system's scalability, processing efficiency, versatility, resource utilization and intelligent management level.

[0030] As an optional implementation, the computing resource detection module performs the following steps, including: The main task of the signal processing system and the last audio signal processing task are obtained, and the current computing resource utilization of each heterogeneous computing board is collected; the remaining computing resources are determined based on the current computing resource utilization; the resource dynamic threshold is determined based on the main task of the signal processing system, the last audio signal processing task and the dynamic threshold adaptive algorithm; when the remaining computing resources are higher than the resource dynamic threshold, the computing resource situation is sufficient; when the remaining computing resources are lower than or equal to the resource dynamic threshold, the computing resource situation is insufficient.

[0031] For example, taking an audio integrated signal processing system based on the VPX architecture installed on a ship as an example, the main task represents the task that the audio signal processing system needs to complete in order to perform the main task of the ship when the audio signal processing system is installed on the ship. For example, when a ship's main task is fishing, the main task of the audio signal processing system is to identify and catch fish through sonar.

[0032] The signal processing system's main task and the last audio signal processing task can be retrieved from the task management module. This task management module is connected to the core control unit via the system bus and records the main task and task progress of the audio integrated signal processing system in real time. Embedded monitoring sensors are deployed on each heterogeneous computing board. These sensors communicate with the main control unit of the computing resource detection module via the board's internal I2C or SPI bus. The sensors collect real-time utilization data for computing chips such as the CPU, GPU, and FPGA. For example, the CPU's clock cycle utilization, the GPU's stream processor workload, and the FPGA's logic unit utilization ratio are all collected. Memory usage, including used memory capacity and memory bandwidth usage, as well as key metrics such as the read and write rates of storage devices, are also collected.

[0033] After receiving the collected data, a resource calculation model is established based on the hardware specifications of each computing board. For CPU resources, the remaining computing resources are determined using the following formula: ; in, Identify the remaining CPU resources, Indicates the total number of CPU cores. Indicates the number of occupied cores. Indicates unit time; Determine the remaining storage bandwidth using the following formula: ; in, Indicates the remaining storage bandwidth, Indicates the maximum read and write rate of the storage device. Indicates the current read and write rate.

[0034] After obtaining the remaining computing resources through the above method, a dynamic threshold adaptive algorithm is required to determine the resource dynamic threshold of each resource. By comparing the resource dynamic threshold with the remaining computing resources, it is determined whether the computing resources are sufficient. If the computing resources are insufficient, the external processor can be connected in advance through the backplane Ethernet interface to evaluate the computing performance, storage capacity, network connection stability and other indicators of the external device. According to the external device connection method and network environment, the appropriate transmission protocol can be selected, etc., to achieve early collaboration and optimized operation with the external device, which can effectively improve data transmission and processing efficiency.

[0035] An embodiment of the present invention provides an audio integrated signal processing system based on the VPX architecture. The system determines the remaining computing resources by obtaining the main task of the signal processing system, the last audio signal processing task, and collecting the current computing resource utilization rate of each heterogeneous computing board. At the same time, the dynamic threshold of resources is accurately set according to the main task, historical tasks and the dynamic threshold adaptive algorithm. The system can effectively combine the task requirements of the system with the actual resource status for dynamic evaluation. When the remaining computing resources are compared with the dynamic threshold to determine whether the computing resources are sufficient or insufficient, a reliable basis is provided for the resource scheduling and task allocation of the system, which can avoid resource waste or task execution failure due to insufficient resources. It not only improves the utilization efficiency of computing resources, but also ensures the stable and efficient operation of the system in different task scenarios, and realizes the reasonable matching and dynamic balance of resources and tasks.

[0036] As an optional implementation, the dynamic threshold adaptive algorithm includes: Obtaining a main task of a signal processing system and a previous audio signal processing task; predicting at least one next audio signal processing task based on the main task and the previous audio signal processing task; determining whether there is a real-time demand task in the at least one next audio signal processing task; if so, determining the required computational load corresponding to the real-time demand task, and setting a resource dynamic threshold based on the required computational load corresponding to the real-time demand task; if not, and the predicted next audio signal processing task includes multiple tasks, calculating an average of the required computational loads of the multiple audio signal processing tasks, and setting a resource dynamic threshold based on the average of the required computational loads; if not, and the predicted next audio signal processing task includes only one task, determining the required computational load of the next audio signal processing task, and setting a resource dynamic threshold based on the required computational load.

[0037] Exemplarily, a method for predicting at least one next audio signal processing task based on the main task and the previous audio signal processing task may be, first, introducing task dependency graph technology, recording the main task and the previous task, and also constructing the timing dependency and data dependency relationship between tasks. For example, if the main task is target positioning, then the corresponding task dependency graph is: underwater target detection-identification-positioning. The recognition task needs to rely on the target candidate area extracted by the detection task, and the target positioning task relies on the target type and position information determined by the target recognition.

[0038] The Markov chain model and LSTM deep learning model are combined for task prediction. The Markov chain model is based on the historical task dependency graph, such as the task execution sequence of detection-localization-identification-communication. It predicts the next task by calculating the task transition probability. Specifically, based on the historical task sequence, a state transition matrix is ​​constructed. Assuming that the system has N types of tasks, the state transition matrix P is an N×N matrix, where The state transition matrix represents the probability of transitioning from task i to task j. By counting the number of transitions between tasks in the historical task sequence, the state transition matrix is ​​calculated. The probability of each next state is determined based on the state transition matrix. The LSTM model is capable of processing complex time series data. It uses multi-dimensional data obtained from in-depth task context analysis, including historical task sequences, environmental parameters, and resource status. Specifically, the LSTM model inputs data such as task execution status over the past week, daily seawater temperature fluctuations, and resource utilization fluctuations of the system's computing units. It learns temporal dependencies and complex patterns within these data to predict the probability distribution of future tasks. The probabilities of the two models are weighted and fused to produce the final prediction task. In addition to selecting the highest-weighted output as the prediction result, tasks with weights exceeding a threshold can also be selected as the prediction result. This weighted fusion of the two models overcomes the limitations of a single model in handling nonlinear and multi-factor-influenced task predictions, improving prediction accuracy.

[0039] When a predicted task is obtained, it is determined whether there is a real-time demand task in the task. If so, the required computing amount corresponding to the real-time demand task is determined, and a resource dynamic threshold is set according to the required computing amount corresponding to the real-time demand task. Specifically, the required computing amount of the real-time demand task is used as the resource dynamic threshold to determine in advance whether the system can complete the real-time demand task by itself. If there is no real-time demand task, and the predicted next audio signal processing task includes multiple tasks, the average of the required computing amounts of the multiple audio signal processing tasks is calculated, and the resource dynamic threshold is set according to the average of the required computing amounts. If there is no real-time demand task, and the predicted next audio signal processing task is one, the required computing amount of the next audio signal processing task is determined, and the resource dynamic threshold is set according to the required computing amount.

[0040] An embodiment of the present invention provides an audio integrated signal processing system based on the VPX architecture. By acquiring the main task of the signal processing system and the previous audio signal processing task, it can make reasonable task predictions based on historical task information, and provide forward-looking guidance for the system's subsequent resource allocation and task execution. After determining the predicted task, it is judged whether it has real-time requirements, and dynamic resource thresholds are set for different situations. The refined processing method can allocate system resources more accurately according to the characteristics and requirements of the task, avoiding waste caused by excessive resource reservation and ensuring that tasks with real-time requirements can obtain sufficient resource support, thereby ensuring efficient and stable operation of the system, improving the adaptability and processing capabilities of the signal processing system to different types of tasks, and optimizing overall resource utilization efficiency.

[0041] As an optional implementation, an audio integrated signal processing system based on the VPX architecture further includes: Sonar transmitters, deployed at different locations, are used to emit sound wave signals; The hydrophone array is arranged at different locations to receive the echo signal emitted by the sonar transmitter after the sound wave signal passes through the target.

[0042] As an optional implementation, the Ethernet is 40G Ethernet, and the external processor is connected through the backplane Ethernet interface to perform distributed computing, such as Figure 2 Shown, including: When there are multiple audio signal processing requirements and they are related, perform the following steps: S201, obtaining the performance parameters of each module in the external processor and the type of audio signal processing task; S202, matching the audio signal processing requirement with the audio signal processing task type to obtain a matching relationship between the audio signal processing requirement and the module, wherein the matching relationship includes one-to-one, one-to-many, and many-to-one; S203, adjusting the matching relationship according to a preset recommendation mechanism, where the preset recommendation mechanism is formulated based on historical data and recommendation rules; S204, constructing a connection diagram of modules under the audio signal processing requirement association relationship based on the association relationship between the multiple audio signal processing requirements and the adjusted matching relationship; S205, forming multiple groups of module combinations according to the connection diagram; S206, dividing the modules in each module combination into a first module and a second module, where the first module is a module that appears repeatedly, and the second module is a module that appears only once; S207: Performing load performance analysis on the first module and the second module to determine performance parameters of each module when processing corresponding audio signal processing requirements. The load performance analysis on the first module includes inputting different audio signal processing requirements into a module performance prediction model pre-established for the first module to determine the load performance parameters of the module when simultaneously processing the different audio signal processing requirements. S208, obtaining a score for the module combination based on the performance parameters of the first module and the performance parameters of the second module; S209: Select the optimal module combination based on the scores of each module combination.

[0043] For example, the performance parameters of each module and the audio signal processing task type are obtained by reading from a hardware interface or calling a software application program interface. Audio signal processing requirements that cannot be completed internally by the system are matched with the audio signal processing task type to determine the task type corresponding to the requirement. Some modules can handle only one task, while some modules can simultaneously complete multiple tasks. That is, the same module can match multiple audio signal processing requirements, and multiple modules can also simultaneously match the same audio processing requirement. Therefore, matching relationships include one-to-one, one-to-many, and many-to-one.

[0044] Because multiple matching relationships can lead to multiple combinations, resulting in excessive computational effort, this embodiment proposes adjusting matching relationships through a recommendation mechanism to reduce the number of combinations and lower computational effort. The recommendation mechanism proposed in this embodiment can involve a system that continuously records the entire process data of past audio signal processing tasks, including task type, module combination used, task execution results, and the actual performance of each module in the task, including performance indicators such as processing speed, accuracy, and resource utilization. Through statistical analysis of historical data, module combinations that frequently appear in matching relationships and perform well can be identified. Specifically, association rule mining algorithms, such as the Apriori algorithm, can be used to calculate the frequency of different module combinations in successful tasks. Simultaneously, a performance trend model is established for each module using time series analysis methods to analyze how the module's performance changes under different task sizes and data volumes. For example, module E processes a small audio signal at a processing speed of 1000 frames per second. When the data volume doubles, the processing speed drops to 800 frames per second. Regression analysis is used to establish a mathematical model of data volume and processing speed to predict the module's performance in future tasks.

[0045] Next, the high-frequency module combinations are analyzed for shortcomings to determine their optimal processing capacity. Based on the optimal processing capacity and the data volume corresponding to the audio signal processing requirements, module combinations that meet the required data volume are selected. These module combinations are then bundled together to form a recommended module combination. A recommended module combination may be one that meets two specific audio signal processing requirements. For other audio signal processing requirements, the recommended module combination is determined based on the matching relationship between the audio signal processing requirements and the modules. Therefore, the recommendation rule can replace the original requirement matching result with the recommended module combination. For example, there are five sequentially related requirements, namely requirements 1-5. The modules matching requirement 1 include modules B and C, the modules matching requirement 2 include modules B and D, the modules matching requirement 3 include modules A and E, the modules matching requirement 4 include module F, and the modules matching requirement 5 include modules G and E. Using the above method, the recommended module combinations selected for requirements 2 and 3 are modules A and B. Requirements 2 and 3 are then bundled with modules A and B. Then the readjusted matching relationship is: the modules matched by requirement 1 include module B and module C, requirements 2 and 3 are fixedly matched with modules A and B, requirement 4 matches module F, and requirement 5 matches module G and module E.

[0046] According to the above adjusted matching relationship and the association relationship between multiple audio signal processing requirements, a connection diagram between modules is constructed, such as Figure 3 As shown, a connection diagram of requirements 1 to 5 is formed. According to the connection diagram, the following module combinations are formed: Combination 1: [Module B, Module A, Module B, Module F, Module G]; Combination 2: [Module B, Module A, Module B, Module F, Module E]; Combination 3: [Module C, Module A, Module B, Module F, Module G]; Combination 4: [Module C, Module A, Module B, Module F, Module E]; The modules are divided into a first module and a second module. Taking combination 1 as an example, the first module is module B, and the second modules are modules A, F, and G. Load analysis is performed on the first and second modules. The load analysis method for the second module can be to input the required data volume into the performance trend model and analyze the module's performance under the required data volume, such as the processing rate.

[0047] The first module handles multiple requests. While data processing is sequential in nature, data processing is continuous during actual processing. Therefore, the first module must be capable of processing multiple requests simultaneously. Therefore, to determine the performance of the first module, it is necessary to simultaneously input different audio signal processing requirements into a pre-established module performance prediction model for the first module to determine the load performance parameters required for the module to simultaneously handle these different audio signal processing requirements. The module performance prediction model can be established by first collecting historical performance data for the module when processing a large amount of diverse data, including processing time, accuracy, and resource utilization. Then, a machine learning algorithm, such as regression analysis, decision trees, or neural networks, is used to train the historical data and establish a performance prediction model. For example, regression analysis uses data characteristic parameters, such as data volume and complexity, as input, and module performance indicators, such as accuracy or processing rate, as output. Through training, a regression model is generated that can predict module performance based on the input data characteristics. The module performance prediction model can also be constructed based on algorithmic principles. This embodiment does not limit the construction method of the module performance prediction model, and those skilled in the art can determine the appropriate method as needed.

[0048] According to the performance parameters of the first module and the performance parameters of the second module, the score of the module combination can be obtained by first normalizing the performance parameters and then performing weighted summation on the normalized performance parameters to obtain the final score. For example, the performance parameters of the first module and the performance parameters of the second module are processing rates. The processing rates corresponding to all modules can be normalized and then the normalized processing speeds can be weighted summed according to the importance of different modules to obtain the total processing rate of each module combination. The module combination corresponding to the largest total processing rate is selected as the optimal module combination.

[0049] An embodiment of the present invention provides an audio integrated signal processing system based on the VPX architecture. By obtaining the performance parameters of the external processor module and the audio signal processing task type, the audio signal processing requirements are matched thereto, and a preset recommendation mechanism is used to adjust the matching relationship, thereby reducing unnecessary combinations and lowering the amount of computation. A connection diagram is constructed based on the adjusted matching relationship and demand association, which can clearly display the collaborative relationship between modules and help understand the system structure. After forming multiple groups of module combinations, the modules are divided and their load performance is analyzed. The module combination scores are calculated based on the performance parameters, and the optimal module combination is finally selected. This can improve the rationality of resource allocation of the audio signal processing system, give full play to the advantages of each module, improve processing efficiency, and ensure that the system can operate stably and efficiently in different task scenarios. The module combination can also be flexibly adjusted according to actual conditions to adapt to changing needs, thereby enhancing the adaptability and scalability of the system.

[0050] Finally, it should be noted that the above preferred embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail through the above preferred embodiments, those skilled in the art should understand that various changes can be made in form and details without departing from the scope defined by the claims of the present invention.

Claims

1. An audio integrated signal processing system based on VPX architecture, characterized in that: include: The chassis complies with the OpenVPX standard and has a backplane inside that integrates a high-speed serial RapidIO bus and Ethernet interface. Multiple heterogeneous computing boards, which are connected to the chassis through VPX slots and communicate point-to-point with each other via a high-speed serial RapidIO bus. Heterogeneous computing boards contain different types of computing chips for performing different types of audio signal processing tasks. The multi-machine stacking expansion module is connected to the chassis through the backplane Ethernet interface. When it detects that the computing power of any heterogeneous computing board cannot meet the audio signal processing requirements, it is used to connect to an external processor through the backplane Ethernet interface for distributed computing. The external processor is composed of multiple stacked modules with audio signal processing functions.

2. The audio integrated signal processing system based on VPX architecture according to claim 1, characterized in that: Multi-machine stacking expansion module, including: Ethernet interface component, used to connect to the Ethernet interface on the chassis backplane to achieve physical connection with the external processor; Data transmission circuit, including high-speed signal processing chip and transmission route, used for pre-processing and transmission of data; Protocol conversion circuit, used to realize conversion between different protocols, so that the multi-machine stacking module can communicate with different types of external processors; The computing resource detection module is used to monitor the computing resource status of the heterogeneous computing boards in the chassis; The logic controller is used to send a connection request and task allocation information to an external processor through the backplane Ethernet interface according to a preset strategy when the computing resource detection module detects that the computing resources are insufficient.

3. The audio integrated signal processing system based on VPX architecture according to claim 1, characterized in that: The computing resource detection module performs the following steps, including: Obtain the main task of the signal processing system and the last audio signal processing task, and collect the current computing resource utilization of each heterogeneous computing board; Determine the remaining computing resources based on the current computing resource utilization; Determine the resource dynamic threshold based on the main task of the signal processing system, the previous audio signal processing task, and the dynamic threshold adaptive algorithm; When the remaining computing resources are higher than the resource dynamic threshold, the computing resources are sufficient; When the remaining computing resources are lower than or equal to the resource dynamic threshold, the computing resource situation is insufficient.

4. The audio integrated signal processing system based on VPX architecture according to claim 3, characterized in that: Dynamic threshold adaptive algorithm, including: Obtain the main task of the signal processing system and the last audio signal processing task; Predicting at least one next audio signal processing task based on the main task and the previous audio signal processing task; determining whether there is a real-time demand task in at least one next audio signal processing task, and if so, determining a required computational load corresponding to the real-time demand task, and setting a dynamic resource threshold according to the required computational load corresponding to the real-time demand task; If it does not exist, and the predicted next audio signal processing task includes multiple tasks, then calculating the average of the required computational loads of the multiple audio signal processing tasks, and setting the resource dynamic threshold according to the average of the required computational loads; If no such task exists and the predicted next audio signal processing task is one, the required computational amount of the next audio signal processing task is determined, and a dynamic resource threshold is set according to the required computational amount.

5. The audio integrated signal processing system based on VPX architecture according to claim 1, characterized in that: The multiple heterogeneous computing boards include at least two of the CPU boards, GPU boards, and FPGA boards, and the communication bandwidth between the boards is symmetrical and consistent. Different types of audio signal processing tasks include: underwater target detection, identification, positioning, underwater acoustic communication, and underwater environment measurement.

6. The audio integrated signal processing system based on VPX architecture according to claim 1, characterized in that: Also includes: Sonar transmitters, deployed at different locations, are used to emit sound wave signals; The hydrophone array is arranged at different locations to receive the echo signal emitted by the sonar transmitter after the sound wave signal passes through the target.

7. The audio integrated signal processing system based on VPX architecture according to any one of claims 1 to 6, characterized in that: The Ethernet is 40G Ethernet, connected to an external processor through the backplane Ethernet interface for distributed computing, including: When there are multiple audio signal processing requirements and they are related, perform the following steps: Obtaining the performance parameters of each module in the external processor and the type of audio signal processing task; Matching the audio signal processing requirements with the audio signal processing task types to obtain a matching relationship between the audio signal processing requirements and the modules, wherein the matching relationship includes one-to-one, one-to-many, and many-to-one; Adjust the matching relationship according to the preset recommendation mechanism, which is formulated based on historical data and recommendation rules; Constructing a connection diagram of modules under the audio signal processing requirement association relationship based on the association relationship between the multiple audio signal processing requirements and the adjusted matching relationship; According to the connection diagram, multiple groups of module combinations are formed; Divide the modules in each module combination into a first module and a second module, wherein the first module is a module that appears repeatedly, and the second module is a module that appears only once; performing a load performance analysis on the first module and the second module to determine performance parameters of each module when processing corresponding audio signal processing requirements, wherein the load performance analysis on the first module includes inputting different audio signal processing requirements into a module performance prediction model pre-established for the first module to determine the load performance parameters of the module when simultaneously processing the different audio signal processing requirements; Obtaining a score for the module combination according to the performance parameters of the first module and the performance parameters of the second module; Select the optimal module combination based on the scores of each module combination.

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