Control method for improving multilayer ultrahigh alignment of laminated PCB and PCB

Abstract

The invention relates to the field of PCB manufacturing, in particular to a control method for improving multilayer ultrahigh alignment of a laminated PCB, and the method comprises the following steps: S1, pre-giving an expansion coefficient; s2, pattern transfer; s3, browning and baking the board; s4, fusing and pressing the plate; s5, measuring the expansion and shrinkage coefficient of the core plate by a PL machine; s6, compensating the core board, and giving a formal coefficient; s7, manufacturing a formal plate by using the formal coefficient; in the step S2, pattern transfer is carried out by adopting a multi-time etching method; and a step S34 is added between the step S3 and the step S4, measurement is carried out on each layer of core board before lamination, the steps S2 and S3 are repeated, and the step S4 is continued. By adopting a multi-etching method, the expansion and shrinkage coefficient of each core board after etching can be more accurately controlled, and the coefficient deviation and the alignment degree between the laminated core boards are improved. And by adding the step S34, all the core plates are compensated to be consistent before lamination, so that the relative position of each layer of pattern is optimized, and the alignment deviation caused by overlarge difference of expansion and shrinkage coefficients is reduced.

Description

Technical Field

[0001] This invention relates to the field of PCB manufacturing, and more specifically, to a method for controlling the alignment of high-multilayer ultra-high-precision PCBs after lamination, and a PCB manufactured by the method. Background Technology

[0002] A PCB, also known as a printed circuit board, is a board made from an insulating substrate, cut to a specific size. It has at least one conductive pattern and holes (such as component holes, mounting holes, and metallized holes) to allow for the interconnection of electronic components. Because it is manufactured using electronic printing techniques, it is called a "printed" circuit board. As PCB manufacturing technology advances towards higher density, higher precision, and ultra-micro integrated design requirements, the application of multilayer PCBs is becoming increasingly widespread, especially in industries with extremely high circuit integration and performance requirements, such as 5G communication, artificial intelligence, and high-end computers. The interlayer alignment of multilayer PCBs is one of the key factors determining product quality and performance. However, with each additional layer, the difficulty of achieving accurate interlayer alignment increases accordingly. Precise interlayer alignment ensures accurate electrical connections between circuit layers and stable signal transmission. The production of multilayer PCBs involves multiple processes. To ensure the quality of the finished product, compensation coefficients are used to control the expansion and contraction of the inner core boards during manufacturing, ensuring dimensional matching of the core boards after lamination and improving product yield.

[0003] Currently, the PCB industry typically uses a fixed pre-expansion compensation coefficient to compensate for the expansion and contraction of the inner core boards after laminating each layer. This method is feasible for simple PCB manufacturing. However, with the development of the PCB industry, it has evolved from simple double-sided and four-layer boards to high-multilayer boards. The inner core board stacking design of high-multilayer boards is complex and diverse. If a fixed pre-expansion compensation coefficient is still used to compensate for the expansion and contraction of the inner core boards, due to the large number of inner core boards, it is impossible to control the thickness of all inner core boards and the residual copper ratio between each layer to be consistent, which can easily lead to slight differences. In this case, using a fixed pre-expansion compensation coefficient can easily lead to dimensional differences between layers. After laminating each core board, the dimensions are mismatched, and the finished product dimensional difference can reach more than 15 mil, resulting in batch scrap. Summary of the Invention

[0004] This invention aims to overcome at least one of the defects (deficiencies) of the prior art and provides a control method to improve the high-multilayer ultra-high alignment of PCBs after lamination. This method is used to solve the problem that the use of a fixed and uniform pre-expansion compensation coefficient in the traditional PCB manufacturing process can easily lead to dimensional differences between the core boards of each layer, resulting in mismatched dimensions of the core boards after lamination and large differences in the finished product dimensions.

[0005] The technical solution adopted in this invention is a method for controlling the alignment accuracy of high-multilayer PCBs after lamination, comprising the following steps: S1, Pre-set expansion / contraction coefficient; S2, Graphic Transfer; S3, browning baking board; S4, fusion and pressure plate; S5 and PL machines measure the expansion and contraction coefficient of the core board. S6. Compensate the core board and provide the formal coefficients; S7. Use formal coefficients to create the formal version; In step S2, a multiple etching process is used to transfer the pattern. Add step S34 between steps S3 and S4, measure each core board before pressing, and repeat steps S2 and S3, then continue with S4.

[0006] By employing a multiple etching method, the expansion and contraction coefficient of each core board after etching can be more precisely controlled, improving the coefficient deviation and alignment between core boards after lamination. Furthermore, the multiple etching method also provides a certain degree of improvement in finer line widths and spacing. Adding step S34, which involves measuring each core board before lamination, and repeating steps S2 and S3, followed by S4, ensures that the coefficients of all core boards are compensated to be consistent before lamination. This optimizes the relative positions of the patterns in each layer, ensuring consistent expansion and contraction of the core boards during lamination. After lamination, the coefficients between core boards are consistent, reducing alignment deviations caused by excessive differences in expansion and contraction coefficients. Boards produced using this method maintain consistent expansion and contraction coefficients after browning and baking, and the coefficient difference between each core board is reduced to L0.04 / S0.06 mil / inch, affecting only 0.6 mil alignment. Compared to setting markers at the corners of each core layer before processing and measuring the markers after lamination to determine the expansion and contraction coefficient of each core layer, measuring and compensating each core layer before lamination is more convenient, yields more accurate results, optimizes the relative positions of the patterns in each layer, reduces misalignment caused by lamination offset, and is less susceptible to batch-to-batch differences due to fluctuations in a single lamination process.

[0007] Furthermore, step S2 includes the following steps: S21. The first LDI machine exposure pattern uses a 1:1 coefficient, and a certain margin is reserved on each side according to the conventional compensation Gerber data. S22, First etching; S23. Capture the alignment points from the first LDI machine alignment, perform the second LDI machine exposure pattern, use a 1:1 coefficient for production, and compensate for Gerber data normally. S24, Second etching.

[0008] When the etching solution dissolves the copper layer, it laterally erodes the copper beneath the resist, resulting in an actual linewidth narrower than the design value. During the initial pattern exposure, a margin is left on each side to offset uncontrollable factors such as lateral etching and deformation, providing optimization space for the second etching. Then, the Gerber is dynamically adjusted based on actual measurement results, and normal compensation Gerber data is used for the second exposure and etching to ensure the linewidth tolerance is controlled within the specified range, improving circuit accuracy. Furthermore, if localized over-etching occurs during the initial etching, the second etching can be used to locally repair this by adjusting parameters, enhancing process tolerance.

[0009] Furthermore, step S223 is added between step S22 and step S23: baking the core board after the first etching.

[0010] The first etching process can cause a redistribution of local stress in the core board due to the removal of copper foil, potentially leading to micro-deformation of the board. Differences in the core board's hygroscopicity or coefficient of thermal expansion can also cause slight dimensional changes. Baking the core board after the first etching relaxes the substrate, releases stress, and prevents alignment deviations or pattern shifts caused by residual stress during the second etching. It also removes adsorbed moisture, stabilizing the board dimensions and ensuring accurate LDI exposure alignment during the second etching, reducing the risk of interlayer misalignment. On the other hand, baking the core board after the first etching can evaporate residual chemicals from the first etching, preventing uneven circuit edges or etching due to contamination during the second etching. It also improves the adhesion between the resist and the substrate, reducing side etching.

[0011] Furthermore, in step S223, the core board after the first etching is baked at a temperature of 160~180 degrees Celsius for 1.5~2.5 hours.

[0012] Excessive baking temperature can degrade the resin, make the substrate brittle, and cause excessive oxidation of the copper surface, affecting the quality of the trace edges in the secondary etching. Insufficient baking temperature will result in the absorption of baking energy, failing to achieve the desired effect. Setting the baking temperature to 160-180 degrees Celsius allows for sufficient stress relaxation while preventing excessive resin softening and deformation. Epoxy resin stress relaxation requires a certain amount of time; if the baking time is too short, incomplete stress release will occur, leading to "springback" layer misalignment after lamination, and residual moisture will exacerbate side etching during the second etching process. Excessive baking time may cause resin aging; therefore, the baking time should be set to 1.5-2.5 hours.

[0013] Furthermore, in step S21, the allowance reserved on each side is 3~7mil.

[0014] The allowance reserved on each side during the first etching process needs to be determined comprehensively based on material properties, process conditions, and design requirements. It must consider the amount of side etching, pre-compensation for compression shrinkage, and process safety margins; it should not be too large or too small. If the allowance reserved on each side during the first etching is too large, it may lead to increased linewidth, impedance runaway, and in densely packed areas, copper residue short circuits may occur due to the cumulative allowance. Furthermore, stress is released through baking after the first etching; if the allowance is too large, the second etching will require a larger amount of etching, affecting the expansion and contraction coefficient of the inner core board. Conversely, if the allowance is too small, it may lead to the risk of open circuits and may cause the actual pattern to deviate from the design position after compression shrinkage, resulting in misalignment and reduced yield.

[0015] Furthermore, step S34 includes measuring each core layer after browning and baking, compensating each core layer to be consistent based on the results of the pre-pressing measurement, and remaking the board using the compensated coefficients.

[0016] Before lamination, each core layer of the core board after browning and baking is measured and compensated to be consistent. Design coefficients can be dynamically adjusted based on historical data to pre-compensate known deformations and compensate for expansion and contraction caused in previous core board processes. A pre-lamination expansion and contraction coefficient is provided for coefficient revision during high-temperature and high-pressure lamination. Using the pre-lamination measurements and revised coefficients, the board is remade, and steps S2 and S3 are repeated. Each core layer produced will have consistent expansion and contraction, avoiding situations where some core boards shrink while others stretch. Compensating each core layer to be consistent before lamination avoids excessive accumulated errors after lamination that cannot be corrected, thus improving yield. Since the first compensation absorbs most systematic errors, post-lamination measurements and compensation only need to address unpredictable deformations during lamination, such as errors caused by uneven resin flow or localized shifts due to temperature gradients, reducing reliance on absolute equipment precision.

[0017] Furthermore, in step S2, during pattern transfer, the alignment point for LDI machine alignment is a through hole set on the core plate.

[0018] For inner core board exposure alignment, the industry commonly uses laser ablation of UV mark points, followed by CCD lens capturing the mark points for alignment exposure. However, with repeated movement of the fixture fixing the UV light emitter, the fixture may loosen, causing a decrease in positioning accuracy and misalignment of the upper and lower target points, affecting precision. This invention achieves alignment by setting through holes in the core board, thus avoiding misalignment of the upper and lower target points. The average FTB using traditional point alignment is 0.908 mil, while the average FTB using the LDI positioning hole drilling process is 0.527 mil, improving accuracy by 43.1%.

[0019] Furthermore, after browning and baking, the dimensional difference between each core board in the long side direction is ≤ ±0.05 mil / inch, and the dimensional difference in the short side direction is ≤ ±0.08 mil / inch.

[0020] Excessive dimensional differences between the core layers after browning and baking can lead to misalignment during lamination, resulting in blind and buried vias shifting, misalignment between holes and inner layer pads, misalignment between outer layer patterns and inner layer circuitry, and large impedance line deviations. Additionally, it can cause uneven resin flow during lamination and insufficient resin filling in localized areas.

[0021] Furthermore, after lamination, the dimensional difference between each core board in the long side direction is ≤ ±0.08 mil / inch, and the dimensional difference in the short side direction is ≤ ±0.10 mil / inch.

[0022] Excessive dimensional differences between the core layers after lamination can lead to problems such as drilling misalignment, impedance runaway, and decreased assembly yield.

[0023] Furthermore, a PCB board manufactured by the method described in any one of claims 1-9.

[0024] This multilayer PCB board overcomes the limitations and inaccuracies of previous methods that relied on uniform compensation coefficients for post-lamination measurements. It employs a segmented approach to precisely control and compensate for expansion and contraction coefficients across different processes, improving overall board alignment. Furthermore, the secondary etching process provides a significant improvement in finer line widths and spacing. This superior alignment and finer line widths and spacing give the board a stronger competitive edge for the company.

[0025] Compared with existing technologies, the beneficial effects of this invention are as follows: The first etching uses a 1:1 coefficient, with an additional 3-6 mil per side based on conventional Gerber data compensation, ensuring that most of the copper is etched away. The core board after the first etching is then baked to relax the substrate and release stress, preventing alignment deviations or pattern shifts caused by residual stress during the second under-etching. It also removes adsorbed moisture, stabilizing the board dimensions. The second etching captures the alignment points from the first LDI machine alignment, still using a 1:1 coefficient and normal Gerber data compensation. This corrects accumulated errors from the first etching, such as side etching and pattern shifts, making the final circuit closer to the design target. Since most of the copper has already been etched away in the first etching and the internal stress after the first etching has been eliminated through baking, the amount of the second etching is minimal and will not affect the expansion and contraction coefficient of the inner core board. Pattern transfer through secondary etching not only improves the alignment accuracy between layers but also enhances the accuracy of the circuitry and strengthens process tolerance. During exposure, through-holes are set on the inner core boards to replace the traditional method of ablating mark points on the upper and lower surfaces of the core boards for alignment. This avoids the loosening that may occur due to repeated movements of the UV light emitter, which could lead to decreased positioning accuracy and misalignment of the upper and lower target points. This results in higher alignment accuracy between the inner core boards and between the upper and lower surfaces of the core boards. The invention also adds a step S34 between steps S3 and S4 to measure each core board before lamination. Based on the measurement results, each core board is compensated to be consistent, and the board is remade using the compensated coefficients. Steps S2 and S3 are repeated to pre-compensate known deformations and compensate for expansion and contraction in previous core board processes. This prevents excessive cumulative errors after lamination that cannot be corrected. Post-lamination measurement and compensation only need to address unpredictable deformations during lamination, such as uneven resin flow and local offsets caused by temperature gradients, reducing reliance on absolute equipment accuracy. High-multilayer PCBs manufactured using this method have high alignment after lamination, with finer line widths and gaps, ensuring accurate electrical connections between circuit layers and stable signal transmission. Attached Figure Description

[0026] Figure 1 This is a comparison diagram of the new process and the old process of this invention.

[0027] Figure 2 This is a diagram illustrating the misalignment of the mark point.

[0028] Figure 3 This is a schematic diagram illustrating how misalignment of the mark point leads to a large FTB (Flat Tolerance) in the inner core board.

[0029] Figure 4 This is a schematic diagram illustrating the use of through holes as alignment points in this invention.

[0030] Figure 5The difference between using mark point alignment and through-hole alignment FTB.

[0031] Figure 6 The image is the result of the first exposure and etching.

[0032] Figure 7 The image is the result of the second exposure and etching.

[0033] Figure 8 This is a schematic diagram of the internal misalignment after the high alignment plate is pressed together.

[0034] Figure 9 This represents the expansion and contraction of the compensation coefficient after the old process compression.

[0035] Figure 10 This is to show the expansion and contraction performance of the compensation coefficient after browning and pressing in the new process. Detailed Implementation

[0036] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the invention. To better illustrate the following embodiments, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions; it is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0037] Example 1 like Figure 1 As shown, this embodiment provides a method for controlling the alignment accuracy of high-multilayer PCBs after lamination, including the following steps: S1, Pre-set expansion / contraction coefficient; S2, Graphic Transfer; The pattern transfer is performed using a two-stage etching method, which includes the following steps: S21. The first LDI exposure pattern uses a 1:1 coefficient, with 3~7mil reserved on each side according to the conventional compensation Gerber data; like Figure 2 , Figure 3 As shown, the industry standard currently uses lasers to ablate UV mark points on both sides of the core board, followed by a CCD lens capturing these mark points for alignment and exposure. However, due to potential loosening of the UV light emitter after multiple movements, or precision issues with the LDI machine, the upper and lower axes of the machine cannot be 100% coaxial during the exposure and alignment of the inner core of the PCB board. This can lead to deviations in the ablated alignment mark points. Furthermore, the precision issues with the machine exacerbate the impact on the FTB (Freezing Tolerance) during the subsequent CCD lens capture and alignment of the mark points. This results in an excessively high FTB value after etching, affecting the overall board alignment after lamination.

[0038] like Figure 4 , Figure 5As shown, this application sets through holes on the chip board and uses a CCD lens to capture the through holes as positioning points for alignment exposure, so as to avoid misalignment of the upper and lower target points. Using through holes as positioning points, the FTB is reduced from 0.908 mil to 0.527 mil, an improvement of 43.1%.

[0039] S22, First etching; like Figure 6 As shown, during the etching of the first exposed pattern, the etching solution, while dissolving the copper layer, will laterally erode the copper beneath the resist, resulting in an actual linewidth narrower than the design value. By reserving 3-7 mils on each side during the first exposure, uncontrollable factors such as lateral etching and deformation can be mitigated, providing optimization space for the second etching.

[0040] S223. Bake the core board after the first etching; During the first etching process, the removal of copper foil can cause a redistribution of local stress in the core board, potentially leading to micro-deformation of the board. Differences in the core board's hygroscopicity or coefficient of thermal expansion can also cause slight dimensional changes. Baking the core board after the first etching relaxes the substrate, releases stress, and prevents alignment deviations or pattern shifts caused by residual stress during the second etching. It also removes adsorbed moisture, stabilizing the board dimensions and ensuring accurate LDI exposure alignment during the second etching, reducing the risk of interlayer misalignment. The baking temperature is 170 degrees Celsius, and the baking time is 2 hours.

[0041] S23. Capture the alignment points from the first LDI machine alignment, perform the second LDI machine exposure pattern, use a 1:1 coefficient for production, and compensate for Gerber data normally. The second exposure requires aligning the four through holes from the first LDI machine alignment. The exposed pattern is produced using a 1:1 coefficient, with normal compensation of Gerber data to ensure that the line width and line spacing meet the design requirements.

[0042] S24, Second etching.

[0043] like Figure 7 As shown, the second etching process involves fine-tuning to make the linewidth and spacing more precise and accurate. Because the second etching involves less copper foil, its impact on the internal stress of the core board is minimal; therefore, it does not affect the expansion and contraction coefficient of the inner core board.

[0044] S3, browning baking board; S34. Perform pre-pressing measurements on each core layer, and repeat steps S2 and S3, then continue to S4.

[0045] like Figure 8As shown, in the old process, after the core board is browned and baked, it is fused and pressed. Before pressing, the expansion and contraction of each core board layer is controlled. However, before the entire board is pressed, the inner core board needs to undergo multiple processes such as etching, IPEP, browning, baking, and fusion. Multiple processes affect the expansion and contraction of the core board, causing internal misalignment after pressing. Therefore, measuring and compensating only after the entire board is pressed will lead to the accumulation of errors, resulting in excessively large errors that cannot be corrected. Figure 9 As shown, a randomly selected lot plate was measured using X-ACT before fusion. The coefficient difference between each core is large, L 0.12 / S 0.15mil / inch, which will affect the alignment by 1.6mil (size 16*18inch). L and S are the long side direction and the short side direction, respectively.

[0046] This invention measures each core layer before fusion and compensates each core layer to be consistent based on the measurement results, then remakes the core layer using the compensated coefficients.

[0047] S4, fusion and pressure plate; like Figure 10 As shown, the core layers were compensated to be consistent before fusion. The re-manufactured core layers experienced consistent expansion and contraction during pressing (either full expansion or full contraction). After pressing, the coefficients of the core layers were consistent, reducing alignment deviations caused by excessive differences in expansion and contraction coefficients. The coefficients remained consistent after browning and baking and after pressing, with the coefficient difference between each core layer reduced to L0.04 / S0.06 mil / inch, affecting only 0.6 mil alignment. (Production model is the same as above, size 16*18 inches) S5 and PL machines measure the expansion and contraction coefficient of the core board. The fusion and pressing processes involve high temperature and pressure, which affects the expansion and contraction of the core board. Measurement after pressing is used to address unpredictable deformation during the pressing process.

[0048] S6. Compensate the core board and provide the formal coefficients; The core board is compensated based on the measurement results after pressing. The pre-pressing compensation has already solved the deformation and expansion / contraction before pressing, and the post-pressing measurement has solved the deformation during the pressing process. Therefore, the compensation coefficient given here is the formal coefficient.

[0049] S7. Use the official coefficient to create the official version.

[0050] Example 2 This embodiment provides a PCB board manufactured by the method described in the above practical example.

[0051] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the technical solution of the present invention, and are not intended to limit the specific implementation of the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the claims of the present invention should be included within the protection scope of the claims of the present invention.

Claims

1. A method for controlling the alignment accuracy of high-multilayer PCBs after lamination, comprising the following steps: S1, Pre-set expansion / contraction coefficient; S2, Graphic Transfer; S3, browning baking board; S4, fusion and pressure plate; S5 and PL machines measure the expansion and contraction coefficient of the core board. S6. Compensate the core board and provide the formal coefficients; S7. Use formal coefficients to create the formal version; Its features are, In step S2, a multiple etching process is used to transfer the pattern. Add step S34 between steps S3 and S4, measure each core board before pressing, and repeat steps S2 and S3, then continue with S4.

2. The method for controlling the alignment accuracy of high-multilayer PCBs after lamination according to claim 1, characterized in that, Step S2 includes the following steps: S21. The first LDI machine exposure pattern uses a 1:1 coefficient, and a certain margin is reserved on each side according to the conventional compensation Gerber data. S22, First etching; S23. Capture the alignment points of the first LDI machine alignment, the second LDI machine exposure pattern, and produce using a 1:1 coefficient, with normal compensation for Gerber data. S24, Second etching.

3. The method for controlling the alignment of high-multilayer PCBs after lamination according to claim 2, characterized in that, A step S223 is added between steps S22 and S23: baking the core board after the first etching.

4. The method for controlling the alignment accuracy of high-multilayer PCBs after lamination according to claim 3, characterized in that, In step S223, the core board after the first etching is baked at a temperature of 160~180 degrees Celsius for 1.5~2.5 hours.

5. The method for controlling the alignment of high-multilayer PCBs after lamination according to claim 3, characterized in that, In step S21, the allowance reserved on each side is 3~7mil.

6. The method for controlling the high-multilayer ultra-high alignment of PCBs after lamination according to any one of claims 1 to 5, characterized in that, Step S34 includes measuring each core layer after browning and baking, compensating each core layer to be consistent based on the results of the pre-pressing measurement, and remaking the board using the compensated coefficients.

7. The method for controlling the alignment accuracy of high-multilayer PCBs after lamination according to claim 6, characterized in that, Step S2, during pattern transfer, the alignment point for LDI machine alignment is a through hole set on the core plate.

8. The method for controlling the alignment of high-multilayer PCBs after lamination according to claim 6, characterized in that, After browning and baking, the dimensional difference between the core boards is ≤ ±0.05 mil / inch in the long direction and ≤ ±0.08 mil / inch in the short direction.

9. The method for controlling the alignment accuracy of high-multilayer PCBs after lamination according to claim 6, characterized in that, After lamination, the dimensional difference between the core boards is ≤ ±0.08 mil / inch in the long side direction and ≤ ±0.10 mil / inch in the short side direction.

10. A PCB board manufactured by the method described in any one of claims 1 to 9.

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