Design method based on inertia and damping double-closed-loop architecture, control system thereof, electronic equipment and storage medium

Abstract

The invention relates to a design method based on an inertia and damping double-closed-loop architecture, a control system thereof, electronic equipment and a storage medium, and the method comprises a plurality of AC systems, and specifically comprises the following steps: S1, building a mathematical model of a high-voltage DC power transmission system based on a voltage source converter; s11, selecting a corresponding state variable and an energy function according to the mathematical model, and establishing a port controlled dissipation Hamiltonian model; s12, designing an inner ring damping controller according to the port controlled dissipation Hamiltonian model and the finite time passive theory; s2, designing an outer ring inertia simulation controller according to the system power; wherein fractional power is introduced in the design of the inner ring damping controller for rapid convergence. By designing the inner ring damping controller and the outer ring inertia simulation controller, the frequency response characteristic of the VSC-HVDC system is improved, the finite time stability of the voltage frequency can be realized, and the dynamic performance of the flexible direct current power transmission system is improved.

Description

Technical Field

[0001] This invention relates to the field of converter station control design technology, and in particular to a design method based on a dual closed-loop architecture of inertia and damping, and its control system, electronic equipment, and storage medium. Background Technology

[0002] In recent years, to achieve long-distance transmission of wind and solar power, large-scale renewable energy has been integrated into new power systems through voltage source converter-based high-voltage direct current (VSC-HVDC) technology. This has led to renewable energy gradually replacing synchronous generators as the mainstay of the power grid, further reducing the inertia level of the power system and posing a more severe challenge to its frequency stability. In VSC-HVDC systems, insufficient inertia and damping reduce the system's disturbance rejection capability, making it difficult to maintain voltage and frequency within acceptable ranges when subjected to external disturbances, and even resulting in a complete loss of frequency / voltage stability. Furthermore, if the system experiences large and frequent external disturbances, continuous power oscillations may occur during transient processes, further jeopardizing the stable operation of the system. To address this issue, a control strategy that can ensure rapid frequency stabilization while providing inertia and damping support is needed.

[0003] Chinese patent application CN103050988B discloses a design method for controllers at both ends of a flexible DC transmission system. For high-voltage direct current (VSC-HVDC) transmission systems, a port-controlled dissipative Hamiltonian system (PCHD) model is established. Passive control with interconnected and damped configurations is employed. By selecting appropriate energy functions and damping matrices, controllers for the two end converter stations are designed, improving the dynamic and static performance of the controllers and exhibiting strong robustness. However, this patent uses a PI controller for regulation, which suffers from slow convergence and inability to adjust based on power output.

[0004] Therefore, providing a design method that can converge quickly and be adjusted according to power is an urgent problem to be solved. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art by providing a design method based on a dual closed-loop architecture of inertia and damping, as well as its control system, electronic equipment, and storage medium.

[0006] The objective of this invention can be achieved through the following technical solutions:

[0007] According to a first aspect of the present invention, a design method based on a dual closed-loop architecture of inertia and damping is provided. The method is used for the design of an inner-loop damping controller and an outer-loop inertia simulation controller, comprising multiple AC systems. The method specifically includes the following steps:

[0008] S1. Establish a mathematical model of a high-voltage direct current transmission system based on a voltage source converter;

[0009] S11. Based on the mathematical model, select the corresponding state variables and energy functions to establish a port-controlled dissipation Hamiltonian model;

[0010] S12. Design an inner-loop damping controller based on the port-controlled dissipative Hamiltonian model and finite-time passive theory.

[0011] S2. Design an outer loop inertia simulation controller based on the system power;

[0012] The inner loop damping controller design incorporates fractional powers for rapid convergence.

[0013] As a preferred technical solution, the port-controlled dissipative Hamiltonian model is obtained by combining the state variables and energy function, with the following formula:

[0014]

[0015] Where x is the system's state variable, expressed as x = [i d i q u dc ] T i d and i q Both represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system, u dc This represents the DC bus voltage of the receiving-end grid; u is the system input, expressed as u = [s] d s q ] T s d s q The values ​​represent the physical quantities transformed from the stationary abc coordinate system to the synchronous coordinate system; J(x) is the interconnection matrix, which is an antisymmetric matrix; R(x) is the damping matrix, which is a positive definite or semi-positive definite matrix; g(x) and ξ represent the input matrix and the disturbance matrix, respectively.

[0016] As a preferred technical solution, a fractional power is introduced into the traditional energy function to form the desired energy function H. d (x) has the following formula:

[0017]

[0018] The fractional power α satisfies 0 < α < 1; i x Let x = d, q represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system. and These represent the reference values ​​of the corresponding physical quantities in the synchronous coordinate system; L gThis represents the equivalent inductance of the AC side line.

[0019] As a preferred technical solution, the inertia control includes calculating the total inertial power, using the following formula:

[0020]

[0021] H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequencies in different AC systems.

[0022] As a preferred technical solution, the inertia control includes calculating the inertial power released by the DC capacitor, using the following formula:

[0023]

[0024] N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station, u dc Indicates the DC bus voltage of the receiving-end power grid; u n It is the nominal voltage.

[0025] As a preferred technical solution, the total inertial power and the inertial power released by the current capacitor are equal. By simultaneous integration, the relationship between the frequency of different AC systems and the DC bus voltage is quantified, and the DC voltage reference value is calculated. for:

[0026]

[0027] N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station, u dc Indicates the DC bus voltage of the receiving-end power grid; u n It is the nominal voltage; H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequency of different AC systems.

[0028] As a preferred technical solution, the inertial response is adjusted based on the reference value of active power, as shown in the following formula:

[0029]

[0030] P1 * P0 is the adjusted power reference value; ΔP is the total inertial power; H1 is the inertial time constant; f1 is the actual frequency; and f0 represents the nominal frequency.

[0031] According to a second aspect of the present invention, a control system employing the dual closed-loop architecture design method based on inertia and damping as described above is provided, comprising a first AC system, the first AC system comprising an inverter, a phase-locked loop (PLL), and a DC bus, the DC bus being connected to the inverter and an outer loop inertia simulation controller, the inverter being connected to the PLL, the PLL being connected to an inner loop damping controller and an outer loop inertia simulation controller, the inner loop damping controller being connected to the outer loop inertia simulation controller, and the inner loop damping controller being connected to the inverter.

[0032] According to a third aspect of the present invention, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the program to implement the method as described in any of the preceding claims.

[0033] According to a fourth aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method as described in any of the preceding claims.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] 1. This invention improves the frequency response characteristics of the VSC-HVDC system by designing an inner-loop damping controller and an outer-loop inertia simulation controller, thereby achieving finite-time stability of the voltage frequency and improving the dynamic performance of the flexible DC transmission system.

[0036] 2. This invention introduces fractional powers into the energy function and designs an inner-loop damped controller based on finite-time passive theory according to the Interconnected and Damped Allocation (IDA) theory. This overcomes the limitations of traditional passive control strategies that can only achieve asymptotic convergence of the control objective, and improves the system's frequency response speed and disturbance rejection capability.

[0037] 3. This invention establishes the relationship between the inertial power of the AC system and the charging and discharging power of the DC capacitor. It utilizes the energy stored in the DC capacitor to provide inertial support for the AC systems at both ends and designs an inertial simulation outer loop control strategy. When the frequency of the power grid on both sides fluctuates, the DC bus voltage can be adjusted to track the reference value, thereby absorbing power grid power or releasing inertial power to maintain the stability of the power grid. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the process of the present invention;

[0039] Figure 2 This invention provides a dynamic response diagram of an AC system when the load increases.

[0040] Figure 3 This invention describes the dynamic response of the AC system when a three-phase ground fault occurs.

[0041] Figure 4 This is a control diagram of the system of the present invention. Detailed Implementation

[0042] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0043] Example 1

[0044] like Figure 1 As shown, a design method based on a dual closed-loop architecture of inertia and damping is presented. This method is used for the design of an inner-loop damping controller and an outer-loop inertia simulation controller, encompassing multiple AC systems. The method specifically includes the following steps:

[0045] S1. Establish a mathematical model of a high-voltage direct current transmission system based on a voltage source converter;

[0046] S11. Based on the mathematical model, select the corresponding state variables and energy functions to establish a port-controlled dissipation Hamiltonian model;

[0047] S12. Design an inner-loop damping controller based on the port-controlled dissipative Hamiltonian model and finite-time passive theory.

[0048] S2. Design an outer loop inertia simulation controller based on the system power;

[0049] The inner loop damping controller design incorporates fractional powers for rapid convergence.

[0050] The port-controlled dissipative Hamiltonian model is obtained by combining the state variables and the energy function, with the following formula:

[0051]

[0052] Where x is the system's state variable, expressed as x = [i d i q u dc ] T i d and i q Both represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system, u dc This represents the DC bus voltage of the receiving-end grid; u is the system input, expressed as u = [s] d s q ] T s d sq The values ​​represent the physical quantities transformed from the stationary abc coordinate system to the synchronous coordinate system; J(x) is the interconnection matrix, which is an antisymmetric matrix; R(x) is the damping matrix, which is a positive definite or semi-positive definite matrix; g(x) and ξ represent the input matrix and the disturbance matrix, respectively.

[0053] By introducing fractional powers into the traditional energy function, the desired energy function H is formed. d (x) has the following formula:

[0054]

[0055] The fractional power α satisfies 0 < α < 1; i x Let x = d, q represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system. and These represent the reference values ​​of the corresponding physical quantities in the synchronous coordinate system; L g This represents the equivalent inductance of the AC side line.

[0056] The inertia control includes calculating the total inertial power, using the following formula:

[0057]

[0058] H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequencies in different AC systems.

[0059] The inertia control includes calculating the inertial power released by the DC capacitor, using the following formula:

[0060]

[0061] N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station, u dc Indicates the DC bus voltage of the receiving-end power grid; u n It is the nominal voltage.

[0062] The total inertial power and the inertial power released by the current capacitor are equal. By integrating simultaneously, the relationship between the frequency of different AC systems and the DC bus voltage is quantified, and the DC voltage reference value is calculated. for:

[0063]

[0064] N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station, u dc Indicates the DC bus voltage of the receiving-end power grid; un It is the nominal voltage; H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequency of different AC systems.

[0065] The inertial response is adjusted based on a reference value of active power, using the following formula:

[0066]

[0067] P1 * P0 is the adjusted power reference value; ΔP is the total inertial power; H1 is the inertial time constant; f1 is the actual frequency; and f0 represents the nominal frequency.

[0068] In this embodiment, the effectiveness and superiority of the proposed scheme are verified in a low-inertia dual-ended VSC-HVDC system model. The specific values ​​of the system parameters are shown in Table 1.

[0069] Table 1 Parameters of Dual-Ended VSC-HVDC System

[0070]

[0071] Step 1: Establish the PCHD model of the VSC-HVDC system

[0072] First, establish the mathematical model of the VSC-HVDC transmission system, which can be obtained through the following equations:

[0073] And satisfy

[0074] u dc Represents the DC-side bus voltage; L g and R g These represent the equivalent inductance and resistance of the AC side line, respectively; u x These represent the three-phase grid connection point voltages, v x and i x These represent the output voltage and current of the VSG, respectively. x This represents the bridge arm logic switching function of the IGBT module, where a value of 0 indicates that the corresponding upper bridge arm is off, and a value of 1 indicates that the upper bridge arm is on, where x = a, b, c; C dc Indicates the size of the DC-side capacitor; i o and i dc These represent the output current of the converter station and the DC bus current, respectively.

[0075] The acquired three-phase voltage and current are converted to dq components u in the synchronous coordinate system through Park transformation. dq and i dqTherefore, the dynamic model of VSC-HVDC can be expressed as:

[0076]

[0077] i x s x and u x All represent the physical quantities transformed from the stationary abc coordinate system to the synchronous coordinate system, where x = d, q, d is the d-axis component, q is the q-axis component; ω represents the rotational angular velocity; u dc Represents the DC-side bus voltage, i dc This represents the DC bus current.

[0078] Let the state variable x and input variable u of the VSC-HVDC system be respectively:

[0079]

[0080] L g i represents the equivalent inductance of the AC side line. d and i q Both represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system, where C represents the capacitance of a single capacitor, and u... dc This represents the DC bus voltage of the receiving-end grid; u is the system input, expressed as u = [s] d s q ] T s d s q This represents the physical quantity transformed from the stationary abc coordinate system to the synchronous coordinate system, where x = d, q; and M = diag{L} g ,L g 2 / 3C dc}, C dc This indicates the size of the DC-side capacitor; for parameter explanation, please refer to formulas (1) and (2).

[0081] Based on the model of the VSC-HVDC system, the state-space model of the VSC-HVDC system is derived as follows:

[0082]

[0083] Equation (4) can be simplified to obtain equation (5), R dc This indicates the DC bus resistance of the receiving end of the power grid.

[0084] Design the positive definite energy function H(x) as follows:

[0085]

[0086] but:

[0087]

[0088] x is the state variable of the system, represented as x = [i d i q u dc ] T i d and i q Both represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system, u dc Indicates the DC bus voltage of the receiving-end power grid; C dc This represents the size of the DC-side capacitor; where M = diag{L g ,L g 2 / 3C dc}, C dc This indicates the size of the DC-side capacitor; for parameter explanation, refer to formulas (1) and (2).

[0089] Substituting the energy function H(x) into the above state-space model, we can finally obtain the PCHD model of the VSC-HVDC system as follows:

[0090]

[0091] Where x is the system's state variable, expressed as x = [i d i q u dc ] T i d and i q Both represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system, u dc This represents the DC bus voltage of the receiving-end grid; u is the system input, expressed as u = [s] d s q ] T s d s q Let J(x) represent the physical quantity transformed from the stationary abc coordinate system to the synchronous coordinate system, where J(x) is the interconnection matrix, which is an antisymmetric matrix; R(x) is the damping matrix, which is a positive definite or semi-positive definite matrix; g(x) and ξ represent the input matrix and the disturbance matrix, respectively; the relevant parameter explanations are given in formulas (1) and (2).

[0092] In the formula, the interconnection matrix J(x) of the system is an antisymmetric matrix, and the damping matrix R(x) is a positive definite or semi-positive definite matrix, which are defined as follows (6) and (7), respectively.

[0093]

[0094]

[0095] R g These represent the equivalent resistances of the AC side lines, and ω represents the grid angular frequency.

[0096] Step 2: Design of the Inner Loop Damping Controller Based on Finite-Time Passive Theory

[0097] To ensure the structural invariance of the VSC-HVDC system before and after the controller design, the energy function, interconnection matrix, and injection damping matrix are designed as follows:

[0098]

[0099] Let the desired equilibrium point of the system be... According to the IDA-PBC control principle, by designing appropriate parameters and combining equations (5) and (8), equation (9) is made to hold, that is, to ensure that the energy inside the system is distributed as desired. H(x), J(x), and R(x) are the values ​​of the original system, H d (x), J d (x) and R d (x) represents the desired value. To achieve this desired value, a corresponding H was designed. a (x), J a (x) and R a (x) is used to achieve this.

[0100]

[0101] At the same time, it is necessary to maintain the structural invariance of the PCHD model, therefore J a (x) and R a (x) is designed in the following form:

[0102]

[0103] Where, r a1 r a2 and r a3 It is the damping of the injection system.

[0104] When designing the energy function, a fractional power is introduced, and the desired energy function of the system is defined in the following form, i.e., formula (11)H d By replacing H(x) in formula (5) with (x), the controlled system achieves finite-time convergence, thereby improving the dynamic performance of the system.

[0105]

[0106] Where the fractional power α satisfies 0 < α < 1; i xLet x = d, q represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system. and These represent the reference values ​​of the corresponding physical quantities in the synchronous coordinate system; L g This represents the equivalent inductance of the AC side line.

[0107] Furthermore, the control signals for the converter station can be obtained as follows:

[0108]

[0109] The meanings of the parameters in formula (12) are the same as those in the previous formulas.

[0110] Step 3: Design of the outer loop inertia simulation controller

[0111] First, consider the rotor motion equation of the synchronous motor as follows:

[0112]

[0113] Where H and D represent the inertial time constant and damping coefficient of the synchronous motor, respectively, and f and f0 represent the actual frequency and nominal frequency of the system; P m and P e These represent the input mechanical power and the output electromagnetic power, respectively.

[0114] For a two-terminal VSC-HVDC system, when the system is affected by external disturbances, the total inertial power of the two AC systems can be expressed as:

[0115]

[0116] In this context, the subscripts 1 and 2 in the relevant parameters represent physical quantities in two different AC systems.

[0117] In response to load fluctuations, DC capacitors will adjust their charging and discharging states to maintain the stability of the grid frequency and DC bus voltage. Due to voltage fluctuations, the inertial power released by the DC capacitor is:

[0118]

[0119] Where N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station; u dc Indicates the DC bus voltage of the receiving-end power grid; u n It is the nominal voltage.

[0120] Combining formulas (14) and (15) above, we can obtain:

[0121]

[0122] Integrating both sides simultaneously, the relationship between the frequencies of the two AC systems and the DC bus voltage is quantified.

[0123]

[0124] Further calculation of DC voltage reference value for:

[0125]

[0126] Where N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; and S represents the apparent power of the corresponding converter station. dc Indicates the DC bus voltage of the receiving-end power grid; u n This is the nominal voltage; H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequency of different AC systems.

[0127] This formula shows that when the frequencies of the power grids on both sides fluctuate, the DC bus voltage can be adjusted to track the reference value, thereby absorbing grid power or releasing inertial power to maintain grid stability.

[0128] Considering that the sending-end power grid adopts constant power control, the reference value of active power is adjusted by utilizing the energy of the DC capacitor to provide inertial response to the sending-end power grid, i.e.:

[0129]

[0130] Among them, P1 * P0 is the adjusted power reference value; ΔP is the total inertial power; H1 is the inertial time constant; f1 is the actual frequency; and f0 represents the nominal frequency.

[0131] When a disturbance occurs in the first AC system, the reference power of the converter increases, thereby injecting inertial power into the first AC system. This power comes from the power provided by the bus capacitor due to the voltage change.

[0132] After using this method, the effect is as follows: Figure 2 and Figure 3 As shown, FT-PBC stands for Finite-Time Passivity-Based Control; PBC stands for Passivity-Based Control; and VSG stands for Virtual Synchronous Generator.

[0133] Example 2

[0134] like Figure 4 As shown, a control system employing a dual-closed-loop architecture design method based on inertia and damping includes a first AC system. The first AC system includes an inverter, a phase-locked loop (PLL), and a DC bus. The DC bus is connected to the inverter and an outer-loop inertia simulation controller. The inverter is connected to the PLL. The PLL is connected to an inner-loop damping controller and an outer-loop inertia simulation controller. The inner-loop damping controller is connected to the outer-loop inertia simulation controller. The inner-loop damping controller is connected to the inverter.

[0135] In this embodiment, the VSC-HVDC system has a symmetrical topology, with the rectifier station and inverter station having similar circuit structures and electrical parameters. It is divided into a first AC system and a second AC system, taking the first AC system as an example. It also includes a PWM module and two coordinate system transformation modules. The phase-locked loop (PLL) is connected to the inner loop damping controller via the coordinate system transformation module, the inner loop damping controller is connected to the PWM module via the coordinate system transformation module, and the PWM module is connected to the inverter. The coordinate system transformation module transforms the abc coordinate system to the synchronous coordinate system or vice versa.

[0136] Example 3

[0137] An electronic device includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the program to implement the method as described in any of the preceding claims.

[0138] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method as described in any of the preceding claims.

[0139] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the described module can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0140] The electronic device of this invention includes a central processing unit (CPU), which can perform various appropriate actions and processes according to computer program instructions stored in read-only memory (ROM) or loaded from a storage unit into random access memory (RAM). The RAM may also store various programs and data required for device operation. The CPU, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0141] Multiple components in the device are connected to an I / O interface, including: input units such as a keyboard, mouse, etc.; output units such as various types of displays, speakers, etc.; storage units such as disks, optical disks, etc.; and communication units such as network interface cards, modems, wireless transceivers, etc. The communication unit allows the device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks. The processing unit performs the various methods and processes described above, such as the method of the present invention. For example, in some embodiments, the method of the present invention may be implemented as a computer software program tangibly contained in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the device via ROM and / or the communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of the method of the present invention described above may be performed. Alternatively, in other embodiments, the CPU may be configured to execute the method of the present invention by any other suitable means (e.g., by means of firmware).

[0142] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.

[0143] The program code used to implement the methods of the present invention can be written in any combination of one or more programming languages. This program code can be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0144] In the context of this invention, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0145] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A design method based on a dual closed-loop architecture of inertia and damping, characterized in that, The method is used for the design of inner-loop damping controllers and outer-loop inertia simulation controllers, including multiple AC systems. The method specifically includes the following steps: S1. Establish a mathematical model of a high-voltage direct current transmission system based on a voltage source converter; S11. Based on the mathematical model, select the corresponding state variables and energy functions to establish a port-controlled dissipation Hamiltonian model; S12. Design an inner-loop damping controller based on the port-controlled dissipative Hamiltonian model and finite-time passive theory. S2. Design an outer loop inertia simulation controller based on the system power; The inner loop damping controller design incorporates fractional powers for rapid convergence.

2. The design method of a dual closed-loop architecture based on inertia and damping according to claim 1, characterized in that, The port-controlled dissipative Hamiltonian model is obtained by combining the state variables and the energy function, with the following formula: Where x is the system's state variable, expressed as x = [i d i q u dc ] T i d and i q Both represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system, u dc This represents the DC bus voltage of the receiving-end grid; u is the system input, expressed as u = [s] d s q ] T s d s q The values ​​represent the physical quantities transformed from the stationary abc coordinate system to the synchronous coordinate system; J(x) is the interconnection matrix, which is an antisymmetric matrix; R(x) is the damping matrix, which is a positive definite or semi-positive definite matrix; g(x) and ξ represent the input matrix and the disturbance matrix, respectively.

3. The design method of a dual closed-loop architecture based on inertia and damping according to claim 2, characterized in that, By introducing fractional powers into the traditional energy function, the desired energy function H is formed. d (x) has the following formula: The fractional power α satisfies 0 < α < 1; i x Let x = d, q represent the physical quantities corresponding to the transformation from the stationary abc coordinate system to the synchronous coordinate system. and These represent the reference values ​​of the corresponding physical quantities in the synchronous coordinate system; L g This represents the equivalent inductance of the AC side line.

4. The design method of a dual closed-loop architecture based on inertia and damping according to claim 1, characterized in that, The inertia control includes calculating the total inertial power, using the following formula: H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequencies in different AC systems.

5. The design method of a dual closed-loop architecture based on inertia and damping according to claim 4, characterized in that, The inertia control includes calculating the inertial power released by the DC capacitor, using the following formula: N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station, u dc Indicates the DC bus voltage of the receiving-end power grid; u n It is the nominal voltage.

6. The design method of a dual closed-loop architecture based on inertia and damping according to claim 5, characterized in that, The total inertial power and the inertial power released by the current capacitor are equal. By integrating simultaneously, the relationship between the frequency of different AC systems and the DC bus voltage is quantified, and the DC voltage reference value is calculated. for: N represents the number of capacitors of the same specification; C represents the capacitance of a single capacitor; S represents the apparent power of the corresponding converter station, u dc Indicates the DC bus voltage of the receiving-end power grid; u n It is the nominal voltage; H1 and H2 represent the inertial time constants of synchronous motors in different AC systems, f1 and f2 represent the actual frequencies in different systems, and f0 represents the nominal frequency of different AC systems.

7. The design method of a dual closed-loop architecture based on inertia and damping according to claim 6, characterized in that, The inertial response is adjusted based on a reference value of active power, using the following formula: P1 * P0 is the adjusted power reference value; ΔP is the total inertial power; H1 is the inertial time constant; f1 is the actual frequency; and f0 represents the nominal frequency.

8. A control system employing the dual-closed-loop architecture design method based on inertia and damping as described in any one of claims 1-7, characterized in that, The system includes a first AC system, which comprises an inverter, a phase-locked loop (PLL), and a DC bus. The DC bus is connected to the inverter and an outer loop inertia simulation controller. The inverter is connected to the PLL. The PLL is connected to an inner loop damping controller and an outer loop inertia simulation controller. The inner loop damping controller is connected to the outer loop inertia simulation controller. The inner loop damping controller is connected to the inverter.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1 to 8.

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