Broadband high-harmonic suppression amplifier circuit

Abstract

The invention discloses a broadband high-harmonic suppression amplifier circuit which comprises a radio frequency input port, a radio frequency input balun, a first amplification module, a second amplification module, a first bias unit, a second bias unit, a radio frequency output balun and a radio frequency output port. The radio frequency input balun is connected with the radio frequency input port and performs differential processing on a radio frequency input signal; the input end of the first amplification module is connected with the radio frequency input balun and is used for carrying out first-stage amplification on a radio frequency input signal; the input end of the second amplification module is connected with the output end of the first amplification module, and second-stage amplification is carried out on the first-stage output signal; the radio frequency output balun is connected with the output end of the second amplification module and is used for carrying out differential synthesis on a second-stage output signal; the radio frequency output port is connected with the radio frequency output balun and outputs a radio frequency output signal; the first and second bias units supply power to the first and second amplification modules. According to the invention, broadband and high harmonic suppression can be realized at a high frequency band, and the problem of insufficient harmonic suppression capability of a broadband amplifier circuit is solved.

Description

Technical Field

[0001] This invention belongs to the field of microwave integrated circuits, and specifically relates to a broadband high harmonic suppression amplifier circuit. Background Technology

[0002] Harmonic suppression is a core performance indicator for power amplifiers. Typically, to achieve harmonic suppression in an amplifier, a filter-like structure is designed inside the power amplifier to effectively filter out harmonic outputs. However, existing amplifier technologies suffer from the following problems: as the operating bandwidth widens, the high-frequency band of the amplifier includes the harmonic band from its low-frequency operation. In this octave-wide case, harmonics cannot be filtered out using a filter structure. Wideband power amplifiers cannot achieve self-consistent harmonic elimination through their own structure, significantly hindering the development of highly integrated and unified modern electronic devices. Summary of the Invention

[0003] The purpose of this invention is to provide a broadband high harmonic suppression amplifier circuit that can solve the problem that existing amplifiers cannot effectively suppress harmonics in ultra-wideband applications.

[0004] One aspect of the present invention provides a broadband high harmonic suppression amplifier circuit, including an RF input port, an RF input balun, a first amplification module, a second amplification module, a first bias unit, a second bias unit, an RF output balun, and an RF output port; The radio frequency input port is used to receive radio frequency input signals. The input end of the radio frequency input balun is connected to the radio frequency input port and is used to perform differential processing on the radio frequency input signals. The input end of the first amplification module is connected to the output end of the radio frequency input balun and is used to perform first-stage amplification on the radio frequency input signals to obtain the first-stage output signal. The input terminal of the second amplification module is connected to the output terminal of the first amplification module, and is used to amplify the first-stage output signal in the second stage to obtain the second-stage output signal; The input terminal of the RF output balun is connected to the output terminal of the second amplification module, and is used to differentially synthesize the second-stage output signal to obtain the RF output signal; The radio frequency output port is connected to the output terminal of the radio frequency output balun and is used to output the radio frequency output signal; The first bias unit and the second bias unit are respectively connected to the first amplification module and the second amplification module, and are used to supply power to the first amplification module and the second amplification module.

[0005] The broadband high harmonic suppression amplifier circuit described above in this invention can achieve broadband and high harmonic suppression in the high-frequency band, solving the problem of insufficient harmonic suppression capability of broadband amplifier circuits. Attached Figure Description

[0006] To more clearly illustrate the technical solutions of the present invention, the accompanying drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort: Figure 1 This is a structural block diagram of a broadband high harmonic suppression amplifier circuit according to one embodiment of the present invention; Figure 2 This is a circuit diagram of a broadband high harmonic suppression amplifier circuit according to one embodiment of the present invention. Detailed Implementation

[0007] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0008] The present invention provides a broadband high harmonic suppression amplifier circuit. Figure 1 This is a structural block diagram of a broadband high harmonic suppression amplifier circuit according to one embodiment of the present invention; Figure 2 This is a circuit diagram of a broadband high harmonic suppression amplifier circuit according to one embodiment of the present invention. Figure 1As shown, the high-frequency high-power amplifier circuit of this invention includes: an RF input port RFin, an RF input balun 100, a first amplification module 200, a second amplification module 300, a first bias unit 201, a second bias unit 301, an RF output balun 400, and an RF output port RFout. The RF input port RFin is used to receive RF input signals. The input terminal of the RF input balun 100 is connected to the RF input port RFin and is used to perform differential processing on the RF input signals. The input terminal of the first amplification module 200 is connected to the output terminal of the RF input balun 100 and is used to perform first-stage amplification on the RF input signals to obtain a first-stage output signal. The input terminal of the second amplification module 300 is connected to the output terminal of the first amplification module 200 and is used to perform second-stage amplification on the first-stage output signals to obtain a second-stage output signal. The input terminal of the RF output balun 400 is connected to the output terminal of the second amplification module 300 and is used to perform differential synthesis on the second-stage output signals to obtain an RF output signal. The RF output port RFout is connected to the output terminal of the RF output balun 400 and is used to output the RF output signal. The first bias unit 201 and the second bias unit 301 are connected to the first amplification module 200 and the second amplification module 300, respectively, and are used to supply power to the first amplification module 200 and the second amplification module 300. The harmonic suppression characteristics of a broadband amplifier at high frequencies can be effectively improved by using the RF input balun 100 and the RF output balun 400.

[0009] The following provides a detailed description of the various modules and units included in the broadband high harmonic suppression amplifier circuit according to the embodiments of the present invention.

[0010] 1. RF input balun 100 Combination Figure 1 and Figure 2 The RF input balun 100 includes a first capacitor C1 and an input balun. The first end of the first capacitor C1 is connected to the RF input port RFin; the second end of the first capacitor C1 is connected to the input port of the input balun; the first output end of the input balun is connected to the first input end of the first amplification module 200; and the second output end of the input balun is connected to the second input end of the first amplification module 200.

[0011] 2. First amplification module 200 Combination Figure 1 and Figure 2 The first amplification module 200 includes a first amplification unit M1, a second amplification unit M2, second to eleventh capacitors C2 to C11, a first resistor R1, a second resistor R2, and first to sixth inductors L1 to L6. Preferably, the first amplification unit M1 and the second amplification unit M2 are high electron mobility transistors.

[0012] Wherein, the first end of the first inductor L1 serves as the first input end of the first amplification module 200 and is connected to the first output end of the input balun. The second terminal of the first inductor L1 is connected to the first terminal of the second capacitor C2 and the first terminal of the fourth capacitor C4; The second terminal of the second capacitor C2 is grounded; The first end of the second inductor L2 serves as the second input end of the first amplification module 200 and is connected to the second output end of the input balun. The second terminal of the second inductor L2 is connected to the first terminal of the third capacitor C3 and the first terminal of the fifth capacitor C5; The second terminal of the third capacitor C3 is grounded; The first terminal of the fourth capacitor C4 is connected to the second terminal of the first inductor L1 and the first terminal of the second capacitor C2; The second terminal of the fourth capacitor C4 is connected to the first terminal of the third inductor L3; The second terminal of the fifth capacitor C5 is connected to the first terminal of the fourth inductor L4; The second end of the third inductor L3 is connected to the first end of the sixth capacitor C6, the first end of the eighth capacitor C8 and the first end of the first resistor R1; The second terminal of the fourth inductor L4 is connected to the first terminal of the seventh capacitor C7, the first terminal of the ninth capacitor C9, and the first terminal of the second resistor R2. The second terminal of the sixth capacitor C6 is grounded; The second terminal of the seventh capacitor C7 is grounded; The second end of the eighth capacitor C8 is connected to the first end of the first amplification unit M1 and the second end of the first resistor R1. The second end of the ninth capacitor C9 is connected to the first end of the second amplification unit M2 and the second end of the second resistor R2; The second end of the first amplification unit M1 is connected to the first end of the fifth inductor L5; The second end of the second amplification unit M2 is connected to the first end of the sixth inductor L6; The second terminal of the fifth inductor L5 is connected to the first terminal of the tenth capacitor C10; The second end of the tenth capacitor C10 serves as the first output terminal of the first amplification module 200 and the first input terminal of the second amplification module 300. The second terminal of the sixth inductor L6 is connected to the first terminal of the eleventh capacitor C11; The second end of the eleventh capacitor C11 serves as the second output terminal of the first amplification module 200 and the second input terminal of the second amplification module 300.

[0013] 3. First bias unit 201 Combination Figure 1 and Figure 2 The first bias unit 201 includes: the seventh to tenth inductors L7 to L10, and the twelfth to fifteenth capacitors C12 to C15.

[0014] The first end of the seventh inductor L7 is connected to the first end of the sixth capacitor C6, the first end of the eighth capacitor C8, and the first end of the first resistor R1. The second terminal of the seventh inductor L7 is connected to the first terminal and the first gate power supply V of the twelfth capacitor C12. G1 ; The first end of the eighth inductor L8 is connected to the first end of the seventh capacitor C7, the first end of the ninth capacitor C9, and the first end of the second resistor R2. The second terminal of the eighth inductor L8 is connected to the first terminal and the first gate of the thirteenth capacitor C13, which is powered by V. G1 ; The second terminal of the twelfth capacitor C12 is grounded to GND; The second terminal of the thirteenth capacitor C13 is grounded to GND; The first end of the ninth inductor L9 is connected to the second end of the fifth inductor L5 and the first end of the tenth capacitor C10; The second terminal of the ninth inductor L9 is connected to the first terminal and the first drain power supply V of the fourteenth capacitor C14. D1 ; The first terminal of the tenth inductor L10 is connected to the second terminal of the sixth inductor L6 and the first terminal of the eleventh capacitor C11. The second terminal of the tenth inductor L10 is connected to the first terminal of the fifteenth capacitor C15 and the first drain power supply V. D1 ; The second terminal of the fourteenth capacitor C14 is grounded to GND. The second terminal of the fifteenth capacitor C15 is grounded to GND; 4. Second amplification module 300 Combination Figure 1 and Figure 2The second amplification module 300 includes: third to tenth amplification units M3 to M10, sixteenth to twenty-seventh capacitors C16 to C27, and eleventh to forty-eighth inductors L11 to L48. Preferably, the third to tenth amplification units M3 to M10 are high electron mobility transistors.

[0015] The first terminal of the eleventh inductor L11 is connected to the first terminal of the sixteenth capacitor C16 and the first terminal of the twelfth inductor L12. The second end of the eleventh inductor L11 is connected to the first end of the twenty-first inductor L21 and the first end of the twenty-second inductor L22. The second terminal of the sixteenth capacitor C16 is grounded to GND; The second terminal of the twelfth inductor L12 is connected to the second terminal of the tenth capacitor C10 and the first terminal of the thirteenth inductor L13; The second terminal of the thirteenth inductor L13 is connected to the first terminal of the seventeenth capacitor C17, the first terminal of the fourteenth inductor L14, and the first terminal of the fifteenth inductor L15. The second terminal of the seventeenth capacitor C17 is grounded to GND; The second end of the fourteenth inductor L14 is connected to the first end of the twenty-third inductor L23 and the first end of the twenty-fourth inductor L24; The second terminal of the fifteenth inductor L15 is connected to the first terminal of the eighteenth capacitor C18, the first terminal of the nineteenth capacitor C19, and the first terminal of the sixteenth inductor L16. The second terminal of the eighteenth capacitor C18 is grounded to GND; The second terminal of the nineteenth capacitor C19 is grounded to GND. The second end of the sixteenth inductor L16 is connected to the first end of the seventeenth inductor L17, the first end of the eighteenth inductor L18, and the first end of the twentieth capacitor C20; The second end of the seventeenth inductor L17 is connected to the first end of the twenty-fifth inductor L25 and the second end of the twenty-sixth inductor L26. The second terminal of the eighteenth inductor L18 is connected to the second terminal of the eleventh capacitor C11 and the first terminal of the nineteenth inductor L19; The second terminal of the nineteenth inductor L19 is connected to the first terminal of the twenty-first capacitor C21 and the first terminal of the twentieth inductor L20.

[0016] The second terminal of the 21st capacitor C21 is grounded to GND; The second terminal of the twentieth inductor L20 is connected to the first terminal of the twentieth inductor L27 and the first terminal of the twentieth inductor L28; The second terminal of the 21st inductor L21 is connected to the first terminal of the third amplification unit M3; The second end of the third amplification unit M3 is connected to the first end of the twenty-ninth inductor L29; The second terminal of the twentieth inductor L22 is connected to the first terminal of the fourth amplification unit M4; The second end of the fourth amplification unit M4 is connected to the first end of the thirtieth inductor L30; The second terminal of the 23rd inductor L23 is connected to the first terminal of the fifth amplification unit M5; The second end of the fifth amplification unit M5 is connected to the first end of the thirty-first inductor L31; The second terminal of the 24th inductor L24 is connected to the first terminal of the 6th amplification unit M6; The second end of the sixth amplification unit M6 is connected to the first end of the thirty-second inductor L32; The second terminal of the 25th inductor L25 is connected to the first terminal of the 7th amplification unit M7; The second end of the seventh amplification unit M7 is connected to the first end of the thirty-third inductor L33; The second terminal of the 26th inductor L26 is connected to the first terminal of the 8th amplification unit M8; The second end of the eighth amplification unit M8 is connected to the first end of the thirty-fourth inductor L34; The second terminal of the 27th inductor M27 is connected to the first terminal of the 9th amplification unit M9; The second end of the ninth amplification unit M9 is connected to the first end of the thirty-fifth inductor L35; The second terminal of the 28th inductor L28 is connected to the first terminal of the 10th amplification unit M10; The second end of the tenth amplification unit M10 is connected to the first end of the thirty-sixth inductor L36; The second terminal of the 29th inductor L29 is connected to the first terminal of the 37th inductor L37 and the second terminal of the 30th inductor L30; The second end of the thirty-first inductor L31 is connected to the first end of the thirty-eighth inductor L38, the second end of the thirty-second inductor L32, and the first end of the forty-first inductor L41. The second terminal of the thirty-third inductor L33 is connected to the first terminal of the thirty-ninth inductor L39, the second terminal of the thirty-fourth inductor L34, and the first terminal of the forty-second inductor L42; The second end of the thirty-fifth inductor L35 is connected to the first end of the fortieth inductor L40 and the second end of the thirty-sixth inductor L36; The second terminal of the forty-first inductor L41 is connected to the first terminal of the twenty-second capacitor C22, the first terminal of the twenty-third capacitor C23, and the second terminal of the forty-second inductor L42. The second terminal of the twentieth capacitor C22 is grounded to GND; The second terminal of the 23rd capacitor C23 is grounded to GND; The second terminal of the thirty-seventh inductor L37 is connected to the first terminal of the twenty-fourth capacitor C24 and the first terminal of the forty-third inductor L43. The second terminal of the thirty-eighth inductor L38 is connected to the first terminal of the twenty-fifth capacitor C25 and the first terminal of the forty-fourth inductor L44. The second terminal of the thirty-ninth inductor L39 is connected to the first terminal of the twenty-sixth capacitor C26 and the first terminal of the forty-fifth inductor L45. The second terminal of the fortieth inductor L40 is connected to the first terminal of the twenty-seventh capacitor C27 and the first terminal of the forty-sixth inductor L46; The second terminal of the 24th capacitor C24 is grounded to GND; The second terminal of the 25th capacitor C25 is grounded to GND; The second terminal of the 26th capacitor C26 is grounded to GND; The second terminal of the 27th capacitor C27 is grounded to GND; The second end of the forty-third inductor L43 is connected to the first end of the forty-seventh inductor L47 and the second end of the forty-fourth inductor L44; The second end of the forty-fifth inductor L45 is connected to the first end of the forty-eighth inductor L48 and the second end of the forty-sixth inductor L46; The second end of the forty-seventh inductor L47 is connected to the first input port of the output balun as the first output end of the second amplification module 300. The second terminal of the forty-eighth inductor L48 is connected to the second input port of the output balun as the second output terminal of the second amplification module 300.

[0017] 5. Second bias unit 301 Combination Figure 1 and Figure 2 The second bias unit 301 includes capacitors C28 to C31 (the twenty-eighth to the thirty-first) and inductors L49 to L52 (the forty-ninth to the fifty-second). Wherein, the first end of the forty-ninth inductor L49 is connected to the first end of the sixteenth capacitor C16, the first end of the eleventh inductor L11, and the first end of the twelfth inductor L12; The second terminal of the forty-ninth inductor L49 is connected to the first terminal and the second gate of the twenty-eighth capacitor C28, which is powered by V. G2 ; The first end of the fiftieth inductor L50 is connected to the first end of the twenty-first capacitor C21, the first end of the twentieth inductor L20, and the second end of the nineteenth inductor L19. The second terminal of the fiftieth inductor L50 is connected to the first terminal and the second gate of the twenty-ninth capacitor C29, which is powered by V. G2 ; The second terminal of the 28th capacitor C28 is grounded to GND; The second terminal of the 29th capacitor C29 is grounded to GND; The first end of the fifty-first inductor L51 is connected to the second end of the twenty-ninth inductor L29, the second end of the thirtieth inductor L30, and the first end of the thirty-seventh inductor L37; The second terminal of the fifty-first inductor L51 is connected to the first terminal and the second drain of the thirtieth capacitor C30, supplying power V. D2 ; The first end of the fifty-second inductor L52 is connected to the second end of the thirty-fifth inductor L35, the second end of the thirty-sixth inductor L36, and the first end of the fortieth inductor L40. The second terminal of the fifty-second inductor L52 is connected to the first terminal and the second drain of the thirty-first capacitor C31, supplying power V. D2 ; The second terminal of the thirtieth capacitor C30 is grounded to GND. The second terminal of the thirty-first capacitor C31 is grounded to GND.

[0018] 6. RF output balun 400 Combination Figure 1 and Figure 2 The RF output balun 400 includes a 32nd capacitor C32 and an output balun; wherein, the first end of the 32nd capacitor C32 is connected to the output port of the output balun; and the second end of the 32nd capacitor C32 is connected to the RF output port.

[0019] Optionally, the first gate power supply V G1 and the second gate power supply V G2 They can be combined into a single gate power supply; The first drain power supply V D1 and the second drain power supply V D2 They can be combined into a single drain power supply.

[0020] The broadband high harmonic suppression amplifier circuit of the above embodiments of the present invention can improve the harmonic suppression of high-power amplifiers under broadband conditions. It can solve the problem in the prior art that due to the widening of the frequency band, the amplifier harmonics fall within the amplifier's operating frequency band and cannot be suppressed. Finally, it solves the problem of second harmonic suppression of broadband amplifiers while ensuring that the amplifier's operating bandwidth is across octaves.

[0021] The broadband high harmonic suppression power amplifier circuit of the present invention described above can achieve second harmonic suppression over a wide octave band, which has strong engineering value and can give full play to its high harmonic suppression advantages in fields such as radar, base stations, and electronic countermeasures.

[0022] The foregoing has only described certain exemplary embodiments of the present invention by way of illustration. Undoubtedly, those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the foregoing drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A broadband high harmonic suppression amplifier circuit, characterized in that, It includes an RF input port, an RF input balun, a first amplification module, a second amplification module, a first bias unit, a second bias unit, an RF output balun, and an RF output port; The radio frequency input port is used to receive radio frequency input signals. The input terminal of the radio frequency input balun is connected to the radio frequency input port and is used to perform differential processing on the radio frequency input signals. The input terminal of the first amplification module is connected to the output terminal of the radio frequency input balun, and is used to amplify the radio frequency input signal in the first stage to obtain the first stage output signal; The input terminal of the second amplification module is connected to the output terminal of the first amplification module, and is used to amplify the first-stage output signal in the second stage to obtain the second-stage output signal; The input terminal of the RF output balun is connected to the output terminal of the second amplification module, and is used to differentially synthesize the second-stage output signal to obtain the RF output signal; The radio frequency output port is connected to the output terminal of the radio frequency output balun and is used to output the radio frequency output signal; The first bias unit and the second bias unit are respectively connected to the first amplification module and the second amplification module, and are used to supply power to the first amplification module and the second amplification module.

2. The broadband high harmonic suppression amplifier circuit as described in claim 1, characterized in that, The radio frequency input balun includes a first capacitor and an input balun; The first end of the first capacitor is connected to the radio frequency input port; The second terminal of the first capacitor is connected to the input port of the input balun; The first output port of the input balun is connected to the first input port of the first amplification module; The second output port of the input balun is connected to the second input port of the first amplification module.

3. The broadband high harmonic suppression amplifier circuit as described in claim 2, characterized in that, The first amplification module includes a first amplification unit, a second amplification unit, second to eleventh capacitors, a first resistor, a second resistor, and first to sixth inductors; Wherein, the first end of the first inductor serves as the first input end of the first amplification module and is connected to the first output end of the input balun; The second end of the first inductor is connected to the first end of the second capacitor and the first end of the fourth capacitor; The second terminal of the second capacitor is grounded; The first end of the second inductor is connected to the second output end of the input balun as the second input end of the first amplification module. The second terminal of the second inductor is connected to the first terminal of the third capacitor and the first terminal of the fifth capacitor; The second terminal of the third capacitor is grounded; The first terminal of the fourth capacitor is connected to the second terminal of the first inductor and the first terminal of the second capacitor; The second terminal of the fourth capacitor is connected to the first terminal of the third inductor; The second terminal of the fifth capacitor is connected to the first terminal of the fourth inductor; The second end of the third inductor is connected to the first end of the sixth capacitor, the first end of the eighth capacitor, and the first end of the first resistor. The second end of the fourth inductor is connected to the first end of the seventh capacitor, the first end of the ninth capacitor, and the first end of the second resistor. The second terminal of the sixth capacitor is grounded; The second terminal of the seventh capacitor is grounded; The second end of the eighth capacitor is connected to the first end of the first amplification unit and the second end of the first resistor; The second terminal of the ninth capacitor is connected to the first terminal of the second amplification unit and the second terminal of the second resistor; The second end of the first amplification unit is connected to the first end of the fifth inductor; The second end of the second amplification unit is connected to the first end of the sixth inductor; The second end of the fifth inductor is connected to the first end of the tenth capacitor; The second terminal of the tenth capacitor serves as the first output terminal of the first amplification module and the first input terminal of the second amplification module. The second terminal of the sixth inductor is connected to the first terminal of the eleventh capacitor; The second terminal of the eleventh capacitor serves as the second output terminal of the first amplification module and the second input terminal of the second amplification module.

4. The broadband high harmonic suppression amplifier circuit as described in claim 3, characterized in that, The first bias unit includes twelfth to fifteenth capacitors and seventh to tenth inductors; The first end of the seventh inductor is connected to the first end of the sixth capacitor, the first end of the eighth capacitor, and the first end of the first resistor. The second terminal of the seventh inductor is connected to the first terminal and the first gate of the twelfth capacitor for power supply. The first end of the eighth inductor is connected to the first end of the seventh capacitor, the first end of the ninth capacitor, and the first end of the second resistor. The second terminal of the eighth inductor is connected to the first terminal and the first gate of the thirteenth capacitor for power supply. The second terminal of the twelfth capacitor is grounded; The second terminal of the thirteenth capacitor is grounded; The first end of the ninth inductor is connected to the second end of the fifth inductor and the first end of the tenth capacitor; The second terminal of the ninth inductor is connected to the first terminal and the first drain of the fourteenth capacitor for power supply. The first end of the tenth inductor is connected to the second end of the sixth inductor and the first end of the eleventh capacitor; The second terminal of the tenth inductor is connected to the first terminal and the first drain of the fifteenth capacitor for power supply. The second terminal of the fourteenth capacitor is grounded; The second terminal of the fifteenth capacitor is grounded.

5. The broadband high harmonic suppression amplifier circuit as described in claim 4, characterized in that, The second amplification module includes the third to tenth amplification units, the sixteenth to twenty-seventh capacitors, and the eleventh to forty-eighth inductors; The first end of the eleventh inductor is connected to the first end of the sixteenth capacitor and the first end of the twelfth inductor. The second end of the eleventh inductor is connected to the first end of the twenty-first inductor and the first end of the twenty-second inductor; The second terminal of the sixteenth capacitor is grounded; The second terminal of the twelfth inductor is connected to the second terminal of the tenth capacitor and the first terminal of the thirteenth inductor; The second end of the thirteenth inductor is connected to the first end of the seventeenth capacitor, the first end of the fourteenth inductor, and the first end of the fifteenth inductor; The second terminal of the seventeenth capacitor is grounded; The second end of the fourteenth inductor is connected to the first end of the twenty-third inductor and the first end of the twenty-fourth inductor; The second end of the fifteenth inductor is connected to the first end of the eighteenth capacitor, the first end of the nineteenth capacitor, and the first end of the sixteenth inductor; The second terminal of the eighteenth capacitor is grounded; The second terminal of the nineteenth capacitor is grounded; The second end of the sixteenth inductor is connected to the first end of the seventeenth inductor, the first end of the eighteenth inductor, and the first end of the twentieth capacitor; The second end of the seventeenth inductor is connected to the first end of the twenty-fifth inductor and the second end of the twenty-sixth inductor; The second terminal of the eighteenth inductor is connected to the second terminal of the eleventh capacitor and the first terminal of the nineteenth inductor; The second end of the nineteenth inductor is connected to the first end of the twenty-first capacitor and the first end of the twentieth inductor. The second terminal of the 21st capacitor is grounded; The second terminal of the twentieth inductor is connected to the first terminal of the twentieth seventeenth inductor and the first terminal of the twenty-eighth inductor; The second terminal of the 21st inductor is connected to the first terminal of the third amplification unit; The second end of the third amplification unit is connected to the first end of the twenty-ninth inductor; The second terminal of the 22nd inductor is connected to the first terminal of the fourth amplification unit; The second end of the fourth amplification unit is connected to the first end of the thirtieth inductor; The second terminal of the 23rd inductor is connected to the first terminal of the fifth amplification unit; The second end of the fifth amplification unit is connected to the first end of the thirty-first inductor; The second terminal of the 24th inductor is connected to the first terminal of the 6th amplification unit; The second end of the sixth amplification unit is connected to the first end of the thirty-second inductor; The second terminal of the 25th inductor is connected to the first terminal of the 7th amplification unit; The second end of the seventh amplification unit is connected to the first end of the thirty-third inductor; The second terminal of the 26th inductor is connected to the first terminal of the 8th amplification unit; The second end of the eighth amplification unit is connected to the first end of the thirty-fourth inductor; The second terminal of the 27th inductor is connected to the first terminal of the 9th amplification unit; The second end of the ninth amplification unit is connected to the first end of the thirty-fifth inductor; The second terminal of the 28th inductor is connected to the first terminal of the 10th amplification unit; The second end of the tenth amplification unit is connected to the first end of the thirty-sixth inductor; The second terminal of the 29th inductor is connected to the first terminal of the 37th inductor and the second terminal of the 30th inductor; The second end of the thirty-first inductor is connected to the first end of the thirty-eighth inductor, the second end of the thirty-second inductor, and the first end of the forty-first inductor; The second end of the thirty-third inductor is connected to the first end of the thirty-ninth inductor, the second end of the thirty-fourth inductor, and the first end of the forty-second inductor; The second end of the thirty-fifth inductor is connected to the first end of the fortieth inductor and the second end of the thirty-sixth inductor; The second terminal of the forty-first inductor is connected to the first terminal of the twenty-second capacitor, the first terminal of the twenty-third capacitor, and the second terminal of the forty-second inductor. The second terminal of the 22nd capacitor is grounded; The second terminal of the 23rd capacitor is grounded; The second end of the thirty-seventh inductor is connected to the first end of the twenty-fourth capacitor and the first end of the forty-third inductor; The second end of the thirty-eighth inductor is connected to the first end of the twenty-fifth capacitor and the first end of the forty-fourth inductor; The second end of the thirty-ninth inductor is connected to the first end of the twenty-sixth capacitor and the first end of the forty-fifth inductor; The second end of the fortieth inductor is connected to the first end of the twenty-seventh capacitor and the first end of the forty-sixth inductor; The second terminal of the 24th capacitor is grounded; The second terminal of the 25th capacitor is grounded; The second terminal of the 26th capacitor is grounded; The second terminal of the 27th capacitor is grounded; The second end of the forty-third inductor is connected to the first end of the forty-seventh inductor and the second end of the forty-fourth inductor; The second end of the forty-fifth inductor is connected to the first end of the forty-eighth inductor and the second end of the forty-sixth inductor; The second end of the forty-seventh inductor is connected to the first input port of the output balun as the first output end of the second amplification module. The second end of the forty-eighth inductor is connected to the second input port of the output balun as the second output end of the second amplification module.

6. The broadband high harmonic suppression amplifier circuit as described in claim 5, characterized in that, The second bias unit includes capacitors 28 to 31 and inductors 49 to 52. The first end of the forty-ninth inductor is connected to the first end of the sixteenth capacitor, the first end of the eleventh inductor, and the second end of the twelfth inductor. The second terminal of the forty-ninth inductor is connected to the first terminal and the second gate of the twenty-eighth capacitor for power supply. The first end of the fiftieth inductor is connected to the first end of the twenty-first capacitor, the first end of the twentieth inductor, and the second end of the nineteenth inductor. The second terminal of the fiftieth inductor is connected to the first terminal and the second gate of the twenty-ninth capacitor for power supply. The second terminal of the 28th capacitor is grounded; The second terminal of the 29th capacitor is grounded; The first end of the fifty-first inductor is connected to the second end of the twenty-ninth inductor, the second end of the thirtieth inductor, and the first end of the thirty-seventh inductor; The second terminal of the fifty-first inductor is connected to the first terminal and the second drain of the thirtieth capacitor for power supply. The first end of the fifty-second inductor is connected to the second end of the thirty-fifth inductor, the second end of the thirty-sixth inductor, and the first end of the fortieth inductor; The second terminal of the fifty-second inductor is connected to the first terminal and the second drain of the thirty-first capacitor for power supply. The second terminal of the thirtieth capacitor is grounded; The second terminal of the thirty-first capacitor is grounded.

7. The broadband high harmonic suppression amplifier circuit as described in claim 6, characterized in that, The radio frequency output balun includes a thirty-second capacitor and an output balun; The first terminal of the thirty-second capacitor is connected to the output port of the output balun. The second end of the thirty-second capacitor is connected to the radio frequency output port.

8. The broadband high harmonic suppression amplifier circuit as described in any one of claims 5-7, characterized in that, The first to tenth amplification units are high electron mobility transistors.

9. The broadband high harmonic suppression amplifier circuit as described in claim 6 or 7, characterized in that, The first gate power supply and the second gate power supply can be combined into a single gate power supply.

10. The broadband high harmonic suppression amplifier circuit as described in claim 6 or 7, characterized in that, The first drain power supply and the second drain power supply can be combined into a single drain power supply.

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