Voltage-controlled memristor circuit
By constructing voltage-controlled memristor circuits using N-channel and P-channel MOSFETs, the problem of active memristor circuits being affected by active devices was solved, achieving a simple circuit topology and flexible current-voltage waveform control with stable topology performance.
Patent Information
- Application Number
- CN202511114188.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-06
- Publication Date
- 2025-11-21
AI Technical Summary
Existing active memristor circuits are affected by the bandwidth of active devices and the supply voltage, while passive memristor circuits lack simple circuit topologies.
A voltage-controlled memristor circuit constructed using N-channel and P-channel MOSFETs achieves a simple circuit topology by controlling the current-voltage waveform through voltages vc1 and vc2.
It achieves a simple circuit topology, adjustable current-voltage waveforms, and flexible selection of MOSFET types without changing topology performance.
Smart Images
Figure CN120998260A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to a memristor simulation model and belongs to the field of circuit design. BACKGROUND
[0002] The memristor performance of an active memristor circuit constructed by using active components (such as an operational amplifier, an FPGA, etc.) is influenced by the bandwidth and power supply voltage of the active device. A passive memristor circuit constructed only by MOSFETs does not use external power supply and active components, and can well avoid the problems existing in the active memristor. SUMMARY
[0003] The application solves the technical problem of realizing a voltage-controlled memristor circuit by using a simple circuit topology.
[0004] The application adopts the following technical scheme to solve the above technical problem.
[0005] A voltage-controlled memristor circuit comprises N-channel field effect transistor M0 and M2 and P-channel field effect transistor M1.
[0006] Input v i is connected with the "D" end of M0, the "S" end of M0 is grounded, the "B" end of M0 is connected with the "D" end of M1, and the "G" end of M0 is connected with the "D" end of M2.
[0007] The "G" end of M1 is connected with the "B" end of M2, and the "S" end of M1 is connected with v c1 .
[0008] The "G" end of M2 is connected with the "B" end of M1, and the "S" end of M2 is connected with v c2 .
[0009] When v c1 is a fixed voltage value, the i i -v i waveform of the voltage-controlled memristor circuit will rotate counterclockwise with the increase of v c2 , and the i i -v i waveform of the voltage-controlled memristor circuit will rotate clockwise with the decrease of v c2 .
[0010] When v c2 is a fixed voltage value, the i i -v i waveform of the voltage-controlled memristor circuit will rotate clockwise with the increase of v c1 , and the i i -v i waveform of the voltage-controlled memristor circuit will rotate counterclockwise with the decrease of v c1clockwise rotation.
[0011] Further, under the control of v c1 and v c2 , the i i -v i waveform upper lobe gradually disappears with the clockwise rotation of the i i -v i waveform.
[0012] Further, under the control of v c1 and v c2 , the i i -v i waveform upper lobe gradually disappears with the clockwise rotation of the i i -v i waveform.
[0013] Further, under the control of v c1 and v c2 , the i i -v i waveform upper lobe gradually disappears with the clockwise rotation of the i i -v i waveform.
[0014] Further, M0 and M2 are replaced by P-channel MOSFET, M1 is replaced by N-channel MOSFET, and the memristor performance of the one voltage-controlled memristor circuit remains unchanged.
[0015] Compared with the prior art, the above technical scheme has the following technical effects:
[0016] 1. The one voltage-controlled memristor circuit has a simple topology and is easy to implement.
[0017] 2. The i i -v i waveform of the one voltage-controlled memristor circuit can be controlled by v c1 and v c2 .
[0018] 3. M0 and M2 of the one voltage-controlled memristor circuit can be replaced by P-channel MOSFET, and M1 can be replaced by N-channel MOSFET. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 is the one voltage-controlled memristor circuit, M0 and M2 are N-channel field effect transistors, and M1 is a P-channel field effect transistor.
[0020] Figure 2 is taken as v i (t) = 3 * sin(2 * π * f i *t) V, f i = 5 GHz, v c1 = 0 V, the i i -v i waveform of the one voltage-controlled memristor circuit under the control of v c2 ;
[0021] Figure 3 is taken as v i (t) = 3 * sin(2 * π * f i *t) V, f i = 5 GHz, v c2 = 0 V, the i i -v i waveform of the one voltage-controlled memristor circuit under the control of v c1 ;
[0022] Figure 4 is taken as v i (t) = 5 * sin(2 * π * f i *t) V, f i = 1 MHz, 2 MHz and 3 MHz, the i i -v i waveform of the one voltage-controlled memristor circuit constructed using CD4007. DETAILED DESCRIPTION
[0023] Embodiments of the present application are described in detail below with reference to the attached drawing figures, wherein like reference numerals identify identical or
[0024] As will be understood by those skilled in the art, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0025] The technical solutions of the present application are further described in detail below with reference to the accompanying drawings.
[0026] Example 1
[0027] In Figure 1In this example, MOSFET M0 is an N-channel MOSFET with a channel length of 60 nm and a channel width of 700 nm. MOSFET M1 is a P-channel MOSFET with a channel length of 60 nm and a channel width of 200 nm. MOSFET M2 is an N-channel MOSFET with a channel length of 60 nm and a channel width of 300 nm. In v i (t)=3*sin(2*π*t*f i V, f i =5GHz, the aforementioned voltage-controlled memristor circuit i i (y)~v i The waveform of (y) is as follows Figure 2 and Figure 3 As shown.
[0028] exist Figure 2 As can be seen, i i (t)~v i The waveform of (t) at v c1 =0V, v c2 When the voltage is increased sequentially from 0V to 1V, i i (t)~v i (t) The waveform rotates counterclockwise, and the lobes are gradually compressed; v c2 When the voltage decreases sequentially from 0V to -1V, i i (t)~v i (t) The waveform rotates clockwise, and the lobes are gradually compressed.
[0029] exist Figure 3 As can be seen, i i (t)~v i The waveform of (t) at v c2 =0V, v c1 When the voltage is increased sequentially from 0V to 1V, i i (t)~v i (t) The waveform rotates clockwise, and the lobes are gradually compressed; v c1 When the voltage decreases sequentially from 0V to -1V, i i (t)~v i (t) The waveform rotates counterclockwise, and the lobes are gradually compressed.
[0030] Example 2
[0031] A voltage-controlled memristor circuit was constructed using a CD4007. i (t)=5*sin(2*π*t*f i V, f i =f i =1MHz, 2MHz and 3MHz, the voltage-controlled memristor circuit i i (t)~v i The waveform of (y) is as follows Figure 4.
[0032] It can be seen that i i (y) ~ v i The waveform of (y) gradually shrinks with the increase of f i .
[0033] The above merely provides a specific implementation of the present application, but the protection scope of the present application is not limited thereto, any person skilled in the art can understand and conceive the transformation or replacement within the technical range disclosed by the present application, which should be covered in the inclusive scope of the present application, therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A voltage-controlled memristor circuit, including N-channel MOSFETs M0 and M2, and a P-channel MOSFET M1. Enter v i Connect the "D" terminal of M0 to the ground, connect the "B" terminal of M0 to the "D" terminal of M1, and connect the "G" terminal of M0 to the "D" terminal of M2. Connect the "G" terminal of M1 to the "B" terminal of M2, and connect the "S" terminal of M1 to v. c1 . The "G" terminal of M2 is connected to the "B" terminal of M1, and the "S" terminal of M2 is connected to v. c2 . In v c1 When the voltage is a fixed value, the i of the voltage-controlled memristor circuit is... i -v i The waveform will change with v c2 The increase of the value causes a counterclockwise rotation; the i of the voltage-controlled memristor circuit described above. i -v i The waveform will change with v c2 The decrease is achieved by rotating clockwise. In v c2 When the voltage is a fixed value, the i of the voltage-controlled memristor circuit is... i -v i The waveform will change with v c1 The increase makes a clockwise rotation; the i of the voltage-controlled memristor circuit mentioned above. i -v i The waveform will change with v c1 The decrease is achieved by rotating counterclockwise.
2. The voltage-controlled memristor circuit as described in claim 1, characterized in that, In v c1 and v c2 Under control, the i of the voltage-controlled memristor circuit i -v i The upper lobe of the waveform will change with i i -v i The waveform rotates counterclockwise and gradually disappears.
3. A voltage-controlled memristor circuit as described in claim 1, characterized in that, In v c1 and v c2 Under control, the i of the voltage-controlled memristor circuit i -v i The upper lobe of the waveform will change with i i -v i The waveform gradually disappears as it rotates clockwise.
4. A voltage-controlled memristor circuit as described in claim 1, characterized in that, In v c1 and v c2 Under control, the i of the voltage-controlled memristor circuit i -v i The limiting case of clockwise rotation of the waveform is the i-th of the aforementioned voltage-controlled memristor circuit. i -v i The waveform appears as a horizontal straight line.
5. A voltage-controlled memristor circuit as described in claim 1, characterized in that, If M0 and M2 are replaced with P-channel MOSFETs and M1 is replaced with an N-channel MOSFET, the memristor performance of the voltage-controlled memristor circuit remains unchanged.