All-digital PVT sensor based on ring oscillator

Abstract

The invention discloses an all-digital PVT sensor based on a ring oscillator, and relates to the field of PVT sensors, the all-digital PVT sensor comprises a process sensing circuit, a voltage sensing circuit and a temperature sensing circuit, the process sensing circuit comprises a process detection ring oscillator, the voltage sensing circuit comprises a voltage detection ring oscillator, and the temperature sensing circuit comprises a temperature detection ring oscillator. The temperature sensing circuit comprises a temperature sensitive ring oscillator; under the control of an enable signal, the process detection ring oscillator, the voltage detection ring oscillator and the temperature-sensitive ring oscillator start oscillation, and the process corner, the temperature and the power supply voltage of the detected chip are determined based on the oscillation frequencies of the process detection ring oscillator, the voltage detection ring oscillator and the temperature-sensitive ring oscillator. The PVT sensor is completely realized based on a digital circuit, an additional analog module does not need to be introduced, the area overhead is greatly reduced, and the PVT sensor has remarkable area advantage and structural simplicity while the high-precision detection capability is maintained.

Description

Technical Field

[0001] This invention relates to the field of PVT sensors, and in particular to a fully digital PVT (Process-Voltage-Temperature) sensor based on a ring oscillator. Background Technology

[0002] As integrated circuit process technology continues to shrink in size and circuit gate density rapidly increases, the functions integrated in system-on-chips (SoCs) are becoming increasingly complex. To maintain performance advantages and competitiveness, designers need to ensure reliable chip operation under more stringent process variations, power supply noise, and temperature conditions. At advanced FinFET process nodes, increased device parameter dispersion, continuously decreasing supply voltage, and increased chip power density significantly enhance the sensitivity of circuit delay, power consumption, and reliability to process, voltage, and temperature conditions.

[0003] On the one hand, process variations lead to differences in device characteristics between different batches, different wafers, and even different chips on the same wafer. To quantitatively describe these differences, the concept of process corners is introduced. Different process corners result in different propagation delays for standard cells, significantly impacting chip performance. On the other hand, the internal power distribution network of a chip has inherent resistance. When current flows through this network, an IR drop occurs, causing the internal supply voltage to fall below the external nominal value. This affects timing performance and signal integrity, and in severe cases, may lead to functional errors. Furthermore, as chip power density increases, temperature rises caused by localized hotspots can lead to decreased mobility, changes in threshold voltage, accelerated device aging, and even irreversible damage. Therefore, it is necessary to monitor the chip's process, voltage, and temperature.

[0004] Traditional PVT monitoring methods are mainly implemented through on-chip analog sensors, such as bandgap reference and digital-to-digital converter (ADC) based processes and voltage and temperature detection circuits. Although such structures have high accuracy, they require complex analog modules, have a large layout area, and are difficult to design, making them unsuitable for large-scale deployment at multiple points within the chip. Summary of the Invention

[0005] To address the aforementioned problems and technical requirements, the inventors have proposed a fully digital PVT sensor based on a ring oscillator. The technical solution of this invention is as follows:

[0006] A fully digital PVT sensor based on a ring oscillator includes a process sensing circuit, a voltage sensing circuit, and a temperature sensing circuit, wherein... The process sensing circuit includes a process detection ring oscillator, the voltage sensing circuit includes a voltage detection ring oscillator, and the temperature sensing circuit includes a temperature-sensitive ring oscillator. Under the control of the enable signal, the process detection ring oscillator, voltage detection ring oscillator and temperature sensitive ring oscillator start oscillating. Based on the oscillation frequency of the process detection ring oscillator, voltage detection ring oscillator and temperature sensitive ring oscillator, the process corner, temperature and power supply voltage of the chip under test are determined.

[0007] A further technical solution is that the temperature-sensitive ring oscillator includes a NAND gate and a temperature-sensitive inverter chain formed by an even number of temperature-sensitive inverter units connected in series. The temperature-sensitive inverter unit includes a P-type FinFET P1, an N-type FinFET N1, and an N-type FinFET N2. The source of the P-type FinFET P1 is connected to the power supply voltage. The gate of the P-type FinFET P1 is connected to the gate of the N-type FinFET N1 to form the input terminal of the temperature-sensitive inverter unit. The drain of the P-type FinFET P1 is connected to the drain of the N-type FinFET N1 to form the output terminal of the temperature-sensitive inverter unit. The source of the N-type FinFET N1 is connected to the gate and drain of the N-type FinFET N2. The source of the N-type FinFET N2 is grounded. In a temperature-sensitive ring oscillator, the input terminal of the temperature-sensitive inverter chain is connected to the output terminal of the NAND gate, the output terminal of the temperature-sensitive inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the temperature-sensitive ring oscillator.

[0008] A further technical solution is that the temperature sensing circuit also includes a temperature-compensated ring oscillator, which oscillates synchronously with the temperature-sensitive ring oscillator under the control of an enable signal. The compensated oscillation frequency is obtained by using the oscillation frequency of the temperature-sensitive ring oscillator and the oscillation frequency of the temperature-compensated ring oscillator, and the temperature of the chip under test is determined based on the compensated oscillation frequency, so as to use the temperature-compensated ring oscillator to compensate for the influence of power supply voltage fluctuations on the temperature-sensitive ring oscillator. Before detecting the temperature of the chip under test, a first temperature calibration point and a second temperature calibration point are obtained using a temperature sensing circuit at a first calibration temperature and a second calibration temperature, respectively. The linear relationship between the compensated oscillation frequency and the measured temperature is obtained based on the first temperature calibration point and the second temperature calibration point. When detecting the temperature of the chip under test, the temperature of the chip under test is obtained based on the linear relationship between the compensated oscillation frequency and the measured temperature.

[0009] A further technical solution is that the temperature-compensated ring oscillator includes a NAND gate and an even number of ULVT inverters connected in series to form a temperature-compensated inverter chain; In a temperature-compensated ring oscillator, the input terminal of the temperature-compensated inverter chain is connected to the output terminal of the NAND gate, the output terminal of the inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the temperature-compensated ring oscillator.

[0010] A further technical solution is that the process detection ring oscillator includes a NAND gate and an inverter chain formed by an even number of inverters connected in series. The input terminal of the inverter chain is connected to the output terminal of the NAND gate, the output terminal of the inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the process detection ring oscillator. The power supply voltage of the process detection ring oscillator is determined based on the zero-temperature delay voltage point of the inverter in the process detection ring oscillator, so as to reduce the sensitivity of the inverter in the process detection ring oscillator to temperature changes.

[0011] A further technical solution is that the voltage sensing circuit further includes a voltage calibration ring oscillator, and the structure of the voltage detection ring oscillator and the voltage calibration ring oscillator is the same as that of the process detection ring oscillator. The power supply voltage of the voltage-calibrated ring oscillator is the reference voltage V. ref The supply voltage of the voltage detection ring oscillator is the supply voltage V of the chip under test. test And the power supply voltage V of the chip under test test Located at reference voltage V ref The voltage between the supply voltage of the process detection ring oscillator; Detect the supply voltage V of the chip under test test During testing, a first voltage calibration point is obtained using a process-testing ring oscillator, and a second voltage calibration point is obtained using a voltage calibration ring oscillator. Based on the first and second voltage calibration points, a linear relationship is established between the oscillation frequency of the voltage-detecting ring oscillator and the measured voltage. Finally, based on this linear relationship, the supply voltage V of the chip under test is obtained. test .

[0012] A further technical solution is that, in the temperature sensing circuit, the output terminals of the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator are respectively connected to a counter. The counters connected to the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator respectively output a digital code T_Code1 representing the oscillation frequency of the temperature-sensitive ring oscillator and a digital code T_Code2 representing the oscillation frequency of the temperature-compensated ring oscillator. Then, the count value t_codecom representing the compensated oscillation frequency is η. t_code2 t_code1, η is the ratio of the supply voltage coefficients of the oscillation frequency of the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator, t_code1 is the count value of digital code T_Code1, and t_code2 is the count value of digital code T_Code2; Before detecting the temperature of the chip under test, count values ​​t_codecom1 and t_codecom2, which characterize the oscillation frequency after compensation, are obtained at the first calibration temperature T1 and the second calibration temperature T2, respectively, to obtain the first temperature calibration point (t_codecom1, T1) and the second temperature calibration point (t_codecom2, T2). Based on the first temperature calibration point and the second temperature calibration point, the fitted straight line of the count value t_codecom with respect to the measured temperature is obtained. When detecting the temperature of the chip under test, the count value t_codecom of the oscillation frequency after characterization compensation corresponding to the measured temperature is substituted into the fitted straight line of the count value t_codecom with respect to the measured temperature to obtain the temperature of the chip under test.

[0013] A further technical solution is that, in the process sensing circuit, a counter is connected to the output terminal of the process detection ring oscillator. The counter connected to the process detection ring oscillator outputs a digital code P_Code that represents the oscillation frequency of the process detection ring oscillator. The process angle of the chip under test is determined according to the digital code P_Code.

[0014] A further technical solution is that, in the voltage sensing circuit, the output terminals of the voltage calibration ring oscillator and the voltage detection ring oscillator are respectively connected to a counter. The counters connected to the voltage calibration ring oscillator and the voltage detection ring oscillator respectively output a digital code Vref_Code representing the oscillation frequency of the voltage calibration ring oscillator and a digital code V_Code representing the oscillation frequency of the voltage detection ring oscillator. Detect the supply voltage V of the chip under test test At the same time, the supply voltage Vp of the process detection ring oscillator and the count value p_code of the digital code P_Code are obtained to determine the first voltage calibration point (p_code, Vp); the count value vref_code of the digital code Vref_Code is obtained to determine the second voltage calibration point (vref_code, Vp). ref ); Based on the first voltage calibration point and the second voltage calibration point, obtain the fitting line of the count value v_code of the digital code V_Code with respect to the measured voltage. Substitute the count value v_code of the digital code V_Code corresponding to the measured voltage into the fitting line of the count value v_code of the digital code V_Code with respect to the measured voltage to obtain the power supply voltage of the chip under test.

[0015] A further technical solution is that the enable signal is generated by a pulse generation circuit, and the pulse generation circuit is connected to a reset signal, a reference clock signal, and an enable digital code; After the reset signal control pulse generation circuit is released, the pulse generation circuit generates an enable signal with a high-level duration equal to the product of the enable digital code count value and the period of the reference clock signal.

[0016] The beneficial technical effects of this invention are: The PVT sensor based on a ring oscillator proposed in this invention is constructed using standard digital units (such as inverters, NAND gates, D flip-flops, etc.) and is implemented entirely based on digital circuits. It does not require the introduction of additional analog modules, which greatly reduces area overhead. While maintaining high-precision detection capabilities, it has significant area advantages and structural simplicity, making it suitable for multi-point deployment within large-scale SoCs to monitor the PVT status of different regions and improve the overall reliability of the chip.

[0017] Meanwhile, the sensor design is highly compatible with standard cell libraries and digital design flows for advanced FinFET processes, making it easy to integrate on existing digital chip design platforms and enhancing its adaptability and scalability under advanced processes. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of one embodiment of a fully digital PVT sensor based on a ring oscillator provided by the present invention.

[0019] Figure 2 This is a schematic diagram of one embodiment of the process sensing circuit provided by the present invention.

[0020] Figure 3 The simulation results of the process sensing circuit provided by this invention under different temperatures and different process angles are shown in the figure.

[0021] Figure 4 This is a schematic diagram of the structure of one embodiment of the counter provided by the present invention.

[0022] Figure 5 This is a schematic diagram of one embodiment of the voltage sensing circuit provided by the present invention.

[0023] Figure 6 The figure shows the simulation results of the oscillation frequency of the voltage sensing ring oscillator provided by this invention under different temperatures and different process angles.

[0024] Figure 7 The figure shows the error simulation results of the voltage detection ring oscillator provided by this invention at 120℃ and different process angles.

[0025] Figure 8The figure shows the error simulation results of the voltage detection ring oscillator provided by this invention at -40℃ and different process angles.

[0026] Figure 9 This is a schematic diagram of one embodiment of the temperature-sensitive ring oscillator provided by the present invention.

[0027] Figure 10 This is a schematic diagram of one embodiment of the temperature-compensated ring oscillator provided by the present invention.

[0028] Figure 11 The results are simulations of the errors of the temperature sensing circuit provided by this invention under different process angles and when the supply voltage changes.

[0029] Figure 12 This is a schematic diagram of one embodiment of the pulse generation circuit provided by the present invention. Detailed Implementation

[0030] The specific embodiments of the present invention will be further described below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of this disclosure.

[0031] This invention provides a fully digital PVT sensor based on a ring oscillator, such as... Figure 1 As shown, the sensor includes a process sensing circuit (Psensor), a voltage sensing circuit (Vsensor), and a temperature sensing circuit (Tsensor). The process sensing circuit includes a process detection ring oscillator, the voltage sensing circuit includes a voltage detection ring oscillator, and the temperature sensing circuit includes a temperature-sensitive ring oscillator. Under the control of an enable signal (FP), the process detection ring oscillator, the voltage detection ring oscillator, and the temperature-sensitive ring oscillator oscillate. Based on the oscillation frequencies of these ring oscillators, the process corner, temperature, and supply voltage of the chip under test (DUT) are determined. Specifically, the all-digital PVT sensor based on the ring oscillator is fabricated on the same wafer as the DUT chip, undergoing identical process conditions. The oscillation frequency of the process / voltage / temperature detection ring oscillator is closely related to the PVT of the DUT chip. By detecting the oscillation frequency of the process / voltage / temperature detection ring oscillator, the process corner, temperature, and supply voltage of the DUT chip can be obtained. The specific working principle of this PVT sensor can be found in the following description.

[0032] like Figure 2As shown, the process monitoring ring oscillator includes a NAND gate and an inverter chain formed by an even number of standard inverters connected in series. The input terminal of the inverter chain is connected to the output terminal of the NAND gate, and the output terminal of the inverter chain is connected to the second input terminal of the NAND gate. The first input terminal of the NAND gate receives an enable signal (FP), and the second input terminal of the NAND gate forms the output terminal of the process monitoring ring oscillator. The supply voltage of the process monitoring ring oscillator is determined based on the zero-temperature delay voltage point of the inverters in the process monitoring ring oscillator to reduce the sensitivity of the inverters in the process monitoring ring oscillator to temperature changes. Specifically, the first input terminal of the NAND gate receives the enable signal, and the output terminal is connected to multiple inverters in sequence, finally feeding back to the second input terminal of the NAND gate, thus forming a closed loop. This loop generates a periodic oscillation waveform when enabled by the enable signal.

[0033] As those skilled in the art will know, the delay of a standard inverter mainly depends on the charging and discharging speed of its MOSFET and the saturation leakage current I of the MOSFET. DSAT It can be represented as:

[0034] Where μ is the carrier mobility, C ox The gate oxide capacitance is W / L, the width-to-length ratio of the MOSFET is V. GS The gate-source voltage of the MOSFET, V TH Given the threshold voltage of the MOSFET, the above formula shows that the magnitude of the saturation leakage current of the MOSFET is related to the gate-source voltage V. GS The temperature-related terms are carrier mobility μ and threshold voltage V. TH When the supply voltage is constant, V GS The saturation leakage current of the MOSFET remains unchanged. At this point, it depends only on the temperature-dependent terms of carrier mobility μ and threshold voltage V. TH The carrier mobility μ decreases with increasing temperature, which in turn leads to a decrease in saturation leakage current; the threshold voltage V TH As temperature increases, the saturation leakage current decreases, leading to an increase in the standard inverter's delay. The change in delay is a result of the combined effects of these two factors. Furthermore, as those skilled in the art will know, for different process corners, there exists a zero temperature delay voltage point (ZTD). When the supply voltage of the standard inverter is at this voltage, the effects of the two mechanisms affecting the saturation leakage current—the decrease in carrier mobility and the reduction in threshold voltage—on the delay will cancel each other out, allowing the standard inverter's propagation delay to remain essentially constant under different temperature conditions.

[0035] Therefore, to ensure that the process monitoring ring oscillator primarily reflects process corner changes while reducing its sensitivity to temperature variations, its supply voltage should be determined based on the zero-temperature delay voltage point of the inverter in the process monitoring ring oscillator. Specifically, the supply voltage of the process monitoring ring oscillator can be the same as or close to the average voltage value of the inverter in the ring oscillator at the zero-temperature delay voltage point at each process corner. In this embodiment, an inverter based on the SMIC 14 nm process node is used. The zero-temperature delay voltage point of this inverter at each process corner is concentrated around 0.8V, and the standard operating voltage V of the inverter at this process node is also consistent. DD It is also equal to 0.8V. Therefore, in this embodiment, the supply voltage Vp of the process detection ring oscillator is set to V. DD This makes the oscillation frequency of the process monitoring ring oscillator insensitive to temperature changes, but mainly modulated by the current process angle state. Specifically, a higher oscillation frequency indicates a "faster" process angle.

[0036] Since the oscillation frequency of a ring oscillator cannot be directly measured, a counter is connected to the output terminal of the process detection ring oscillator in the process sensing circuit. This counter counts the number of rising edges of the output waveform of the process detection ring oscillator to output a digital code P_Code that characterizes the oscillation frequency of the process detection ring oscillator. The process corner of the chip under test is determined based on the digital code P_Code.

[0037] Figure 3 shows the simulation results of the process sensing circuit at different temperatures (-40℃ to 120℃) and different process angles. As can be seen from Figure 3, the oscillation frequency of the process sensing circuit is within the range of the standard supply voltage V. DD The chip is not sensitive to temperature changes. At the same temperature, the count value of the digital code P_Code is the largest at the FF (Fast-Fast) process corner, the count value of the digital code P_Code is the smallest at the SS (Slow-Slow) process corner, and the count value of the digital code P_Code is at an intermediate level at the TT (Typical-Typical) process corner. Therefore, the process corner of the chip under test can be determined by the digital code P_Code.

[0038] It should be noted that, by Figure 3 It is also known that for this process sensing circuit, the count value of digital code P_Code under process angles FS (Fast-Slow) and SF (Slow-Fast) is similar to the count value of digital code P_Code under process angle TT (Typical-Typical). Therefore, the detection results of this process sensing circuit for process angles TT, FS and SF are not clearly distinguished. That is, when the count value of digital code P_Code is at the middle level, the process angle is judged to be within the range of TT / FS / SF.

[0039] In practice, three count value ranges for digital codes P_Code can be set. The first count value range corresponds to the FF process angle, the second count value range corresponds to the TT / FS / SF process angle range, and the third count value range corresponds to the SS process angle. The process angle being measured is determined as the FF process angle, the TT / FS / SF process angle range, or the SS process angle based on the count value range that the count value of the digital code P_Code output by the counter falls into.

[0040] Generally, the TT, FS, and SF process corners are on the same order of magnitude in terms of chip speed, power consumption, and temperature sensitivity, which is fundamentally different from SS / FF. Furthermore, the proportion of chips produced using the FS and SF process corners in actual mass production is very small. Therefore, in most application scenarios, it is not necessary to clearly distinguish between the TT, FS, and SF process corners. In other words, this process sensing circuit is suitable for most process detection needs.

[0041] The counter circuit can be implemented using a binary counter composed of multiple D flip-flops. In this embodiment, the following is used: Figure 4 The three-bit binary counter shown uses the AND operation of the oscillation waveform output from the ring oscillator and the reset signal rst as its clock. When rst is low, the counter's output count is reset to zero. When the reset signal rst is high and the ring oscillator connected to the counter is enabled to output an oscillation waveform, the counter starts working. The counter increments its output count by 1 with each rising edge of the oscillation waveform. The counter records the number of rising edges of the oscillation waveform output by the connected ring oscillator during the effective (high) time TFP of the enable signal. After the connected ring oscillator stops oscillating, the final count value OUT of the counter is the number of oscillation cycles during the effective time TFP of the enable signal, which reflects the oscillation frequency of the corresponding ring oscillator. The oscillation frequency of the ring oscillator = OUT / TFP. In specific implementations, the specific form of the counter can be selected according to actual needs.

[0042] Furthermore, such as Figure 5 As shown, the voltage sensing circuit also includes a voltage calibration ring oscillator (RO1). The voltage detection ring oscillator (RO2) and the voltage calibration ring oscillator (RO1) have the same structure as the process detection ring oscillator, both consisting of a NAND gate and an inverter chain formed by an even number of standard inverters connected in series.

[0043] Those skilled in the art will know that the oscillation frequency f of the ring oscillator with the above structure has a linear relationship with the reciprocal of the inverter propagation delay T: f∝1 / T; the inverter propagation delay T can be expressed as:

[0044] Where t pHLWith t pLH These represent the time required for the N-channel transistor to pull down and the P-channel transistor to pull up in the inverter, respectively. Generally, t pHL With t pLH Designed to be as identical as possible, t can be obtained. pHL =t pLH , where t pHL It can be represented as:

[0045] C L For load capacitance, V DD Supply voltage to inverter, C ox1 The gate oxide capacitance of the N-channel transistor is given by W1 / L1, where W1 / L1 is the N-channel transistor size ratio, and V is the voltage. th Given the threshold voltage of the N-channel transistor, substituting the above formula into the expression for T, and integrating the terms independent of the supply voltage into the coefficient k, we get:

[0046] V of the supply voltage DD The reciprocal term is too small compared to the first two terms and can be ignored. Therefore, 1 / T and V can be considered equal. DD The relationship is approximately linear. Furthermore, the frequency f of the ring oscillator is proportional to 1 / T. Therefore, it can be concluded that the oscillation frequency of the voltage calibration / detection ring oscillator and the supply voltage can be considered linearly related. Thus, by determining the specific linear relationship between the ring oscillator's oscillation frequency and the voltage being measured, the voltage being measured can be reflected through the frequency of the ring oscillator.

[0047] In this embodiment, the power supply voltage of the voltage calibration ring oscillator is the reference voltage V. ref The supply voltage of the voltage detection ring oscillator is the supply voltage V of the chip under test. test (i.e., the voltage being measured), and the supply voltage V of the chip being measured. test Located at reference voltage V ref The relationship between the supply voltage of the ring oscillator and the process inspection; the supply voltage V of the chip under test is detected. test During testing, a first voltage calibration point is obtained using a process-testing ring oscillator, and a second voltage calibration point is obtained using a voltage calibration ring oscillator. Based on the first and second voltage calibration points, a linear relationship is established between the oscillation frequency of the voltage-detecting ring oscillator and the measured voltage. Finally, based on this linear relationship, the supply voltage V of the chip under test is obtained. test .

[0048] Specifically, since the oscillation frequency of the ring oscillator cannot be directly measured, in the voltage sensing circuit, a counter is connected to the output terminals of the voltage calibration ring oscillator and the voltage detection ring oscillator, respectively. The counters connected to the voltage calibration ring oscillator and the voltage detection ring oscillator respectively output a digital code Vref_Code representing the oscillation frequency of the voltage calibration ring oscillator and a digital code V_Code representing the oscillation frequency of the voltage detection ring oscillator. The specific form of the counter is consistent with the above.

[0049] Detect the supply voltage V of the chip under test test At the same time, the supply voltage Vp of the process detection ring oscillator and the count value p_code of the digital code P_Code are obtained to determine the first voltage calibration point (p_code, Vp); the count value vref_code of the digital code Vref_Code is obtained to determine the second voltage calibration point (vref_code, Vref); in this embodiment, the supply voltage Vp = the standard supply voltage VDD.

[0050] The digital code V_Code count value v_code is obtained based on the first voltage calibration point and the second voltage calibration point, and the fitted straight line of the digital code v_code with respect to the measured voltage is: V test =a v v_code+b v , where a v b v The coefficients determined for calibration:

[0051] The count value v_code of the digital code V_Code corresponding to the measured voltage is substituted into the fitted straight line of the count value v_code of the digital code V_Code with respect to the measured voltage to obtain the power supply voltage of the chip under test.

[0052] Simulation results of the oscillation frequency of the voltage sensing ring oscillator under different temperatures and process angles are as follows: Figure 6 As shown in Figure 6, the oscillation frequency of the voltage-sensing ring oscillator exhibits a highly linear relationship with the supply voltage across multiple process corners (TT, FF, and SS) and within a temperature range from -40℃ to 120℃, consistent with the aforementioned derivation. Furthermore, it is observed that the oscillation frequencies at different temperatures within the same process corner all intersect at a specific supply voltage point, which also aligns with the aforementioned concept of a zero-temperature delay voltage point.

[0053] Figure 7-8 To detect the error of the ring oscillator under different temperatures and process angles, by Figure 7-8It can be seen that the voltage monitoring circuit, under multiple process angles such as TT, FF and SS, has a power supply voltage detection error range of only -0.2mV to +1.7mV at temperatures of -40℃ and 120℃, which can achieve accurate detection.

[0054] Furthermore, such as Figure 9 As shown, the temperature-sensitive ring oscillator includes a NAND gate and a temperature-sensitive inverter chain formed by an even number of temperature-sensitive inverter units connected in series. Each temperature-sensitive inverter unit includes a P-type FinFET P1, an N-type FinFET N1, and an N-type FinFET N2. The source of the P-type FinFET P1 is connected to the power supply voltage of the temperature-sensitive ring oscillator, and the gate of the P-type FinFET P1 is connected to the gate of the N-type FinFET N1 to form the input terminal of the temperature-sensitive inverter unit. The drain of the N-type FinFET N1 is connected to the drain of the N-type FinFET N2 to form the output terminal of the temperature-sensitive inverter unit. The source of the N-type FinFET N1 is connected to the gate and drain of the N-type FinFET N2, and the source of the N-type FinFET N2 is grounded. In the temperature-sensitive ring oscillator, the input terminal of the temperature-sensitive inverter chain is connected to the output terminal of the NAND gate, the output terminal of the temperature-sensitive inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the temperature-sensitive ring oscillator.

[0055] In the temperature-sensitive inverter unit, P1 and N1 form a standard CMOS inverter to implement basic inversion functionality; N2 is an N-type diode with its gate and drain connected to the source of N1; the source of N2 is grounded. When the input to the temperature-sensitive inverter unit is low, P1 is turned on, and the output node is pulled high to VDD; when the input is high, N1 and N2 are turned on simultaneously, and the output node discharges through N1 and N2 until the output voltage approaches the threshold voltage V of N2. THN2 This special discharge mechanism makes the propagation delay of the inverting unit highly dependent on the threshold voltage of N2, and the high sensitivity of the threshold voltage to temperature provides a physical basis for temperature detection.

[0056] Specifically, V THN2 The expression is: V THN2 (T) = V THN2 (T0) K (T T0), where T0 is the nominal temperature, and K is the temperature coefficient of the threshold voltage, which is a constant value. From the expression, V... THN2As temperature increases, the delay of the temperature-sensitive inverter decreases linearly. The delay of the temperature-sensitive inverter changes monotonically with temperature, so that the oscillation frequency of the ring oscillator composed of this temperature-sensitive inverter unit is proportional to the absolute temperature, exhibiting a PTAT (Proportional To Absolute Temperature) characteristic.

[0057] The oscillation frequency of a temperature-sensitive ring oscillator exhibits extremely high linearity with temperature, but it is also affected by changes in the supply voltage. To address this issue, this application incorporates a temperature-compensated ring oscillator into the temperature sensing circuit. This temperature-compensated ring oscillator oscillates synchronously with the temperature-sensitive ring oscillator under the control of an enable signal. The compensated oscillation frequency is obtained based on the oscillation frequencies of both the temperature-sensitive and temperature-compensated ring oscillators, and the temperature of the chip under test is determined based on this compensated oscillation frequency. This approach utilizes the temperature-compensated ring oscillator to compensate for the influence of the supply voltage on the temperature-sensitive ring oscillator, effectively reducing the sensitivity of the temperature sensing circuit to the supply voltage.

[0058] like Figure 10 As shown, the temperature-compensated ring oscillator includes a NAND gate and an even number of ULVT (Ultra-Low Threshold Voltage) inverters connected in series to form a temperature-compensated inverter chain; in the temperature-compensated ring oscillator, the input terminal of the temperature-compensated inverter chain is connected to the output terminal of the NAND gate, the output terminal of the inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the temperature-compensated ring oscillator. Those skilled in the art will know that the approximate expression for the carrier mobility μ is: μ(T) ≈ μ(T0) [1] C μ (T T0)], where C μ The mobility temperature coefficient is a constant. Furthermore, those skilled in the art will know that the threshold voltage of the ULVT inverter is extremely small, and its influence on the oscillation frequency of the resulting ring oscillator is negligible. Therefore, the oscillation frequency of the temperature-compensated ring oscillator can be considered to depend only on the carrier mobility μ. As shown in the above expression, μ decreases approximately linearly with increasing temperature, making the oscillation frequency of the temperature-compensated ring oscillator complementary to the absolute temperature, exhibiting a CTAT (Complementary To Absolute Temperature) characteristic.

[0059] Temperature-sensitive ring oscillators and temperature-compensated ring oscillators have similar supply voltage responses. This characteristic can be used to compensate for changes in the supply voltage, reducing their sensitivity to supply voltage variations. Specifically, the oscillation frequencies of the temperature-sensitive ring oscillator and the compensated ring oscillator are defined as f1 and f2, respectively, and can be expressed as:

[0060] Where α1 and α2 are the temperature coefficients of the oscillation frequencies f1 and f2, λ1 and λ2 are the supply voltage coefficients of the oscillation frequencies, ΔVDD is the supply voltage change, and β1 and β2 represent the reference values ​​of f1 and f2 when temperature T and ΔVDD are 0, serving as a bias term. All the above coefficients (α, λ, β) can be determined using existing techniques. The ratio of the two supply voltage coefficients is defined as η = λ1 / λ2, then the compensated oscillation frequency f1 / f2 is... T It can be represented as f T =ηf2-f 1= (η.α2 α1)T +ηβ2-β1, that is, the oscillation frequency f after compensation. T It changes linearly with temperature and is not sensitive to changes in supply voltage.

[0061] Before detecting the temperature of the chip under test, a first temperature calibration point and a second temperature calibration point are obtained using a temperature sensing circuit at a first calibration temperature and a second calibration temperature, respectively. The linear relationship between the compensated oscillation frequency and the measured temperature is obtained based on the first temperature calibration point and the second temperature calibration point. When detecting the temperature of the chip under test, the temperature of the chip under test is obtained based on the linear relationship between the compensated oscillation frequency and the measured temperature.

[0062] Specifically, in the temperature sensing circuit, the output terminals of the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator are respectively connected to a counter. The counters connected to the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator respectively output a digital code T_Code1 representing the oscillation frequency of the temperature-sensitive ring oscillator and a digital code T_Code2 representing the oscillation frequency of the temperature-compensated ring oscillator. Then, the count value t_codecom representing the compensated oscillation frequency is η. t_code2 t_code1, η is the ratio of the supply voltage coefficient of the oscillation frequency of the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator, t_code1 is the count value of digital code T_Code1, t_code2 is the count value of digital code T_Code2, and the specific form of the counter can be consistent with the above.

[0063] Before detecting the temperature of the chip under test, count values ​​t_codecom1 and t_codecom2, representing the compensated oscillation frequency, are obtained at the first calibration temperature T1 and the second calibration temperature T2, respectively, to obtain the first temperature calibration point (t_codecom1, T1) and the second temperature calibration point (t_codecom2, T2). Based on the first and second temperature calibration points, a fitted straight line of the count value t_codecom with respect to the measured temperature is obtained: T test =a T t_codecom+b T , where a T b T The coefficients determined for calibration:

[0064] When detecting the temperature of the chip under test, the count value t_codecom of the oscillation frequency after characterization compensation corresponding to the measured temperature is substituted into the fitted straight line of the count value t_codecom with respect to the measured temperature to obtain the temperature of the chip under test.

[0065] Figure 11 The simulation results of the temperature sensing circuit under different process angles and varying supply voltages, using two calibration points at -20℃ and 100℃, show that the temperature monitoring circuit has an error range of -2.3℃ to 2.7℃ under multiple process angles and a standard supply voltage VDD (800mV) from -40℃ to 120℃. The voltage sensitivity is 0.045℃ / mV at the SS process angle and 0.0115℃ / mV at other process angles, demonstrating good temperature measurement accuracy.

[0066] Furthermore, the enable signal FP is generated by a pulse generation circuit, which is connected to a reset signal (rst), a reference clock signal (clk), and an enable digital code EN. After the reset signal control pulse generation circuit is released, the pulse generation circuit generates an enable signal with a high-level duration equal to the product of the count value indicated by the enable digital code and the period of the reference clock signal. That is, the pulse width of the enable signal is controlled by the enable digital code. The reset signal rst is a global reset signal, simultaneously applied to all the aforementioned counters. When rst is low, FP is held low, and the counter output is cleared. When rst is high, the PVT sensor enters normal operation. The oscillation waveforms output by each ring oscillator serve as the input to the counters. Each counter counts within the time window when FP is high and outputs: digital code P_Code, digital code V_Code, digital code Vref_Code, digital code T_Code1, and digital code T_Code2. The power supply voltages of the aforementioned process detection ring oscillators, temperature-sensitive ring oscillators, and temperature-compensated ring oscillators are all standard operating voltages V. DD The reference voltage V can be provided by the first LDO. ref It can be provided by a second LDO.

[0067] Referring to Figure 12, the pulse generation circuit in this embodiment generates a fixed high-level pulse with adjustable width as an enable signal FP, providing a unified counting time window for the multi-channel ring oscillator circuit. The pulse generation circuit may include multi-level D flip-flops (DFF1~DFF6), and combinational logic such as XNOR gates, NAND gates, and CKAND gates. Specifically, the pulse generation circuit is configured to: after reset release, count the period of the external reference clock signal; when the count value reaches the value indicated by the enable digital code, toggle the output level, thereby generating an enable signal with a high-level duration equal to the product of the external reference clock period and the count value of the enable digital code.

[0068] like Figure 12 As shown, the pulse generation circuit in this embodiment includes six D flip-flops. The clock terminals of the D flip-flops are all connected to the output terminal of the clock AND gate. The first and third input terminals of the clock AND gate are respectively connected to the reference clock signal clk and the reset signal rst. The Q terminals of D flip-flops DFF1-DFF3 are all connected to the D terminal through an inverter. The Q terminals of D flip-flops DFF1-DFF3 are respectively connected to the first to third input terminals of the NAND gate through one input terminal of the XNOR gate XNOR1-XNOR3. The other input terminal of the XNOR gate XNOR1-XNOR3 is loaded with the enable digital code EN[0]-EN[2]. The output terminal of the NAND gate is connected to the D terminal of D flip-flop DFF4. The D terminal of D flip-flop DFF4 is connected to the Reset terminal of D flip-flop DFF5. The Q terminal is connected to the clock terminal of the D flip-flop DFF6. The Q terminal is connected to the second input of the clock AND gate. The D terminals of D flip-flops DFF5 and DFF6 are connected to the power supply voltage.

[0069] When rst is low: the Q outputs (denoted as R) of DFF1 to DFF3 are set to 0; the NAND output FP_EN is set to 1 through the XNOR and NAND combination logic; the Q output FP of DFF4 is set to 0; the inverting output of DFF6 ( The output of the Q terminal (CLK_EN) is set to 1.

[0070] When rst returns to high, since both CLK_EN and rst are high, the clock signal clk generates the internal clock clk_gen via CKAND. On the first rising edge of clk_gen, the D flip-flop DFF4 samples FP_EN as high and sets FP high. Subsequently, R increments by 1 with each clock cycle. When R is less than eN, FP_EN remains high, and FP maintains a high output. When clk_gen generates the eNth rising edge, R equals eN, and the combinational logic output FP_EN goes low. On the (eN+1)th rising edge, DFF4 sets FP low. Therefore, the high-level width of FP satisfies: TFP = Tclk × eN, where TFP is the duration of the enable signal's high level, Tclk is the reference clock signal period, and eN is the enable digital code count value.

[0071] When the enable signal FP is pulled low, it serves as the reset signal for DFF5, setting the inverting output of DFF5 from 0 to 1. DFF6 samples the rising edge of the inverting output of DFF5, setting CLK_EN to 0, and CKAND sets clk_gen to 0, ending the pulse generation process. By adjusting the value of the enable digital code, the width of FP can be adjusted, thereby changing the time resolution of the PVT measurement.

[0072] In summary, the PVT sensor provided by this invention is suitable for a wide temperature range from -40℃ to 120℃. Through process, temperature, and voltage sensing circuits, it can achieve unified, accurate, and digital monitoring of process angle, power supply voltage, and temperature.

[0073] In the description of this specification, the terms "first," "second," "third," and "fourth" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0074] The use of terms such as "one embodiment / mode," "some embodiments / modes," "example," "specific example," or "some examples," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment / mode or example, which is included in at least one embodiment / mode or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment / mode or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments / modes or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments / modes or examples described in this specification, as well as the features of different embodiments / modes or examples.

[0075] The above descriptions are merely preferred embodiments of the present invention, and the present invention is not limited to the above embodiments. It is understood that other improvements and variations that can be directly derived or conceived by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included within the protection scope of the present invention.

Claims

1. A fully digital PVT sensor based on a ring oscillator, characterized in that, This includes process sensing circuits, voltage sensing circuits, and temperature sensing circuits, among which... The process sensing circuit includes a process detection ring oscillator, the voltage sensing circuit includes a voltage detection ring oscillator, and the temperature sensing circuit includes a temperature-sensitive ring oscillator. Under the control of the enable signal, the process detection ring oscillator, voltage detection ring oscillator and temperature sensitive ring oscillator start oscillating. Based on the oscillation frequency of the process detection ring oscillator, voltage detection ring oscillator and temperature sensitive ring oscillator, the process corner, temperature and power supply voltage of the chip under test are determined.

2. The all-digital PVT sensor based on a ring oscillator according to claim 1, characterized in that, The temperature-sensitive ring oscillator comprises a NAND gate and a temperature-sensitive inverter chain formed by an even number of temperature-sensitive inverter units connected in series. Each temperature-sensitive inverter unit includes a P-type FinFET P1, an N-type FinFET N1, and an N-type FinFET N2. The source of the P-type FinFET P1 is connected to the power supply voltage. The gate of the P-type FinFET P1 is connected to the gate of the N-type FinFET N1 to form the input terminal of the temperature-sensitive inverter unit. The drain of the P-type FinFET P1 is connected to the drain of the N-type FinFET N1 to form the output terminal of the temperature-sensitive inverter unit. The source of the N-type FinFET N1 is connected to the gate and drain of the N-type FinFET N2. The source of the N-type FinFET N2 is grounded. In a temperature-sensitive ring oscillator, the input terminal of the temperature-sensitive inverter chain is connected to the output terminal of the NAND gate, the output terminal of the temperature-sensitive inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the temperature-sensitive ring oscillator.

3. The all-digital PVT sensor based on a ring oscillator according to claim 1, characterized in that, The temperature sensing circuit also includes a temperature-compensated ring oscillator, which oscillates synchronously with the temperature-sensitive ring oscillator under the control of an enable signal. The compensated oscillation frequency is obtained by using the oscillation frequency of the temperature-sensitive ring oscillator and the oscillation frequency of the temperature-compensated ring oscillator, and the temperature of the chip under test is determined based on the compensated oscillation frequency, so as to use the temperature-compensated ring oscillator to compensate for the influence of power supply voltage fluctuations on the temperature-sensitive ring oscillator. Before detecting the temperature of the chip under test, a first temperature calibration point and a second temperature calibration point are obtained using a temperature sensing circuit at a first calibration temperature and a second calibration temperature, respectively. The linear relationship between the compensated oscillation frequency and the measured temperature is obtained based on the first temperature calibration point and the second temperature calibration point. When detecting the temperature of the chip under test, the temperature of the chip under test is obtained based on the linear relationship between the compensated oscillation frequency and the measured temperature.

4. The all-digital PVT sensor based on a ring oscillator according to claim 3, characterized in that, The temperature-compensated ring oscillator includes a NAND gate and an even number of ULVT inverters connected in series to form a temperature-compensated inverter chain. In a temperature-compensated ring oscillator, the input terminal of the temperature-compensated inverter chain is connected to the output terminal of the NAND gate, the output terminal of the inverter chain is connected to the second input terminal of the NAND gate, the first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the temperature-compensated ring oscillator.

5. The all-digital PVT sensor based on a ring oscillator according to claim 1, characterized in that, The process detection ring oscillator includes a NAND gate and an inverter chain formed by an even number of inverters connected in series. The input terminal of the inverter chain is connected to the output terminal of the NAND gate, and the output terminal of the inverter chain is connected to the second input terminal of the NAND gate. The first input terminal of the NAND gate is connected to an enable signal, and the second input terminal of the NAND gate forms the output terminal of the process detection ring oscillator. The power supply voltage of the process detection ring oscillator is determined based on the zero-temperature delay voltage point of the inverter in the process detection ring oscillator, so as to reduce the sensitivity of the inverter in the process detection ring oscillator to temperature changes.

6. The all-digital PVT sensor based on a ring oscillator according to claim 5, characterized in that, The voltage sensing circuit also includes a voltage calibration ring oscillator, and the structure of the voltage detection ring oscillator and the voltage calibration ring oscillator is the same as that of the process detection ring oscillator. The power supply voltage of the voltage-calibrated ring oscillator is the reference voltage V. ref The supply voltage of the voltage detection ring oscillator is the supply voltage V of the chip under test. test And the power supply voltage V of the chip under test test Located at reference voltage V ref The voltage between the supply voltage of the process detection ring oscillator; Detect the supply voltage V of the chip under test test During testing, a first voltage calibration point is obtained using a process-testing ring oscillator, and a second voltage calibration point is obtained using a voltage calibration ring oscillator. Based on the first and second voltage calibration points, a linear relationship is established between the oscillation frequency of the voltage-detecting ring oscillator and the measured voltage. Finally, based on this linear relationship, the supply voltage V of the chip under test is obtained. test .

7. The all-digital PVT sensor based on a ring oscillator according to claim 3, characterized in that, In the temperature sensing circuit, the output terminals of the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator are respectively connected to a counter. The counters connected to the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator respectively output a digital code T_Code1 representing the oscillation frequency of the temperature-sensitive ring oscillator and a digital code T_Code2 representing the oscillation frequency of the temperature-compensated ring oscillator. Then, the count value t_codecom representing the compensated oscillation frequency is η. t_code2 t_code1, η is the ratio of the supply voltage coefficients of the oscillation frequency of the temperature-sensitive ring oscillator and the temperature-compensated ring oscillator, t_code1 is the count value of digital code T_Code1, and t_code2 is the count value of digital code T_Code2; Before detecting the temperature of the chip under test, count values ​​t_codecom1 and t_codecom2, which characterize the oscillation frequency after compensation, are obtained at the first calibration temperature T1 and the second calibration temperature T2, respectively, to obtain the first temperature calibration point (t_codecom1, T1) and the second temperature calibration point (t_codecom2, T2). Based on the first temperature calibration point and the second temperature calibration point, the fitted straight line of the count value t_codecom with respect to the measured temperature is obtained. When detecting the temperature of the chip under test, the count value t_codecom of the oscillation frequency after characterization compensation corresponding to the measured temperature is substituted into the fitted straight line of the count value t_codecom with respect to the measured temperature to obtain the temperature of the chip under test.

8. The all-digital PVT sensor based on a ring oscillator according to claim 6, characterized in that, In the process sensing circuit, a counter is connected to the output terminal of the process detection ring oscillator. The counter connected to the process detection ring oscillator outputs a digital code P_Code that represents the oscillation frequency of the process detection ring oscillator. The process corner of the chip under test is determined based on the digital code P_Code.

9. The all-digital PVT sensor based on a ring oscillator according to claim 8, characterized in that, In the voltage sensing circuit, the output terminals of the voltage calibration ring oscillator and the voltage detection ring oscillator are respectively connected to a counter. The counters connected to the voltage calibration ring oscillator and the voltage detection ring oscillator respectively output a digital code Vref_Code representing the oscillation frequency of the voltage calibration ring oscillator and a digital code V_Code representing the oscillation frequency of the voltage detection ring oscillator. Detect the supply voltage V of the chip under test test At the same time, the supply voltage Vp of the process detection ring oscillator and the count value p_code of the digital code P_Code are obtained to determine the first voltage calibration point (p_code, Vp); the count value vref_code of the digital code Vref_Code is obtained to determine the second voltage calibration point (vref_code, Vp). ref ); Based on the first voltage calibration point and the second voltage calibration point, obtain the fitting line of the count value v_code of the digital code V_Code with respect to the measured voltage. Substitute the count value v_code of the digital code V_Code corresponding to the measured voltage into the fitting line of the count value v_code of the digital code V_Code with respect to the measured voltage to obtain the power supply voltage of the chip under test.

10. The all-digital PVT sensor based on a ring oscillator according to claim 1, characterized in that, The enable signal is generated by a pulse generation circuit, which is connected to a reset signal, a reference clock signal, and an enable digital code. After the reset signal control pulse generation circuit is released, the pulse generation circuit generates an enable signal with a high-level duration equal to the product of the enable digital code count value and the period of the reference clock signal.

Images