Storage array, memory, reading method of memory and electronic equipment

By designing a distributed reference cell column and a read decision unit, the problems of area, power consumption, and data reliability in traditional 2T0C gain cell storage arrays are solved, achieving high-density storage and reliable reading.

CN122090891APending Publication Date: 2026-05-26FUZHOU UNIV
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Patent Information

Application Number
CN202610044474.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-01-14
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

Traditional 2T0C gain cell memory arrays suffer from several problems, including an increased memory area due to the large number of sensitive amplifiers, high power consumption of the reference voltage generation circuit, read errors due to load asymmetry, and inconsistent local PVT conditions affecting data reliability.

Method used

A distributed reference cell array and readout decision circuit design is adopted to reduce the number of readout decision circuits, isolate the readout decision circuit from the reference voltage generation circuit, and use reference cell arrays with the same device parameters to improve symmetry and data robustness.

Benefits of technology

It increases the data storage density per unit area, reduces the driving capability requirements of the reference voltage generation circuit, reduces voltage drop loss, and enhances the robustness and reliability of data reading.

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Abstract

The invention discloses a storage array, a memory, a reading method of the memory and electronic equipment. The storage array comprises a plurality of storage unit sub-arrays, a reference unit column, a reference voltage generating circuit, a reference unit switching circuit and a read word line control circuit. The storage unit sub-arrays and the reference unit columns in the two storage arrays are electrically connected through a reading bit line and are symmetrically distributed by taking the reading decision device as a center; and transistors of the reference units and the storage units have the same structure and the same type and circuit structure. The memory comprises at least one group of open type memory array pairs, each open type memory array pair comprises a first memory array, a second memory array and a group of reading decision devices, and the memory arrays are electrically connected with two input ends of the reading decision devices respectively. During reading, the two memory arrays respectively provide a reading voltage and a reference voltage. The two input ends of the reading decision device have similar RC parameters, and drifts generated by the voltages of the two input ends are matched. According to the invention, the storage density and the data reading reliability are improved.
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