A signal processing method and system for a rubidium atomic frequency standard

Abstract

The application relates to the technical field of signal processing, and provides a signal processing method and system of a rubidium atomic frequency standard, a main frequency standard adopts a double-threshold amplitude comparison circuit, a standby frequency standard adopts a single-threshold amplitude comparison circuit, and the existence of a signal, the validity of an amplitude and a locking state are synchronously monitored; double-threshold detection of the main frequency standard ensures reliability, single-threshold detection of the standby frequency standard ensures readiness for quick switching, and the reliability and switching efficiency are balanced; through preset logic rule fusion analysis, the validity is comprehensively judged in combination with a frequency standard locking signal. A control signal is generated based on a priority rule, the main frequency standard is kept when the main frequency standard is valid, a high-level pulse synchronized with a 10MHz signal zero-crossing point is generated when the main frequency standard is invalid and the standby is ready, an abnormal alarm is triggered when the double frequency standards fail, and the control signal is transmitted to a frequency standard switching circuit through a level conversion subunit, so that the trigger timing requirement of a high-speed switching module is met, quick response switching is ensured, the stability in the switching process is ensured, and the whole is reliable and stable.

Description

Technical Field

[0001] This application relates to the field of signal processing technology, and in particular to a signal processing method and system for rubidium atomic frequency standards, and is classified under classification number H03L7 / 26. Background Technology

[0002] Time synchronization equipment, also known as time unification equipment, is a dedicated core device for achieving high-precision time synchronization and continuous timekeeping among multiple systems. Its main working principle is to receive external time source signals such as satellites (GPS / BeiDou), B-code, and shortwave, calibrate and optimize the internal high-precision clock, such as the rubidium atomic frequency standard, and then distribute a unified and stable time reference signal to each related system to ensure the consistency and accuracy of the time of the entire system. It is the time hub for time coordination in complex systems.

[0003] The core value of time synchronization equipment is to provide time synchronization accuracy at the microsecond or even nanosecond level. It mainly relies on the 10MHz sine wave signal output by the rubidium atomic frequency standard as the reference frequency. However, in the environment of strong electromagnetic interference, high-frequency interference and surge impact can easily cause the rubidium atomic frequency standard output signal to fail in the form of signal loss, amplitude attenuation, and lock state jump. If the reference frequency is interrupted or abnormal for more than 1μs, the subsequent time synchronization error will exceed the allowable range, directly affecting the success or failure of the mission.

[0004] The output signal of the rubidium atomic frequency standard exhibits at least three independent failure modes: signal presence failure, amplitude validity failure, and lockout failure. These three independent failure modes are not perfectly positively correlated. This leads to a mismatch between the conventional solution's logic for determining the frequency standard's validity based on the lockout state and the actual failure modes. Furthermore, the timing system requires a switching delay of <1μs, but existing hardware-level switching, such as relays and ordinary analog switches, typically has a response time >10μs. This creates an irreconcilable contradiction between the existing hardware physical characteristics and the system performance requirements, necessitating a new design solution. Therefore, existing technologies urgently need improvement. Summary of the Invention

[0005] Therefore, in order to solve the problems mentioned in the prior art, it is necessary to propose a signal processing method and system for rubidium atomic frequency standards that can improve stability and enhance anti-interference capabilities.

[0006] In a first aspect, this application provides a signal processing method for a rubidium atomic frequency standard, comprising the following steps: The first output signal of the main rubidium atomic frequency standard is obtained. After the 10MHz sinusoidal frequency signal of the first output signal is level-converted and isolated and amplified, it is sent to the dual threshold amplitude comparison circuit and the frequency standard switching circuit. The first state of the main rubidium atomic frequency standard is monitored through the dual threshold amplitude comparison circuit. The second output signal of the backup rubidium atomic frequency standard is acquired synchronously. After isolating and amplifying the 10MHz sinusoidal frequency signal of the second output signal, it is sent to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The second state of the backup rubidium atomic frequency standard is detected by the single threshold amplitude comparison circuit. Based on the first state, the second state, and the frequency standard locking signals of the first output signal and the second output signal, a fusion analysis is performed through preset logic rules to determine the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard. Based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, a switching control signal is generated in combination with the preset primary / backup switching rules; The switching control signal controls the frequency standard switching circuit to perform the master-slave switching between the master rubidium atomic frequency standard and the backup rubidium atomic frequency standard.

[0007] Furthermore, the first output signal of the main rubidium atomic frequency standard includes a 10MHz sinusoidal frequency signal, a frequency standard locking signal, a reference 1PPS input signal, and a local 1PPS output signal; The second output signal of the backup rubidium atomic frequency standard includes a 10MHz sine frequency signal, a frequency standard lock signal, a reference 1PPS input signal, and a local 1PPS output signal.

[0008] Furthermore, the dual-threshold amplitude comparison circuit includes a first comparison unit and a second comparison unit. The reference level of the first comparison unit is a preset high amplitude threshold, which corresponds to the upper limit of the highest effective amplitude of the main rubidium atomic frequency standard. The reference level of the second comparison unit is a preset low amplitude threshold, which corresponds to the lower limit of the lowest effective amplitude of the main rubidium atomic frequency standard. When the amplitude of the 10MHz sine frequency signal of the first output signal is higher than the preset high amplitude threshold or lower than the preset low amplitude threshold, the first state is output to the MCU as invalid. When the amplitude of the 10MHz sine frequency signal of the first output signal is between the preset high amplitude threshold and the preset low amplitude threshold, the first state is output to the MCU as valid. The MCU combines the first state with the frequency standard locking signal of the main rubidium atomic frequency standard to determine the reference validity of the main rubidium atomic frequency standard.

[0009] Furthermore, the single threshold amplitude comparison circuit includes a third comparison unit, the reference level of which is a preset ready amplitude threshold, the preset ready amplitude threshold corresponding to the minimum effective amplitude requirement of the spare rubidium atomic frequency standard; When the amplitude of the 10MHz sine frequency signal of the second output signal is higher than the preset ready amplitude threshold, the second state is output to the MCU as ready for switching. When the amplitude of the 10MHz sinusoidal frequency signal of the second output signal is lower than the preset ready amplitude threshold, the second state is output to the MCU as not ready. The MCU combines the second state with the frequency standard locking signal of the backup rubidium atomic frequency standard to determine the validity of the switching readiness of the backup rubidium atomic frequency standard.

[0010] Furthermore, the frequency standard switching circuit includes a high-speed switching module and a control drive module; The control drive module receives the switching control signal generated by the MCU and drives the high-speed switching module through level conversion and power amplification. The high-speed switching module uses high-speed analog switching devices to ensure a switching response time of less than 1μs. The input terminal of the high-speed switching module simultaneously receives 10MHz sinusoidal frequency signals from the main rubidium atomic frequency standard and the backup rubidium atomic frequency standard, and the output terminal of the high-speed switching module is connected to the isolation amplifier circuit. When the switching control signal is triggered, the high-speed switching module will seamlessly switch the output signal from the current frequency standard to another frequency standard, and output it to the time code control module and the shortwave timing unit through the isolation amplifier circuit to ensure that the signal is stable and faithful during the switching process.

[0011] Furthermore, the GaAs high-speed analog switch of the high-speed switching module has a cutoff frequency ≥1GHz and an on-resistance ≤5Ω. The GaAs high-speed analog switch has a built-in zero-crossing detection subunit, which samples the voltage value of a 10MHz sinusoidal frequency signal in real time and identifies the zero-crossing moment of the signal. After receiving the switching control signal from the MCU, the control drive module performs timing matching with the synchronization pulse output by the zero-crossing detection subunit, and triggers the channel switching of the GaAs high-speed analog switch at the zero-crossing moment of the 10MHz signal. The control drive module outputs a switching control pulse with a width of nanoseconds to drive the GaAs high-speed analog switch to complete the seamless switching of the channel. The response time of the seamless switching is ≤0.5μs, and the phase jump of the signal during the switching process is ≤0.1° and the amplitude change is ≤3%.

[0012] Furthermore, the 10MHz signal processed by the frequency standard switching circuit is processed by the isolation amplifier circuit. The isolation amplifier circuit uses a wideband isolation transformer and a low-noise operational amplifier cascaded together. The bandwidth of the wideband isolation transformer is ≥200MHz and the turns ratio is 1:1. The noise figure of the low-noise operational amplifier is ≤1dB and the output impedance is matched to 50Ω to be consistent with the impedance of the backplane transmission line. The time code control module has a built-in phase-locked loop (PLL) circuit with a loop bandwidth of 1MHz. It performs fast phase locking on the 10MHz signal after it has been processed by the frequency standard switching circuit, with a locking time of ≤10μs, to ensure the continuous stability of the clock signal. The shortwave timing unit uses a low-jitter clock buffer to perform multi-channel replication of the input 10MHz signal, maintaining the signal amplitude fluctuation ≤±2% and phase deviation ≤1° to achieve signal fidelity.

[0013] Furthermore, the step of performing fusion analysis through preset logical rules to determine the baseline validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard includes: The MCU synchronously receives the main frequency standard amplitude status signal and the main rubidium atomic frequency standard frequency standard locking signal output by the dual threshold amplitude comparison circuit; The first continuous verification is triggered if and only if the main frequency standard amplitude state is valid and the frequency standard lock signal is locked; The MCU performs consistency checks for three consecutive sampling cycles. If the first continuous verification trigger condition is met for all three consecutive sampling cycles, the reference validity of the main rubidium atomic frequency standard is determined to be valid; otherwise, it is determined to be invalid. The MCU synchronously receives the backup frequency standard amplitude status signal and the backup rubidium atomic frequency standard frequency standard locking signal output by the single threshold amplitude comparison circuit; The second continuous verification is triggered if and only if the backup frequency standard amplitude status signal is ready and the frequency standard lock signal is locked; The MCU performs consistency checks for two consecutive sampling cycles. If the triggering condition for the second continuous verification is met for both consecutive sampling cycles, the switching readiness of the spare rubidium atom is determined to be ready; otherwise, it is determined to be not ready. The MCU stores the reference validity result of the main rubidium atomic frequency standard and the switching readiness validity result of the backup rubidium atomic frequency standard into its internal register, and outputs them synchronously to the switching control signal generation module as the basis for the main / backup switching.

[0014] Furthermore, the step of generating a switching control signal based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, combined with preset primary / backup switching rules, includes: The MCU reads the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard from the status register. The reference validity of the main rubidium atomic frequency standard includes valid and invalid. The reference validity of the main rubidium atomic frequency standard is pre-stored after fusion analysis by a dual threshold amplitude comparison circuit and a frequency standard locking signal. The switching readiness validity of the backup rubidium atomic frequency standard includes ready and not ready. The switching readiness validity of the backup rubidium atomic frequency standard is pre-stored after fusion analysis by a single threshold amplitude comparison circuit and a frequency standard locking signal. The MCU executes the following preset master / slave switchover rules: Priority 1: When the reference validity of the main rubidium atomic frequency standard is valid, the MCU generates a main control signal to maintain a low level output. Priority 2: When the reference validity of the main rubidium atomic frequency standard is invalid and the switching readiness validity of the backup rubidium atomic frequency standard is ready, the MCU generates a switch to backup control signal. The switch to backup control signal is synchronized with the zero-crossing time of the 10MHz sine wave signal through a high-level pulse. Priority 3: When the reference validity of the main rubidium atomic frequency standard is invalid and the switching readiness validity of the backup rubidium atomic frequency standard is not ready, the MCU generates a current state control signal and triggers an abnormal alarm signal. The current state control signal is continuously output at a low level, and the abnormal alarm signal is continuously output at a high level until at least one frequency standard state returns to normal. The MCU generates a switching control signal and transmits it to the control drive module of the frequency standard switching circuit through the internal level conversion subunit to meet the trigger timing requirements of the high-speed switching module.

[0015] Furthermore, after the step of determining the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, the method further includes the following step: The SPI interface is used as the status data transmission interface between the MCU and the FPGA. The SPI clock frequency is set to 10MHz and synchronized with the 10MHz frequency standard signal to ensure that the transmission timing is consistent with the period of the frequency standard signal. Before the MCU sends status data, it outputs a 1μs wide synchronous trigger pulse to the FPGA through a dedicated GPIO pin. After receiving the trigger pulse, the FPGA returns an acknowledgment pulse after an internal 10ns delay. After receiving the acknowledgment pulse, the MCU sends a 16-bit status data frame containing the validity of the main frequency standard reference, the validity of the backup frequency standard switching readiness, and an exception indicator, and attaches a CRC-16 checksum. An 8-level deep FIFO buffer is set up inside the FPGA to temporarily store the status data sent by the MCU, ensuring that the timecode control module reads data without gaps.

[0016] Furthermore, after the step of controlling the frequency standard switching circuit to perform the master-slave switching between the master rubidium atomic frequency standard and the backup rubidium atomic frequency standard through the switching control signal, the method further includes the step of: Microstrip lines with copper foil shielding are used as backplane transmission lines, and the shielding layer is grounded at multiple points to suppress electromagnetic radiation crosstalk. A 100Ω high-precision resistor and a 10nF high-frequency ceramic capacitor are connected in series at the input and output ends of the microstrip line, respectively, to form an RC low-pass filter network to suppress high-frequency crosstalk signals. The characteristic impedance of the transmission line is strictly controlled to 50Ω, and the line width and spacing are optimized through simulation to avoid signal reflection distortion. The spacing between the 10MHz signal transmission line and the 1PPS and communication signal transmission line should be ≥5mm, and a vertical crossover layout should be adopted to reduce electromagnetic coupling crosstalk. The 10MHz signal, after crosstalk suppression, is output to the time code control module and shortwave timing unit via the backplane connector.

[0017] In a second aspect, this application provides a signal processing system for a rubidium atomic frequency standard, used for applying the signal processing method for the rubidium atomic frequency standard as described in any one of the first aspects, the system comprising: The first state generation module is used to acquire the first output signal of the main rubidium atomic frequency standard, and after level conversion, isolation and amplification of the 10MHz sinusoidal frequency signal of the first output signal, it is sent to the dual threshold amplitude comparison circuit and the frequency standard switching circuit. The first state of the main rubidium atomic frequency standard is monitored through the dual threshold amplitude comparison circuit. The second state generation module is used to synchronously acquire the second output signal of the backup rubidium atomic frequency standard. After isolating and amplifying the 10MHz sinusoidal frequency signal of the second output signal, it is sent to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The second state of the backup rubidium atomic frequency standard is detected by the single threshold amplitude comparison circuit. The validity judgment module is used to perform fusion analysis based on the first state, the second state, and the frequency standard locking signals of the first output signal and the second output signal through preset logic rules to determine the baseline validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard. The switching control signal generation module is used to generate a switching control signal based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, combined with preset primary and backup switching rules. The master / standby switching module is used to control the frequency standard switching circuit to perform master / standby switching between the master rubidium atomic frequency standard and the standby rubidium atomic frequency standard through the switching control signal.

[0018] The signal processing method and system for rubidium atomic frequency standards provided in this application have the following advantages: the main frequency standard adopts a dual-threshold amplitude comparison circuit, and the backup frequency standard adopts a single-threshold amplitude comparison circuit, simultaneously monitoring the signal presence, amplitude validity, and lock status; the dual-threshold detection of the main frequency standard ensures reliability, and the single-threshold detection of the backup frequency standard ensures rapid switching readiness, balancing reliability and switching efficiency; through preset logic rule fusion analysis, combined with the frequency standard lock signal, the validity is comprehensively determined. A control signal is generated based on priority rules. When the main frequency standard is valid, it remains in primary use; when the main frequency standard is invalid and the backup is ready, a high-level pulse synchronized with the zero-crossing point of the 10MHz signal is generated; when both frequency standards fail, an abnormal alarm is triggered, and then the control signal is transmitted to the frequency standard switching circuit via the level conversion subunit, meeting the trigger timing requirements of the high-speed switching module. The zero-crossing synchronization pulse, in conjunction with the high-speed analog switch, ensures rapid switching response while maintaining stability during the switching process, resulting in overall reliability, stability, and strong anti-interference capability. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is one of the flowcharts illustrating a signal processing method for a rubidium atom frequency standard in one embodiment; Figure 2 This is a second flowchart illustrating the signal processing method for rubidium atomic frequency standards in one embodiment; Figure 3 This is the third flowchart illustrating the signal processing method for rubidium atomic frequency standards in one embodiment; Figure 4 This is a flowchart of the signal processing method for rubidium atomic frequency standard in one embodiment; Figure 5 This is the fifth flowchart illustrating the signal processing method for rubidium atomic frequency standards in one embodiment.

[0021] Figure 6 This is a schematic diagram of the signal processing system for a rubidium atomic frequency standard in one embodiment. Detailed Implementation

[0022] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] Example 1 The core value of time synchronization equipment lies in providing microsecond-level or even nanosecond-level time synchronization accuracy. It primarily relies on a 10MHz sinusoidal signal output from a rubidium atomic frequency standard as its reference frequency. However, in environments with strong electromagnetic interference, high-frequency interference and surge impacts can easily cause failures in the rubidium atomic frequency standard output signal, such as signal loss, amplitude attenuation, and lock-state transitions. If the reference frequency interruption or abnormality persists for more than 1μs, subsequent time synchronization errors will exceed the allowable range, directly affecting the success or failure of the task. The rubidium atomic frequency standard output signal exhibits at least three independent failure modes: signal presence failure, amplitude validity failure, and lock-state failure. Furthermore, these three independent failure modes are not entirely positively correlated. This leads to a mismatch between the conventional solution's logic of determining the frequency standard's validity through the lock-state and the actual failure modes. Additionally, the time synchronization system requires a switching delay of <1μs, but existing hardware-level switching, such as relays and ordinary analog switches, typically has a response time >10μs. This creates an irreconcilable contradiction between the existing hardware physical characteristics and the system performance requirements, necessitating a new design solution.

[0024] See Figure 1 As shown, this embodiment provides a signal processing method for rubidium atomic frequency standards, including the following steps: S101. Obtain the first output signal of the main rubidium atomic frequency standard, perform level conversion and isolation amplification on the 10MHz sinusoidal frequency signal of the first output signal, and then send it to the dual threshold amplitude comparison circuit and the frequency standard switching circuit. Monitor the first state of the main rubidium atomic frequency standard through the dual threshold amplitude comparison circuit. In step S101, the first output signal of the main rubidium atomic frequency standard is acquired. The first output signal includes a 10MHz sinusoidal frequency signal, a frequency standard lock signal, a reference 1PPS input signal, and a local 1PPS output signal. The 10MHz sinusoidal frequency signal is level-shifted to adjust the signal to the MCU adaptation level, and isolated and amplified to ensure that the signal quality meets the requirements of subsequent circuits. The preprocessed 10MHz signal is sent to a dual-threshold amplitude comparison circuit and a frequency standard switching circuit. The dual-threshold amplitude comparison circuit monitors in real time whether the signal amplitude is within the threshold range and inputs the first state of the main rubidium atomic frequency standard.

[0025] S102. Synchronously acquire the second output signal of the backup rubidium atomic frequency standard, isolate and amplify the 10MHz sinusoidal frequency signal of the second output signal, and then send it to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The second state of the backup rubidium atomic frequency standard is detected by the single threshold amplitude comparison circuit. In step S102, the second output signal of the backup rubidium atomic frequency standard is acquired synchronously, and the 10MHz sinusoidal frequency signal is directly isolated and amplified. The preprocessed 10MHz signal is sent to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The single threshold amplitude comparison circuit detects whether the signal amplitude meets the standard and outputs the second state of the backup rubidium atomic frequency standard.

[0026] S103. Based on the first state, the second state, and the frequency standard locking signals of the first output signal and the second output signal, perform fusion analysis through preset logic rules to determine the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard. In step S103, the MCU synchronously receives the first state of the primary rubidium atomic frequency standard output by the dual-threshold amplitude comparison circuit, the second state of the backup rubidium atomic frequency standard output by the single-threshold amplitude comparison circuit, and the frequency standard locking signals of both. It performs fusion analysis using preset logic rules, stores the validity result in an internal register, and synchronously outputs it to the switching control signal generation module. Existing technologies rely solely on judging the locking state, which is susceptible to momentary interference leading to misjudgments. They cannot distinguish between genuine failures and temporary fluctuations, and there is no clear priority distinction between primary and backup frequency standards, potentially resulting in invalid switching or a less timely switching. Fusion analysis reduces the misjudgment rate and ensures the accuracy of primary and backup frequency standard validity judgments.

[0027] S104. Based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, and in combination with the preset primary / backup switching rules, generate a switching control signal. In step S104, the MCU reads the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard from its internal registers, and executes the preset primary / backup switching rules for signal transmission. By defining the primary / backup switching logic through the preset rules, the primary frequency standard is given priority, the backup frequency standard takes over promptly, system stability is improved, and the zero-crossing synchronous switching control signal is used to achieve seamless switching.

[0028] S105. The switching control signal controls the frequency standard switching circuit to perform the main rubidium atomic frequency standard and the backup rubidium atomic frequency standard for main and backup switching.

[0029] In step S105, after receiving the switching control signal, the control drive module drives the high-speed switching module through level conversion and power amplification. The high-speed switching module triggers channel switching at the zero-crossing point of the 10MHz signal, switching the output signal from the current frequency standard to another frequency standard. The switched 10MHz signal is then isolated and output to the time code control module and the shortwave timing unit. Sub-microsecond switching is achieved through the high-speed switching module, ensuring uninterrupted reference frequency and meeting the synchronization requirements of the timing equipment.

[0030] The signal processing method for rubidium atomic frequency standards provided in this embodiment has the following advantages: the main frequency standard adopts a dual-threshold amplitude comparison circuit, and the backup frequency standard adopts a single-threshold amplitude comparison circuit, which synchronously monitors the existence, amplitude validity, and lock status of the signal; the dual-threshold detection of the main frequency standard ensures reliability, and the single-threshold detection of the backup frequency standard ensures rapid switching readiness, balancing reliability and switching efficiency; the validity is comprehensively determined by combining the frequency standard lock signal with the fusion analysis through preset logic rules. A control signal is generated based on priority rules. When the main frequency standard is valid, it remains in primary use; when the main frequency standard is invalid and the backup is ready, a high-level pulse synchronized with the zero-crossing point of the 10MHz signal is generated; when both frequency standards fail, an abnormal alarm is triggered, and then the control signal is transmitted to the frequency standard switching circuit through the level conversion subunit to meet the triggering timing requirements of the high-speed switching module. The zero-crossing synchronization pulse works in conjunction with the high-speed analog switch to quickly respond to the switching while ensuring stability during the switching process. The overall system is reliable, stable, and has strong anti-interference capabilities.

[0031] Example 2 This embodiment provides a further technical solution based on Embodiment 1.

[0032] In one embodiment, the first output signal of the main rubidium atomic frequency standard includes a 10MHz sinusoidal frequency signal, a frequency standard locking signal, a reference 1PPS input signal, and a local 1PPS output signal; The second output signal of the backup rubidium atomic frequency standard includes a 10MHz sine frequency signal, a frequency standard lock signal, a reference 1PPS input signal, and a local 1PPS output signal.

[0033] It should be noted that the output signal type of the main rubidium atomic frequency standard is the same as that of the backup rubidium atomic frequency standard, both of which include a 10MHz sine frequency signal, a frequency standard locking signal, a reference 1PPS input signal, and a local 1PPS output signal. However, there are differences between the two in terms of detection standards, priorities, and switching logic.

[0034] Specifically, the rubidium atomic frequency standard generates a stable 10MHz sine wave through its internal rubidium atomic resonant cavity, which serves as the reference frequency source for the timing equipment. The 10MHz signal from the main rubidium atomic frequency standard undergoes level conversion and isolation amplification before being distributed to the dual-threshold amplitude comparison circuit and the frequency standard switching circuit. The 10MHz signal from the backup rubidium atomic frequency standard undergoes isolation amplification before being distributed to the single-threshold amplitude comparison circuit and the frequency standard switching circuit. The main frequency standard uses dual-threshold detection to ensure high signal reliability, while the backup frequency standard uses single-threshold detection to prioritize and ensure rapid switching readiness.

[0035] Specifically, the lock signal reflects the internal state of the frequency standard and, together with the amplitude signal, constitutes the basis for multi-dimensional validity judgment.

[0036] Specifically, the reference 1PPS is input from an external time source and is used to calibrate the local time of the rubidium atomic frequency standard. Both the primary and backup frequency standards receive the same reference 1PPS, compare it with the local 1PPS through an internal counter, calculate the time difference, and dynamically adjust the rubidium clock control voltage.

[0037] Specifically, the rubidium atomic frequency standard divides the 10MHz signal to generate a local 1PPS, which is used as the time reference output of the time synchronization device.

[0038] In one embodiment, the dual-threshold amplitude comparison circuit includes a first comparison unit and a second comparison unit. The reference level of the first comparison unit is a preset high amplitude threshold, which corresponds to the upper limit of the highest effective amplitude of the main rubidium atomic frequency standard. The reference level of the second comparison unit is a preset low amplitude threshold, which corresponds to the lower limit of the lowest effective amplitude of the main rubidium atomic frequency standard. When the amplitude of the 10MHz sine frequency signal of the first output signal is higher than the preset high amplitude threshold or lower than the preset low amplitude threshold, the first state is output to the MCU as invalid. When the amplitude of the 10MHz sine frequency signal of the first output signal is between the preset high amplitude threshold and the preset low amplitude threshold, the first state is output to the MCU as valid. The MCU combines the first state with the frequency standard locking signal of the main rubidium atomic frequency standard to determine the reference validity of the main rubidium atomic frequency standard.

[0039] It should be noted that the dual-threshold amplitude comparison circuit includes a first comparison unit and a second comparison unit, which operate in parallel. They are compared in real-time with the 10MHz sinusoidal frequency signal of the main rubidium atomic frequency standard. The 10MHz sinusoidal frequency signal of the main rubidium atomic frequency standard, after level conversion and isolation amplification, is sent to the dual-threshold amplitude comparison circuit and the frequency standard switching circuit. The two comparison units compare the signal amplitude with the high and low thresholds respectively, outputting the first state. The MCU combines the output of the dual-threshold amplitude comparison circuit with the frequency standard locking signal of the main rubidium atomic frequency standard, and comprehensively judges the validity of the reference through preset logic rules. When the signal amplitude is between the high and low thresholds, such as 0.8Vpp≤amplitude≤5Vpp and the frequency standard locking signal is high, it is determined to be valid. When the signal amplitude is higher than the high threshold (e.g., electromagnetic interference causing signal overshoot) or lower than the low threshold (e.g., signal attenuation or loss) or the frequency standard is not locked, it is determined to be invalid. This embodiment adapts to signal fluctuations in complex electromagnetic environments, ensuring the accuracy and timeliness of main / backup switching.

[0040] In one embodiment, the single threshold amplitude comparison circuit includes a third comparison unit, the reference level of which is a preset ready amplitude threshold, the preset ready amplitude threshold corresponding to the minimum effective amplitude requirement of the spare rubidium atomic frequency standard; When the amplitude of the 10MHz sine frequency signal of the second output signal is higher than the preset ready amplitude threshold, the second state is output to the MCU as ready for switching. When the amplitude of the 10MHz sinusoidal frequency signal of the second output signal is lower than the preset ready amplitude threshold, the second state is output to the MCU as not ready. The MCU combines the second state with the frequency standard locking signal of the backup rubidium atomic frequency standard to determine the validity of the switching readiness of the backup rubidium atomic frequency standard.

[0041] It should be noted that the single-threshold amplitude comparison circuit is a detection module for the switch readiness validity of the backup rubidium atomic frequency standard signal. It can quickly respond and locate, and achieve efficient judgment of signal amplitude through single-channel detection. However, the threshold amplitude comparison circuit includes a third comparison unit, whose reference level is a preset ready amplitude threshold, corresponding to the minimum effective amplitude requirement of the backup rubidium atomic frequency standard. The preset ready amplitude threshold is determined by the minimum receiving threshold and signal attenuation margin of the subsequent unit, ensuring that the backup frequency standard signal can still be effectively recognized when it is transmitted to the time code control module. The 10MHz sinusoidal frequency signal of the backup rubidium atomic frequency standard is isolated and amplified before being distributed to the single-threshold amplitude comparison circuit and the frequency standard switching circuit. The third comparison unit compares the signal amplitude with the preset ready amplitude threshold and outputs a second state, switch ready / not ready, to the MCU. The MCU combines the output of the single-threshold amplitude comparison circuit with the frequency standard locking signal of the backup rubidium atomic frequency standard, and comprehensively judges the switch readiness validity through preset logic rules.

[0042] In this embodiment, the single-channel detection logic simplifies the signal processing flow and reduces detection delay, ensuring that the backup frequency standard can respond immediately when the main frequency standard fails. It continuously verifies and further filters transient interference, improving the stability of the judgment results. Even in an electromagnetic interference environment, it can still accurately identify valid signals, ensuring that the backup frequency standard signal meets the reception requirements of subsequent units. Combined with the isolation amplifier circuit, it improves the signal-to-noise ratio. It ensures master-slave switching and, in conjunction with the high-speed switching module, achieves sub-microsecond seamless switching, ensuring the time continuity of the timing equipment.

[0043] In one embodiment, the frequency standard switching circuit includes a high-speed switching module and a control drive module; The control drive module receives the switching control signal generated by the MCU and drives the high-speed switching module through level conversion and power amplification. The high-speed switching module uses high-speed analog switching devices to ensure a switching response time of less than 1μs. The input terminal of the high-speed switching module simultaneously receives 10MHz sinusoidal frequency signals from the main rubidium atomic frequency standard and the backup rubidium atomic frequency standard, and the output terminal of the high-speed switching module is connected to the isolation amplifier circuit. When the switching control signal is triggered, the high-speed switching module will seamlessly switch the output signal from the current frequency standard to another frequency standard, and output it to the time code control module and the shortwave timing unit through the isolation amplifier circuit to ensure that the signal is stable and faithful during the switching process.

[0044] It should be noted that the switching control signal generated by the MCU is received and converted into a drive level compatible with the high-speed switching module through a level conversion circuit. At the same time, the drive capability is enhanced through a power amplifier circuit to ensure that the signal can drive the high-speed analog switch. In conjunction with the zero-crossing detection subunit built into the high-speed switching module, the switching control signal is synchronized with the zero-crossing time of the 10MHz sine wave signal to avoid distortion caused by sudden changes in signal phase at the moment of switching.

[0045] In one embodiment, the GaAs high-speed analog switch of the high-speed switching module has a cutoff frequency ≥1GHz and an on-resistance ≤5Ω. The GaAs high-speed analog switch has a built-in zero-crossing detection subunit, which samples the voltage value of a 10MHz sinusoidal frequency signal in real time and identifies the zero-crossing time of the signal. After receiving the switching control signal from the MCU, the control drive module performs timing matching with the synchronization pulse output by the zero-crossing detection subunit, and triggers the channel switching of the GaAs high-speed analog switch at the zero-crossing moment of the 10MHz signal. The control drive module outputs a switching control pulse with a width of nanoseconds to drive the GaAs high-speed analog switch to complete the seamless switching of the channel. The response time of the seamless switching is ≤0.5μs, and the phase jump of the signal during the switching process is ≤0.1° and the amplitude change is ≤3%.

[0046] It should be noted that the built-in zero-crossing detection subunit samples the voltage value of the 10MHz sine wave signal in real time and identifies the moment when the signal crosses zero. The control and drive module matches the MCU's switching control signal with the zero-crossing synchronization pulse to ensure that the channel switching is triggered at the signal's zero-crossing point, avoiding distortion caused by sudden changes in signal phase at the moment of switching. At the same time, it meets the timing system's performance requirement of switching delay <1μs and avoids exceeding the error limit.

[0047] Example 3 This embodiment provides a further technical solution based on Embodiment 1 or Embodiment 2.

[0048] In one embodiment, the 10MHz signal processed by the frequency standard switching circuit is processed by the isolation amplifier circuit. The isolation amplifier circuit uses a wideband isolation transformer and a low-noise operational amplifier cascaded together. The bandwidth of the wideband isolation transformer is ≥200MHz and the turns ratio is 1:1. The noise figure of the low-noise operational amplifier is ≤1dB and the output impedance is matched to 50Ω to be consistent with the impedance of the backplane transmission line. The time code control module has a built-in phase-locked loop (PLL) circuit with a loop bandwidth of 1MHz. It performs fast phase locking on the 10MHz signal after it has been processed by the frequency standard switching circuit, with a locking time of ≤10μs, to ensure the continuous stability of the clock signal. The shortwave timing unit uses a low-jitter clock buffer to perform multi-channel replication of the input 10MHz signal, maintaining the signal amplitude fluctuation ≤±2% and phase deviation ≤1° to achieve signal fidelity.

[0049] It should be noted that electrical isolation between input and output signals effectively blocks ground loop interference and common-mode noise, improving the signal-to-noise ratio. Operational amplifiers with a noise figure ≤1dB further suppress circuit noise, ensuring the purity of the output signal and meeting the reference frequency requirements of the timing equipment. Output impedance matching to 50Ω avoids signal reflection distortion, ensuring that the amplitude fluctuation of the 10MHz signal during backplane transmission is ≤±2% and the phase deviation is ≤1°, providing a stable clock reference for subsequent modules. This ensures the clock signal remains uninterrupted and distortion-free after switching, meeting the timing continuity requirements of the timing equipment. A low-jitter clock buffer is used to replicate the input 10MHz signal across multiple channels, maintaining amplitude fluctuation ≤±2% and phase deviation ≤1°, ensuring the signal received by the shortwave timing unit is consistent with the original signal and avoiding timing errors caused by signal distortion. A fast-locking PLL ensures uninterrupted clock signal after switching, and the low-jitter buffer guarantees the consistency of multi-channel signals, preventing system failures due to signal distortion.

[0050] In one embodiment, see Figure 2As shown, the steps for determining the baseline validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard through fusion analysis using preset logical rules include: S301, the MCU synchronously receives the main frequency standard amplitude status signal and the main rubidium atomic frequency standard frequency standard locking signal output by the dual threshold amplitude comparison circuit; In step S301, the MCU synchronously receives the main frequency standard amplitude status signal output by the dual threshold amplitude comparison circuit and the frequency standard locking signal output by the main rubidium atomic frequency standard itself. By synchronously receiving the amplitude status and locking status, it covers the three independent failure modes of the main frequency standard: signal loss, amplitude attenuation, and unlocking.

[0051] S302. The first continuous verification is triggered if and only if the main frequency standard amplitude state is valid and the frequency standard lock signal is locked. In step S302, the MCU triggers the first continuous verification if and only if the main frequency standard amplitude state is valid and the frequency standard lock signal is locked, thereby filtering out the truly stable main frequency standard state, avoiding false verification caused by transient interference, and improving the accuracy of judgment.

[0052] S303 and MCU perform consistency checks for three consecutive sampling cycles. If the first continuous verification trigger condition is met for all three consecutive sampling cycles, the reference validity of the main rubidium atomic frequency standard is determined to be valid; otherwise, it is determined to be invalid. In step S303, the MCU performs a consistency check on the trigger condition for three consecutive sampling cycles. If all cycles meet the conditions of valid amplitude and locked, the main frequency standard reference is determined to be valid; otherwise, it is invalid. Transient interference can cause brief signal anomalies. Directly determining validity can easily lead to erroneous switching and affect system continuity. By performing multi-cycle consistency checks, transient interference is filtered out, improving the accuracy of main frequency standard validity judgment and ensuring that only long-term stable frequency standards are determined to be valid.

[0053] S304, the MCU synchronously receives the backup frequency standard amplitude status signal and the backup rubidium atomic frequency standard frequency standard locking signal output by the single threshold amplitude comparison circuit; In step S304, the MCU synchronously receives the backup frequency standard amplitude status signal output by the single threshold amplitude comparison circuit and the frequency standard locking signal output by the backup rubidium atomic frequency standard itself. The single threshold amplitude comparison circuit compares the amplitude of the backup frequency standard 10MHz signal with a preset ready threshold and outputs the amplitude status. The frequency standard locking signal reflects whether the backup frequency standard is in a locked state.

[0054] S305. The second continuous verification is triggered if and only if the backup frequency standard amplitude status signal is ready and the frequency standard lock signal is locked. In step S305, the MCU triggers the second continuous verification if and only if the backup frequency standard amplitude status is ready and the frequency standard lock signal is locked. This condition is based on the rapid switching requirement of the backup frequency standard, reduces the amplitude threshold requirement, prioritizes the switching readiness, and ensures that the backup frequency standard can switch quickly when the main frequency standard fails through a relaxed trigger condition, while avoiding false switching caused by excessively low detection standards.

[0055] S306 and MCU perform consistency checks for two consecutive sampling cycles. If the triggering condition of the second continuous verification is met for both consecutive sampling cycles, the switching readiness of the spare rubidium atom is determined to be ready; otherwise, it is determined to be not ready. In step S306, by shortening the detection cycle, it is ensured that the backup frequency standard can be quickly switched when the main frequency standard fails. At the same time, transient interference is filtered out through consistency detection to improve the reliability of switching.

[0056] S307 and MCU store the reference validity result of the main rubidium atomic frequency standard and the switching readiness validity result of the backup rubidium atomic frequency standard into the internal register, and output them synchronously to the switching control signal generation module as the basis for the main / backup switching.

[0057] In step S307, register storage and synchronous output ensure that the switching control module can obtain the validity information of the primary and backup frequency standards in real time and accurately.

[0058] In this embodiment, the switching control module generates a primary frequency hold signal to ensure the system uses the primary frequency standard as a reference, avoiding unnecessary switching. When the primary frequency standard is invalid and the backup frequency standard is ready, the switching control module generates a switch to backup signal, triggering the high-speed switching module to complete the switch within <1μs, ensuring the continuity of the reference frequency. When the primary frequency standard is invalid and the backup frequency standard is not ready, the switching control module generates a current state hold signal and triggers an abnormal alarm to avoid switching failure due to the backup frequency standard not being ready.

[0059] In one embodiment, see Figure 3 As shown, the step of generating a switching control signal based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, combined with preset primary / backup switching rules, includes: S401, the MCU reads the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard from the status register. The reference validity of the main rubidium atomic frequency standard includes valid and invalid. The reference validity of the main rubidium atomic frequency standard is pre-stored after fusion analysis by a dual threshold amplitude comparison circuit and a frequency standard locking signal. The switching readiness validity of the backup rubidium atomic frequency standard includes ready and not ready. The switching readiness validity of the backup rubidium atomic frequency standard is pre-stored after fusion analysis by a single threshold amplitude comparison circuit and a frequency standard locking signal. S402, the MCU executes the following preset master / slave switching rules: Priority 1: When the reference validity of the main rubidium atomic frequency standard is valid, the MCU generates a main control signal to maintain a low level output. Priority 2: When the reference validity of the main rubidium atomic frequency standard is invalid and the switching readiness validity of the backup rubidium atomic frequency standard is ready, the MCU generates a switch to backup control signal. The switch to backup control signal is synchronized with the zero-crossing time of the 10MHz sine wave signal through a high-level pulse. Priority 3: When the reference validity of the main rubidium atomic frequency standard is invalid and the switching readiness validity of the backup rubidium atomic frequency standard is not ready, the MCU generates a current state control signal and triggers an abnormal alarm signal. The current state control signal is continuously output at a low level, and the abnormal alarm signal is continuously output at a high level until at least one frequency standard state returns to normal. In step S402, at priority 1, the primary frequency standard is maintained. When the primary frequency standard is valid, a low-level continuous output control signal is generated to maintain the primary frequency standard as a reference. At priority 2, the backup frequency standard is switched. When the primary frequency standard is invalid and the backup frequency standard is ready, a high-level pulse switching signal synchronized with the zero-crossing point of the 10MHz signal is generated to achieve seamless switching at the sub-microsecond level. At priority 3, anomaly handling is performed. When the primary frequency standard is invalid and the backup frequency standard is not ready, a low-level holding signal is generated and a high-level anomaly alarm is triggered.

[0060] The S403 and MCU transmit the generated switching control signal to the control drive module of the frequency standard switching circuit through the internal level conversion subunit to meet the trigger timing requirements of the high-speed switching module.

[0061] In step S403, the control signal generated by the MCU is converted into a 5V CMOS level by the internal level conversion subunit and transmitted to the control drive module of the frequency standard switching circuit to meet the trigger timing requirements of the high-speed switching module.

[0062] In this embodiment, the primary control signal is maintained to ensure that the primary frequency standard outputs a stable 10MHz reference signal. The switch is made to the zero-crossing synchronization of the backup control signal, so that the signal phase jump is ≤0.1° during the switching process. Invalid switching is avoided through priority, and the accumulation of synchronization error is avoided. The abnormal alarm mechanism triggers fault handling in a timely manner, reducing the system interruption time caused by the failure of dual frequency standards.

[0063] In one embodiment, see Figure 4 As shown, after the steps of determining the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, the method further includes the following steps: S3011. The SPI interface is used as the status data transmission interface between the MCU and the FPGA. The SPI clock frequency is set to 10MHz and synchronized with the 10MHz frequency standard signal to ensure that the transmission timing is consistent with the period of the frequency standard signal. Before the S3012 MCU sends status data, it outputs a 1μs wide synchronous trigger pulse to the FPGA through a dedicated GPIO pin. After receiving the trigger pulse, the FPGA returns an acknowledgment pulse after an internal 10ns delay. After receiving the acknowledgment pulse, the MCU sends a 16-bit status data frame containing the validity of the main frequency standard reference, the validity of the backup frequency standard switching readiness, and an exception indicator, and attaches a CRC-16 checksum. S3013. An 8-level deep FIFO buffer is set up inside the FPGA to temporarily store the status data sent by the MCU, ensuring that the timecode control module reads data without gaps.

[0064] It should be noted that the SPI interface is used as the status data transmission interface between the MCU and the FPGA. The SPI clock frequency is set to 10MHz and synchronized with the 10MHz reference signal output by the rubidium atomic frequency standard. Before the MCU sends status data, it outputs a 1μs wide synchronization trigger pulse to the FPGA through a dedicated GPIO pin as a preparatory signal for data transmission. The FPGA internally sets up an 8-level deep FIFO buffer to temporarily store the status data sent by the MCU. In this embodiment, the synchronization ensures that the SPI transmission timing is completely consistent with the period of the frequency standard signal, avoiding data transmission misalignment or loss of synchronization due to clock asynchrony, and ensuring the real-time performance and accuracy of the status data. The FIFO buffer can solve the data transmission rate difference between the MCU and the FPGA, ensuring that the time code control module reads data without gaps and avoiding clock synchronization errors caused by missing data.

[0065] In one embodiment, see Figure 5 As shown, after the step of controlling the frequency standard switching circuit to perform the master-slave switching of the master rubidium atomic frequency standard and the backup rubidium atomic frequency standard through the switching control signal, the method further includes the following step: S5011. Microstrip lines with copper foil shielding layers are used as backplane transmission lines, and the shielding layer is grounded at multiple points to suppress electromagnetic radiation crosstalk. In step S5011, the shielding layer reflects high-frequency interference, which attenuates external interference to the transmission line; multiple grounding points reduce the grounding resistance, reduce the residual interference current on the shielding layer, further suppress crosstalk, and avoid external interference causing a decrease in the signal-to-noise ratio of the 10MHz signal.

[0066] S5012: A 100Ω high-precision resistor is connected in series at the input end and a 10nF high-frequency ceramic capacitor is connected in parallel at the output end of the microstrip line to form an RC low-pass filter network to suppress high-frequency crosstalk signals. In step S5012, high-frequency interference such as switching noise and clock harmonics on the backplane are effectively filtered to reduce signal reflection.

[0067] S5013: The characteristic impedance of the transmission line is strictly controlled to 50Ω. The line width and spacing are optimized through simulation to avoid signal reflection distortion. In step S5013, the linewidth and spacing of the microstrip lines are optimized using simulation tools to strictly control the characteristic impedance of the transmission line to 50Ω. Impedance matching can prevent signal reflection at both ends of the transmission line and reduce signal distortion.

[0068] S5014. Ensure that the distance between the 10MHz signal transmission line and the 1PPS communication signal transmission line is ≥5mm, and adopt a vertical crossover layout to reduce electromagnetic coupling crosstalk. In step S5014, the spacing between the 10MHz signal transmission line and the 1PPS and communication signal transmission line is ≥5mm, and a vertical crossover layout is adopted. The spacing isolation reduces the capacitive coupling of parallel lines, the vertical crossover layout reduces inductive coupling, suppresses electromagnetic coupling crosstalk, and reduces the length of the transmission line, thereby reducing signal delay.

[0069] S5015, the 10MHz signal after crosstalk suppression is output to the time code control module and shortwave timing unit through the backplane connector.

[0070] In step S5015, the low contact resistance of the connector ensures that the signal attenuation is ≤0.1dB, which meets the signal amplitude requirements of the timing components. The backplane connector is compatible with multiple modules, enabling flexible signal distribution.

[0071] In this embodiment, the backplane transmission anti-crosstalk processing avoids crosstalk problems of 10MHz signals in backplane transmission from the physical layer through hardware-level shielding, filtering, impedance matching and layout optimization, ensuring signal integrity and reliability, system anti-interference capability and environmental adaptability.

[0072] Example 4 See Figure 6 As shown, this application provides a signal processing system for a rubidium atomic frequency standard, used for applying the signal processing method for the rubidium atomic frequency standard as described in any one of the first aspects, the system comprising: The first state generation module 100 is used to acquire the first output signal of the main rubidium atomic frequency standard, and after level conversion and isolation amplification of the 10MHz sinusoidal frequency signal of the first output signal, it is sent to the dual threshold amplitude comparison circuit and the frequency standard switching circuit. The first state of the main rubidium atomic frequency standard is monitored through the dual threshold amplitude comparison circuit. The second state generation module 200 is used to synchronously acquire the second output signal of the backup rubidium atomic frequency standard, and after isolating and amplifying the 10MHz sinusoidal frequency signal of the second output signal, it is sent to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The second state of the backup rubidium atomic frequency standard is detected by the single threshold amplitude comparison circuit. The validity judgment module 300 is used to perform fusion analysis based on the first state, the second state, and the frequency standard locking signals of the first output signal and the second output signal through preset logic rules to determine the baseline validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard. The switching control signal generation module 400 is used to generate a switching control signal based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, combined with preset primary and backup switching rules. The master / standby switching module 500 is used to control the frequency standard switching circuit to perform master / standby switching between the master rubidium atomic frequency standard and the standby rubidium atomic frequency standard through the switching control signal.

[0073] This embodiment provides a signal processing system for rubidium atomic frequency standards, which has the following advantages: the main frequency standard adopts a dual-threshold amplitude comparison circuit, while the backup frequency standard adopts a single-threshold amplitude comparison circuit, synchronously monitoring signal presence, amplitude validity, and lock status; dual-threshold detection of the main frequency standard ensures reliability, while single-threshold detection of the backup frequency standard ensures rapid switching readiness, balancing reliability and switching efficiency; through preset logic rule fusion analysis, combined with the frequency standard lock signal, the validity is comprehensively determined. A control signal is generated based on priority rules. When the main frequency standard is valid, it remains in primary use; when the main frequency standard is invalid and the backup is ready, a high-level pulse synchronized with the zero-crossing point of the 10MHz signal is generated; when both frequency standards fail, an abnormal alarm is triggered, and then the control signal is transmitted to the frequency standard switching circuit via the level conversion subunit, meeting the trigger timing requirements of the high-speed switching module. The zero-crossing synchronization pulse, in conjunction with the high-speed analog switch, ensures rapid switching response while maintaining stability during the switching process, resulting in overall reliability, stability, and strong anti-interference capability.

[0074] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0075] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A signal processing method for rubidium atomic frequency standards, characterized in that, Including the following steps: The first output signal of the main rubidium atomic frequency standard is obtained. After the 10MHz sinusoidal frequency signal of the first output signal is level-converted and isolated and amplified, it is sent to the dual threshold amplitude comparison circuit and the frequency standard switching circuit. The first state of the main rubidium atomic frequency standard is monitored through the dual threshold amplitude comparison circuit. The second output signal of the backup rubidium atomic frequency standard is acquired synchronously. After isolating and amplifying the 10MHz sinusoidal frequency signal of the second output signal, it is sent to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The second state of the backup rubidium atomic frequency standard is detected by the single threshold amplitude comparison circuit. Based on the first state, the second state, and the frequency standard locking signals of the first output signal and the second output signal, a fusion analysis is performed through preset logic rules to determine the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard. The step of performing fusion analysis through preset logic rules to determine the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard includes: the MCU synchronously receiving the main frequency standard amplitude status signal and the frequency standard locking signal of the main rubidium atomic frequency standard output by the dual threshold amplitude comparison circuit; The first continuous verification is triggered only when the main frequency standard amplitude status is valid and the frequency standard lock signal is locked; the MCU performs consistency checks for three consecutive sampling cycles. If the first continuous verification trigger condition is met for all three consecutive sampling cycles, the reference validity of the main rubidium atom frequency standard is determined to be valid; otherwise, it is determined to be invalid; the MCU synchronously receives the backup frequency standard amplitude status signal and the backup rubidium atom frequency standard lock signal output by the single threshold amplitude comparison circuit; the second continuous verification is triggered only when the backup frequency standard amplitude status signal is ready and the frequency standard lock signal is locked; the MCU performs consistency checks for two consecutive sampling cycles. If the second continuous verification trigger condition is met for both two consecutive sampling cycles, the switching readiness validity of the backup rubidium atom is determined to be ready; otherwise, it is determined to be not ready; the MCU stores the reference validity result of the main rubidium atom frequency standard and the switching readiness validity result of the backup rubidium atom frequency standard in the internal register and synchronously outputs them to the switching control signal generation module as the basis for main / backup switching; Based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, a switching control signal is generated in combination with the preset primary / backup switching rules; The switching control signal controls the frequency standard switching circuit to perform the master-slave switching between the master rubidium atomic frequency standard and the backup rubidium atomic frequency standard.

2. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that: The first output signal of the main rubidium atomic frequency standard includes a 10MHz sinusoidal frequency signal, a frequency standard locking signal, a reference 1PPS input signal, and a local 1PPS output signal; The second output signal of the backup rubidium atomic frequency standard includes a 10MHz sine frequency signal, a frequency standard lock signal, a reference 1PPS input signal, and a local 1PPS output signal.

3. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that: The dual-threshold amplitude comparison circuit includes a first comparison unit and a second comparison unit. The reference level of the first comparison unit is a preset high amplitude threshold, which corresponds to the upper limit of the highest effective amplitude of the main rubidium atomic frequency standard. The reference level of the second comparison unit is a preset low amplitude threshold, which corresponds to the lower limit of the lowest effective amplitude of the main rubidium atomic frequency standard. When the amplitude of the 10MHz sine frequency signal of the first output signal is higher than the preset high amplitude threshold or lower than the preset low amplitude threshold, the first state is output to the MCU as invalid. When the amplitude of the 10MHz sine frequency signal of the first output signal is between the preset high amplitude threshold and the preset low amplitude threshold, the first state is output to the MCU as valid. The MCU combines the first state with the frequency standard locking signal of the main rubidium atomic frequency standard to determine the reference validity of the main rubidium atomic frequency standard.

4. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that: The single threshold amplitude comparison circuit includes a third comparison unit, the reference level of which is a preset ready amplitude threshold, and the preset ready amplitude threshold corresponds to the minimum effective amplitude requirement of the spare rubidium atomic frequency standard. When the amplitude of the 10MHz sine frequency signal of the second output signal is higher than the preset ready amplitude threshold, the second state is output to the MCU as ready for switching. When the amplitude of the 10MHz sine frequency signal of the second output signal is lower than the preset ready amplitude threshold, the second state is output to the MCU as not ready. The MCU combines the second state with the frequency standard locking signal of the backup rubidium atomic frequency standard to determine the validity of the switching readiness of the backup rubidium atomic frequency standard.

5. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that, The frequency standard switching circuit includes a high-speed switching module and a control drive module; The control drive module receives the switching control signal generated by the MCU and drives the high-speed switching module through level conversion and power amplification. The high-speed switching module uses high-speed analog switching devices to ensure a switching response time of less than 1μs. The input terminal of the high-speed switching module simultaneously receives 10MHz sinusoidal frequency signals from the main rubidium atomic frequency standard and the backup rubidium atomic frequency standard, and the output terminal of the high-speed switching module is connected to the isolation amplifier circuit. When the switching control signal is triggered, the high-speed switching module will seamlessly switch the output signal from the current frequency standard to another frequency standard, and output it to the time code control module and the shortwave timing unit through the isolation amplifier circuit to ensure that the signal is stable and faithful during the switching process.

6. The signal processing method for rubidium atomic frequency standards according to claim 5, characterized in that: The high-speed switching module has a GaAs high-speed analog switch cutoff frequency ≥1GHz and an on-resistance ≤5Ω. The GaAs high-speed analog switch has a built-in zero-crossing detection subunit, which samples the voltage value of a 10MHz sinusoidal frequency signal in real time and identifies the zero-crossing time of the signal. After receiving the switching control signal from the MCU, the control drive module performs timing matching with the synchronization pulse output by the zero-crossing detection subunit, and triggers the channel switching of the GaAs high-speed analog switch at the zero-crossing moment of the 10MHz signal. The control drive module outputs a switching control pulse with a width of nanoseconds to drive the GaAs high-speed analog switch to complete the seamless switching of the channel. The response time of the seamless switching is ≤0.5μs, and the phase jump of the signal during the switching process is ≤0.1° and the amplitude change is ≤3%.

7. The signal processing method for rubidium atomic frequency standards according to claim 5, characterized in that: The 10MHz signal after being processed by the frequency standard switching circuit is processed by the isolation amplifier circuit. The isolation amplifier circuit uses a wideband isolation transformer and a low-noise operational amplifier cascaded together. The bandwidth of the wideband isolation transformer is ≥200MHz and the turns ratio is 1:

1. The noise figure of the low-noise operational amplifier is ≤1dB and the output impedance is matched to 50Ω to be consistent with the impedance of the backplane transmission line. The time code control module has a built-in phase-locked loop (PLL) circuit with a loop bandwidth of 1MHz. It performs fast phase locking on the 10MHz signal after it has been processed by the frequency standard switching circuit, with a locking time of ≤10μs, to ensure the continuous stability of the clock signal. The shortwave timing unit uses a low-jitter clock buffer to perform multi-channel replication of the input 10MHz signal, maintaining the signal amplitude fluctuation ≤±2% and phase deviation ≤1° to achieve signal fidelity.

8. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that: The step of generating a switching control signal based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, combined with preset primary / backup switching rules, includes: The MCU reads the reference validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard from the status register. The reference validity of the main rubidium atomic frequency standard includes valid and invalid. The reference validity of the main rubidium atomic frequency standard is pre-stored after fusion analysis through a dual threshold amplitude comparison circuit and a frequency standard locking signal. The switching readiness validity of the backup rubidium atomic frequency standard includes ready and not ready. The switching readiness validity of the backup rubidium atomic frequency standard is pre-stored after fusion analysis through a single threshold amplitude comparison circuit and a frequency standard locking signal. The MCU executes the following preset master / slave switchover rules: Priority 1: When the reference validity of the main rubidium atomic frequency standard is valid, the MCU generates a main control signal to maintain a low level output. Priority 2: When the reference validity of the main rubidium atomic frequency standard is invalid and the switching readiness validity of the backup rubidium atomic frequency standard is ready, the MCU generates a switch to backup control signal. The switch to backup control signal is synchronized with the zero-crossing time of the 10MHz sine wave signal through a high-level pulse. Priority 3: When the reference validity of the main rubidium atomic frequency standard is invalid and the switching readiness validity of the backup rubidium atomic frequency standard is not ready, the MCU generates a current state control signal and triggers an abnormal alarm signal. The current state control signal is continuously output at a low level, and the abnormal alarm signal is continuously output at a high level until at least one frequency standard state returns to normal. The MCU generates a switching control signal and transmits it to the control drive module of the frequency standard switching circuit via an internal level conversion subunit to meet the trigger timing requirements of the high-speed switching module.

9. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that: Following the steps of determining the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, the method further includes the following steps: The SPI interface is used as the status data transmission interface between the MCU and the FPGA. The SPI clock frequency is set to 10MHz and synchronized with the 10MHz frequency standard signal to ensure that the transmission timing is consistent with the period of the frequency standard signal. Before the MCU sends status data, it outputs a 1μs wide synchronous trigger pulse to the FPGA through a dedicated GPIO pin. After receiving the trigger pulse, the FPGA returns an acknowledgment pulse after an internal 10ns delay. After receiving the acknowledgment pulse, the MCU sends a 16-bit status data frame containing the validity of the main frequency standard reference, the validity of the backup frequency standard switching readiness, and an exception indicator, and attaches a CRC-16 checksum. An 8-level deep FIFO buffer is set up inside the FPGA to temporarily store the status data sent by the MCU, ensuring that the timecode control module reads data without gaps.

10. The signal processing method for rubidium atomic frequency standards according to claim 1, characterized in that: After the step of controlling the frequency standard switching circuit to perform the master-slave switching of the master rubidium atomic frequency standard and the backup rubidium atomic frequency standard through the switching control signal, the method further includes the following step: Microstrip lines with copper foil shielding are used as backplane transmission lines, and the shielding layer is grounded at multiple points to suppress electromagnetic radiation crosstalk. A 100Ω high-precision resistor and a 10nF high-frequency ceramic capacitor are connected in series at the input and output ends of the microstrip line, respectively, to form an RC low-pass filter network to suppress high-frequency crosstalk signals. The characteristic impedance of the transmission line is strictly controlled to 50Ω, and the line width and spacing are optimized through simulation to avoid signal reflection distortion. The spacing between the 10MHz signal transmission line and the 1PPS and communication signal transmission line should be ≥5mm, and a vertical crossover layout should be adopted to reduce electromagnetic coupling crosstalk. The 10MHz signal, after crosstalk suppression, is output to the time code control module and shortwave timing unit via the backplane connector.

11. A signal processing system for a rubidium atomic frequency standard, characterized in that, A signal processing method for applying the rubidium atomic frequency standard as described in any one of claims 1 to 10, the system comprising: The first state generation module is used to acquire the first output signal of the main rubidium atomic frequency standard, and after level conversion, isolation and amplification of the 10MHz sinusoidal frequency signal of the first output signal, it is sent to the dual threshold amplitude comparison circuit and the frequency standard switching circuit. The first state of the main rubidium atomic frequency standard is monitored through the dual threshold amplitude comparison circuit. The second state generation module is used to synchronously acquire the second output signal of the backup rubidium atomic frequency standard. After isolating and amplifying the 10MHz sinusoidal frequency signal of the second output signal, it is sent to the single threshold amplitude comparison circuit and the frequency standard switching circuit. The second state of the backup rubidium atomic frequency standard is detected by the single threshold amplitude comparison circuit. The validity judgment module is used to perform fusion analysis based on the first state, the second state, and the frequency standard locking signals of the first output signal and the second output signal through preset logic rules to determine the baseline validity of the main rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard. The switching control signal generation module is used to generate a switching control signal based on the reference validity of the primary rubidium atomic frequency standard and the switching readiness validity of the backup rubidium atomic frequency standard, combined with preset primary and backup switching rules. The master / standby switching module is used to control the frequency standard switching circuit to perform master / standby switching between the master rubidium atomic frequency standard and the standby rubidium atomic frequency standard through the switching control signal.

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