Common-mode feedback circuit of fully differential operational amplifier based on transconductance linear loop and fully differential operational amplifier

Abstract

This invention discloses a common-mode feedback circuit for a fully differential operational amplifier based on a transconductance linear loop and a fully differential operational amplifier, belonging to the field of operational amplifier technology. This invention is applied to a fully differential operational amplifier, including a common-mode voltage detection amplifier, an output voltage divider unit, and a feedback signal input unit. The common-mode voltage detection amplifier converts the difference between the detected common-mode voltage at the differential output terminal of the fully differential operational amplifier and the target common-mode reference voltage into a differential current signal. This signal is then converted into a feedback control voltage by the output voltage divider unit and input to the gain stage front end of the fully differential operational amplifier via the feedback signal input unit, forming a negative feedback closed loop. This invention embeds the common-mode feedback circuit into the main gain loop, leveraging the high gain of the main operational amplifier to enhance the feedback depth. This achieves high-bandwidth, high-linearity, and precise common-mode control of the output with low quiescent power consumption, while simplifying the circuit structure and improving the operational stability of the fully differential operational amplifier under various non-ideal operating conditions.

Description

Technical Field

[0001] This invention belongs to the field of operational amplifier technology, specifically relating to a common-mode feedback circuit for a fully differential operational amplifier based on a transconducting linear loop and a fully differential operational amplifier. Background Technology

[0002] Fully differential operational amplifiers are core analog devices in systems such as high-speed data acquisition and high-precision analog-to-digital conversion drives. Stable control of the output common-mode level is a key indicator determining their DC accuracy, dynamic performance, and signal integrity. To avoid problems such as output signal overswing and operating point offset in subsequent circuits, the industry commonly employs a common-mode feedback loop design. This design detects the output common-mode level, compares it with a reference voltage, and then adjusts internal nodes via negative feedback to achieve common-mode level locking.

[0003] For H-bridge fully differential operational amplifiers, traditional common-mode feedback schemes employ an independent loop architecture of "common-mode detection - error amplification - output compensation." This involves processing the common-mode error signal through an independent error amplifier circuit and inputting a compensation current to the operational amplifier's output node for regulation. While this approach achieves basic common-mode control, it suffers from significant drawbacks in high-speed, high-precision scenarios: the independent loop lacks an embedded main gain path for the operational amplifier, preventing the use of the main operational amplifier's high gain to enhance feedback depth; common-mode control accuracy is limited by the independent amplifier circuit and is susceptible to process and temperature fluctuations; wide-range, high-precision common-mode adjustment cannot be achieved through external reference pins, limiting the operational amplifier's output swing utilization; furthermore, the circuit topology has low matching with the main operational amplifier, hindering layout reuse and resulting in high design complexity and poor versatility.

[0004] In summary, existing common-mode feedback schemes for fully differential operational amplifiers generally suffer from insufficient accuracy, large nonlinear distortion, complex loop structure, and poor stability, making it difficult to achieve both high-precision and high-reliability common-mode level control. Summary of the Invention

[0005] The purpose of this invention is to provide a common-mode feedback circuit for a fully differential operational amplifier based on a transconductance linear loop and a fully differential operational amplifier. By embedding the common-mode feedback circuit into the main gain loop and leveraging the high gain of the main operational amplifier to enhance the feedback depth, high bandwidth and high linearity output common-mode precise control are achieved with low static power consumption. At the same time, the linearity of the operational amplifier signal is optimized. This invention can solve the problems of insufficient feedback depth, low common-mode control accuracy, and weak compatibility with H-bridge operational amplifier architecture in existing fully differential operational amplifier common-mode feedback circuits. It also simplifies the circuit structure and improves the working stability of the fully differential operational amplifier under various non-ideal operating conditions.

[0006] On the one hand, the present invention provides a common-mode feedback circuit for a fully differential operational amplifier based on a transconducting linear loop, which is applied to a fully differential operational amplifier and includes a common-mode voltage detection amplifier, an output voltage divider unit, and a feedback signal input unit;

[0007] The common-mode voltage detection amplifier detects the common-mode voltage at the differential output terminal of the fully differential operational amplifier, and converts the difference between it and the set target common-mode reference voltage into a differential current signal. The differential current signal is then converted into a feedback control voltage by the output voltage divider unit and fed back to the front end of the gain stage of the fully differential operational amplifier through the feedback signal input unit, forming a negative feedback closed loop.

[0008] Furthermore, the feedback signal input unit includes a first resistor and a second resistor. One end of the first resistor and the second resistor are connected to the negative input terminal of the common-mode voltage detection amplifier, the other end of the first resistor is connected to the differential positive output terminal of the fully differential operational amplifier, and the other end of the second resistor is connected to the differential negative output terminal of the fully differential operational amplifier. The positive input terminal of the common-mode voltage detection amplifier is connected to a set target common-mode reference voltage. The two output terminals of the common-mode voltage detection amplifier are respectively connected to the first-stage amplifier and the second-stage amplifier on the main amplification path of the fully differential operational amplifier.

[0009] Furthermore, the common-mode voltage detection amplifier is a symmetrical transconducting linear loop amplifier circuit, including resistor R9 and a first transconducting linear loop sub-circuit and a second transconducting linear loop sub-circuit with completely symmetrical structure; both the first transconducting linear loop circuit and the second transconducting linear loop circuit are closed loops formed by the emitter structures of several bipolar transistors, and the number of PN junctions in the clockwise direction in the loop is equal to the number of PN junctions in the counterclockwise direction;

[0010] The first transconducting linear loop circuit is composed of transistors Q17, Q18, Q21, and Q22. The bases of transistors Q17 and Q18 are connected together, serving as the negative input terminal of the common-mode voltage detection amplifier, and are connected to one end of the first resistor and the second resistor. The collectors of transistors Q17 and Q18 are grounded. The emitter of transistor Q17 is connected to the base of transistor Q21. The emitter of transistor Q18 is connected to the base of transistor Q22. The emitters of transistors Q21 and Q22 are connected to one end of resistor R9.

[0011] The second transconducting linear loop circuit consists of transistors Q19, Q20, Q23, and Q24. The bases of transistors Q19 and Q20 are connected together, serving as the positive input of the common-mode voltage detection amplifier, and are connected to the set target common-mode reference voltage. The collectors of transistors Q19 and Q20 are grounded. The emitter of transistor Q19 is connected to the base of transistor Q23. The emitter of transistor Q20 is connected to the base of transistor Q24. The emitters of transistors Q23 and Q24 are connected to the other end of resistor R9.

[0012] Furthermore, in the symmetrical transconductance linear loop amplifier circuit, transistor Q21 has an emitter resistor R20 connected to its emitter, transistor Q22 has an emitter resistor R21 connected to its emitter, transistor Q23 has an emitter resistor R22 connected to its emitter, and transistor Q24 has an emitter resistor R23 connected to its emitter.

[0013] Furthermore, the output voltage divider unit is a proportional voltage divider unit, including symmetrically distributed resistors R1~8 and R10~17, which are respectively connected to the output terminals of the first transconducting linear loop circuit and the second transconducting linear loop circuit. The differential current signals output by the two transconducting linear loop circuits are converted into two synchronously changing feedback control voltages through resistor proportional voltage division, that is, the voltages of the feedback signal output terminal nodes A~H.

[0014] One end of resistor R1 is connected to one end of resistor R10, serving as feedback signal output node A; one end of resistor R2 is connected to one end of resistor R12, serving as feedback signal output node B; one end of resistor R3 is connected to one end of resistor R11, serving as feedback signal output node C; one end of resistor R4 is connected to one end of resistor R13, serving as feedback signal output node D; one end of resistor R5 is connected to one end of resistor R14, serving as feedback signal output node E; one end of resistor R6 is connected to one end of resistor R16, serving as feedback signal output node F; one end of resistor R7 is connected to one end of resistor R15, serving as feedback signal output node G; and one end of resistor R8 is connected to one end of resistor R17, serving as feedback signal output node G. Point H; the other ends of resistors R1, R3, R5, and R7 are connected to the emitters of transistors Q19 and Q17 via current sources; the other ends of resistors R2, R4, R6, and R8 are connected to the emitters of transistors Q20 and Q18 via current sources; the other ends of resistors R10 and R11 are connected to the collector of transistor Q23; the other ends of resistors R12 and R13 are connected to the collector of transistor Q24; the other ends of resistors R14 and R15 are connected to the collector of transistor Q21; and the other ends of resistors R16 and R17 are connected to the collector of transistor Q22.

[0015] Furthermore, the output voltage divider unit is a proportional voltage divider unit composed of current mirrors, including PNP transistors Q25, Q27, Q29, Q31, diodes D1 and D3, NPN transistors Q26, Q28, Q30, Q32, D2, and D4; these are respectively connected to the output terminals of the first transconducting linear loop circuit and the second transconducting linear loop circuit, converting the differential current signals output by the two transconducting linear loop circuits into two synchronously changing feedback control voltages, i.e., the voltages at nodes A~H of the feedback signal output terminals;

[0016] The emitters of PNP transistors Q25, Q27, Q29, and Q31, the anode of diodes D1 and D3 are connected to the emitters of transistors Q17 and Q19 via a current source; the bases of PNP transistors Q25 and Q27 are connected to the cathode of diode D1, and the bases of PNP transistors Q29 and Q31 are connected to the cathode of diode D3; the collector of PNP transistor Q25 serves as the feedback signal output node A, the collector of PNP transistor Q27 serves as the feedback signal output node C, the collector of PNP transistor Q29 serves as the feedback signal output node E, and the collector of PNP transistor Q31 serves as the feedback signal output node G.

[0017] The emitters of NPN transistors Q26, Q28, Q30, and Q32, the cathode of diode D2, and the cathode of diode D4 are connected to the emitter of transistor Q20 via a current source; the bases of NPN transistors Q26 and Q28 are connected to the anode of diode D2, and the bases of NPN transistors Q30 and Q32 are connected to the anode of diode D4; the collector of NPN transistor Q26 serves as the feedback signal output node B, the collector of NPN transistor Q28 serves as the feedback signal output node D, the collector of NPN transistor Q30 serves as the feedback signal output node F, and the collector of NPN transistor Q32 serves as the feedback signal output node H.

[0018] On the other hand, the present invention also provides a fully differential operational amplifier, employing the aforementioned fully differential op-amp common-mode feedback circuit based on a transconducting linear loop. The main amplification path of the fully differential operational amplifier is a fully differential two-stage architecture consisting of a first-stage amplifier and a second-stage amplifier, with two symmetrical differential output terminals. The fully differential op-amp common-mode feedback circuit acquires the DC common-mode level of the two symmetrical differential output terminals in real time through voltage division. The main amplification path has at least one gain stage that can be adjusted by an external feedback control voltage. The amplification device of the gain stage is provided with a bias node that can be connected to the feedback control voltage, and the change in the voltage of the bias node synchronously adjusts the DC common-mode level of the two symmetrical differential output terminals. The change in the feedback control voltage output by the fully differential op-amp common-mode feedback circuit causes the common-mode level of the two symmetrical differential output terminals of the main amplification path of the fully differential operational amplifier to shift and return to the set value of the target common-mode reference voltage.

[0019] Furthermore, the first stage amplifier is a fully differential input transconductance stage, and the second stage amplifier is a fully differential output stage;

[0020] The first-stage amplifier employs a bipolar differential transistor structure to preamplify and level-convert the differential input signal, providing differential drive signals for the fully differential output stage. The first-stage amplifier includes PNP transistors Q1, Q3, Q6, and Q8, NPN transistors Q2, Q4, Q5, and Q7, and a resistor R0. The bases of transistors Q1 and Q2 are connected to the positive input terminal of the fully differential operational amplifier; the collectors of transistors Q1 and Q2 are grounded; the emitter of transistor Q1 is connected to the base of transistor Q5 and a constant current source; the emitter of transistor Q2 is connected to the base of transistor Q6 and a constant current source; and the emitter of transistor Q5 is connected to the base of transistor Q7. The emitter of transistor Q6 is connected to one end of resistor R0. The bases of transistors Q3 and Q4 are connected to the negative input of the fully differential operational amplifier. The collectors of transistors Q3 and Q4 are grounded. The emitter of transistor Q3 is connected to the base of transistor Q7 and a constant current source. The emitter of transistor Q4 is connected to the base of transistor Q8 and a constant current source. The emitters of transistors Q7 and Q8 are connected to the other end of resistor R0. The collector of transistor Q5 is connected to node A of the feedback signal output terminal. The collector of transistor Q7 is connected to node C of the feedback signal output terminal. The collector of transistor Q6 is connected to node B of the feedback signal output terminal. The collector of transistor Q8 is connected to node D of the feedback signal output terminal.

[0021] Furthermore, the second-stage amplifier uses eight bipolar transistors to form an H-bridge structure. Each transistor has both common-emitter and common-base amplification configurations. Its base and emitter are equipped with bias nodes that can be connected to external feedback control voltage. By adjusting the voltage of the bias nodes, the DC common-mode level of the two symmetrical differential output terminals can be adjusted synchronously.

[0022] Furthermore, the second-stage amplifier includes PNP transistors Q10, Q12, Q13, and Q15, and NPN transistors Q9, Q11, Q14, and Q16;

[0023] The base of transistor Q9 is connected to the feedback signal output node C, the base of transistor Q10 is connected to the feedback signal output node D, the base of transistor Q11 is connected to the feedback signal output node A, and the base of transistor Q12 is connected to the feedback signal output node B. The collectors of transistors Q9 and Q11 are connected to the emitter of transistor Q3 and the base of transistor Q7 via a constant current source. The collectors of transistors Q10 and Q12 are connected to the emitter of transistor Q2, the base of transistor Q6, the emitter of transistor Q4, and the base of transistor Q8 via a constant current source. The emitters of transistors Q9 through Q12 are grounded via a constant current source. The emitter of transistor Q9 is connected to the base of transistor Q13, the emitter of transistor Q10 is connected to the base of transistor Q14, and the collectors of transistors Q13 and Q14 are connected to… The differential negative output terminal of the fully differential operational amplifier has transistor Q11's emitter connected to transistor Q15's base, transistor Q12's emitter connected to transistor Q16's base, and transistors Q15 and Q16's collectors connected to the differential positive output terminal of the fully differential operational amplifier. The base of transistor Q11 is connected to feedback signal output node A, transistor Q12's base to feedback signal output node B, transistor Q9's base to feedback signal output node C, transistor Q10's base to feedback signal output node D, transistor Q13's emitter to feedback signal output node E, transistor Q14's emitter to feedback signal output node F, transistor Q15's emitter to feedback signal output node G, and transistor Q16's emitter to feedback signal output node H.

[0024] The beneficial effects of the fully differential operational amplifier common-mode feedback circuit and the fully differential operational amplifier based on transconducting linear loop of the present invention are as follows:

[0025] 1. Significantly improved common-mode control accuracy. The common-mode feedback circuit and fully differential operational amplifier based on transconducting linear loop of this invention embed the common-mode feedback loop into the main gain path of the operational amplifier, and reuse the high gain characteristics of the main operational amplifier to greatly improve the feedback depth. It breaks through the limitation of unity gain of independent loops, effectively suppresses common-mode voltage offset caused by process fluctuations and temperature drift, and can achieve high-precision locking of the output common-mode level.

[0026] 2. Excellent signal linearity and low distortion. The common-mode feedback circuit and fully differential operational amplifier based on transconductance linear loop of the present invention construct a detection and amplification link based on transconductance linear loop, which naturally cancels the inherent nonlinearity of transistors. At the same time, the feedback signal can dynamically correct the operating point of the amplifying transistor in the main operational amplifier, suppress transconductance fluctuations under large signals, avoid introducing additional distortion into the main path, and can significantly reduce the harmonic distortion of the operational amplifier output.

[0027] 3. Balancing high bandwidth and low power consumption. The fully differential operational amplifier common-mode feedback circuit and fully differential operational amplifier based on transconducting linear loop of this invention adopt a current-mode signal processing architecture, without the parasitic poles introduced by additional multi-stage amplification. It can improve loop bandwidth and slew rate without increasing bias current, breaking the limitation of performance and power consumption binding, and can achieve high bandwidth and fast response common-mode control with low static power consumption.

[0028] The present invention relates to a common-mode feedback circuit and a fully differential operational amplifier based on a transconducting linear loop. The circuit leverages the inherent physical characteristics of the transconducting linear loop to achieve high-precision detection and linear amplification of common-mode error. Simultaneously, it constructs a negative feedback closed loop based on the inverting characteristics of the gain stage of the fully differential operational amplifier, inputting the feedback signal to the gain stage to adjust the common-mode level, significantly improving the gain of the common-mode feedback loop. This invention can accurately and stably lock the output common-mode level of the fully differential operational amplifier to the common-mode reference voltage setting value even under the influence of various non-ideal factors such as device mismatch and signal disturbances, effectively ensuring the stable operation of the fully differential operational amplifier and the quality of its signal output. Attached Figure Description

[0029] Figure 1 This is a core block diagram of the common-mode feedback circuit in an embodiment of the present invention.

[0030] Figure 2 This is a simplified diagram of the common-mode feedback circuit structure according to an embodiment of the present invention.

[0031] Figure 3 This is a schematic diagram of the first gain stage circuit of a fully differential operational amplifier that matches the embodiments of the present invention.

[0032] Figure 4 This is a schematic diagram of the second gain stage circuit of a fully differential operational amplifier that matches the embodiments of the present invention.

[0033] Figure 5 This is a circuit diagram of the common-mode feedback circuit of Embodiment 1 of the present invention.

[0034] Figure 6 Is adopted Figure 5 The schematic diagram of a fully differential operational amplifier circuit with common-mode feedback.

[0035] Figure 7 This is a schematic diagram of a fully differential operational amplifier circuit using the common-mode feedback circuit of Embodiment 2 of the present invention.

[0036] Figure 8 This is a schematic diagram of a fully differential operational amplifier circuit using the common-mode feedback circuit of Embodiment 3 of the present invention. Detailed Implementation

[0037] The present invention will now be described in further detail with reference to the embodiments and the accompanying drawings.

[0038] One embodiment of the present invention is a common-mode feedback circuit for a fully differential operational amplifier, applied to a fully differential operational amplifier. For example... Figure 1 As shown, the fully differential operational amplifier common-mode feedback circuit includes a common-mode voltage detection amplifier, an output voltage divider unit, and a feedback signal input unit.

[0039] The common-mode voltage detection amplifier detects the common-mode voltage at the differential output terminal of the fully differential operational amplifier, and converts the difference between it and the set target common-mode reference voltage into a differential current signal. The differential current signal is then converted into a feedback control voltage by the output voltage divider unit and fed back to the front end of the gain stage of the fully differential operational amplifier through the feedback signal input unit, forming a negative feedback closed loop.

[0040] This invention detects the difference between the common-mode voltage at the differential output of a fully differential operational amplifier and an externally set target common-mode reference voltage, converts it into a differential current signal, then into a feedback control voltage, and directly feeds it back to the front end of the gain stage of the fully differential operational amplifier. By leveraging the high gain of the fully differential operational amplifier, the feedback depth is increased, making the gain of the common-mode feedback of the entire circuit greater. Wide-range and high-precision common-mode adjustment is achieved through an external reference pin.

[0041] Preferably, in another embodiment, the connection relationship of the common-mode feedback circuit of the fully differential op-amp in the fully differential operational amplifier loop is as follows: Figure 2 As shown. The feedback signal input unit includes a first resistor (resistor R18) and a second resistor (resistor R19). One end of resistors R18 and R19 is connected to the negative input terminal of the common-mode voltage detection amplifier (ACM), the other end of the first resistor is connected to the differential positive output terminal (VOUTP) of the fully differential operational amplifier, and the other end of the second resistor is connected to the differential negative output terminal (VOUTN) of the fully differential operational amplifier. The positive input terminal of the common-mode voltage detection amplifier (ACM) is connected to the set target common-mode reference voltage (VOCM). The two output terminals of the common-mode voltage detection amplifier (ACM) are respectively connected to the first stage amplifier (A1) and the second stage amplifier (A2) on the main amplification path of the fully differential operational amplifier. The common-mode voltage detection amplifier (ACM) detects the difference between the common-mode voltage at the differential output terminals (VOUTP, VOUTN) of the fully differential operational amplifier and the target common-mode reference voltage (VOCM), and linearly converts the detected voltage difference into a differential current signal, which is then output through the voltage divider unit (in the ACM). Figure 2 (Not shown in the image) The differential current signal is converted into the feedback control voltage of the first-stage amplifier (A1) and the second-stage amplifier (A2) to complete the closed-loop regulation of common-mode feedback.

[0042] like Figure 3As shown, the first stage amplifier (A1) in the main amplification path of the fully differential operational amplifier is a fully differential input transconductance stage, and the second stage amplifier is a fully differential output stage.

[0043] The first-stage amplifier (A1) employs a bipolar differential pair structure to preamplify and level-convert the differential input signal, providing differential drive signals for the subsequent fully differential output stage. The first-stage amplifier includes PNP transistors Q1, Q3, Q6, and Q8, NPN transistors Q2, Q4, Q5, and Q7, and resistor R0. The bases of transistors Q1 and Q2 are connected to the positive input (VINP) of the fully differential operational amplifier. The collectors of transistors Q1 and Q2 are grounded. The emitter of transistor Q1 is connected to the base of transistor Q5 and a constant current source. The emitter of transistor Q2 is connected to the base of transistor Q6 and a constant current source. The emitters of transistors Q5 and Q6 are connected to one end of resistor R0. The bases of transistors Q3 and Q4 are connected to the negative input (VINN) of the fully differential operational amplifier. The collectors of transistors Q3 and Q4 are grounded. The emitter of transistor Q3 is connected to the base of transistor Q7 and a constant current source. The emitter of transistor Q4 is connected to the base of transistor Q8 and a constant current source. The emitters of transistors Q7 and Q8 are connected to the other end of resistor R0. The collector of transistor Q5 is connected to node A of the feedback signal output, the collector of transistor Q7 is connected to node C of the feedback signal output, the collector of transistor Q6 is connected to node B of the feedback signal output, and the collector of transistor Q8 is connected to node D of the feedback signal output.

[0044] like Figure 4As shown, the second-stage amplifier (A2) in the main amplification path of the fully differential operational amplifier is a fully differential output stage. It uses eight bipolar transistors Q9~Q16 to form an H-bridge structure. Each transistor has both common-emitter amplification configuration (base input, collector output, input and output inverted) and common-base amplification configuration (emitter input, collector output, input and output in phase). Both its base and emitter have reserved bias nodes that can be connected to external feedback control voltage. The DC common-mode level of the two differential output terminals can be synchronously adjusted by adjusting the voltage of these bias nodes. The second-stage amplifier (A2) includes PNP transistors Q10, Q12, Q13, and Q15, and NPN transistors Q9, Q11, Q14, and Q16. The base of transistor Q9 is connected to node C, the base of transistor Q10 is connected to node D, the base of transistor Q11 is connected to node A, and the base of transistor Q12 is connected to node B. The collectors of transistors Q9 and Q11 are connected to the emitters of transistors Q3 and Q7 via constant current sources. The collectors of transistors Q10 and Q12 are connected to the emitters of transistors Q2, Q6, Q4, and Q8 via constant current sources. The emitters of transistors Q9 through Q12 are grounded via constant current sources. The emitter of transistor Q9 is connected to the base of transistor Q13, and the emitter of transistor Q10 is connected to the base of transistor Q14. The collectors of transistors Q13 and Q14 are connected to a fully differential operational amplifier. The differential negative output terminal (VOUTN) is connected to the base of transistor Q15, the emitter of transistor Q12 is connected to the base of transistor Q16, and the collectors of transistors Q15 and Q16 are connected to the differential positive output terminal (VOUTP) of the fully differential operational amplifier. The base of transistor Q11 is connected to node A of the feedback signal output terminal, the base of transistor Q12 is connected to node B of the feedback signal output terminal, the base of transistor Q9 is connected to node C of the feedback signal output terminal, the base of transistor Q10 is connected to node D of the feedback signal output terminal, the emitter of transistor Q13 is connected to node E of the feedback signal output terminal, the emitter of transistor Q14 is connected to node F of the feedback signal output terminal, the emitter of transistor Q15 is connected to node G of the feedback signal output terminal, and the emitter of transistor Q16 is connected to node H of the feedback signal output terminal.

[0045] It is understood that the fully differential operational amplifier adapted to the common-mode feedback circuit of the fully differential operational amplifier of the present invention, the first stage amplifier (A1) and the second stage amplifier (A2) on the main amplification path are not limited to only Figure 3 The first-stage amplifier (A1) shown is... Figure 4The specific structure of the second-stage amplifier (A2) shown is not applicable; any structure capable of achieving similar functionality can be used instead. In other words, the common-mode feedback circuit of this invention can be adapted to various types of gain stage circuits, and each gain stage amplifier is not limited to a specific circuit structure. All fully differential operational amplifier main amplification paths that meet the following core adaptation requirements can be adapted to the fully differential operational amplifier common-mode feedback circuit of this invention:

[0046] 1. The main amplification path is a fully differential two-stage architecture consisting of a first-stage amplifier and a second-stage amplifier, with two symmetrical differential output terminals. The fully differential op-amp common-mode feedback circuit can acquire the DC common-mode level of the two symmetrical differential output terminals in real time through voltage division (such as resistor voltage division), providing a sampling basis for common-mode error detection.

[0047] 2. The main amplification path has at least one gain stage that can be adjusted by an external feedback control voltage. The amplification device of the gain stage is provided with a bias node that can be connected to the feedback control voltage (e.g., the base and / or emitter of a bipolar transistor, the gate and / or source of a MOS transistor). The change of the bias node voltage synchronously adjusts the DC common-mode level of the two symmetrical differential output terminals, providing an execution port for common-mode negative feedback adjustment.

[0048] 3. The feedback control voltage output by the common-mode feedback circuit of the fully differential operational amplifier in this invention has negative feedback regulation characteristics. That is, the change in the feedback control voltage output by the common-mode feedback circuit of the fully differential operational amplifier causes the common-mode level of the two symmetrical differential output terminals of the main amplification path of the fully differential operational amplifier to shift and return to the set value of the target common-mode reference voltage (VOCM), forming a stable closed-loop regulation system and avoiding oscillation caused by positive feedback.

[0049] Preferably, in another embodiment, the common-mode voltage detection amplifier of the fully differential operational amplifier common-mode feedback circuit is a symmetrical transconductance linear loop amplifier circuit. For example... Figure 5 As shown, the common-mode feedback circuit of the fully differential operational amplifier includes a symmetrical transconductance linear loop amplifier circuit, an output voltage divider unit (resistors R1~8, R10~17), and a feedback signal input unit (resistors R18, R19).

[0050] The feedback signal input unit includes a first resistor (resistor R18) and a second resistor (resistor R19). One end of the first resistor R18 and one end of the second resistor R19 are connected together and connected to the negative input terminal of the symmetrical transconductance linear loop amplifier circuit. The other end of the first resistor R18 is connected to the differential positive output terminal (VOUTP) of the fully differential operational amplifier, and the other end of the second resistor R19 is connected to the differential negative output terminal (VOUTN) of the fully differential operational amplifier. The positive input terminal of the symmetrical transconductance linear loop amplifier circuit is connected to the set target common-mode reference voltage (VOCM). The two output terminals of the symmetrical transconductance linear loop amplifier circuit are respectively connected to the first stage amplifier and the second stage amplifier on the main amplification path of the fully differential operational amplifier.

[0051] The symmetrical transconductance linear loop amplifier circuit is the core detection and amplification unit of the fully differential operational amplifier common-mode feedback circuit. It includes resistor R9 and two completely symmetrical transconductance linear loop sub-circuits. Both the first and second transconductance linear loop circuits consist of several bipolar transistor emitter structures forming a closed loop, and the number of PN junctions in the clockwise direction within the loop is equal to the number of PN junctions in the counterclockwise direction to ensure the output current magnitude.

[0052] The first transconducting linear loop circuit consists of transistors Q17, Q18, Q21, and Q22. The bases of transistors Q17 and Q18 are connected together, serving as the negative input terminal of a common-mode voltage detection amplifier (symmetrical transconducting linear loop amplifier circuit), and are connected to one end of the first resistor (R18) and the second resistor (R19). The collectors of transistors Q17 and Q18 are grounded. The emitter of transistor Q17 is connected to the base of transistor Q21. The emitter of transistor Q18 is connected to the base of transistor Q22. The emitters of transistors Q21 and Q22 are connected to one end of resistor R9.

[0053] The second transconducting linear loop circuit consists of transistors Q19, Q20, Q23, and Q24. The bases of transistors Q19 and Q20 are connected together, serving as the positive input of a common-mode voltage detection amplifier (symmetrical transconducting linear loop amplifier circuit), and are connected to the set target common-mode reference voltage (VOCM). The collectors of transistors Q19 and Q20 are grounded. The emitter of transistor Q19 is connected to the base of transistor Q23. The emitter of transistor Q20 is connected to the base of transistor Q24. The emitters of transistors Q23 and Q24 are connected to the other end of resistor R9.

[0054] The output voltage divider unit is a proportional voltage divider unit, which includes symmetrically distributed resistors R1~8 and R10~17, which are connected to the output terminals of the first transconducting linear loop circuit and the second transconducting linear loop circuit, respectively. It is used to convert the differential current signals output by the two transconducting linear loop circuits into two synchronously changing feedback control voltages through resistor proportional voltage division, that is, the voltages of the feedback signal output terminals nodes A~H.

[0055] Specifically, one end of resistor R1 is connected to one end of resistor R10, serving as feedback signal output node A; one end of resistor R2 is connected to one end of resistor R12, serving as feedback signal output node B; one end of resistor R3 is connected to one end of resistor R11, serving as feedback signal output node C; one end of resistor R4 is connected to one end of resistor R13, serving as feedback signal output node D; one end of resistor R5 is connected to one end of resistor R14, serving as feedback signal output node E; one end of resistor R6 is connected to one end of resistor R16, serving as feedback signal output node F; one end of resistor R7 is connected to one end of resistor R15, serving as feedback signal output node G; and one end of resistor R8 is connected to one end of resistor R17, serving as feedback signal output node G. Node H; the other ends of resistors R1, R3, R5, and R7 are connected to the emitters of transistors Q19 and Q17 via current sources; the other ends of resistors R2, R4, R6, and R8 are connected to the emitters of transistors Q20 and Q18 via current sources; the other ends of resistors R10 and R11 are connected to the collector of transistor Q23; the other ends of resistors R12 and R13 are connected to the collector of transistor Q24; the other ends of resistors R14 and R15 are connected to the collector of transistor Q21; and the other ends of resistors R16 and R17 are connected to the collector of transistor Q22.

[0056] The common-mode feedback circuit topology of this invention has a high degree of matching with the gain stage of the fully differential operational amplifier, enabling layout reuse, low design complexity, and good versatility; the entire circuit is more symmetrical, and the distortion and power consumption performance is better.

[0057] It is understood that the proportional voltage divider unit of the present invention is not limited to only Figure 5 The specific structure of resistors R1~8 and R10~17 shown is not applicable; any structure that can achieve similar functions can be used as a substitute.

[0058] In another embodiment, such as Figure 6 As shown, this is a fully differential operational amplifier, employing... Figure 5 The fully differential operational amplifier common-mode feedback circuit shown uses the following first-stage amplifier (A1) in the main amplification path: Figure 3 The fully differential input transconductance stage shown has a second-stage amplifier (A2) that uses the following... Figure 4 The diagram shows a fully differential output stage. Resistors R18 and R19 are connected to the two differential output terminals VOUTP (voltage V) of the fully differential operational amplifier, respectively. OUTP VOUTN (voltage is V) OUTN Connected to the common-mode output voltage V, it is used to acquire the output common-mode voltage V. OUT,CM =(V OUTP +V OUTN ) / 2. The feedback signal output nodes A to H are connected to the main gain stage of the fully differential operational amplifier, and are used to input the feedback signal into the main signal path to complete closed-loop regulation. Specifically, feedback signal output node A is connected to the collector of transistor Q5 of the first-stage amplifier A1 and the base of transistor Q11 of the second-stage amplifier A2 in the main amplification path of the fully differential operational amplifier; feedback signal output node B is connected to the collector of transistor Q6 of the first-stage amplifier A1 and the base of transistor Q12 of the second-stage amplifier A2; feedback signal output node C is connected to the collector of transistor Q7 of the first-stage amplifier A1 and the base of transistor Q9 of the second-stage amplifier A2; feedback signal output node D is connected to the collector of transistor Q8 of the first-stage amplifier A1 and the base of transistor Q10 of the second-stage amplifier A2; feedback signal output node E is connected to the emitter of transistor Q13 of the second-stage amplifier A2; feedback signal output node F is connected to the emitter of transistor Q14 of the second-stage amplifier A2; feedback signal output node G is connected to the emitter of transistor Q15 of the second-stage amplifier A2; and feedback signal output node H is connected to the emitter of transistor Q16 of the second-stage amplifier A2.

[0059] 1. Core Working Principle

[0060] The differential output structure of a fully differential operational amplifier lacks the fixed DC reference point of a single-ended amplifier. Its output common-mode level is easily affected by factors such as device mismatch, signal disturbance, and temperature drift, which can lead to problems such as the output signal exceeding the swing range, the operating point of the subsequent circuit shifting, and differential signal distortion. Therefore, it is necessary to achieve stable control of the output common-mode level through a common-mode feedback loop.

[0061] The fully differential operational amplifier common-mode feedback circuit of this invention achieves high-precision detection and linear amplification of common-mode error based on the inherent physical characteristics of a transconductance linear loop. This is because a transconductance linear loop is a closed loop composed of the emitter structures of several bipolar transistors, and the number of PN junctions in the clockwise direction is exactly equal to the number of PN junctions in the counterclockwise direction. According to the transconductance linear principle, the collector current densities of each transistor in the loop satisfy the relationship of equal products. For example, for a transconductance linear loop composed of transistors Q17, Q18, Q21, and Q22, the core relationship is:

[0062] in, For the number of transistors, Indicates a clockwise direction for the loop. Indicates a counter-clockwise direction for the loop. This is the collector current of the transistor. This is the reverse saturation current of the transistor. Transistor numbering, This is thermal voltage.

[0063] After unfolding, we get:

[0064] Due to the reverse saturation current of the transistor The relationship is proportional to the emitter junction area, and the above equation can be simplified to a current density relationship:

[0065] In the formula , , , These are the collector current densities of transistors 17, 18, 21, and 22, respectively.

[0066] Based on the above characteristics, the transconductance linear loop can accurately and linearly convert the difference between the common-mode voltage at the output of the fully differential operational amplifier and the target common-mode reference voltage into a differential current signal within the loop. Simultaneously, through the characteristic matching of the symmetrical transistors within the loop, the inherent exponential nonlinearity of the bipolar transistors is naturally canceled, significantly reducing the nonlinear distortion of the circuit. Furthermore, a proportional voltage divider unit (e.g., resistors R1~8, R10~17) converts the differential current signal into a feedback control voltage, which is input to the main gain stage of the fully differential operational amplifier to form a negative feedback closed loop, ultimately achieving stable locking of the common-mode voltage at the differential output of the fully differential operational amplifier.

[0067] 2. Specific work process

[0068] i) Steady-state operating process

[0069] When the common-mode voltage V at the differential output terminal of the fully differential operational amplifier OUT,CMWhen the common-mode reference voltage VOCM is exactly equal to the set target common-mode reference voltage, the voltage detected by the common-mode voltage detection amplifier (symmetrical transconducting linear loop amplifier circuit) of the fully differential operational amplifier common-mode feedback circuit is consistent with the reference voltage input at the VOCM terminal. The emitter potentials of the transistors in the two transconducting linear loop sub-circuits are equal, no differential current is generated in the loop, the potentials of each node in the proportional voltage divider unit (resistors R1~8, R10~17) remain constant, the output feedback control voltage signal does not change, the operating point of the main gain stage of the fully differential operational amplifier remains stable, the common-mode voltage at the differential output terminal is continuously locked at the target common-mode reference voltage VOCM set value, and the entire fully differential operational amplifier common-mode feedback loop is in a dynamic equilibrium steady-state operating state.

[0070] ii) Negative feedback regulation process when the output common-mode voltage is too high

[0071] When affected by non-ideal factors such as component mismatch and signal disturbance, the common-mode voltage V at the differential output of the fully differential operational amplifier will decrease. OUT,CM When the voltage exceeds the set target common-mode reference voltage VOCM, the emitter potential of the detection transistor Q21 connected to the differential output will be higher than the emitter potential of the reference transistor (transistor Q23) whose base is connected to the target common-mode reference voltage VOCM. This potential difference generates a directional current in resistor R9, flowing from transistor Q21 to transistor Q24. Simultaneously, the current flowing from transistor Q23 to transistor Q22 decreases, which is equivalent to a decrease in the current flowing from transistor Q23 to transistor Q22.

[0072] The current flows through resistors R5 and R14 in the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node E of the feedback signal output terminal; it flows through resistors R7 and R15 in the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node G of the feedback signal output terminal; it flows through resistors R2 and R12 in the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node B of the feedback signal output terminal; and it flows through resistors R4 and R13 in the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node D of the feedback signal output terminal. As the reverse current decreases, it flows through resistors R1 and R10 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node A of the feedback signal output. Similarly, it flows through resistors R3 and R11 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node C of the feedback signal output. The same applies to resistors R6 and R16 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node F of the feedback signal output. Finally, it flows through resistors R8 and R17 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node H of the feedback signal output.

[0073] Furthermore, the voltage at node A of the feedback signal output terminal acts on the base of transistor Q15 in the second-stage amplifier (A2) of the fully differential operational amplifier through an emitter follower (transistor Q11); the voltage at node B of the feedback signal output terminal acts on the base of transistor Q16 in the second-stage amplifier (A2) through an emitter follower (transistor Q12); the voltage at node C of the feedback signal output terminal acts on the base of transistor Q13 in the second-stage amplifier (A2) through an emitter follower (transistor Q9); and the voltage at node D of the feedback signal output terminal acts on the base of transistor Q14 in the second-stage amplifier (A2) through an emitter follower (transistor Q10). Since transistors Q13-Q16 are common-emitter amplifiers with inverted input and output characteristics, an increase in their base voltage leads to a decrease in the collector output voltage, thereby simultaneously pulling down the potentials of the differential output terminals VOUTP and VOUTN of the fully differential operational amplifier.

[0074] Furthermore, the voltage at node E of the feedback signal output terminal acts on the emitter of the common-base transistor (transistor Q13) in the second stage of the fully differential operational amplifier; the voltage at node F of the feedback signal output terminal acts on the emitter of the common-base transistor (transistor Q14) in the second stage of the fully differential operational amplifier; the voltage at node G of the feedback signal output terminal acts on the emitter of the common-base transistor (transistor Q15) in the second stage of the fully differential operational amplifier; and the voltage at node H of the feedback signal output terminal acts on the emitter of the common-base transistor (transistor Q16) in the second stage of the fully differential operational amplifier. Since transistors Q13~Q16 are in a common-base amplification structure at this time, they have the characteristic of in-phase input and output. An increase in their emitter voltage will lead to an increase in the collector output voltage, and a decrease in their emitter voltage will lead to a decrease in the collector output voltage, thereby simultaneously pulling down the potentials of the differential output terminals VOUTP and VOUTN of the fully differential operational amplifier.

[0075] This potential change is continuously sampled and fed back by the common-mode voltage detection amplifier (symmetrical transconducting linear loop amplifier circuit), causing the output common-mode potential collected by the symmetrical transconducting linear loop amplifier circuit to continuously decrease until the potential difference across resistor R9 returns to zero, the differential current in the loop disappears, the common-mode voltage at the differential output terminal of the fully differential operational amplifier recovers to the target common-mode reference voltage VOCM setting value, and the loop returns to steady-state operation.

[0076] vice versa.

[0077] When affected by non-ideal factors such as component mismatch and signal disturbance, the common-mode voltage V at the differential output of the fully differential operational amplifier will decrease. OUT,CMWhen the voltage is below the set target common-mode reference voltage VOCM, the emitter potential of the detection transistor Q23 connected to the differential output will be higher than the emitter potential of the reference transistor (transistor Q21) whose base is connected to the target common-mode reference voltage VOCM. This potential difference generates a directional current in resistor R9, flowing from the emitter of transistor Q23 to the emitter of transistor Q22. Simultaneously, the current in the opposite direction of R9 decreases, meaning the current flowing from the emitter of transistor Q21 to the emitter of transistor Q24 decreases.

[0078] The current flows through resistors R1 and R10 of the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node A of the feedback signal output terminal; it flows through resistors R3 and R11 of the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node C of the feedback signal output terminal; it flows through resistors R6 and R16 of the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node F of the feedback signal output terminal; it flows through resistors R8 and R17 of the proportional voltage divider unit, generating a corresponding voltage division that increases the voltage at node H of the feedback signal output terminal. As the reverse current decreases, it flows through resistors R5 and R14 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node E of the feedback signal output. Similarly, it flows through resistors R7 and R15 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node G of the feedback signal output. The same applies to resistors R2 and R12 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node B of the feedback signal output. Finally, it flows through resistors R4 and R13 in the proportional voltage divider unit, generating a corresponding voltage divider that lowers the voltage at node D of the feedback signal output.

[0079] Furthermore, the voltage at node A of the feedback signal output terminal acts on the base of transistor Q15 in the second-stage amplifier (A2) of the fully differential operational amplifier through an emitter follower (transistor Q11); the voltage at node B of the feedback signal output terminal acts on the base of transistor Q16 in the second-stage amplifier (A2) through an emitter follower (transistor Q12); the voltage at node C of the feedback signal output terminal acts on the base of transistor Q13 in the second-stage amplifier (A2) through an emitter follower (transistor Q9); and the voltage at node D of the feedback signal output terminal acts on the base of transistor Q14 in the second-stage amplifier (A2) through an emitter follower (transistor Q10). Since transistors Q13-Q16 are common-emitter amplifiers with inverted input and output characteristics, a decrease in their base voltage leads to an increase in the collector output voltage, which in turn synchronously pulls up the potentials of the differential output terminals VOUTP and VOUTN of the fully differential operational amplifier.

[0080] Furthermore, the voltage at node E of the feedback signal output terminal acts on the emitter of the common-base transistor (transistor Q13) in the second stage of the fully differential operational amplifier, the voltage at node F of the feedback signal output terminal acts on the base of the common-base transistor (transistor Q14) in the second stage of the fully differential operational amplifier, the voltage at node G of the feedback signal output terminal acts on the base of the common-base transistor (transistor Q15) in the second stage of the fully differential operational amplifier, and the voltage at node H of the feedback signal output terminal acts on the base of the common-base transistor (transistor Q16) in the second stage of the fully differential operational amplifier. Since transistors Q13~Q16 are in a common-base amplification structure at this time, they have the characteristic of in-phase input and output. An increase in their emitter voltage will lead to an increase in the collector output voltage, and a decrease in their emitter voltage will lead to a decrease in the collector output voltage, thereby synchronously pulling up the potentials of the differential output terminals VOUTP and VOUTN of the fully differential operational amplifier.

[0081] This potential change is continuously sampled and fed back by the common-mode voltage detection amplifier (symmetrical transconducting linear loop amplifier circuit), causing the output common-mode potential collected by the symmetrical transconducting linear loop amplifier circuit to continuously decrease until the potential difference across resistor R9 returns to zero, the differential current in the loop disappears, the common-mode voltage at the differential output terminal of the fully differential operational amplifier recovers to the target common-mode reference voltage VOCM setting value, and the loop returns to steady-state operation.

[0082] In summary, the change in the common-mode voltage at the differential output of the fully differential operational amplifier is sampled in real time by the common-mode voltage detection amplifier until the common-mode voltage at the differential output rises back to the target common-mode reference voltage VOCM set value. At this point, the potential across resistor R9 reaches equilibrium, the loop completes adjustment, and returns to steady state. Figure 6 The implementation effect of the present invention shown is: mass production statistical common-mode gain ΔV OUT,CM / ΔV OCM =0.9955~1.0045 (V / V).

[0083] like Figure 7 In another embodiment shown, in Figure 6 Based on the illustrated embodiment, emitter resistors R20 to R23 are added to transistors Q21 to Q24 in the symmetrical transconductance linear loop amplifier circuit. The emitter of transistor Q21 is connected to resistor R20, the emitter of transistor Q22 is connected to resistor R21, the emitter of transistor Q23 is connected to resistor R22, and the emitter of transistor Q24 is connected to resistor R23. This provides local negative feedback to transistors Q21 to Q24, which can improve linearity and reduce distortion.

[0084] like Figure 8 In another embodiment shown, in Figure 7Based on the illustrated embodiment, the output voltage divider unit composed of resistors R1~8 and R10~17 is replaced with a proportional voltage divider unit composed of current mirrors, providing another way to achieve common-mode feedback output. PNP transistors Q25, Q27, Q29, Q31, diodes D1 and D3, NPN transistors Q26, Q28, Q30, Q32, D2, and D4 are connected to the output terminals of the first and second transconducting linear loop circuits, respectively. The differential current signals output from the two transconducting linear loop circuits are converted into two synchronously changing feedback control voltages, i.e., the voltages at nodes A~H of the feedback signal output terminals, through proportional voltage division.

[0085] Specifically, the emitters of PNP transistors Q25, Q27, Q29, and Q31, the anode of diode D1, and the anode of diode D3 are connected to the emitters of transistors Q17 and Q19 via a current source; the bases of PNP transistors Q25 and Q27 are connected to the cathode of diode D1, and the bases of PNP transistors Q29 and Q31 are connected to the cathode of diode D3; the collector of PNP transistor Q25 serves as the feedback signal output node A, the collector of PNP transistor Q27 serves as the feedback signal output node C, the collector of PNP transistor Q29 serves as the feedback signal output node E, and the collector of PNP transistor Q31 serves as the feedback signal output node G. The emitters of NPN transistors Q26, Q28, Q30, and Q32, the cathodes of diodes D2 and D4 are connected to the emitter of transistor Q20 via a current source. The bases of NPN transistors Q26 and Q28 are connected to the anode of diode D2, and the bases of NPN transistors Q30 and Q32 are connected to the anode of diode D4. The collector of NPN transistor Q26 serves as the feedback signal output node B, the collector of NPN transistor Q28 as the feedback signal output node D, the collector of NPN transistor Q30 as the feedback signal output node F, and the collector of NPN transistor Q32 as the feedback signal output node H. The output current is fed back to the main amplification path of the fully differential operational amplifier through a current mirror. The differential current is converted into voltage through transistor resistors, which can also achieve common-mode feedback.

[0086] While the present invention has been disclosed above with reference to preferred embodiments, these embodiments are not intended to limit the invention. Any equivalent changes or modifications made without departing from the spirit and scope of the invention are also within the scope of protection of the invention. Therefore, the scope of protection of the present invention should be determined by the claims of this application.

Claims

1. A common-mode feedback circuit for a fully differential operational amplifier based on a transconducting linear loop, applied to a fully differential operational amplifier, wherein the main amplification path of the fully differential operational amplifier has two symmetrical differential output terminals, and the main amplification path of the fully differential operational amplifier has at least one gain stage that can be adjusted by an external feedback control voltage, wherein the amplification device of the gain stage is provided with a bias node that can be connected to the feedback control voltage, characterized in that, It includes a common-mode voltage detection amplifier, an output voltage divider unit, and a feedback signal input unit; The common-mode voltage detection amplifier is a symmetrical transconducting linear loop amplifier circuit, including resistor R9 and a first transconducting linear loop sub-circuit and a second transconducting linear loop sub-circuit with completely symmetrical structures. Both the first transconducting linear loop circuit and the second transconducting linear loop circuit are closed loops formed by the emitter structures of several bipolar transistors, and the number of PN junctions in the clockwise direction in the loop is equal to the number of PN junctions in the counterclockwise direction. The common-mode voltage detection amplifier acquires the DC common-mode level of the two symmetrical differential output terminals of the main amplification path of the fully differential operational amplifier in real time through voltage division, and converts the difference between the DC common-mode level and the set target common-mode reference voltage into a differential current signal. The differential current signal is converted into a feedback control voltage through the output voltage divider unit and fed back to the front end of the gain stage of the fully differential operational amplifier through the feedback signal input unit. The change of the bias node voltage of the gain stage of the fully differential operational amplifier synchronously adjusts the DC common-mode level of the two symmetrical differential output terminals, forming a negative feedback closed loop.

2. The fully differential operational amplifier common-mode feedback circuit based on a transconducting linear loop according to claim 1, characterized in that, The feedback signal input unit includes a first resistor and a second resistor. One end of the first resistor and the second resistor are connected to the negative input terminal of the common-mode voltage detection amplifier. The other end of the first resistor is connected to the differential positive output terminal of the fully differential operational amplifier, and the other end of the second resistor is connected to the differential negative output terminal of the fully differential operational amplifier. The positive input terminal of the common-mode voltage detection amplifier is connected to a set target common-mode reference voltage. The two output terminals of the common-mode voltage detection amplifier are respectively connected to the first-stage amplifier and the second-stage amplifier on the main amplification path of the fully differential operational amplifier.

3. The fully differential operational amplifier common-mode feedback circuit based on a transconducting linear loop according to claim 2, characterized in that, The first transconducting linear loop circuit is composed of transistors Q17, Q18, Q21, and Q22. The bases of transistors Q17 and Q18 are connected together, serving as the negative input terminal of the common-mode voltage detection amplifier, and are connected to one end of the first resistor and the second resistor. The collectors of transistors Q17 and Q18 are grounded. The emitter of transistor Q17 is connected to the base of transistor Q21. The emitter of transistor Q18 is connected to the base of transistor Q22. The emitters of transistors Q21 and Q22 are connected to one end of resistor R9. The second transconducting linear loop circuit is composed of transistors Q19, Q20, Q23, and Q24. The bases of transistors Q19 and Q20 are connected and serve as the positive input terminal of the common-mode voltage detection amplifier, which is connected to the set target common-mode reference voltage. The collectors of transistors Q19 and Q20 are grounded; the emitter of transistor Q19 is connected to the base of transistor Q23; the emitter of transistor Q20 is connected to the base of transistor Q24; and the emitters of transistors Q23 and Q24 are connected to the other end of resistor R9.

4. The fully differential operational amplifier common-mode feedback circuit based on a transconducting linear loop according to claim 3, characterized in that, In the symmetrical transconductance linear loop amplifier circuit, transistor Q21 has its emitter connected to emitter resistor R20, transistor Q22 has its emitter connected to emitter resistor R21, transistor Q23 has its emitter connected to emitter resistor R22, and transistor Q24 has its emitter connected to emitter resistor R23.

5. The fully differential operational amplifier common-mode feedback circuit based on a transconducting linear loop according to any one of claims 3-4, characterized in that, The output voltage divider unit is a proportional voltage divider unit, including symmetrically distributed resistors R1~8 and R10~17, which are respectively connected to the output terminals of the first transconducting linear loop circuit and the second transconducting linear loop circuit. The differential current signals output by the two transconducting linear loop circuits are converted into two synchronously changing feedback control voltages through resistor proportional voltage division, that is, the voltages of the feedback signal output terminal nodes A~H. One end of resistor R1 is connected to one end of resistor R10, serving as feedback signal output node A; one end of resistor R2 is connected to one end of resistor R12, serving as feedback signal output node B; one end of resistor R3 is connected to one end of resistor R11, serving as feedback signal output node C; one end of resistor R4 is connected to one end of resistor R13, serving as feedback signal output node D; one end of resistor R5 is connected to one end of resistor R14, serving as feedback signal output node E; one end of resistor R6 is connected to one end of resistor R16, serving as feedback signal output node F; one end of resistor R7 is connected to one end of resistor R15, serving as feedback signal output node G; and one end of resistor R8 is connected to one end of resistor R17, serving as feedback signal output node G. Point H; the other ends of resistors R1, R3, R5, and R7 are connected to the emitters of transistors Q19 and Q17 via current sources; the other ends of resistors R2, R4, R6, and R8 are connected to the emitters of transistors Q20 and Q18 via current sources; the other ends of resistors R10 and R11 are connected to the collector of transistor Q23; the other ends of resistors R12 and R13 are connected to the collector of transistor Q24; the other ends of resistors R14 and R15 are connected to the collector of transistor Q21; and the other ends of resistors R16 and R17 are connected to the collector of transistor Q22.

6. The fully differential operational amplifier common-mode feedback circuit based on a transconducting linear loop according to any one of claims 3-4, characterized in that, The output voltage divider unit is a proportional voltage divider unit composed of current mirrors, including PNP transistors Q25, Q27, Q29, Q31, diodes D1 and D3, NPN transistors Q26, Q28, Q30, Q32, D2, and D4; it is connected to the output terminals of the first and second transconducting linear loop circuits respectively, and converts the differential current signals output by the two transconducting linear loop circuits into two synchronously changing feedback control voltages, i.e., the voltages of nodes A~H at the feedback signal output terminals; The emitters of PNP transistors Q25, Q27, Q29, and Q31, the anode of diodes D1 and D3 are connected to the emitters of transistors Q17 and Q19 via a current source; the bases of PNP transistors Q25 and Q27 are connected to the cathode of diode D1, and the bases of PNP transistors Q29 and Q31 are connected to the cathode of diode D3; the collector of PNP transistor Q25 serves as the feedback signal output node A, the collector of PNP transistor Q27 serves as the feedback signal output node C, the collector of PNP transistor Q29 serves as the feedback signal output node E, and the collector of PNP transistor Q31 serves as the feedback signal output node G. The emitters of NPN transistors Q26, Q28, Q30, and Q32, the cathode of diode D2, and the cathode of diode D4 are connected to the emitter of transistor Q20 via a current source; the bases of NPN transistors Q26 and Q28 are connected to the anode of diode D2, and the bases of NPN transistors Q30 and Q32 are connected to the anode of diode D4; the collector of NPN transistor Q26 serves as the feedback signal output node B, the collector of NPN transistor Q28 serves as the feedback signal output node D, the collector of NPN transistor Q30 serves as the feedback signal output node F, and the collector of NPN transistor Q32 serves as the feedback signal output node H.

7. A fully differential operational amplifier, employing the common-mode feedback circuit of a fully differential op-amp based on a transconducting linear loop as described in any one of claims 1 to 6, characterized in that, The main amplification path of the fully differential operational amplifier is a two-stage fully differential architecture consisting of a first-stage amplifier and a second-stage amplifier, with two symmetrical differential outputs. The common-mode feedback circuit of the fully differential op-amp acquires the DC common-mode level of the two symmetrical differential outputs in real time through voltage division. The main amplification path has at least one gain stage that can be adjusted by an external feedback control voltage. The amplification device of the gain stage is provided with a bias node that can be connected to the feedback control voltage, and the change of the bias node voltage synchronously adjusts the DC common-mode level of the two symmetrical differential outputs. The change of the feedback control voltage output by the common-mode feedback circuit of the fully differential op-amp causes the common-mode level of the two symmetrical differential outputs of the main amplification path of the fully differential operational amplifier to shift and return to the set value of the target common-mode reference voltage.

8. The fully differential operational amplifier according to claim 7, characterized in that, The first stage amplifier is a fully differential input transconductance stage, and the second stage amplifier is a fully differential output stage; The first-stage amplifier adopts a bipolar differential pair structure to realize pre-amplification and level conversion of the differential input signal, providing differential drive signal for the fully differential output stage. The first-stage amplifier includes PNP transistors Q1, Q3, Q6, and Q8, NPN transistors Q2, Q4, Q5, and Q7, and resistor R0. The bases of transistors Q1 and Q2 are connected to the positive input terminal of the fully differential operational amplifier, the collectors of transistors Q1 and Q2 are grounded, the emitter of transistor Q1 is connected to the base of transistor Q5 and a constant current source, the emitter of transistor Q2 is connected to the base of transistor Q6 and a constant current source, the emitters of transistors Q5 and Q6 are connected to one end of resistor R0, the bases of transistors Q3 and Q4 are connected to the negative input terminal of the fully differential operational amplifier, the collectors of transistors Q3 and Q4 are grounded, the emitter of transistor Q3 is connected to the base of transistor Q7 and a constant current source, the emitter of transistor Q4 is connected to the base of transistor Q8 and a constant current source, and the emitters of transistors Q7 and Q8 are connected to the other end of resistor R0. The collector of transistor Q5 is connected to node A of the feedback signal output terminal, the collector of transistor Q7 is connected to node C of the feedback signal output terminal, the collector of transistor Q6 is connected to node B of the feedback signal output terminal, and the collector of transistor Q8 is connected to node D of the feedback signal output terminal.

9. The fully differential operational amplifier according to claim 8, characterized in that, The second-stage amplifier uses eight bipolar transistors to form an H-bridge structure. Each transistor has both common-emitter and common-base amplification configurations. Its base and emitter are equipped with bias nodes that can be connected to external feedback control voltage. By adjusting the voltage of the bias nodes, the DC common-mode level of the two symmetrical differential output terminals can be adjusted synchronously.

10. The fully differential operational amplifier according to claim 9, characterized in that, The second-stage amplifier includes PNP transistors Q10, Q12, Q13, and Q15, and NPN transistors Q9, Q11, Q14, and Q16; The base of transistor Q9 is connected to the feedback signal output node C, the base of transistor Q10 is connected to the feedback signal output node D, the base of transistor Q11 is connected to the feedback signal output node A, and the base of transistor Q12 is connected to the feedback signal output node B. The collectors of transistors Q9 and Q11 are connected to the emitters of transistors Q3 and Q7 via a constant current source. The collectors of transistors Q10 and Q12 are connected to the emitters of transistors Q2, Q6, Q4, and Q8 via a constant current source. The emitters of transistors Q9 through Q12 are grounded via a constant current source. The emitter of transistor Q9 is connected to the base of transistor Q13. The emitter of transistor Q10 is connected to the base of transistor Q14. The collectors of transistors Q13 and Q14 are connected to the differential negative output of a fully differential operational amplifier. The emitter of transistor Q11 is connected to the base of transistor Q15. The emitter of transistor Q12... The base of transistor Q16 is connected to the base of transistor Q15, and the collectors of transistors Q16 are connected to the differential positive output terminal of the fully differential operational amplifier. The base of transistor Q11 is connected to the feedback signal output terminal node A, the base of transistor Q12 is connected to the feedback signal output terminal node B, the base of transistor Q9 is connected to the feedback signal output terminal node C, the base of transistor Q10 is connected to the feedback signal output terminal node D, the emitter of transistor Q13 is connected to the feedback signal output terminal node E, the emitter of transistor Q14 is connected to the feedback signal output terminal node F, the emitter of transistor Q15 is connected to the feedback signal output terminal node G, and the emitter of transistor Q16 is connected to the feedback signal output terminal node H.

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