Direct-current power supply current sharing device based on FPGA (Field Programmable Gate Array)

Abstract

The utility model discloses a direct-current power supply current sharing device based on an FPGA (Field Programmable Gate Array). The first direct-current power supply and the second direct-current power supply output in parallel; the at least two current detection units are respectively used for detecting the output current of the two direct current power supplies, the outputs of the two current detection units are connected with the input end of the A / D conversion unit through the multi-way switch, and the output end of the A / D conversion unit is connected with the input end of the FPGA; the first direct-current power supply and the second direct-current power supply are switching power supplies, switching tubes of the switching power supplies are controlled by the FPGA, and the FPGA controls the duty ratio of the switching tubes through PWM signals output by the FPGA, so that the output of the first direct-current power supply and the output of the second direct-current power supply are adjusted respectively, and the output current of the first direct-current power supply and the output current of the second direct-current power supply conform to the preset current-sharing degree. According to the utility model, current sharing during parallel power supply of the direct-current power supplies can be realized, so that the direct-current power supplies are in a reasonable output range, and the purpose of output equalization is achieved.

Description

Technical Field

[0001] The utility model relates to the field of electronic technology, and in particular to a direct current power supply current equalization device based on FPGA. Background Art

[0002] In order to increase the power supply capacity, two or more DC power supplies are often connected in parallel or combined with a backup power supply. When two or more DC power supplies are connected in parallel, since the DC power supplies are not completely consistent or their capacity specifications are different, it is necessary to reasonably allocate the current rating of each power supply so that each DC power supply is within its reasonable output range to achieve the purpose of output balance. Utility Model Content

[0003] To achieve the above-mentioned purpose, the utility model aims to provide a DC power supply current equalization device based on FPGA, which realizes automatic current equalization of the DC power supply through current feedback combined with FPGA.

[0004] The specific technical solution of the utility model is as follows:

[0005] A DC power supply current balancing device based on FPGA, including:

[0006] At least two first DC power supplies and second DC power supplies with outputs connected in parallel;

[0007] At least two current detection units, namely a first current detection unit and a second current detection unit, wherein the first current detection unit is used to detect the output current of the first DC power supply, and the second current detection unit is used to detect the output current of the second DC power supply;

[0008] The outputs of the first current detection unit and the second current detection unit are respectively connected to two input ends of a multi-way switch, the output end of the multi-way switch is connected to the input end of an A / D conversion unit, and the output end of the A / D conversion unit is connected to the input end of an FPGA;

[0009] The multi-way switch is controlled by the FPGA and is used to select the output of the first current detection unit or the second current detection unit to be connected to the input end of the A / D conversion unit;

[0010] The first DC power supply and the second DC power supply are both switching power supplies, and the switching tubes of the switching power supplies are controlled by FPGA. The FPGA controls the duty cycle of the switching tubes through the PWM signal it outputs, thereby adjusting the outputs of the first DC power supply and the second DC power supply respectively, so that the output currents of the first DC power supply and the second DC power supply meet the preset current sharing degree.

[0011] Furthermore, the output end of the first DC power supply is connected in series with a first relay, and the output end of the second DC power supply is connected in series with a second relay. The first relay and the second relay are both controlled by an FPGA to control whether the first DC power supply and the second DC power supply supply power to the load.

[0012] Furthermore, a triode or MOS tube is connected in series in the coil return current of the first relay and the second relay, and the base or gate of the triode or MOS tube is connected to the output of the FPGA.

[0013] Furthermore, the FPGA is solidified with a first control module, which controls the first relay or the second relay to disconnect the first DC power supply or the second DC power supply from the load through the output of the FPGA when the output of the first current detection unit or the second current detection unit is greater than a first threshold.

[0014] Furthermore, the input of the FPGA is connected to a selection switch, and the FPGA is solidified with a second control module, which is used to control the on and off of the first relay and the second relay according to the input of the selection switch so that the first DC power supply and / or the second DC power supply is connected to the load.

[0015] Preferably, the first current detection unit includes a first shunt, and the second current detection unit includes a second shunt.

[0016] Preferably, the first shunt is connected to the input of the first amplifier circuit, the second shunt is connected to the input of the second amplifier circuit, and the outputs of the first amplifier circuit and the second amplifier circuit are respectively connected to different input terminals of a multi-way switch.

[0017] Furthermore, both the first amplifying circuit and the second amplifying circuit have a limiting function.

[0018] Furthermore, the FPGA is solidified with a third control module, and the third control module is used to output a PWM signal according to the outputs of the first current detection unit and the second current detection unit to adjust the duty cycle of the switch tube.

[0019] The working principle of the utility model is as follows:

[0020] When the first DC power supply and the second DC power supply are supplied in parallel, the output currents of the first DC power supply and the second DC power supply are detected in real time by the first current detection unit and the second current detection unit, and the PWM signal is output through the FPGA to adjust the duty cycle of the switch tubes of the first DC power supply and the second DC power supply, thereby adjusting the outputs of the first DC power supply and the second DC power supply respectively, so that the output currents of the first DC power supply and the second DC power supply meet the preset current sharing degree.

[0021] The first threshold may be a short-circuit current value of the DC power supply. When a short-circuit fault occurs in the DC power supply, the FPGA disconnects the DC power supply from the power supply circuit through the first relay or the second relay.

[0022] By selecting the switch, the input of each DC power supply can be controlled.

[0023] The beneficial effects of the utility model are as follows:

[0024] 1. The utility model can realize current sharing when DC power supplies are connected in parallel, so that each DC power supply can achieve output balance within its reasonable output range.

[0025] 2. The utility model adopts FPGA for control, and has a fast response speed.

[0026] 3. The utility model adopts a combination of a multi-way switch and an A / D conversion unit, which can reduce the complexity of the circuit and reduce the cost.

[0027] 4. The utility model can realize short circuit protection.

[0028] 5. The utility model can realize the combined input of various DC power supplies according to the selection switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a schematic diagram of Example 1.

[0030] Figure 2 This is a schematic diagram of Example 2.

[0031] Figure 3 This is the principle diagram of Example 3. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings. Example

[0033] This embodiment discloses a DC power supply current balancing device based on FPGA, specifically as follows Figure 1 As shown, including;

[0034] At least two first DC power supplies and second DC power supplies with outputs connected in parallel;

[0035] At least two current detection units, namely a first current detection unit and a second current detection unit, the first current detection unit is used to detect the output current of the first DC power supply, and the second current detection unit is used to detect the output current of the second DC power supply;

[0036] The outputs of the first current detection unit and the second current detection unit are respectively connected to two input ends of the multi-way switch, the output end of the multi-way switch is connected to the input end of the A / D conversion unit, and the output end of the A / D conversion unit is connected to the input end of the FPGA;

[0037] The multi-way switch is controlled by the FPGA and is used to select the output of the first current detection unit or the second current detection unit to be connected to the input end of the A / D conversion unit;

[0038] The first DC power supply and the second DC power supply are both switching power supplies. The switch tube of the switching power supply is controlled by the FPGA. The FPGA controls the duty cycle of the switch tube through the PWM signal it outputs, thereby adjusting the output of the first DC power supply and the second DC power supply respectively, so that the output current of the first DC power supply and the second DC power supply meets the preset current sharing degree.

[0039] Specifically,

[0040] The first current detection unit includes a first shunt, and the second current detection unit includes a second shunt.

[0041] The first shunt is connected to the input of the first amplifier circuit, the second shunt is connected to the input of the second amplifier circuit, the outputs of the first amplifier circuit and the second amplifier circuit are respectively connected to different input ends of the multi-way switch; the first amplifier circuit and the second amplifier circuit both have a limiting function.

[0042] Among them, the FPGA is solidified with a third control module, and the third control module is used to output a PWM signal according to the outputs of the first current detection unit and the second current detection unit to adjust the duty cycle of the switch tube. Example

[0043] On the basis of Example 1, the FPGA-based DC power supply current balancing device disclosed in this embodiment has a short-circuit protection function, specifically as follows Figure 2 As shown, the output end of the first DC power supply is connected in series with a first relay, and the output end of the second DC power supply is connected in series with a second relay. The first relay and the second relay are both controlled by FPGA to control whether the first DC power supply and the second DC power supply supply power to the load.

[0044] A triode or MOS tube is connected in series in the coil return current of the first relay and the second relay, and the base or gate of the triode or MOS tube is connected to the output of the FPGA.

[0045] The FPGA is solidified with a first control module. When the output of the first current detection unit or the second current detection unit is greater than a first threshold, the first control module controls the first relay or the second relay through the output of the FPGA to disconnect the first DC power supply or the second DC power supply from the load.

[0046] The other parts of this embodiment are the same as those of Embodiment 1, and thus will not be described in detail. Example

[0047] Based on the second embodiment, this embodiment adds a power input selection switch, as shown in FIG. Figure 3 As shown, the input of the FPGA is connected to a selection switch, and the FPGA is solidified with a second control module. The second control module is used to control the on and off of the first relay and the second relay according to the input of the selection switch so that the first DC power supply and / or the second DC power supply is connected to the load.

[0048] The other parts of this embodiment are the same as those of Embodiment 2, and thus will not be described in detail.

[0049] Of course, the present invention may have many other embodiments. Without departing from the spirit and essence of the present invention, technicians familiar with the field may make various corresponding changes and deformations based on the present invention, but these corresponding changes and deformations should all fall within the scope of protection of the claims attached to the present invention.

Claims

1. A DC power supply current balancing device based on FPGA, characterized in that: include; At least two first DC power supplies and second DC power supplies with outputs connected in parallel; At least two current detection units, namely a first current detection unit and a second current detection unit, wherein the first current detection unit is used to detect the output current of the first DC power supply, and the second current detection unit is used to detect the output current of the second DC power supply; The outputs of the first current detection unit and the second current detection unit are respectively connected to two input ends of a multi-way switch, the output end of the multi-way switch is connected to the input end of an A / D conversion unit, and the output end of the A / D conversion unit is connected to the input end of an FPGA; The multi-way switch is controlled by the FPGA and is used to select the output of the first current detection unit or the second current detection unit to be connected to the input end of the A / D conversion unit; The first DC power supply and the second DC power supply are both switching power supplies, and the switching tubes of the switching power supplies are controlled by FPGA. The FPGA controls the duty cycle of the switching tubes through the PWM signal it outputs, thereby adjusting the outputs of the first DC power supply and the second DC power supply respectively, so that the output currents of the first DC power supply and the second DC power supply meet the preset current sharing degree.

2. The FPGA-based DC power supply current balancing device according to claim 1, characterized in that: The output end of the first DC power supply is connected in series with a first relay, and the output end of the second DC power supply is connected in series with a second relay. The first relay and the second relay are both controlled by FPGA to control whether the first DC power supply and the second DC power supply supply power to the load.

3. The FPGA-based DC power supply current balancing device according to claim 2, characterized in that: A triode or MOS tube is connected in series in the coil return current of the first relay and the second relay, and the base or gate of the triode or MOS tube is connected to the output of the FPGA.

4. The FPGA-based DC power supply current balancing device according to claim 2 or 3, characterized in that: The FPGA is solidified with a first control module, which controls the first relay or the second relay to disconnect the first DC power supply or the second DC power supply from the load through the output of the FPGA when the output of the first current detection unit or the second current detection unit is greater than a first threshold.

5. The FPGA-based DC power supply current balancing device according to claim 1, characterized in that: The input of the FPGA is connected to a selection switch, and the FPGA is solidified with a second control module, which is used to control the on and off of the first relay and the second relay according to the input of the selection switch so that the first DC power supply and / or the second DC power supply is connected to the load.

6. The FPGA-based DC power supply current balancing device according to claim 1, characterized in that: The first current detection unit includes a first shunt, and the second current detection unit includes a second shunt.

7. The FPGA-based DC power supply current balancing device according to claim 6, characterized in that: The first shunt is connected to the input of the first amplifier circuit, the second shunt is connected to the input of the second amplifier circuit, and the outputs of the first amplifier circuit and the second amplifier circuit are respectively connected to different input terminals of a multi-way switch.

8. The FPGA-based DC power supply current balancing device according to claim 7, characterized in that: The first amplifying circuit and the second amplifying circuit both have a limiting function.

9. The FPGA-based DC power supply current balancing device according to claim 1, characterized in that: The FPGA is solidified with a third control module, and the third control module is used to output a PWM signal according to the outputs of the first current detection unit and the second current detection unit to adjust the duty cycle of the switch tube.

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