High-speed transmission intelligent tablet mainboard data interface optimization assembly
By combining an interface identification module, an adaptive conversion module, a signal enhancement module, a power management module, and a control module, the data transmission compatibility problem caused by inconsistent interface standards of different devices is solved, and efficient, stable, and continuous data transmission of the high-speed smart tablet motherboard is achieved.
Patent Information
- Application Number
- CN202520463276.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-17
- Publication Date
- 2026-01-30
- Estimated Expiration
- 2035-03-17
AI Technical Summary
Inconsistent interface standards between different devices can lead to limited or impossible data transmission speeds, compatibility issues, and affect the universality of data transmission.
By employing a combination of interface identification module, adaptive conversion module, signal enhancement module, power management module, and control module, adaptive conversion of data signals and power management are achieved, ensuring normal operation of the equipment and stability of data transmission.
It achieves compatibility with devices of different interface standards, ensures efficient and stable data transmission, avoids system impact when devices are connected or disconnected, and guarantees the continuity and quality of data transmission.
Smart Images

Figure CN223857699U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to intelligent panel mainboard data interface technical field, concretely is high speed transmission intelligent panel mainboard data interface optimization assembly. BACKGROUND
[0002] High speed transmission intelligent panel mainboard is a kind of panel computer mainboard specially designed to meet the demand of high speed data transmission, it is usually integrated with high-performance processor, large capacity memory and optimized data transmission channel, to ensure that the transmission speed of data on mainboard reaches optimum.
[0003] At present, the data interface of high speed transmission intelligent panel mainboard usually has USB3.0 interface, USB3.1Gen1 / Gen2 interface, Type-C interface etc., these interface standards are compared with old version such as USB2.0, provide higher data transmission rate and stronger power management capability, wherein Type-C interface is with its support positive and negative insertion, smaller volume, faster transmission speed, support larger power transmission and other advantages, become the excellent choice of high speed data transmission interface;
[0004] However, due to the interface standard between different devices may be different, resulting in compatibility problem when data transmission, such as some devices can only support USB2.0 interface, and high speed transmission intelligent panel mainboard provides USB3.0 or higher version interface, this can limit the data transmission speed or cannot be transmitted, so that the limitation of data transmission, therefore we need to propose high speed transmission intelligent panel mainboard data interface optimization assembly to solve the above problems, so that it can be according to the standard interface between different devices data adaptive conversion, so that it can be compatible with different devices, improve the versatility of data transmission. UTILITY MODEL CONTENT
[0005] The utility model aims at providing high speed transmission intelligent panel mainboard data interface optimization assembly, can according to the standard interface between different devices data adaptive conversion, so that it can be compatible with different devices, improve the versatility of data transmission, to solve the problem proposed in background art.
[0006] To achieve the above object, the utility model provides the following technical scheme: high speed transmission intelligent panel mainboard data interface optimization assembly, it includes: the interface identification module for identifying the interface standard of connecting device;
[0007] Adaptive conversion module is automatically converted from the data interface standard of mainboard to the interface standard supported by connecting device according to the judgment result of interface identification module, one end of the adaptive conversion module is connected with signal enhancement module for enhancing transmission signal;
[0008] The power management module dynamically adjusts the output voltage according to the interface type of the connected device, and is electrically connected with an interface identification module, an adaptive conversion module and a signal enhancement module respectively.
[0009] The control module dynamically adjusts the data transmission rate according to the interface type, and is electrically connected with the power management module, the adaptive conversion module, the signal enhancement module and the interface identification module respectively.
[0010] Preferably, the interface identification module comprises an interface identification chip U1, a capacitor C4 is connected between the 1th pin and the 8th pin of the interface identification chip U1, a capacitor C1 and a capacitor C2 for receiving the input signal of the connected device are connected in parallel to the 2th pin of the interface identification chip U1, a resistor R1 is connected between the 2th pin and the 3th pin of the interface identification chip U1, a ground resistor R2 and a ground resistor R3 are connected between the 3th pin and the 4th pin of the interface identification chip U1, a capacitor C8, a resistor R4 and a capacitor C5 arranged in series are connected to the 6th pin of the interface identification chip U1, a diode D1, a capacitor C6 and a capacitor C7 are connected in parallel between the 7th pin and the 8th pin of the interface identification chip U1, an inductor L1 is connected between the diode D1 and the capacitor C6, and a resistor R5 and a resistor R6 arranged in series are connected to the connection end of the 8th pin of the interface identification chip U1 and the capacitor C7.
[0011] Preferably, the adaptive conversion module comprises a conversion chip U5, a ground capacitor C12 is connected to the 9th pin of the conversion chip U5, a ground capacitor C13 is connected to the 1th pin of the conversion chip U5, a resistor R27 for connecting with the signal enhancement module is connected to the 8th pin of the conversion chip U5, a resistor R9 and a resistor R17 are connected to the 2th pin of the conversion chip U5, the other end of the resistor R17 is connected to the 3th pin of the conversion chip U5 through a resistor R19, the other end of the resistor R9 is connected to the 3th pin of the conversion chip U5 through a resistor R18, an adjustable resistor V1 is connected to the 7th pin of the conversion chip U5, and the two non-adjustment ends of the adjustable resistor V1 are respectively connected to the connection ends of the resistor R19 and the resistor R17 and the connection ends of the resistor R18 and the resistor R9.
[0012] Preferably, the signal enhancement module comprises a differential line driving chip U2, a ground inductor L21 and a capacitor C22 for receiving the signal of the adaptive conversion module are connected to the 1th pin of the differential line driving chip U2, a ground capacitor C31 is connected to the 4th pin of the differential line driving chip U2, a ground capacitor C41 is connected to the 6th pin of the differential line driving chip U2, and a ground crystal oscillator Y1 is connected to the 8th pin of the differential line driving chip U2.
[0013] Preferably, the power management module comprises a voltage conversion chip U21, the 4-pin of the voltage conversion chip U21 is connected with a ground resistance R211, the 6-pin of the voltage conversion chip U21 is connected with a ground capacitor C211, the 5-pin of the voltage conversion chip U21 is connected with a ground resistance R213 and a resistance R212 for connecting 5V voltage, the 8-pin of the voltage conversion chip U21 is connected with an inductor L21 and a ground diode D21, one end of the inductor L21 is connected with a capacitor C213 and a capacitor C214 in parallel, the connection end of the capacitor C213 and the capacitor C214 is connected with the other end of the resistance R212, the 1-pin of the voltage conversion chip U21 is connected with the connection end of the 8-pin of the voltage conversion chip U21 and the inductor L21 through a capacitor C212.
[0014] Preferably, the control module comprises a control chip U4, the 6-pin and the 7-pin of the control chip U4 are connected with a capacitor C41, the 11-pin of the control chip U4 is connected with an adjustable resistance R51, the 9-pin of the control chip U4 is connected with a resistance R45 and a ground capacitor C53 arranged in series, the 10-pin of the control chip U4 is connected with a ground resistance R25, the 13-pin of the control chip U4 is connected with the 9-pin of the control chip U4 through a resistance R15.
[0015] Preferably, the hot plug management module for managing the hot plug operation of the equipment is further included, and the hot plug management module is electrically connected with the control module.
[0016] Preferably, the hot plug management module comprises a hot plug protection chip U3, the 6-pin between the 1-pin of the hot plug protection chip U3 is connected with a resistance R35, the 4-pin of the hot plug protection chip U3 is connected with a MOS tube Q12, the source and the drain of the MOS tube Q12 are connected with the 3-pin and the 5-pin of the hot plug protection chip U3 respectively.
[0017] Compared with the prior art, the utility model has the advantages that:
[0018] 1, the utility model discloses an interface recognition module, adaptive conversion module, signal enhancement module, power management module and control module's cooperation, when the equipment is connected to the data interface of adjustment transmission intelligent panel mainboard, the interface recognition module identifies the interface standard of equipment, and according to the identification result, the adaptive module automatically converts the data signal from the interface standard of mainboard to the interface standard supported by equipment, so that the data interface optimization assembly can be compatible with equipment of different interface standards, solve the limitation of data transmission, and the power module adjusts the power supply according to the power requirement of equipment, to ensure that the equipment works normally, and the control module controls the rate and quality of data transmission, realizes efficient and stable data transmission.
[0019] 2, the utility model discloses a hot plug management module's setting makes the equipment when connecting or disconnecting not to cause the impact to the system, ensures the stability of system and the continuity of data transmission when connecting or disconnecting. BRIEF DESCRIPTION OF DRAWINGS
[0020] Figure 1 It is structural block diagram of the utility model;
[0021] Figure 2 It is interface identification module circuit diagram of the utility model;
[0022] Figure 3 It is adaptive conversion module circuit diagram of the utility model;
[0023] Figure 4 It is signal enhancement module circuit diagram of the utility model;
[0024] Figure 5 It is power management module circuit diagram of the utility model;
[0025] Figure 6 It is control module circuit diagram of the utility model;
[0026] Figure 7 It is hot plug management module circuit diagram of the utility model. DETAILED DESCRIPTION
[0027] The technical solutions in the embodiments of the utility model will be described clearly and completely below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of the utility model.
[0028] Please refer to Figures 1-7 The utility model provides a technical scheme: high -speed transmission intelligent flat plate mainboard data interface optimization subassembly, including the interface identification module for identifying the interface standard of connecting equipment, the adaptive conversion module of automatically converting data signal from the data interface standard of mainboard to the interface standard supported to connecting equipment according to the judgment result of interface identification module, one end of adaptive conversion module is connected with the signal enhancement module for enhancing transmission signal, the power management module of dynamic adjustment output voltage according to the interface type of connecting equipment, and power management module is electrically connected with interface identification module, adaptive conversion module and signal enhancement module respectively, the control module of dynamic adjustment data transmission rate according to interface type, and control module is electrically connected with power management module, adaptive conversion module, signal enhancement module and interface identification module respectively;
[0029] When the device is connected to the data interface of the adjustment transmission intelligent tablet mainboard, the interface identification module identifies the interface standard of the device, and the automatic conversion module automatically converts the data signal from the interface standard of the mainboard to the interface standard supported by the device according to the identification result, so that the data interface optimization component can be compatible with devices of different interface standards, solve the limitation of data transmission, the power module adjusts the power supply according to the power requirement of the device, ensures the normal work of the device, and the control module controls the rate and quality of data transmission, realizes efficient and stable data transmission.
[0030] Among them, the interface identification module includes interface identification chip U1, the capacitor C4 is connected between the 1 pin and the 8 pin of the interface identification chip U1, the capacitor C1 and the capacitor C2 for receiving the input signal of the connected device are connected in parallel on the 2 pin of the interface identification chip U1, the resistor R1 is connected between the 2 pin and the 3 pin of the interface identification chip U1, the ground resistor R2 and the ground resistor R3 are connected between the 3 pin and the 4 pin of the interface identification chip U1, the capacitor C8, the resistor R4 and the capacitor C5 arranged in series are connected on the 6 pin of the interface identification chip U1, the diode D1, the capacitor C6 and the capacitor C7 are connected in parallel between the 7 pin and the 8 pin of the interface identification chip U1, and the inductor L1 is connected between the diode D1 and the capacitor C6, the resistor R5 and the resistor R6 arranged in series are connected between the capacitor C7 and the 8 pin connection end of the interface identification chip U1, the input signal on the connected device is filtered by the capacitor C1 and the capacitor C2, the resistor R1 is used for current limiting or voltage dividing, a protection circuit is formed by the diode D1, the capacitor C6 and the capacitor C7 to prevent reverse voltage from damaging the interface identification chip U1, the TPS2549 is used for the interface identification chip U1, which is convenient for automatically identifying the interface type of the connected device and providing conversion basis for the adaptive conversion module.
[0031] The adaptive conversion module comprises a conversion chip U5, a ground capacitor C12 is connected to the 9-pin of the conversion chip U5, a ground capacitor C13 is connected to the 1-pin of the conversion chip U5, a resistor R27 for connecting with the signal enhancement module is connected to the 8-pin of the conversion chip U5, a resistor R9 and a resistor R17 are connected to the 2-pin of the conversion chip U5, the other end of the resistor R17 is connected to the 3-pin of the conversion chip U5 through a resistor R19, the other end of the resistor R9 is connected to the 3-pin of the conversion chip U5 through a resistor R18, an adjustable resistor V1 is connected to the 7-pin of the conversion chip U5, the two non-adjustment ends of the adjustable resistor V1 are connected to the connection ends of the resistor R19 and the resistor R17 and the connection ends of the resistor R18 and the resistor R9 respectively, the conversion chip U5 uses a TXB0108 chip, the resistor R9, the resistor R17, the resistor R18, the resistor R19 and the adjustable resistor constitute a voltage division circuit or a feedback network, which is used for adjusting internal circuit parameters of the conversion chip U5, such as gain, bias current and the like. The adjustable resistor V1 allows the user or the system to automatically adjust these parameters to adapt to different interface standards, so as to adjust the data transmission rate.
[0032] The signal enhancement module comprises a differential line driving chip U2, a ground inductor L21 and a capacitor C22 for receiving signals from the adaptive conversion module are connected to the 1-pin of the differential line driving chip U2, a ground capacitor C31 is connected to the 4-pin of the differential line driving chip U2, a ground capacitor C41 is connected to the 6-pin of the differential line driving chip U2, a ground crystal oscillator Y1 is connected to the 8-pin of the differential line driving chip U2, the differential line driving chip U2 internally comprises a differential amplification circuit, which amplifies the input differential signal and outputs to the differential output pin of the chip, the amplified differential signal has higher amplitude and stronger anti-interference ability, and can maintain the integrity of the signal in long-distance transmission, the capacitor C22 and the inductor L21 constitute a filter circuit, which is used for removing high-frequency noise in the input signal and ensuring the purity of the signal, at the same time, the capacitor C22 also plays a role of passing alternating current and blocking direct current, preventing the direct current voltage from affecting the differential signal, the signals from the adaptive conversion module are differentially amplified and transmitted through the differential line driving chip U2, effectively improving the anti-interference ability and transmission quality of the signal, and ensuring the integrity and stability of the data in the transmission process.
[0033] The power management module comprises a voltage conversion chip U21, the 4th pin of the voltage conversion chip U21 is connected with a ground resistance R211, the 6th pin of the voltage conversion chip U21 is connected with a ground capacitor C211, the 5th pin of the voltage conversion chip U21 is connected with a ground resistance R213 and a resistance R212 for connecting a 5V voltage, the 8th pin of the voltage conversion chip U21 is connected with an inductor L21 and a ground diode D21, one end of the inductor L21 is connected in parallel with a capacitor C213 and a capacitor C214, the connection end of the capacitor C213 and the capacitor C214 is connected with the other end of the resistance R212, the 1st pin of the voltage conversion chip U21 is connected with the 8th pin of the voltage conversion chip U21 and the connection end of the inductor L21 through a capacitor C212, the output voltage of the power management module is adjusted through the cooperation of the capacitor C213, the capacitor C214 and the voltage conversion chip U21, the output voltage of the voltage conversion chip U21 is smoothed through the inductor L21 and the diode D21, and the ripple is reduced.
[0034] The control module comprises a control chip U4, the 6th pin and the 7th pin of the control chip U4 are connected with a capacitor C41, the 11th pin of the control chip U4 is connected with an adjustable resistance R51, the 9th pin of the control chip U4 is connected with a resistance R45 and a ground capacitor C53 arranged in series, the 10th pin of the control chip U4 is connected with a ground resistance R25, the 13th pin of the control chip U4 is connected with the 9th pin of the control chip U4 through a resistance R15, the capacitor C41 is used for filtering and stabilizing the working voltage of the control chip U4, so as to ensure that the chip can stably run when adjusting the data transmission rate, the adjustable resistance R5 is used for adjusting the internal reference voltage or signal gain of the control chip U4, so as to affect the adjustment range of the data transmission rate, by adjusting the resistance value of R51, the output signal characteristics of the control chip U4 can be changed, and then different interface rates are adapted;The resistance R45 and the ground capacitor C53 are used for forming an RC filter circuit, filtering high-frequency noise, and ensuring the stability of the signal input of the control chip U4, at the same time, the parameters of the RC filter circuit can affect the response speed of the control chip U4, thereby indirectly affecting the adjustment of the data transmission rate, the ground resistance R25 is used for setting the input impedance of the control chip U4, ensuring the matching of signal transmission, avoiding signal reflection or attenuation, and the resistance R15 is used for feedback control, feeding back the output signal of the control chip U4 to the input end, forming a closed-loop control, and ensuring the adjustment accuracy and stability of the data transmission rate.
[0035] In order to make the device not to cause the impact to the system when connecting or disconnecting, ensure the stability of the system and the continuity of data transmission when connecting or disconnecting, also include a hot plug management module for managing the hot plug operation of the device, the hot plug management module is electrically connected with the control module, the hot plug management module includes a hot plug protection chip U3, the 6th pin between the 1st pin of the hot plug protection chip U3 is connected with a resistor R35, the 4th pin of the hot plug protection chip U3 is connected with a MOS tube Q12, the source and drain of the MOS tube Q12 are connected with the 3rd pin and the 5th pin of the hot plug protection chip U3 respectively, when the device is inserted, the hot plug protection chip U3 judges that the device has been connected by detecting the insertion signal (such as voltage or current change), the hot plug protection chip U3 gradually opens the MOS tube Q12 by controlling the gate (4th pin) of the MOS tube Q12, so that the power supply or signal is slowly connected, the current impact caused by sudden power-on is avoided, the resistor R35 is used for setting the current limit or voltage threshold of the hot plug protection chip U3, so that the current and voltage are ensured to be in a safe range when the device is connected;
[0036] When the device is disconnected, the hot plug protection chip U3 detects the interruption of the signal or power supply, quickly closes the MOS tube Q12, cuts off the power supply or signal path, avoids the voltage backwash or signal interference caused by sudden power-off, the quick closing ability of the MOS tube Q12 ensures that the device will not cause impact to the system when disconnected; the hot plug protection chip U3 judges whether overcurrent or overvoltage occurs in real time by monitoring the current and voltage, if the abnormality is detected, the chip will immediately close the MOS tube Q12, cut off the power supply or signal path, protect the system and the device from being damaged, the parameter setting of the resistor R35 can affect the trigger threshold of the overcurrent and overvoltage protection, ensure the accuracy of the protection function.
[0037] Although the embodiments of the utility model have been shown and described, it can be understood by those skilled in the art that various changes, modifications, replacements and variations can be made to these embodiments without departing from the principles and spirits of the utility model, the scope of the utility model is defined by the appended claims and their equivalents.
Claims
1. A high-speed transmission intelligent tablet mainboard data interface optimization component, characterized in that: The utility model relates to a kind of interface identification module for identifying connection equipment interface standard; According to the judgment result of interface identification module, automatically convert data signal from the data interface standard of mainboard into the interface standard supported by connection equipment adaptive conversion module, one end of the adaptive conversion module is connected with signal enhancement module for signal transmission signal enhancement; According to the interface type of connection equipment, dynamically adjust the output voltage of power management module, the power management module is electrically connected with interface identification module, adaptive conversion module and signal enhancement module respectively; According to the interface type, dynamically adjust the data transmission rate of control module, the control module is electrically connected with power management module, adaptive conversion module, signal enhancement module and interface identification module respectively. The interface identification module includes interface identification chip U1, the 1 pin and the 8 pin of the interface identification chip U1 are connected with capacitor C4, the 2 pin of the interface identification chip U1 is connected with capacitor C1 and capacitor C2 in parallel for receiving connection equipment input signal, the 2 pin and the 3 pin of the interface identification chip U1 are connected with resistor R1, the 3 pin and the 4 pin of the interface identification chip U1 are connected with ground resistor R2 and ground resistor R3, the 6 pin of the interface identification chip U1 is connected with capacitor C8 and resistor R4 and capacitor C5 arranged in series, the 7 pin and the 8 pin of the interface identification chip U1 are connected in parallel with diode D1, capacitor C6 and capacitor C7, and the diode D1 and capacitor C6 are connected with inductor L1, the capacitor C7 is connected with the 8 pin of the interface identification chip U1 end with resistor R5 and resistor R6 arranged in series.
2. The high speed transmission smart tablet motherboard data interface optimization component of claim 1, wherein: The adaptive conversion module includes conversion chip U5, the 9 pin of the conversion chip U5 is connected with ground capacitor C12, the 1 pin of the conversion chip U5 is connected with ground capacitor C13, the 8 pin of the conversion chip U5 is connected with resistor R27 for connecting with signal enhancement module, the 2 pin of the conversion chip U5 is connected with resistor R9 and resistor R17, the other end of the resistor R17 is connected with the 3 pin of the conversion chip U5 through resistor R19, the other end of the resistor R9 is connected with the 3 pin of the conversion chip U5 through resistor R18, the 7 pin of the conversion chip U5 is connected with adjustable resistor V1, the two non-adjustable ends of the adjustable resistor V1 are connected with the connection end of resistor R19 and resistor R17 and the connection end of resistor R18 and resistor R9 respectively.
3. The high speed transmission smart tablet motherboard data interface optimization component of claim 1, wherein: The signal enhancement module includes differential line driving chip U2, the 1 pin of the differential line driving chip U2 is connected with ground inductor L21 and capacitor C22 for receiving adaptive conversion module signal, the 4 pin of the differential line driving chip U2 is connected with ground capacitor C31, the 6 pin of the differential line driving chip U2 is connected with ground capacitor C41, the 8 pin of the differential line driving chip U2 is connected with ground crystal oscillator Y1.
4. The high speed transmission smart tablet motherboard data interface optimization component of claim 1, wherein: 5. The high speed transmission smart tablet motherboard data interface optimization component of claim 1, wherein: The power management module comprises a voltage conversion chip U21, a 4-pin of the voltage conversion chip U21 is connected with a ground resistance R211, a 6-pin of the voltage conversion chip U21 is connected with a ground capacitor C211, a 5-pin of the voltage conversion chip U21 is connected with a ground resistance R213 and a resistance R212 for connecting a 5V voltage, an 8-pin of the voltage conversion chip U21 is connected with an inductor L21 and a ground diode D21, one end of the inductor L21 is connected with a capacitor C213 and a capacitor C214 in parallel, the connection end of the capacitor C213 and the capacitor C214 is connected with the other end of the resistance R212, and a 1-pin of the voltage conversion chip U21 is connected with an 8-pin of the voltage conversion chip U21 and a connection end of the inductor L21 through a capacitor C212.
6. The high speed transmission smart tablet motherboard data interface optimization component of claim 1, wherein: The control module comprises a control chip U4, a 6-pin and a 7-pin of the control chip U4 are connected with a capacitor C41, an 11-pin of the control chip U4 is connected with an adjustable resistance R51, a 9-pin of the control chip U4 is connected with a resistance R45 and a ground capacitor C53 arranged in series, an 10-pin of the control chip U4 is connected with a ground resistance R25, and a 13-pin of the control chip U4 is connected with a 9-pin of the control chip U4 through a resistance R15.
7. The high speed transmission smart tablet motherboard data interface optimization component of claim 1, wherein: Further comprising a hot plug management module for managing a hot plug operation of the device, the hot plug management module is electrically connected with the control module.
8. The high speed transmission smart tablet motherboard data interface optimization component of claim 7, wherein: The hot plug management module comprises a hot plug protection chip U3, a 6-pin between a 1-pin of the hot plug protection chip U3 is connected with a resistance R35, a 4-pin of the hot plug protection chip U3 is connected with a MOS tube Q12, and a source and a drain of the MOS tube Q12 are connected with a 3-pin and a 5-pin of the hot plug protection chip U3 respectively.