Soft error rate evaluation system

Abstract

To construct a soft error rate evaluation system for quickly evaluating changes in a soft error rate due to program changes.SOLUTION: Provided is a soft error rate evaluation system for evaluating radiation resistance of electronic devices, comprising: (a) a procedure for extracting a first feature quantity during execution of each of a plurality of irradiation evaluation programs from the plurality of irradiation evaluation programs and their program input conditions; (b) a statistical analysis modeling procedure for performing statistical analysis modeling from the first feature quantity of each of the plurality of irradiation evaluation programs and soft error rates for each of the plurality of irradiation evaluation programs obtained in a previously conducted neutron irradiation test to generate a statistical analysis model; (c) a procedure for extracting a second feature quantity during execution of an evaluation target program from the evaluation target program and its program input conditions; and (d) a soft error rate calculation procedure for calculating the soft error rate of the evaluation target program by using the statistical analysis model from the second feature quantity of the evaluation target program.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a soft error rate evaluation system, and more particularly to a soft error rate evaluation system for evaluating the soft error rate caused by radiation or the like in a logic semiconductor device whose operation is changed by a software program such as a processor, and in an electronic system in which the logic semiconductor device is mounted. [Background technology]

[0002] Patent Document 1 describes a soft error analysis device that generates a soft error in a simulator of a target microcomputer to analyze the effect on the target microcomputer, and is characterized by having an error information storage means in which error content or error occurrence location is registered, a functional block identification means that identifies a functional block currently being executed, and an error setting means that reads out the error content of the functional block identified by the functional block identification means or the occurrence probability of the error occurrence location from the error information storage means, and sets a soft error in the simulator in accordance with at least one of the error content or the error occurrence location. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-160421 Summary of the Invention [Problem to be solved by the invention]

[0004] With the recent rise of automation technologies such as mobility systems and industrial equipment, the reliability of electronic systems has become increasingly important. At the same time, electronic systems have become increasingly complex and large-scale, making it crucial to estimate the impact of module failures on the system to improve its reliability and stability. Soft errors, which are particularly difficult to reproduce, are one of the most important failure factors. The impact of radiation, the primary cause of soft errors, on electronic systems is assessed through radiation evaluation testing. Neutron evaluation testing is performed, particularly for electronic devices used on Earth, because neutrons are the primary cause of soft errors. Neutron irradiation evaluation testing methods have been standardized for memory devices (memory semiconductor devices) in electronic systems. However, there are no standardized neutron irradiation evaluation testing methods for logic semiconductor devices, such as processors and microcomputers (hereafter referred to as MCUs), whose behavior changes depending on the program they execute, and no de facto method has been proposed.

[0005] In addition, in the space industry, efforts are being made to utilize commercial off-the-shelf (COTS) components rather than using dedicated electronic components and systems for space-related equipment. There is a demand for reliability evaluation of COTS components in the space environment where radiation is present, and for improving the reliability of electronic systems using COTS.

[0006] On the other hand, the neutron-induced soft error rate in logic semiconductor devices such as processors and microcontrollers is known to depend on the programs they execute. Therefore, when evaluating the soft error rate of an electronic system incorporating a processor or microcontroller, the system is irradiated with neutrons while the system is running the program it will actually use or a common benchmark program, and the soft error rate is evaluated. However, in recent years, software updates via over-the-air (OTA) (a technology that sends and receives data via wireless communication when updating software, etc.) and agile design (agile is an iterative development methodology that involves repeating four phases (sprints) of development: planning, design, implementation, and testing) have become commonplace. Therefore, it is not uncommon for the executable program of an electronic system to change during its product lifecycle. Therefore, changing the executable program adopted in an electronic system changes the soft error rate, and therefore, a reevaluation of the soft error rate of the modified executable program is required. Currently, the only way to obtain the soft error rate when a changed program is executed is to re-perform a neutron irradiation evaluation test each time the program is changed, which poses the issues of high cost and long evaluation time (long TAT: Turn Around Time).In addition, when operating in harsh environments for a long period of time, such as in the space industry, higher reliability is required than on the ground, and it is thought that the impact of onboard programs on the soft error rate needs to be evaluated in detail, but evaluation tests for multiple programs are required, which also poses the issues of high cost and long evaluation time.

[0007] The present disclosure has been made in consideration of the above points, and aims to construct a soft error rate evaluation system that quickly evaluates changes in soft error rate due to program changes in electronic systems including processors and microcomputers whose programs are changed during the life cycle of electronic products and electronic systems, thereby evaluating the soft error rate without conducting a neutron irradiation evaluation test, thereby reducing the cost of the neutron irradiation evaluation test and the time required for soft error rate evaluation. [Means for solving the problem]

[0008] A soft error rate evaluation system according to an embodiment of the present disclosure includes: 1. A soft error rate evaluation system for evaluating radiation tolerance of an electronic device employing a logic semiconductor device, comprising: (a) extracting a first feature amount at the time of execution of each of a plurality of irradiation evaluation programs from a plurality of irradiation evaluation programs and their program input conditions; (b) a statistical analysis modeling step of performing statistical analysis modeling based on the first feature amount of each of the plurality of irradiation evaluation programs and a soft error rate for each of the plurality of irradiation evaluation programs obtained in a neutron irradiation test conducted in advance to generate a statistical analysis model; (c) extracting a second feature value from the program to be evaluated and its program input conditions at the time of execution of the program to be evaluated; (d) a soft error rate calculation step of calculating a soft error rate of the program to be evaluated from the second feature amount of the program to be evaluated using the statistical analysis model.

[0009] That is, a soft error rate evaluation system according to one aspect of the present disclosure constructs a statistical analysis model as a radiation soft error rate model by conducting a single neutron irradiation evaluation test for a logic semiconductor device such as a target processor or microcomputer device. By constructing the statistical analysis model in advance in this way, a soft error rate evaluation system can be provided that can evaluate the radiation soft error rate using the radiation soft error rate model without conducting a neutron irradiation test when an execution program in an electronic system equipped with a processor or microcomputer is changed. [Effects of the Invention]

[0010] According to the soft error rate evaluation system of one aspect of the present disclosure, when there is a program change in an electronic system including a processor or a microcomputer, it is possible to perform radiation-induced soft error rate evaluation at low cost and in a short TAT.

[0011] Problems, configurations, and effects other than those described above will become apparent from the following description of the preferred embodiments of the invention. [Brief explanation of the drawings]

[0012] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of a soft error rate evaluation system according to an embodiment of the present disclosure. [Figure 2] 2 is a diagram illustrating an example of the configuration of a program feature extraction unit in FIG. 1; [Figure 3] FIG. 3 is a diagram illustrating an example of the configuration of trace data in FIG. 2. [Figure 4] 3 is a diagram showing a processing flow of an in-memory data residence time counting unit in FIG. 2. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the following embodiments, when the number of elements is mentioned, the number is not limited to a specific number, and may be greater than or less than the specific number, unless otherwise specified or in principle clearly limited to a specific number.

[0014] Furthermore, in the following embodiments, the components are not necessarily essential unless otherwise specified or unless it is clearly considered not to be essential in principle.

[0015] Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of components, etc., unless otherwise specified or unless it is clearly considered that this is not the case in principle, it is intended to include those that are substantially similar or similar to those shapes, etc. The same applies to the above numerical values ​​and ranges.

[0016] In addition, in all the drawings for explaining the embodiments, the same components are generally designated by the same reference numerals, and repeated explanations thereof will be omitted. Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. [Example]

[0017] 1 is a diagram showing an example of the configuration of a soft error rate evaluation system according to an embodiment of the present disclosure. In this example, the soft error rate evaluation system 1 is a processor soft error rate evaluation system as a representative example.

[0018] As shown in FIG. 1, the soft error rate evaluation system 1 is roughly divided into two parts: a preprocessing part 1a that performs processes up to the generation of a statistical analysis model 4 as a radiation soft error rate model, and an evaluation part 1b that evaluates the soft error rate of a program 12 to be evaluated.

[0019] The preprocessing unit 1a is composed of a program feature extraction unit 3a that extracts program feature values ​​2 used to calculate the soft error rate from programs executed on a processor or microcomputer, and a statistical modeling processing unit 5 that generates a statistical analysis model 4 that receives the program feature values ​​2 for each program as input and outputs soft error rate data for each program. The program feature values ​​2 can be referred to as first feature values. The statistical modeling processing unit 5 can also be referred to as a statistical analysis modeling processing unit.

[0020] The evaluation unit 1b is composed of a program feature extraction unit 3b that extracts program feature values ​​6 used for soft error rate calculation from the program 12 to be evaluated, and a soft error rate calculation processing unit 8 that calculates the soft error rate 7 of the program 12 to be evaluated using the statistical analysis model 4 and the program feature values ​​6. The program feature values ​​6 can be rephrased as second feature values.

[0021] The soft error rate evaluation system 1 shown in Fig. 1 can be configured by a hardware circuit. Alternatively, the soft error rate evaluation system 1 shown in Fig. 1 can be configured by executing a software program such as a soft error rate evaluation program by a data processing device.

[0022] The operation is outlined below.

[0023] As a preliminary step, a soft error rate 9 for each program must be prepared as data to be input into the soft error rate evaluation system 1. To determine the soft error rate 9 for each program, a radiation irradiation test 16 is conducted by irradiating the target electronic system (the electronic system has a processor or microcomputer that executes the program) with radiation (e.g., neutrons) generated by a particle accelerator or the like while the irradiation evaluation program 10 is executed under program input conditions 11 (input patterns). The soft error rate 9 for each program can be determined by acquiring defect information caused by soft errors generated by nuclear reactions in semiconductor devices that constitute the processor or microcomputer. The irradiation evaluation program 10 may be a function verification program, or a program designed to facilitate modeling by significantly varying program features 2 (described below) between programs. Possible methods for error information (defect information) include storing the results of program execution in the target electronic system as expected values ​​in advance, comparing the output results of the electronic system during radiation irradiation, and detecting any discrepancies between the expected values. Alternatively, information obtained by an error detection mechanism in the target electronic system may be treated as an error.

[0024] The operation of the soft error rate evaluation system 1 begins by extracting program features 2 from the irradiation evaluation program 10. Here, in order to determine the operating conditions of the program, program input conditions 11 are also used in addition to the irradiation evaluation program 10. Furthermore, the program features 2 must be suitable for constructing a statistical analysis model 4, that is, features that are highly sensitive to the soft error rate. Possible features that are highly sensitive to the soft error rate include, for example, (1) the number of times each instruction is executed when the program is executed, and (2) the data residence time in memory (or memory element).

[0025] Regarding (1), the functional parts (also called functional blocks) used within a processor differ for each instruction executed on the processor, and each functional part has a different soft error rate according to its circuit structure. Therefore, the feature of the number of times each instruction is executed (≒ the number of times a functional block is used) is highly sensitive to the soft error rate.

[0026] Regarding (2), soft errors occur when radiation such as neutrons collide with semiconductor devices, so the more radiation a device is exposed to, the higher the likelihood of soft errors occurring.

[0027] In a commonly used terrestrial environment, the radiation dose per unit time does not change over a short period of time, and the radiation dose is proportional to the exposure time. Therefore, the possibility of a soft error occurring is proportional to the exposure time. On the other hand, when considering semiconductor devices, the majority of soft errors basically occur within memory elements, but even if a soft error occurs and changes the data held in the memory, it will not appear as an error unless the changed data is used by a program. Therefore, an error will only appear if a soft error occurs during the time from when data is stored in a memory element until it is last read (data residence time).

[0028] From the above, it is believed that the longer the data resides in the memory (or memory element), the longer the radiation exposure time and the higher the soft error rate, and therefore this is considered to be a suitable feature. However, the feature is not limited to the above, and general features such as execution time, memory usage, number of lines of code, and cyclomatic complexity may also be used. Note that the memory may be, for example, multiple registers provided in a processor or multiple flip-flop circuits that make up each register. The memory also includes multiple memory cells of an SRAM (static random access memory) provided in a processor or microcomputer.

[0029] Next, the soft error rate 9 for each irradiation evaluation program 10 and the program feature quantity 2 are used to perform statistical analysis modeling processing in the statistical modeling processing unit 5. Here, a multiple regression analysis model, for example, can be considered as the statistical analysis model 4. The process up to generating the statistical analysis model 4 is the pre-processing unit 1a, which is executed only once.

[0030] Next, the operation of the evaluation unit 1b is started. The evaluation unit 1b is a part that is re-executed every time the execution program and operating conditions, i.e., the evaluation target program 12 and the evaluation target program input conditions 13, change. First, the program feature 6 is extracted from the evaluation target program 12. The program feature extraction unit 3b performs the same process as the program feature extraction unit 3a of the preprocessing unit 1a.

[0031] Next, using the statistical analysis model 4, the soft error rate calculation processing unit 8 performs soft error rate calculation processing, and calculates the soft error rate 7 of the program 12 to be evaluated.

[0032] Next, an example of the configuration of the program feature extraction unit (3a, 3b) will be described using Figure 2. Figure 2 is a diagram showing an example of the configuration of the program feature extraction unit in Figure 1. In this example configuration, the inputs and outputs (10, 11, 2) of the program feature extraction unit 3a when used in the pre-processing unit 1a are described. When used in the program feature extraction unit 3b of the evaluation unit 1b, the inputs and outputs of the program feature extraction unit 3b are (12, 13, 6), as shown in Figure 1. Also, here, processing for one set of program (irradiation evaluation program 10) and input conditions (program input conditions 11) will be described as a representative example.

[0033] The program feature extraction unit 3a is composed of a program simulation execution unit 21, an instruction count unit 23, and an in-memory data residence time count unit 25. The program simulation execution unit 21 simulates execution of a program on an electronic system to be evaluated using an irradiation evaluation program 10 as an irradiation test program and program input conditions 11, and outputs trace data 22 from the electronic system to be evaluated. The instruction count unit 23 counts the number of instructions for each instruction written in the trace data 22 and outputs an instruction count 24 for each instruction type. The in-memory data residence time count unit 25 analyzes the trace data 22 and outputs an in-memory data residence time 26. A general debugger may be used as the program simulation execution unit 21. A detailed description of an example configuration of the program feature extraction unit 3b is omitted because it is easily understood by those skilled in the art. The inputs to the program simulation execution unit 21 are the evaluation target program 12 and the evaluation target program input conditions 13. The output of the program simulation execution unit 21 is the program feature 6.

[0034] An example of the structure of the trace data 22 will be described with reference to FIG. 3. FIG. 3 is a diagram showing an example of the structure of the trace data of FIG. 2. Here, the trace data 22 includes data enumerating instructions executed in a program. The trace data 22 also includes at least an execution instruction (Instruction) 32 and an execution timing (Time) 31. The instruction counting unit 23 counts the number of instructions included in the sequence of execution instructions 32 in the trace data 22. The in-memory data residence time counting unit 25 focuses on each register description ("Rx" in the example of FIG. 3, where x is the register number) included in the trace data 22, and counts the time from when data is written to register Rx until it is finally read out as the in-memory data residence time. If register Rx is written two or more times, two or more in-memory data residence times are derived, and the sum of these is taken as the in-memory data residence time.

[0035] Next, the processing flow of the in-memory data residence time counting unit 25 will be described with reference to Fig. 4. Fig. 4 is a diagram showing the processing flow of the in-memory data residence time counting unit of Fig. 2. Fig. 4 shows, as an example, the processing flow for register R1 of the in-memory data residence time counting unit 25, but if there are multiple registers Rx (x = 1 to j: j is a positive integer), the in-memory data residence time counting unit 25 performs similar processing for registers R2 and subsequent registers, and adds up the data residence times output in each processing. Each step (S401-S411) will be described below.

[0036] At the start of processing, parameters are initialized (S401). The parameters are WTIME, which indicates the time when data is written to register R1; RTIME, which indicates the time when data is read from register R1; and MTIME, which is the total time data remains in register R1. All of these parameters are initialized to 0.

[0037] Next, one line (one set of data of an execution command and execution timing) is read from the trace data 22 (S402).

[0038] It is determined whether the read trace data is reading register R1 (S403) or writing to register R1 (S404).

[0039] If register R1 has been read (Yes in S403), the execution timing described in the read trace data is stored in RTIME (S405), and then the process proceeds to S404.

[0040] If register R1 has been written to (No in S403, Yes in S404), the time from the last time it was written (WTIME) to the last time it was read (RTIME) is added to MTIME (S406). Next, the execution timing written in the trace data is stored in WTIME, and RTIME is initialized (S407). Then, the process proceeds to S408.

[0041] In S403 to S407, processing for the trace data read in S402 is completed, and it is determined whether there is any trace data to be read next (whether the trace data read in S402 is the last) (S408). If the trace data read in S402 is not the last (No in S408), the process returns to S402 and continues. If the trace data read in S402 is the last (Yes in S408), it is determined whether there is any register residence time that has not been added to MTIME, and if so, it is added to MTIME. In this process, it is first determined whether the parameter RTIME is 0 (S409).

[0042] If the parameter RTIME is 0 (Yes in S409), this means that register R1 has not been read since it was last written, or that RTIME has not changed since it was initialized (S401) (register R1 has not been used), so the program outputs MTIME without any processing and ends (S411).

[0043] Conversely, if RTIME is not 0 (No in S409), it means that the data in register R1 was last written to and then read out, so the data residence time (RTIME-WTIME) is added to MTIME (S410), MTIME is output, and the process ends (S411).

[0044] Below is a specific example of the statistical modeling processing unit 5. An example in which a first-order polynomial approximation model of program feature quantities is used as the statistical analysis model 4 is shown in (Equation 1).

[0045]

number

[0046] where S is the soft error rate, F i is the program feature, a i is the model coefficient, and n is the number of program features. n is a positive integer. In the above formula, S is the soft error rate for each program, F iBy applying it to the program feature quantity 2, a i Equations with i as variables can be obtained as many as the number of the irradiation evaluation programs 10 (let it be m). Here, if n = m, the model coefficients can be obtained by solving as a system of simultaneous equations. If n < m, it becomes an overdetermined system, and a plausible solution can be obtained by performing statistical analysis processing. Therefore, the number of the irradiation evaluation programs 10 needs to be larger than the number of feature quantities. For example, as the statistical analysis processing, it is conceivable to use a multiple regression analysis model. As other methods of statistical analysis processing, there are ridge regression, lasso regression, and the like.

[0047] As described above, the soft error rate evaluation system 1 for evaluating the radiation resistance of an electronic device employing a logic semiconductor device has the following procedure.

[0048] (a) A procedure (program feature quantity extraction unit 3a) for extracting the first feature quantity 2 at the time of execution of each of the plurality of irradiation evaluation programs 10 from the plurality of irradiation evaluation programs 10 and their program input conditions 11.

[0049] (b) A statistical analysis modeling procedure (statistical modeling processing unit 5) for generating a statistical analysis model 4 as a radiation soft error rate model by performing statistical analysis modeling from the first feature quantity 2 of each of the plurality of irradiation evaluation programs 10 and the soft error rate 9 for each of the plurality of irradiation evaluation programs 10 obtained in the neutron irradiation test 16 performed in advance.

[0050] (c) A procedure (program feature quantity extraction unit 3b) for extracting the second feature quantity 6 at the time of execution of the evaluation target program 12 from the evaluation target program 12 and its program input conditions 13.

[0051] (d) A soft error rate calculation procedure (soft error rate calculation processing unit 8) for calculating the soft error rate of the evaluation target program 12 using the statistical analysis model 4 from the second feature quantity 6 of the evaluation target program 12.

[0052] Steps (a) and (b) are performed by the preprocessing unit 1a, and steps (c) and (d) are performed by the evaluation unit 1b. When the soft error rate evaluation system 1 is configured by a software program such as a soft error rate evaluation program, steps (a), (b), (c), and (d) may be configured by the soft error rate evaluation program.

[0053] The first feature quantity 2 and the second feature quantity 6 include at least the number of executions of each instruction and the in-memory data residence time, which are features corresponding to the soft error rate of each functional block included in the logic semiconductor device. The number of executions of each instruction is calculated by an instruction number counting unit 23, and the in-memory data residence time is calculated by an in-memory data residence time counting unit 25.

[0054] Statistical analysis model 4 uses a first-order polynomial multiple regression analysis model.

[0055] According to this embodiment, by generating a statistical analysis model 4 as a radiation soft error rate model for a target logic device in advance, it becomes possible to instantaneously evaluate the radiation soft error rate of logic semiconductor devices such as processors and microcontrollers and electronic equipment (electronic systems) equipped with logic semiconductor devices, thereby achieving a short TAT for the evaluation. Furthermore, since the radiation evaluation can be completed in one go, it is possible to reduce the cost of the radiation evaluation. Furthermore, in software updates via OTA or the like, it becomes possible to evaluate soft errors at low cost and high speed, which contributes to improving the reliability of electronic systems. [Explanation of symbols]

[0056] 1: Soft error rate evaluation system, 2: Program feature (first feature), 3a, 3b: Program feature extraction unit, 4: Statistical analysis model, 5: Statistical modeling processing unit, 6: Program feature (second feature), 7: Soft error rate of program to be evaluated, 8: Soft error rate calculation processing unit, 9: Soft error rate for each program, 10: Irradiation evaluation program, 11: Program input conditions, 12: Program to be evaluated, 13: Input conditions for program to be evaluated, 21: Program simulation execution unit, 22: Trace data, 23: Instruction number count unit, 24: Number of instructions for each instruction type, 25: In-memory data residence time count unit, 26: In-memory data residence time, 31: Instruction execution timing, 32: Execution instruction

Claims

1. 1. A soft error rate evaluation system for evaluating radiation tolerance of an electronic device employing a logic semiconductor device, comprising: (a) extracting a first feature amount at the time of execution of each of a plurality of irradiation evaluation programs from a plurality of irradiation evaluation programs and their program input conditions; (b) a statistical analysis modeling step of performing statistical analysis modeling based on the first feature amount of each of the plurality of irradiation evaluation programs and the soft error rate for each of the plurality of irradiation evaluation programs obtained in a neutron irradiation test conducted in advance to generate a statistical analysis model; (c) extracting a second feature value from the program to be evaluated and its program input conditions during execution of the program to be evaluated; (d) a soft error rate calculation step of calculating a soft error rate of the program to be evaluated from the second feature quantity of the program to be evaluated using the statistical analysis model.

2. 2. The soft error rate evaluation system according to claim 1, the first feature amount and the second feature amount include at least an execution count of each instruction and a data residence time in memory, which are feature amounts corresponding to the soft error rate for each functional block included in the logic semiconductor device.

3. 3. The soft error rate evaluation system according to claim 1, 10. The soft error rate evaluation system, wherein the statistical analysis model is a multiple regression analysis model of a first-order polynomial.

Images