Method for determining material parameters of multilayer test specimens
The method addresses the challenge of determining material parameters in multilayer test specimens by using a resistance model and conductive paths with a multipoint probe, ensuring precise measurements despite varying electrode positions.
Patent Information
- Application Number
- JP2023577200
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2022-09-08
- Filing Date
- 2022-09-09
- Publication Date
- 2025-11-20
- Estimated Expiration
- 2042-09-09
AI Technical Summary
Existing methods, such as those described in EP 3566062, do not provide a clear approach for determining material parameters of a multilayer test specimen when the stack is contacted from below or above by fixed, non-moving terminals, particularly in scenarios where electrode positions can vary.
A method involving a resistance model, conductive paths, and a series of measurements to determine material parameters by minimizing the error between the model and measured resistance values, using a multipoint probe with electrodes and stack terminals, and a computer-based system to solve for unknown distances and material properties.
Enables accurate determination of material parameters in multilayer test specimens by minimizing errors in resistance measurements, despite varying electrode positions, thereby improving measurement precision.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to methods and computer systems for determining material parameters of a multilayer test sample, such as a multilayer test sample comprising a stack defining a tunnel junction (a tunnel layer sandwiched between a conductive bottom layer and a conductive top layer, the tunnel layer having a thickness such that there is tunneling of electrons between the top and bottom layers). [Background technology]
[0002] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to provisional patent application filed on September 9, 2021, and assigned U.S. Patent Application No. 63 / 242,054, the disclosure of which is incorporated herein by reference. The multi-layer test specimen may be arranged as described in WO 2020 / 205236, which is incorporated herein by reference. A multi-layer test specimen of this type is described in more detail in connection with Figures 1 and 2.
[0003] As will become apparent from the description of Figures 1 and 2, the stack is contacted in this embodiment from the bottom by terminals, which are fixed relative to each other but have unknown positions.
[0004] In addition to terminals below the stack, the multilayer test sample has terminals for contacting electrodes of the measurement circuit. The positions of these electrodes can change from measurement to measurement. An example of determining the position of a movable electrode that lands on the test sample is described in EP 3566062, which is incorporated herein by reference. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] International Publication No. 2020 / 205236 [Patent Document 2] European Patent No. 3566062 Summary of the Invention [Problem to be solved by the invention]
[0006] However, EP 3566062 does not disclose how to determine material parameters when the stack is contacted from below or above by fixed, non-moving terminals. [Means for solving the problem]
[0007] A first aspect of the present disclosure is a method for determining material parameters of a multilayer test specimen, the multilayer test specimen comprising: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer; a plurality of test specimen terminals for connection to a measurement circuit, such as a multipoint probe, the measurement circuit having a plurality of electrodes; and a plurality of stack terminals below or above the stack such that each stack terminal is electrically connected to the bottom layer or the top layer. The method comprises: - providing said multi-layer test specimen; providing a resistance model representing the multilayer test specimen, the resistance model outputting resistance values as a function of a set of stack terminal parameters and a set of stack material parameters; providing a plurality of conductive paths, each conductive path electrically interconnecting the test sample terminal and the stack terminal; - contacting the test sample terminal with the electrode; - determining at least six different measured resistance values using six measurements, each measurement being: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals; - injecting a current into the test sample using the first pair of test sample terminals and measuring a voltage induced between the second pair of test sample terminals, and determining a resistance value as a function of the voltage and the current. Determined by, determining, and defining a partial error function for each measured resistance value, the partial error function defining the error between the resistor model and the measured resistance value; Defining an error function that includes each partial error and defining a total error; Varying each stack terminal parameter set in each resistor model and the stack material parameter set in the error function so that the total error is minimized; Includes.
[0008] A second aspect of the present disclosure is a method for determining material parameters of a multilayer test specimen, the multilayer test specimen comprising: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers; a plurality of test specimen terminals for connection to a measurement circuit, such as a multipoint probe, the measurement circuit having a plurality of electrodes; and a plurality of stack terminals below or above the stack such that each stack terminal is electrically connected to the bottom layer or the top layer. The method comprises: - providing said multi-layer test specimen; providing a resistance model representing the multilayer test specimen, the resistance model outputting resistance values as a function of a set of stack terminal parameters and a set of stack material parameters; providing a plurality of conductive paths, each conductive path electrically interconnecting the test sample terminal and the stack terminal; - connecting the test sample terminals to the electrodes; - determining at least six different measured resistance values using six measurements, each measured resistance value being: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals; - injecting a current into the test sample using the first pair of test sample terminals and measuring a voltage induced between the second pair of test sample terminals, and determining each measured resistance value as a function of the voltage and the current. Determined by, determining, and defining a partial error function of an equation for each measured resistance value, the partial error function defining the error between the resistor model and the measured resistance value; defining a set of equations, each equation defining an equality between the measured resistance and the resistance model; solving the set of equations for the stack material parameter set; Includes.
[0009] A third aspect of the present disclosure is a computer-based system for determining material parameters of a multilayer test specimen, the multilayer specimen comprising: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom and top layers; a plurality of test specimen terminals for connection to measurement circuitry such as a multipoint probe; a plurality of stack terminals below or above the stack such that each stack terminal is electrically connected to the bottom or top layer; and a plurality of conductive pathways, each conductive pathway electrically interconnecting a corresponding test specimen terminal and a corresponding stack terminal. The computer-based system includes: - a measurement system arranged to determine at least six different measured resistance values using six measurements, each measured resistance value being: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals; injecting a current into the multilayer test sample using the first pair of test sample terminals and measuring a voltage induced between the second pair of test sample terminals, and determining each measured resistance value as a function of the voltage and the current. a measurement system, determined by a processing unit and a memory, said memory comprising: a resistance model representing the multilayer test specimen, the resistance model outputting resistance values as a function of a set of stack terminal parameters and a set of stack material parameters; For each measured resistance value, the processing device: defining a partial error function, the partial error function defining an error between the resistor model and the measured resistor value; Define an error function that includes each partial error and defines the total error, Varying each stack terminal parameter set and the material parameters in each resistor model so that the total error is minimized. a processing unit and memory arranged for Equipped with.
[0010] The electrodes may have varying positions on the test sample terminal from one measurement to the next, but the resistance model may assume that the measured resistance values are independent of the positions of the electrodes on the test sample terminal.
[0011] The test sample terminals may have a larger area than the stack terminals.
[0012] The error function may include a term for each partial error function.
[0013] The error defined by each partial error function may be the difference between the resistor model and the measured resistor value.
[0014] The test sample includes at least five test stack terminals. In one example, the test sample includes at least five test sample terminals.
[0015] The stack terminal parameter set may include a distance between the stack terminals. Alternatively, the stack terminal parameter set may include a position of the stack terminals. In one example, the stack terminal parameter set includes a position of each stack terminal.
[0016] The stack material parameter set can include the sheet resistance of the bottom layer, in one example, the sheet resistance of the top layer, and a resistance value representing the tunnel / barrier layer, such as the product of resistance and area.
[0017] Specific examples according to various aspects of the present disclosure will now be described in more detail with reference to the accompanying drawings. However, the present disclosure may be embodied in forms different from those described below and should not be construed as being limited to the examples set forth herein. Rather, any examples are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. Like reference numerals refer to like elements throughout. Therefore, like elements will not be described in detail with respect to the description of each figure. [Brief explanation of the drawings]
[0018] [Figure 1] FIG. 1 is an exploded view of a test sample. [Figure 2] FIG. 1 shows a test sample connected to electrodes. [Figure 3] FIG. 1 is a schematic perspective view of a computer-based system for measuring a multi-layer test sample. DETAILED DESCRIPTION OF THE INVENTION
[0019] Although the claimed subject matter is described in terms of certain embodiments, other embodiments, including embodiments that do not provide all of the benefits and features described herein, are within the scope of this disclosure. Various structural, logical, process step, and electronic changes may be made without departing from the scope of this disclosure. Accordingly, the scope of this disclosure is defined solely by reference to the appended claims.
[0020] Figure 1 shows an exploded view of the test sample.
[0021] The test sample 10 has five layers, the top three of which constitute a magnetic tunnel junction (MTJ), or MTJ stack.
[0022] The test specimen may comprise a semiconductor wafer comprising at least two conductive layers with a tunnel electrically insulating layer sandwiched therebetween, such as an MTJ.
[0023] The top layer 12 of the MTJ stack may or may not contain ferromagnetic material, but is electrically conductive.
[0024] The direction of magnetization of the top layer can be changed.
[0025] The middle layer 14 is sandwiched between the top and bottom layers 16 of the MTJ stack.
[0026] The intermediate layer is a thin electrical insulator, and the thickness of the intermediate layer is not so great that electrons cannot tunnel through the intermediate layer, ie, the intermediate layer is a tunneling barrier layer.
[0027] The bottom layer 16 may or may not contain ferromagnetic material, but is also electrically conductive.
[0028] Alternatively, the top layer can have a permanent magnetization and the bottom layer can have a variable direction of magnetic moment, or both layers can have a variable direction of magnetic moment.
[0029] The resistance of the stack when a voltage potential is applied across it can depend on whether the magnetizations of the top and bottom layers are parallel or antiparallel; i.e., when the magnetizations of the top and bottom layers are parallel, the tunnel barrier is lower than when the magnetizations are antiparallel.
[0030] The top layer is shown with a flat top surface, and both layers are shown as generally parallel to one another.
[0031] The stack may also have more than two conductive layers and one barrier with multiple electrical properties to be measured.
[0032] Alternatively, the layers of the test sample can have another function with respect to the MRAM cell, for example, a stack with only two layers is intended as a sensor.
[0033] The three layers of the stack are shown in Figure 1 as eight islands, namely, seven small islands next to each other in a row and one large island by itself (such as the test island that makes up the MTJ stack 28 for MRAM or sensor purposes), as a result of etching into the stack layers so that the islands are electrically isolated from each other, i.e., so that they are not electrically connected to each other.
[0034] The removed portions of the layer may also be configured with an oxide material or other material that constitutes an electrical insulator, i.e., the spaces between the islands themselves and the spaces between the islands and the MTJ stack are filled with the electrical insulator material.
[0035] The seven small islands constitute seven test terminals, which may have the purpose of landing pads, such as first landing pad 26, which has a first landing area (i.e., exposed surface 30) on the landing pad, and the first landing area is not covered with another layer on top of the first landing area, except possibly a thin oxide layer.
[0036] The test sample terminals can have any in-plane shape. While Figure 1 shows a rectangular shape / area, the shape can also be circular, oval, elliptical, polygonal, or randomly shaped.
[0037] Each landing area of each landing pad is for landing a probe tip / electrode, i.e., for contacting the probe tip with the landing area so that an electrical signal can be injected into the landing pad during a measurement routine, or alternatively, an electrical measurement signal can be picked up. In this way, terminals are provided on the test sample for the probe and for making probe measurements with the measurement circuit.
[0038] Instead of using probes, the test sample may be inserted into the measurement device, with the measurement terminals having fixed positions that align with the test sample terminals when the test sample is properly positioned in the measurement device.
[0039] Below the MTJ stack is a fourth layer that constitutes a first electrically insulating layer 18, ie, current cannot flow freely through the fourth layer without controlling the current path.
[0040] Below the fourth electrically insulating layer is a fifth layer which constitutes the second electrically insulating layer 20 .
[0041] The first and second electrically insulating layers may be formed as one electrically insulating layer.
[0042] The first electrically insulating layer has vias, such as first via 22, extending vertically through the thickness of the layer.
[0043] Seven vias are shown positioned below the large island, and all seven vias come into contact with the bottom surface of the bottom layer of the MTJ stack, forming terminals for contacting the MTJ stack.
[0044] Alternatively, the stack terminals may contact the top layer from above. It is conceivable that several layers may be above the top layer of the stack, with the stack terminals passing through these layers.
[0045] The sample terminals may be in a higher layer than the layer in which the stack terminals are located, whether the stack terminals connect to the bottom layer of the stack or the top layer of the stack.
[0046] Within the second electrically insulating layer are seven copper lanes, i.e. copper deposited during one of the fabrication steps (conductive materials other than copper may also be used).
[0047] The copper lanes constitute conductive pathways, such as first conductive pathway 24 .
[0048] The conductive paths run parallel to the layers, and each conductive path interconnects one of the vias for one landing pad with one of the vias that contact the MTJ stack.
[0049] One of the electrically insulating layers may also be used for electrical connections to control electronics, such as a switch, which itself may be located in a sixth layer, which may be lower than the electrically insulating layer.
[0050] The landing pad does not necessarily have to be made up of three MTJ layers, but can instead be a semiconductor material deposited or otherwise created as an island on the first electrically insulating layer that can conduct an electrical signal from the probe tip to a via that contacts the landing pad from below.
[0051] Five of the test sample terminals are designated letters A through E.
[0052] In Figure 2, the probe is positioned above the test sample.
[0053] The test specimen is shown in an unexploded view, with vias and conductive paths shown as dotted lines beneath the top three layers.
[0054] The probe has seven cantilever arms extending parallel to one another, each terminating in a probe tip / electrode, such as first probe tip 32.
[0055] Each probe tip is brought into contact with the landing area of each landing pad, i.e., the first probe tip 32 contacts the first landing pad 26 with the first via 22 contacting the first landing pad from below.
[0056] The probe tip can penetrate the expected oxide layer above the landing pad so that electrical contact can be established between the landing pad and the probe tip.
[0057] The probe tip can penetrate the landing pad a small distance so that the probe tip does not just rest on the surface that makes up the landing area.
[0058] The vias and conductive paths allow a circuit path to be completed from one probe tip to another, so that current can be injected into the circuit path, into the MTJ stack, and on to the second probe tip.
[0059] FIG. 3 shows a schematic perspective view of a computer-based system for measuring multi-layer test samples.
[0060] The computer-based system includes a measurement circuit 42 including a multi-probe measurement setup connected to a stationary computer 44 and / or laptop for controlling the measurements. The stationary computer 44 and / or laptop and the subsystems therein can include any suitable processor (or processing device) known in the art, such as a parallel processor. Additionally, the subsystem(s) or system(s) can include a platform with high-speed processing and software, either as a stand-alone tool or a networked tool. Program instructions implementing the methods described herein can be transmitted through or stored on a carrier medium. The carrier medium can include storage media such as read-only memory, random-access memory, magnetic or optical disks, non-volatile memory, solid-state memory, magnetic tape, etc. The carrier medium can include transmission media such as wires, cables, and wireless transmission links. Furthermore, various subsystems of the stationary computer 44 and / or laptop can include one or more computational or logic systems. Therefore, the above description should not be construed as a limitation on the present disclosure, but is merely illustrative.
[0061] The multipoint probe includes five electrodes, designated A through E in FIG. 1, that are in contact with the multilayer test sample as shown in FIG.
[0062] The multilayer test sample measurements can then begin. As a first step, a model of the stack resistance is calculated:
number
[0063] The only electrode distance that is considered to be known can be the distance between the two outermost stack terminals (connected to test sample terminals A and E, respectively). Instead, all other distances between stack terminals should be determined, i.e., x i is unknown and can define the distance between the two stack terminals connected to the test sample terminals A and B, respectively, or other inter-electrode distances. y i is unknown and can define the distance between the two stack terminals connected to the test sample terminals B and C, respectively, or other inter-electrode distances. z i is unknown and can define the distance between the two stack terminals connected to the test sample terminals C and D, respectively, or other inter-electrode distances. w i is unknown and can define the distance between the two stack terminals connected to the test sample terminals D and E, respectively, or other inter-electrode distances.
[0064] The unknown material parameter is the top layer sheet resistance R T , bottom layer sheet resistance R B , and the product of the tunnel resistance and area RA.
[0065] K0 is the modified Bessel function of the second kind of order 0.
[0066] Unlike the prior art, this method assumes that the measured resistance is independent of the landing position of the movable electrode of the measurement circuit. Therefore, variables / parameters related to the geometric relationship between the electrode and the test sample terminals are not included in the resistance model. Instead, the parameters defining the distance between the fixed stack terminals are used to determine the resistance of the test sample R. i Resistance and test sample parameters (R T , R B , RA) and the resistance model (x i, y i , w i ) is entered.
[0067] However, depending on the size of the test sample terminals, this premise behind the model of the present disclosure can lead to errors as the test sample terminals become smaller, for example, requiring the distances between the test sample terminals (χ, γ, σ, ω) to be entered into the equation (resistance model), where χ is known to within a tolerance and can define the distance between two electrodes in contact with test sample terminals A and B, respectively; γ is known to within a tolerance and can define the distance between two electrodes in contact with test sample terminals B and C, respectively; σ is known to within a tolerance and can define the distance between two electrodes in contact with test sample terminals C and D, respectively; and ω defines the distance between the electrodes connected to the two outermost test sample terminals (A and E, respectively) and is estimated (set as a constant).
[0068] The test sample terminals used for each of the six measurements may be defined as follows: [Table 1]
[0069] At least one of the pairs shall be changed from one measurement to the other.
[0070] Thus, for the first measurement, in a first step, a current is injected into the test sample by contacting electrodes to test sample terminals B and E in FIG. 1, respectively.
[0071] In the second step, the voltage is measured by contacting the electrodes to the test sample terminals A and C in FIG. 1, respectively.
[0072] The resistance can then be determined in a third step from the injected current and the measured voltage using Ohm's law.
[0073] The above three steps are then repeated with the voltage and current pairs defined in the table above until six measured resistance values have been determined.
[0074] The resistance model is selected to approximate or model the measured resistance. The difference or error between the measured resistance and the model is
number
[0075] Alternatively, for each measured resistance value, a (partial) error function can be defined that defines the error or difference between (the output of) the resistance model and the measured resistance value.
[0076] All six partial error functions can enter into the (total) error function, and each stack terminal parameter set and stack material parameter set within each resistance model in the total error function can be varied so that the total error is minimized.
[0077] The error function that defines the total error is
number
[0078] Although the present disclosure has been described with respect to one or more particular embodiments, it will be understood that other embodiments of the present disclosure may be made without departing from the scope of the present disclosure. Accordingly, the present disclosure is deemed to be limited only by the appended claims and their reasonable interpretation.
Claims
1. 1. A method for determining material parameters of a multi-layer test specimen, the method comprising:
1. A multi-layer test sample, comprising: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer; a plurality of test sample terminals for connection to a measurement circuit having a plurality of electrodes; a plurality of stack terminals below or above the stack such that each of the stack terminals is electrically connected to the bottom layer or the top layer; and providing a resistance model representing the multi-layer test specimen, the resistance model outputting resistance values as a function of a set of stack terminal parameters including a distance between stack terminals and a set of stack material parameters; providing a plurality of conductive paths, each of the conductive paths electrically interconnecting one of the test sample terminals and one of the stack terminals; contacting the test sample terminal with the electrode; determining at least six different measured resistance values using six measurements, each of the measured resistance values being: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals; and injecting a current into the multilayer test sample using the first pair of test sample terminals, measuring a voltage induced between the second pair of test sample terminals, and determining each of the measured resistance values as a function of the voltage and the current. Determined by, determining, and defining a partial error function for each of the measured resistance values, the partial error function defining an error between the resistor model and one of the measured resistance values; Defining an error function that includes each partial error and defining a total error; Varying each of the stack terminal parameter sets and the stack material parameter sets in each of the resistor models in the error function so that the total error is minimized; A method comprising:
2. 2. The method of claim 1, further comprising solving a set of equations for the stack terminal parameter set.
3. 10. The method of claim 1, wherein each of the stack terminals has a fixed position.
4. 2. The method of claim 1, wherein one of the electrodes varies in position over one of the test sample terminals from one measurement to the next.
5. 2. The method of claim 1, wherein the resistance model assumes that the measured resistance is independent of the position of the plurality of electrodes on the test sample terminal.
6. 2. The method of claim 1, further comprising mounting the plurality of electrodes on the test sample terminal.
7. 2. The method of claim 1, wherein each of the test sample terminals has a larger area than one of the stack terminals.
8. 2. The method of claim 1, wherein the error function includes a term for each of the partial error functions.
9. 2. The method of claim 1, wherein the error is defined as the difference between the resistor model and one of the measured resistor values according to each of the partial error functions.
10. 10. The method of claim 1, wherein said multi-layer test specimen comprises at least five of said stack terminals.
11. 2. The method of claim 1, wherein the stack terminal parameter set further comprises a position of the or each of the stack terminals.
12. 2. The method of claim 1, wherein the stack material parameter set includes a resistivity of the bottom layer and a resistivity of the top layer and / or the tunnel layer.
13. 10. The method of claim 1, wherein the multi-layer test specimen includes an electrically insulating layer disposed beneath the bottom layer of the stack.
14. 14. The method of claim 13, wherein the plurality of conductive paths are embedded in the electrically insulating layer.
15. 1. A method for determining material parameters of a multi-layer test specimen, the method comprising: providing the multi-layer test sample, the multi-layer test sample comprising: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer; a plurality of test sample terminals for connection to a measurement circuit having a plurality of electrodes; a plurality of stack terminals below or above the stack such that each of the stack terminals is electrically connected to the bottom layer or the top layer; and providing a resistance model representing the multi-layer test specimen, the resistance model outputting resistance values as a function of a set of stack terminal parameters including a distance between stack terminals and a set of stack material parameters; providing a plurality of conductive paths, each of the conductive paths electrically interconnecting one of the test sample terminals and one of the stack terminals; contacting the test sample terminal with the electrode; determining at least six different measured resistance values using six measurements, each of the measured resistance values being: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals; and injecting a current into the multilayer test sample using the first pair of test sample terminals, measuring a voltage induced between the second pair of test sample terminals, and determining each of the measured resistance values as a function of the voltage and the current. Determined by, determining, and defining a partial error function for each measured resistance value, the partial error function defining an error between the resistor model and one of the measured resistance values; defining an error function that includes each partial error; defining a set of equations, each of the set of equations defining an equation between one of the measured resistance values and the resistance model; solving the set of equations for the stack material parameter set; A method comprising:
16. 16. The method of claim 15, further comprising solving the set of equations for the stack terminal parameter set, wherein the set of equations for the stack terminal parameter set is different from the set of equations for the stack material parameter set.
17. 16. The method of claim 15, wherein each of the stack terminals has a fixed position.
18. 16. The method of claim 15, wherein one of the electrodes varies in position over one of the test sample terminals from one measurement to the next.
19. 16. The method of claim 15, wherein the resistance model assumes that the measured resistance is independent of the position of the plurality of electrodes on the test sample terminal.
20. 16. The method of claim 15, comprising mounting the plurality of electrodes on the test sample terminal.
21. 16. The method of claim 15, wherein each of the test sample terminals has a larger area than one of the stack terminals.
22. 16. The method of claim 15, wherein the error function includes a term for each of the partial error functions.
23. 16. The method of claim 15, wherein the error is defined as the difference between the resistor model and one of the measured resistor values according to each of the partial error functions.
24. 16. The method of claim 15, wherein the multi-layer test specimen comprises at least five of the stack terminals.
25. 16. The method of claim 15, wherein the stack terminal parameter set further comprises a position of the or each of the stack terminals.
26. 16. The method of claim 15, wherein the stack material parameter set includes a resistivity of the bottom layer and a resistivity of the top layer and / or the tunnel layer.
27. 16. The method of claim 15, wherein the multi-layer test specimen includes an electrically insulating layer disposed beneath the bottom layer of the stack.
28. 28. The method of claim 27, wherein the plurality of conductive paths are embedded in the electrically insulating layer.
29. 1. A computer-based system for determining material parameters of a multi-layer test specimen, the multi-layer test specimen comprising: a stack including a bottom layer, a top layer, and a tunnel layer sandwiched between the bottom layer and the top layer; a plurality of test specimen terminals for connection to a measurement circuit; a plurality of stack terminals below or above the stack such that each of the stack terminals is electrically connected to the bottom layer or the top layer; and a plurality of conductive paths, each of the conductive paths electrically interconnecting one of the test specimen terminals and one of the stack terminals, the computer-based system comprising:
1. A measurement system arranged to determine at least six different measured resistance values using six measurements, each of said measured resistance values being: selecting four different test sample terminals from the plurality of test sample terminals, and dividing the four different test sample terminals into a first pair of test sample terminals and a second pair of test sample terminals; and injecting a current into the multilayer test sample using the first pair of test sample terminals, measuring a voltage induced between the second pair of test sample terminals, and determining each of the measured resistance values as a function of the voltage and the current. a measurement system, determined by A processing unit and a memory, said memory comprising: a resistance model representing the multilayer test sample, the resistance model outputting resistance values as a function of a set of stack terminal parameters including a distance between the stack terminals and a set of stack material parameters; Including, For each of the measured resistance values, the processing device: defining a partial error function, the partial error function defining an error between the resistor model and one of the measured resistance values; Define an error function that includes each of the partial errors and defines the total error; Varying each of the stack terminal parameter sets and the stack material parameter set in the resistance model so that the total error is minimized. a processing unit and memory configured to 1. A computer-based system comprising:
30. 30. The computer-based system of claim 29, wherein the stack terminal parameter set further includes a position of the or each of the stack terminals.
Citation Information
Patent Citations
A position correction method and a system for position correction in relation to four probe resistance measurements
EP3566062A1
Method for measuring resistivity of semiconductor
JP1994232230A
How to measure the electrical properties of a test specimen
JP2022528123A
A position correction method and a system for position correction in relation to four probe resistance measurements
US20190310295A1
Four-terminal methods for resistivity measurement of semiconducting materials
US7030633B1