Bidirectional ESD protection method and circuit of GAN enhancement-mode power device, and double-gate device

Abstract

A bidirectional ESD protection method and circuit of a GaN enhancement-mode power device, and a dual-gate device. In the method, a double-control switch constitutes an ESD energy discharge path; when a device is in a normal positive-voltage working state, the double-control switch is switched off, and when ESD occurs, the double-control switch is switched on to discharge energy; when the device is in a normal negative-voltage working state, the double-control switch is switched off, and when ESD occurs, the double-control switch is switched on to discharge energy. The circuit comprises a first port and a second port, the two ports are connected to the double-gate switch device, a forward on control assembly, and a reverse on control assembly in parallel, and a first source and a second source of the double-gate switch device are connected to the first port and the second port; the forward assembly comprises a first diode string and a first resistor connected in series, and a series connection end is connected to one gate of the double-gate device; the reverse assembly comprises a second diode string and a second resistor connected in series, and a series connection end is connected to the other gate of the double-gate device. The double-gate device comprises a barrier layer; the first and two sources are respectively arranged on the barrier layer; first and second gates are arranged on first and second p-type cap layers; and the logic state of the two gates is "AND gate".

Description

Bidirectional ESD protection method, circuit and dual-gate device for GaN enhanced power devices Technical Field

[0001] The present application relates to the field of ESD protection technology, and more specifically to a bidirectional ESD protection method, circuit, and dual-gate device for a GaN enhanced power device. Background Art

[0002] Electrostatic discharge (ESD) refers to the transfer of static charge between two objects with different electrical potentials. According to research, ESD is one of the most common causes of integrated circuit failure, with global losses from ESD to electronic products reaching tens of billions of US dollars annually. Therefore, ESD protection design for semiconductor devices cannot be neglected, especially for GaN enhancement-mode power devices.

[0003] On the one hand, because the gate of GaN enhancement-mode power devices uses Schottky metal contacts, the maximum gate withstand voltage is extremely low, that is, the DC voltage is less than 7V for a long time and the transient voltage is less than 12V, resulting in the device's own poor resistance to electrostatic discharge events, or ESD events. Existing ESD tests on GaN enhancement-mode power devices have shown that their gates are extremely vulnerable to ESD. As GaN enhancement-mode power devices are being developed and applied on a large scale, the ESD protection design of their gates is becoming increasingly important. Therefore, when using GaN enhancement-mode power devices, it is generally necessary to add ESD protection circuits. On the other hand, because the threshold voltage of GaN enhancement-mode power devices is generally low, sometimes applying a 0V gate voltage to the device cannot completely shut down the device. In this case, negative voltage shutdown is required.

[0004] In order to improve the ESD capability of GaN enhanced power devices, the existing technology provides multiple solutions: CN113161345A discloses a new type of GaN-based ESD protection circuit, that is, an ESD protection circuit of a traditional GaN enhanced power device shown in Figure 1. The ESD protection circuit mainly includes a first clamping diode string 11, a first resistor 12 and a discharge tube 31. Its working principle is as follows: when the GaN enhanced power device 40 is working normally in the forward direction, the first clamping diode string 11 forms a voltage drop, and the discharge tube 31 is not turned on; when a forward ESD event occurs in the GaN enhanced power device 40, the first clamping diode string 11 is turned on, the first resistor 12 forms a voltage drop, and the discharge tube 31 is turned on; when the GaN enhanced power device 40 is working in the reverse shutdown state, the first clamping diode string 11 forms a voltage drop, and the discharge tube 21 is turned on, resulting in a large negative voltage gate drain of the device and inability to use negative voltage shutdown.

[0005] In order to achieve negative voltage shutdown of GaN enhanced power devices and solve the above problems, the existing ESD protection circuit generally sets two independent discharge current paths and limits the discharge current direction through two diodes of the same size. CN109193601A discloses an ESD protection circuit, as shown in Figure 2, and its working principle is as follows: When the GaN enhanced power device 40 is working normally in the forward direction, the first clamping diode string 11 forms a voltage drop, the forward discharge tube 31 is not turned on, the second limiting diode 34 is reversely turned off, and the reverse discharge tube 32 is not turned on; when the GaN enhanced power device 40 has a forward ESD event, the first clamping diode string 11 is turned on, the first resistor 12 forms a voltage drop and the first limiting diode 33 is turned on in the forward direction, the forward discharge tube 31 is turned on, the second limiting diode 34 is reversely turned off, and the reverse discharge tube 32 is not turned on. When the GaN enhanced power device 40 is reverse-off, a voltage drop is formed in the second clamping diode string 21, the reverse bleeder tube 32 is not turned on, the first limiting diode 33 is reverse-off, and the forward bleeder tube 31 is not turned on. When a reverse ESD event occurs in the GaN enhanced power device 40, the second clamping diode string 21 is turned on, the second resistor 22 forms a voltage drop, and the second limiting diode 34 is turned on in the forward direction, the reverse bleeder tube 32 is turned on, the first limiting diode 33 is reverse-off, and the forward bleeder tube 31 is not turned on. This circuit makes the total ESD protection circuit area at least four times the area of ​​a single bleeder tube, which has an adverse effect on circuit integration. In addition, there is also an ESD protection circuit and an ESD protection circuit structure disclosed in CN115459234A by merging two bleeder current paths into one bleeder current path, as shown in Figure 3, but the total ESD protection circuit is at least twice the area of ​​a single bleeder tube. Since the size of the discharge tube determines its ESD protection capability, the size of the discharge tube is usually very large, resulting in a large chip area occupied by the ESD protection circuit.

[0006] In addition, CN217282208U discloses an ESD protection circuit and electronic device. This patent (CN217282208U) aims to achieve bidirectional ESD protection using only a single bleeder tube, but ignores the problem of false turn-on in both the forward and reverse directions, resulting in both the positive voltage turn-on and negative voltage turn-off of the protected power tube being affected. Referring to the drawings in the patent specification to Figures 3, 4, and 5, when the GaN enhanced power tube is operating normally, its gate drive mode is positive voltage turn-on and negative voltage turn-off, and the positive voltage turn-on voltage is generally around 5V. At this time, the diode Q2 and the diode string M2 in the reverse voltage divider module are both in a reverse biased state. The equivalent resistance of the reverse biased diode is very large, so the reverse biased diode string M2 (the second lower bridge arm unit) receives most of the voltage drop. This node is also the gate node of the bleeder tube 110, resulting in the protected GaN enhanced power tube not being able to apply the forward gate voltage and unable to turn on, violating the transparency principle in ESD protection design. Similarly, to achieve negative voltage shutdown, a negative voltage is required for the gate relative to the source. Since the equivalent resistance of the reverse-biased diode string M1 in the forward voltage divider module is greater than the resistor R1 plus the reverse-biased diode Q1, the reverse-biased diode string M1 (the first upper bridge arm unit) receives most of the voltage drop, causing the bleeder tube 110 to erroneously open, affecting the normal operation of the device. In this patent, in a positive ESD event, the reverse voltage divider module will activate the bleeder tube 110 before the normal voltage divider module; in a negative ESD event, the forward voltage divider module will activate the bleeder tube 110 before the reverse voltage divider module. This makes it impossible to adjust the ESD trigger voltage by increasing or decreasing the number of diodes in the diode string M1 of the first upper bridge arm unit and the diode string M2 of the second lower bridge arm unit.

[0007] In summary, although the use of a bidirectional ESD protection circuit in the prior art solves the problem of not being able to shut down under negative pressure, there is a problem that the bidirectional ESD protection circuit occupies a large chip area, which is not conducive to the miniaturization of circuit integration. Alternatively, although the problem of the bidirectional ESD protection circuit occupying a large chip area is solved, problems arise again with the positive pressure start and negative pressure shutdown of the protected power tube.

[0008] Summary of the Invention

[0009] The purpose of the present invention is to address the problem that the prior art uses a bidirectional ESD protection circuit device for negative voltage shutdown, but the bidirectional ESD protection circuit occupies a large chip area. A bidirectional ESD protection method, circuit and dual-gate device for a GaN enhanced power device are provided, which reduce the chip area occupied by the protection circuit while ensuring that the device is normally turned on in the forward direction and normally turned off in the reverse direction.

[0010] The technical solution adopted in the present invention is as follows:

[0011] In order to achieve the above objectives, the present invention provides a bidirectional ESD protection method for a GaN enhanced-mode power device, a bidirectional ESD protection circuit for a GaN enhanced-mode power device, and a dual-gate switch device.

[0012] The bidirectional ESD protection method for a GaN enhanced-mode power device according to the present invention includes the steps of providing a first port for connecting to the drain of the protected GaN enhanced-mode power device and a second port for connecting to the source of the GaN enhanced-mode power device, connecting a dual-control switch between the first port and the second port to form an ESD energy discharge path,

[0013] When the GaN enhancement-mode power device is in a normal positive voltage working state, one control terminal of the dual-control switch controls the dual-control switch to enter and maintain an off state; when the GaN enhancement-mode power device is in a positive voltage working state and a forward ESD event occurs, the two control terminals of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy;

[0014] When the GaN enhanced power device is in a normal negative voltage working state, the other control end of the dual-control switch controls the dual-control switch to enter and maintain the off state; when the GaN enhanced power device is in a negative voltage working state and a forward ESD event occurs, the two control ends of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy.

[0015] The bidirectional ESD protection circuit of a GaN enhanced-mode power device according to the present invention comprises: a first port for connecting to the gate of a protected GaN enhanced-mode power device and a second port for connecting to the drain of the GaN enhanced-mode power device; a dual-control switch is connected between the first port and the second port to form an ESD energy discharge path; the dual-control switch adopts a dual-gate switch device; the first source and the second source of the dual-gate switch device are connected to the first port and the second port respectively; a forward turn-on control component and a reverse turn-on control component are connected in parallel to the first port and the second port; the forward turn-on control component comprises a first diode string and a first resistor connected in series; the first diode string adopts One diode or more than one diode connected in series, the cathode of the first diode string is connected to one end of the first resistor and connected to one gate of the dual-gate switching device, the anode of the first diode string is connected to the first port, and the other end of the first resistor is connected to the second port; the reverse turn-on control component includes a second diode string and a second resistor connected in series, the second diode string uses one diode or more than one diode connected in series, the cathode of the second diode string is connected to one end of the second resistor and connected to the other gate of the dual-gate switching device, the anode of the second diode string in the reverse turn-on control component is connected to the second port, and the other end of the second resistor is connected to the first port;

[0016] When the GaN enhancement-mode power device is in a normal positive voltage working state, one control terminal of the dual-control switch controls the dual-control switch to enter and maintain an off state; when the GaN enhancement-mode power device is in a normal positive voltage working state and a forward ESD event occurs, the two control terminals of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy;

[0017] When the GaN enhanced power device is in a normal positive and negative voltage working state, the other control end of the dual-control switch controls the dual-control switch to enter and maintain the off state; when the GaN enhanced power device is in a normal positive and negative voltage working state and a forward ESD event occurs, the two control ends of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy.

[0018] The dual-gate switching device described in the present invention includes a substrate, on which a buffer layer, a channel layer, and a barrier layer are stacked from bottom to top. The device is characterized in that a first source, a first p-type cap layer, a second p-type cap layer, and a second source are respectively provided on the barrier layer, and a first gate and a second gate are respectively provided on the first p-type cap layer and the second p-type cap layer. In addition, the barrier layer contacts the channel layer to form a heterojunction channel and is controlled by the first gate and the second gate, respectively. The logical state of the first gate and the second gate is "AND gate".

[0019] The working principle of the present invention is as follows: when the GaN enhancement-mode power device is working normally in the forward direction, the first clamping end turns off the first gate, the second clamping end turns on the second gate, and the dual-gate bleeder is not turned on; when the GaN enhancement-mode power device is working in the reverse direction, the first clamping end turns on the first gate, the second clamping end turns off the second gate, and the dual-gate bleeder is not turned on; when a forward ESD event occurs in the GaN enhancement-mode power device, the first clamping end turns on the first gate, the second clamping end turns on the second gate, and the dual-gate bleeder is turned on; when a reverse ESD event occurs in the GaN enhancement-mode power device, the first clamping end turns on the first gate, the second clamping end turns on the second gate, and the dual-gate bleeder is turned on.

[0020] Compared with the prior art, the present invention has the following beneficial effects:

[0021] Based on the circuit of the present invention, the leakage path has only one dual-gate leakage tube, compared with the two and four leakage tubes in the traditional solution. Since the leakage tube itself is very large, the area occupied by the circuit of the present invention is significantly reduced. The details are as follows:

[0022] (1) The present invention combines negative voltage shutdown application and bidirectional ESD protection function and reduces the chip area occupied by the bidirectional ESD protection circuit. The area occupied by the protection circuit of the present invention is significantly reduced. Referring to Figures 4 and 7, the present invention provides a bidirectional ESD protection circuit for a GaN enhanced power device, including: a forward turn-on control component, a reverse turn-on control component, and a dual-gate switch tube, which realizes bidirectional ESD protection for GaN enhanced power devices when they are forward turned on or reverse turned off with a single dual-gate switch tube as the core. Compared with the prior art, the present invention only uses one dual-gate switch tube (also called a leakage tube) to form a leakage path to achieve bidirectional ESD protection of the device, while the leakage path of the existing protection circuit is used to achieve ESD protection. Bidirectional ESD protection for GaN enhanced-mode power devices requires and must utilize at least two connected bleeder tubes. Given the inherently large size of bleeder tubes, existing bidirectional ESD protection circuits employing two or more bleeder tubes occupy a significant chip footprint. The present invention achieves bidirectional ESD protection for GaN enhanced-mode power devices using only one bleeder tube, achieving bidirectional ESD protection while reducing the number of bleeder tubes. This reduction in the number of bleeder tubes also reduces the chip footprint of the bidirectional ESD protection circuit. Thus, the technical features of the present invention, including the dual-control switch, the forward-turning control component, the reverse-turning control component, and their interconnection, are integrated into a single unit, enabling bidirectional ESD protection and reducing the chip footprint of the bidirectional ESD protection circuit.

[0023] The bidirectional ESD protection of the GaN enhanced power device of the present invention realizes the following control logic: the dual-gate discharge tube (30) comprises a first gate, a second gate, a first source, and a second source, and the first gate and the second gate are in an "AND gate" logical state, that is, the first gate and the second gate must be turned on at the same time for the dual-gate discharge tube (30) to be turned on.

[0024] (2) High integration and reduced parasitic inductance. Compared with external integration, the present invention integrates the electrostatic discharge protection design into the device, reducing metal interconnects, lowering parasitic inductance, and reducing the adverse effects of external parasitic inductance on the device during application, resulting in better switching characteristics.

[0025] (3) The trigger voltage is adjustable, expanding the application scenarios of ESD protection. Different devices have different operating voltage ranges, and the trigger voltage required for ESD protection of the devices is also different. The present invention adjusts the number and resistance of diode strings in the forward turn-on control component and the reverse turn-on control component to achieve flexible use in various application scenarios.

[0026] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] FIG1 is a schematic diagram of a conventional unidirectional single-path ESD protection circuit for GaN enhancement-mode power devices;

[0028] FIG2 is a schematic diagram of a conventional bidirectional dual-path ESD protection circuit for GaN enhancement-mode power devices;

[0029] FIG3 is a schematic diagram of a conventional bidirectional single-path ESD protection circuit for GaN enhancement-mode power devices;

[0030] FIG4 is a schematic diagram of a bidirectional ESD protection circuit of a GaN enhanced-mode power device with negative voltage shutdown and a small area ratio proposed by the present invention;

[0031] FIG5 is a schematic diagram of an embodiment of a bidirectional ESD protection circuit for a GaN enhanced-mode power device according to the present invention;

[0032] FIG6 is a schematic diagram of another embodiment of a bidirectional ESD protection circuit for a GaN enhanced-mode power device according to the present invention;

[0033] 7 is a schematic structural diagram of a bidirectional ESD protection circuit and a dual-gate switch device of the bidirectional ESD protection circuit proposed by the present invention;

[0034] FIG8 is a diagram comparing the occupied areas of the protection circuit of the present invention and the conventional protection circuit;

[0035] FIG9 is a diagram showing changes in the gate voltage of the protected power tube and the gate voltage of the dual-gate discharge tube, wherein FIG9a is a diagram showing changes in voltage when a positive ESD event occurs, and FIG9b is a diagram showing changes in voltage when a negative ESD event occurs. DETAILED DESCRIPTION

[0036] Example 1

[0037] A bidirectional ESD protection method for a GaN enhanced-mode power device includes the steps of providing a first port for connecting to the drain of a protected GaN enhanced-mode power device 40 and a second port for connecting to the source of the GaN enhanced-mode power device 40, wherein a dual-control switch is connected between the first port and the second port to form an ESD energy discharge path.

[0038] When the GaN enhanced power device 40 is in a normal positive voltage working state, one control terminal of the dual-control switch controls the dual-control switch to enter and maintain an off state; when the GaN enhanced power device 40 is in a positive voltage working state and a forward ESD event occurs, the two control terminals of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy;

[0039] When the GaN enhanced-mode power device 40 is in a normal negative voltage operating state, the other control terminal of the dual-control switch controls the dual-control switch to enter and maintain the off state. When the GaN enhanced-mode power device 40 is in a negative voltage operating state and a positive ESD event occurs, the two control terminals of the dual-control switch jointly control the dual-control switch to conduct, dissipating ESD energy. In this embodiment, the dual-control switch is a dual-gate switch device 30.

[0040] The so-called normal positive voltage working state means that the gate of the GaN enhancement mode power device 40 is turned on by a positive voltage; the so-called negative normal positive voltage working state means that the gate of the GaN enhancement mode power device 40 is turned off by a negative voltage.

[0041] Referring to Figure 9a, when the power tube does not have an ESD protection structure, as shown by the dotted line in the figure, there is no discharge path for the forward ESD energy, and the gate voltage continues to rise over time, causing the gate of the power tube to degrade or fail. When the power tube has the ESD protection structure of the present invention, the gate voltage of the power tube is shown as the black solid line in the figure, and the gate voltage of the dual-gate discharge tube is shown as the gray solid line in the figure. When the gate voltage of the power tube rises to a certain value, the diode string of the forward voltage divider module begins to conduct, its equivalent resistance begins to decrease, and the gate voltage of the dual-gate discharge tube begins to rise until the dual-gate discharge tube is fully turned on. At this time, the ESD protection is triggered, the discharge path is opened, and the gate voltage of the power tube is limited, playing an effective forward ESD protection role. The power tube gate voltage at the marked position in the figure is recorded as the forward ESD trigger voltage position, which can be adjusted by changing the number of diodes in the diode string of the forward voltage divider module of the present invention.

[0042] Referring to Figure 9b, when the power tube does not have an ESD protection structure, as shown by the dotted line in the figure, there is no discharge path for negative ESD energy, and the gate voltage continues to increase over time, causing the gate of the power tube to degrade or fail. When the power tube has the ESD protection structure of the present invention, the gate voltage of the power tube is shown as the black solid line in the figure, and the gate voltage of the dual-gate bleeder tube is shown as the gray solid line in the figure. When the gate voltage of the power tube reaches approximately a certain value, the diode string of the negative voltage divider module begins to conduct, its equivalent resistance begins to decrease, and the gate voltage of the dual-gate bleeder tube begins to rise until the dual-gate bleeder tube is fully turned on. At this time, the ESD protection is triggered, the discharge path is opened, and the gate voltage of the power tube is limited, providing effective negative ESD protection. The power tube gate voltage marked in the figure is recorded as the negative ESD trigger voltage, which can be adjusted by changing the number of diodes in the diode string of the positive voltage divider module of the present invention.

[0043] Example 2

[0044] A bidirectional ESD protection circuit for a GaN enhanced-mode power device comprises: a first port for connecting the gate of a protected GaN enhanced-mode power device 40 and a second port for connecting the drain of the GaN enhanced-mode power device 40; a dual-control switch is connected between the first port and the second port to form an ESD energy discharge path; the dual-control switch adopts a dual-gate switch device 30, the first source and the second source of the dual-gate switch device 30 are connected to the first port and the second port respectively; a forward start-up control component 10 and a reverse start-up control component 20 are connected in parallel to the first port and the second port; the forward start-up control component 10 comprises a first diode string 11 and a first resistor 12 connected in series, the first diode string 11 adopts one diode or more diodes connected in series, the cathode of the first diode string 11 is connected to one end of the first resistor 12 and to a gate G1 of the dual-gate switch device 30, the anode of the first diode string 11 is connected to the first port, and the other end of the first resistor 12 is connected to the second port; the reverse start-up control component 20 comprises a second diode string 23 and a second resistor 22 connected in series, The second diode string 23 uses one diode or more than one diode connected in series, the cathode of the second diode string (23) is connected to one end of the second resistor 22 and connected to the other gate G2 of the dual-gate switch device 30, the anode of the second diode string 23 in the reverse opening control component 20 is connected to the second port, and the other end of the second resistor 22 is connected to the first port; wherein, the first diode string 11 can be specifically a Schottky diode, a gate-source short-circuited GaN transistor, and the number of diode strings is determined by the gate of the GaN enhanced power device 40 and the dual-gate discharge tube 30. The voltage is determined by the number of diodes, which can be 2 to 10. The second diode string 21 can be a Schottky diode or a gate-source shorted GaN transistor. The number of diode strings is determined by the gate operating voltage of the GaN enhanced power device 40 and the dual-gate discharge tube 30, which can be 1 to 15. The first resistor 12 is a two-dimensional electron gas resistor or a metal resistor, and the second resistor 22 is a two-dimensional electron gas resistor or a metal resistor. Further explanation: It should be noted that the number of diodes in the diode string of this embodiment can be adjusted according to different diode voltage drops and different trigger voltage requirements. The trigger voltage V of the first diode string 13 is 2. trig1 = The product of the trigger voltage Vf of a single diode and the number n of diodes, the trigger voltage Vf of the first diode string 13 is equal to trig1 It needs to be greater than the forward operating voltage of the power tube (otherwise the device will not work properly). The same applies to negative ESD events. That is, V trig1 =n*Vf>VG;

[0045] When the first diode string 11 uses one diode, the cathode of the diode is the cathode of the first diode string 11, and the anode of the diode is the anode of the first diode string 11; when the first diode string 11 uses more than one diode connected in series, the two ends of the first diode string are the anode and cathode of the two outermost diodes respectively, the anode of the outermost diode is the anode of the first diode string 11, and the cathode of the outermost diode is the cathode of the first diode string 11; the cathode and anode of the second diode string 23 are similarly connected.

[0046] When the GaN enhanced power device 40 is in a normal positive voltage working state, one control terminal of the dual-control switch controls the dual-control switch to enter and maintain an off state; when the GaN enhanced power device 40 is in a positive voltage working state and a forward ESD event occurs, the two control terminals of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy;

[0047] When the GaN enhanced power device 40 is in a normal negative voltage working state, the other control end of the dual-control switch controls the dual-control switch to enter and maintain the off state; when the GaN enhanced power device 40 is in a negative voltage working state and a forward ESD event occurs, the two control ends of the dual-control switch jointly control the dual-control switch to turn on and discharge ESD energy.

[0048] 5 , the diode is replaced by a GaN device with the gate and source short-circuited; referring to FIG6 , a capacitor 14 is connected in series at either end of the first diode string 11 ; a capacitor (not shown) is connected in series at either end of the second diode string 21 .

[0049] To further illustrate, the logic state of the first gate and the second gate is an "AND gate," meaning that the first gate and the second gate must be turned on simultaneously for the dual-gate bleeder tube 30 to turn on. The reverse off-resistance of the first diode string 11 is much greater than the first resistor 12, and the reverse off-resistance of the second diode string 21 is much greater than the second resistor 22. The forward on-resistance of the first diode string 11 is much smaller than the first resistor 12, and the forward on-resistance of the second diode string 21 is much smaller than the second resistor 22; wherein:

[0050] When the GaN enhanced power device 40 operates normally in the forward direction, the first terminal turns off the first gate, the second terminal turns on the second gate, and the dual-gate discharge tube 30 is not turned on;

[0051] When the GaN enhanced power device 40 is in reverse shutdown operation, the first end turns on the first gate, the second end turns off the second gate, and the dual-gate discharge tube 30 is not turned on;

[0052] When a forward ESD event occurs in the GaN enhanced power device 40, the first gate is turned on at the first end, the second gate is turned on at the second end, and the dual-gate discharge tube 30 is turned on;

[0053] When a reverse ESD event occurs in the GaN enhanced power device 40 , the first gate is turned on at the first end, the second gate is turned on at the second end, and the dual-gate discharge tube 30 is turned on.

[0054] Example 3

[0055] A dual-gate switching device 30 includes a substrate 301 on which a buffer layer 302, a channel layer 303, and a barrier layer 304 are stacked from bottom to top. The device is characterized in that a first source electrode 309S1, a first p-type cap layer 305, a second p-type cap layer 306, and a second source electrode 309S2 are respectively provided on the barrier layer 304, and a first gate electrode 307 and a second gate electrode 308 are respectively provided on the first p-type cap layer 305 and the second p-type cap layer 306. Furthermore, the barrier layer 304 contacts the channel layer 303 to form a heterojunction channel 303a, which is controlled by the first gate electrode 307 and the second gate electrode 308, respectively. The logic states of the first gate electrode 307 and the second gate electrode 308 are "AND gates," meaning that the dual-gate bleeder can only be turned on if both the first gate electrode and the second gate electrode are turned on simultaneously. The first p-type cap layer 305 is at least one of pGaN, pAlGaN, pSnO, and pOxide.

[0056] The working principle and working process of the dual-gate switching device are as follows: (1) When the voltage applied to the first gate 307 and the second gate 308 is low, since the first pGaN layer 305 and the second pGaN layer 306 have a depletion effect on the heterojunction channel 303a thereunder, the two-dimensional electron gas in the heterojunction channel 3a is isolated and the dual-gate discharge tube 30 is turned off.

[0057] (2) When a high voltage is applied to the first gate 307 and a low voltage is applied to the second gate 308, the heterojunction channel 303a below the first pGaN layer 305 is controlled to generate a two-dimensional electron gas, while the two-dimensional electron gas in the heterojunction channel 303a below the second pGaN layer 306 is still in a depleted state, and the dual-gate discharge tube 30 is turned off.

[0058] (3) When a high voltage is applied to the second gate 308 and a low voltage is applied to the first gate 307, the heterojunction channel 303a below the second pGaN layer 306 is controlled to generate a two-dimensional electron gas, while the two-dimensional electron gas in the heterojunction channel 303a below the first pGaN layer 305 is still in a depleted state, and the dual-gate discharge tube 30 is turned off.

[0059] (4) When the voltage applied to the first gate 307 and the second gate 308 is high, the heterojunction channel 303a below the first pGaN layer 305 and the second pGaN layer 306 is controlled to generate a two-dimensional electron gas, the channel is connected, and the dual-gate discharge tube 30 is turned on.

[0060] The term "high voltage" refers to a gate-source voltage drop greater than the threshold, while "low voltage" refers to a gate-source voltage drop less than the threshold. When dual-gate bleeder 30 is turned on, the channel current initially increases with the voltage applied to first gate 307 and second gate 308 until the two-dimensional electron gas concentration beneath first pGaN layer 305 and second pGaN layer 306 reaches a certain value and stops increasing. At this point, the channel is fully open and the current reaches saturation.

[0061] Although the present invention has been disclosed above in terms of preferred embodiments, this is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the scope of protection of the technical solutions of the present invention.

Claims

1. A bidirectional ESD protection method for a GaN enhanced power device, comprising the steps of providing a first port for connecting a drain of a protected GaN enhanced power device (40) and a second port for connecting a source of the GaN enhanced power device (40), characterized in that: A double-control switch is connected between the first port and the second port to form an ESD energy discharge path. When the GaN enhanced power device (40) is in a normal positive voltage working state, one control end of the dual control switch controls the dual control switch to enter and maintain an off state; when the GaN enhanced power device (40) is in a positive voltage working state and a forward ESD event occurs, the two control ends of the dual control switch jointly control the dual control switch to be turned on to discharge ESD energy; When the GaN enhanced power device (40) is in a normal negative voltage working state, the other control end of the dual control switch controls the dual control switch to enter and maintain an off state; when the GaN enhanced power device (40) is in a negative voltage working state and a positive ESD event occurs, the two control ends of the dual control switch jointly control the dual control switch to be turned on to discharge ESD energy.

2. The bidirectional ESD protection method for GaN enhanced power devices according to claim 1, characterized in that: The dual-control switch adopts a dual-gate switch device (30).

3. A bidirectional ESD protection circuit for a GaN enhanced power device, comprising: A first port for connecting a gate of a protected GaN enhanced power device (40) and a second port for connecting a drain of the GaN enhanced power device (40), characterized in that a double-control switch is connected between the first port and the second port to form an ESD energy discharge path, the double-control switch adopts a double-gate switch device (30), and the first source and the second source of the double-gate switch device (30) are respectively connected to the first port and the second port; a forward start control component (10) and a reverse start control component (20) are connected in parallel to the first port and the second port, the forward start control component (10) comprises a first diode string (11) and a first resistor (12) connected in series, the first diode string (11) adopts one diode or more than one diode connected in series, and the first diode string ( The cathode of the first diode string (11) is connected to one end of the first resistor (12) and connected to a gate (G1) of the dual-gate switch device (30), the anode of the first diode string (11) is connected to the first port, and the other end of the first resistor (12) is connected to the second port; the reverse opening control component (20) comprises a second diode string (23) and a second resistor (22) connected in series, the second diode string (23) uses one diode or more than one diode connected in series, the cathode of the second diode string (23) is connected to one end of the second resistor (22) and connected to another gate (G2) of the dual-gate switch device (30), the anode of the second diode string (23) in the reverse opening control component (20) is connected to the second port, and the other end of the second resistor (22) is connected to the first port; When the GaN enhanced power device (40) is in a normal positive voltage working state, one control end of the dual control switch controls the dual control switch to enter and maintain an off state; when the GaN enhanced power device (40) is in a positive voltage working state and a forward ESD event occurs, the two control ends of the dual control switch jointly control the dual control switch to be turned on to discharge ESD energy; When the GaN enhanced power device (40) is in a normal negative voltage working state, the other control end of the dual control switch controls the dual control switch to enter and maintain an off state; when the GaN enhanced power device (40) is in a negative voltage working state and a positive ESD event occurs, the two control ends of the dual control switch jointly control the dual control switch to be turned on to discharge ESD energy.

4. The bidirectional ESD protection circuit of the GaN enhanced power device according to claim 3, characterized in that: The diode is replaced by a GaN device with the gate and source short-circuited.

5. The bidirectional ESD protection circuit of the GaN enhanced power device according to claim 3 or 4, characterized in that: A capacitor (14) is connected in series to any one end of the first diode string (11).

6. The bidirectional ESD protection circuit of the GaN enhanced power device according to claim 3 or 4, characterized in that: A capacitor is connected in series to any end of the second diode string (21).

7. A dual-gate switch device (30), comprising a substrate (301), on which a buffer layer (302), a channel layer (303), and a barrier layer (304) are stacked from bottom to top, characterized in that: A first source (309S1), a first p-type cap layer (305), a second p-type cap layer (306) and a second source (309S2) are respectively arranged on the barrier layer (304); a first gate (307) and a second gate (308) are respectively arranged on the first p-type cap layer (305) and the second p-type cap layer (306); and the barrier layer (304) contacts the channel layer (303) to form a heterojunction channel (303a) and is respectively controlled by the first gate (307) and the second gate (308); and the logic states of the first gate (307) and the second gate (308) are "AND gates".

8. The dual-gate switching device according to claim 7, characterized in that: The first p-type cap layer (305) is at least one of pGaN, pAlGaN, pSnO and pOxide.

9. The dual-gate switching device according to claim 7, characterized in that: The second p-type cap layer (306) is at least one of pGaN, pAlGaN, pSnO and pOxide.

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