Simulation verification system and method for interrupt controller of hard-core MCU
A simulation verification and controller technology, which is applied in the field of simulation verification system, can solve problems such as difficulty in covering interrupt source triggering, reducing verification efficiency, and difficulty in ensuring that the function of the interrupt controller module is correct, etc.
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- Publication Date
- 2014-06-04
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Abstract
Description
technical field
[0001] The invention relates to the field of SOC (system on chip) function verification, in particular to a simulation verification system for an interrupt controller of a hard-core MCU (Micro Control Unit micro control unit). The invention also relates to a simulation verification method for an interrupt controller of a hard-core MCU. Background technique
[0002] The interrupt system is an important part of the MCU. The interrupt system is generally used for real-time control, automatic fault processing, and data transmission with peripheral devices. A complete interrupt process includes: the interrupt source is generated, the interrupt source makes an interrupt request to the MCU, the MCU suspends the current program and turns to respond to the interrupt request, processes the interrupt service program corresponding to the interrupt source, and returns from the interrupt. The MCU often contains multiple interrupt sources, and the interrupt controller is u...
Examples
Embodiment Construction
[0018] In the actual application of hard-core MCU, interrupts are generated in various situations. Manually writing interrupt test cases can only configure interrupt registers for special applications, and then trigger interrupts under certain conditions, which will cause a lot of problems in simulation verification. Omission of possible conditions. The present invention uses a random method to simulate and verify the interrupt controller, which can reduce the workload of manually writing test cases and efficiently improve the coverage of simulation verification, so it is very necessary.
[0019] The random setting includes the random setting of each relevant interrupt register in the software test piece; the random setting of the hard-core MCU interrupt flag bit.
[0020] see figure 1 As shown, in one embodiment, the simulation verification system for the interrupt controller of the hard-core MCU includes: DUT (Design Under Test: design under test) module ( figure 1 The par...