A bypass parallel constant current source circuit

Abstract

The present invention relates to the field of electronic circuits, and particularly to a bypass parallel constant current source circuit. The present invention includes a controllable load, the controllable load is connected in parallel with the load, and the controllable load includes an operational amplifier IC1 and a feedback unit. The current on the bypass flows through the feedback unit to the operational amplifier IC1. The operational amplifier IC1 outputs a current corresponding to the main circuit according to the magnitude of the feedback current, so as to achieve the effect of constant total output current, has the characteristic of stable output current, solves the problems of unsatisfactory performance and easy instability of the traditional series constant current source, and improves the power efficiency.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits, and particularly to a bypass parallel constant current source circuit. Background Art

[0002] A constant current source is a component widely used in circuits. A constant current source is a current source that maintains a constant output current. The essence of a constant current source is to use a device to feedback the current and dynamically adjust the power supply state of the device, so that the current tends to be constant. As long as the current can be obtained, a feedback can be effectively formed to establish a constant current source.

[0003] As Figure 6 shown, common controlled constant current source circuits are all composed of MOS transistors, diodes, and multiple resistors. Among them, in order to ensure the stability of the drain current of the MOS transistor, the drain of the MOS transistor is connected to the negative pole of the diode, and the positive pole of the diode is connected to the gate of the MOS transistor. The current is fed back to the gate of the MOS transistor through the diode, so as to adjust the output current of the drain by using the current on the gate to achieve the effect of outputting a constant current.

[0004] However, such constant current sources are all connected in series with the load in a branch, resulting in problems such as unsatisfactory performance and easy instability of the constant current source. Summary of the Invention

[0005] To solve the above problems, the present invention provides a bypass parallel constant current source circuit, which has a stable output current and solves the problems of unsatisfactory performance and easy instability of traditional constant current sources.

[0006] To achieve the above object, the technical solution adopted by the present invention is: a bypass parallel constant current source circuit, including a controlled constant current source and a load RL. The controlled constant current source and the load RL are connected in series to form a loop. A controllable load is also included, and the controllable load is connected in parallel with the load RL. Among them, the controllable load includes an operational amplifier IC1, a reference power supply, a bypass resistor R1, and a feedback unit. One end of the bypass resistor R1 and one end of the load RL are both connected to the positive pole of the controlled constant current source, the other end of the bypass resistor R1 is connected to the negative pole of the controlled constant current source, the other end of the load RL is connected to the negative pole of the controlled constant current source through a sampling resistor R2, one end of the load RL is connected to the inverting input terminal of the operational amplifier IC1 through the feedback unit, and the output terminal of the operational amplifier IC1 is respectively connected to one end of the bypass resistor R1 and the input terminal of the feedback unit. Among them, the non-inverting input terminal of the operational amplifier IC1 is connected to the reference power supply.

[0007] Further, the feedback unit includes a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected to the inverting input terminal of the operational amplifier IC1, and the other end is connected to the output terminal of the operational amplifier IC1. One end of the second resistor R4 is connected to one end of the load RL, and the other end is connected to the inverting input terminal of the operational amplifier IC1. With the above solution, the current output by the first resistor R3 is fed back to the operational amplifier IC1, and the current output by the second resistor R4 is fed back to the operational amplifier IC1.

[0008] Further, it further includes a MOS transistor Q1. The source electrode of the MOS transistor Q1 is connected to the positive electrode of the controlled constant current source. The gate electrode of the MOS transistor Q1 is connected to the output terminal of the operational amplifier IC1. The drain electrode of the MOS transistor Q1 is connected to one end of the bypass resistor R1. With the above solution, by utilizing the characteristic that the MOS transistor changes voltage to control current, and the driving ability of the MOS transistor Q1 is greater than that of the operational amplifier IC1, the current flowing out of the MOS transistor Q1 can be larger.

[0009] To achieve the above object, another technical solution adopted by the present invention is: a bypass parallel constant current source circuit, including a controlled constant current source and a load RL. The controlled constant current source and the load RL are connected in series to form a loop. It further includes a controllable load, and the controllable load is connected in parallel with the load RL. Among them, the controllable load includes an operational amplifier IC1, a reference power supply, a bypass resistor R1, a feedback unit, and an operational amplifier IC2 for detecting current. One end of the bypass resistor R1 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source. One end of the sampling resistor R2 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source through the load RL. The non-inverting input terminal and the inverting input terminal of the operational amplifier IC2 are respectively connected to both ends of the sampling resistor R2. The output terminal of the operational amplifier IC2 is connected to the inverting input terminal of the operational amplifier IC1 through the feedback unit. The output terminal of the operational amplifier IC1 is connected to one end of the bypass resistor R1. The non-inverting input terminal of the operational amplifier IC1 is connected to the reference power supply.

[0010] Further, it further includes a MOS transistor Q1. The output terminal of the operational amplifier IC1 is connected to the gate electrode of the MOS transistor Q1. The source electrode of the MOS transistor Q1 is connected to the positive electrode of the controlled constant current source. The drain electrode of the MOS transistor Q1 is connected to the negative electrode of the controlled constant current source through the bypass resistor R1. With the above solution, by utilizing the characteristic that the MOS transistor changes voltage to control current, and the driving ability of the MOS transistor Q1 is greater than that of the operational amplifier IC1, the current flowing out of the MOS transistor Q1 can be larger.

[0011] Further, the feedback unit includes a first resistor R3 and a second resistor R4. One end of the second resistor R4 is connected to the output end of the operational amplifier IC2, and the other end of the second resistor R4 is respectively connected to one end of the first resistor R3 and the inverting input end of the operational amplifier IC1. The other end of the first resistor R3 is connected to the gate of the MOS transistor Q1. With the above solution, the current output by the first resistor R3 is fed back to the operational amplifier IC1, and the current output by the second resistor R4 is fed back to the operational amplifier IC1.

[0012] To achieve the above object, another technical solution adopted by the present invention is: a bypass parallel constant current source circuit, including a controlled constant current source and a load RL. The controlled constant current source and the load RL are connected in series to form a loop. It is characterized in that it further includes a controllable load. The controllable load is connected in parallel with the load RL. Among them, the controllable load includes a sampling resistor R2, an operational amplifier IC1, a feedback unit, a bypass resistor R1, a reference power supply, and an operational amplifier IC2 for current detection. One end of the sampling resistor R2 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source through the load RL. And the other end of the sampling resistor R2 is also connected to the negative electrode of the controlled constant current source through the bypass resistor R1. Both ends of the operational amplifier IC2 are respectively connected to both ends of the sampling resistor R2. The output end of the operational amplifier IC2 is connected to the inverting input end of the operational amplifier IC1 through the feedback unit, and the non-inverting input end is connected to the reference power supply. The output end of the operational amplifier IC1 is respectively connected to the input end of the feedback unit and one end of the bypass resistor R1.

[0013] Further, it further includes a MOS transistor Q1. The output end of the operational amplifier IC1 is connected to the gate of the MOS transistor Q1. The source of the MOS transistor Q1 is connected to the other end of the sampling resistor R2. The drain of the MOS transistor Q1 is respectively connected to the input end of the feedback unit and one end of the bypass resistor R1. Utilizing the characteristic that the MOS transistor changes the voltage to control the current, and the driving ability of the MOS transistor Q1 is greater than that of the operational amplifier IC1, so that the current flowing out of the MOS transistor Q1 can be greater.

[0014] Further, the feedback unit includes a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected to one end of the bypass resistor R1, and the other end is connected to one end of the second resistor R4. The other end of the second resistor R4 is connected to the output end of the operational amplifier IC2. With the above solution, the current output by the first resistor R3 is fed back to the operational amplifier IC1, and the current output by the second resistor R4 is fed back to the operational amplifier IC1.

[0015] The beneficial effects of the present invention are as follows: The present invention includes a controllable load, which is connected in parallel with the load. The controllable load includes an operational amplifier IC1 and a feedback unit. By using the cooperation of the operational amplifier IC1 and the feedback unit to replace the traditional structure of the cooperation between MOS transistors and diodes, the current on the bypass flows through the feedback unit to the operational amplifier IC1. The operational amplifier IC1 outputs a current corresponding to the main circuit according to the magnitude of the feedback current, so as to achieve the effect of unchanged total output current, and has the characteristic of stable output current, solving the problems of unsatisfactory performance and easy instability of the traditional controlled constant current source. Description of the Drawings

[0016] Figure 1 It is the circuit diagram of the first specific embodiment of the present invention.

[0017] Figure 2 It is the circuit diagram of the second specific embodiment of the present invention.

[0018] Figure 3 It is the circuit diagram of the third specific embodiment of the present invention.

[0019] Figure 4 It is the circuit diagram of the fourth specific embodiment of the present invention.

[0020] Figure 5 It is the circuit diagram of the fifth specific embodiment of the present invention.

[0021] Figure 6 It is the circuit diagram of the existing controlled constant current source. Detailed Embodiments

[0022] Embodiment 1: Please refer to Figure 1 As shown, a bypass parallel constant current source circuit includes a controlled constant current source and a load RL, and further includes a controllable load, which is connected in parallel with the load RL. Among them, the controllable load includes an operational amplifier IC1, a reference power supply, a bypass resistor R1, and a feedback unit. One end of the bypass resistor R1 and one end of the load RL are both connected to the positive pole of the controlled constant current source, the other end of the bypass resistor R1 is connected to the negative pole of the controlled constant current source, the other end of the load RL is connected to the negative pole of the controlled constant current source through a sampling resistor R2, one end of the load RL is connected to the inverting input terminal of the operational amplifier IC1 through the feedback unit, and the output terminal of the operational amplifier IC1 is respectively connected to one end of the bypass resistor R1 and the input terminal of the feedback unit. Among them, the non-inverting input terminal of the operational amplifier IC1 is connected to the reference power supply.

[0023] Further, the feedback unit includes a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected to the inverting input terminal of the operational amplifier IC1, and the other end is connected to the output terminal of the operational amplifier IC1. One end of the second resistor R4 is connected to one end of the load RL, and the other end is connected to the inverting input terminal of the operational amplifier IC1. With the above scheme, the current output by the first resistor R3 is fed back to the operational amplifier IC1, and the current output by the second resistor R4 is fed back to the operational amplifier IC1.

[0024] Embodiment 2, please refer to Figure 2 As shown, further, it also includes a MOS transistor Q1. The source electrode of the MOS transistor Q1 is connected to the positive electrode of the controlled constant current source. The gate electrode of the MOS transistor Q1 is connected to the output terminal of the operational amplifier IC1. The drain electrode of the MOS transistor Q1 is connected to one end of the bypass resistor R1. With the above scheme, by utilizing the characteristic that the MOS transistor changes the voltage to control the current, and the driving ability of the MOS transistor Q1 is greater than that of the operational amplifier IC1, the current flowing out of the MOS transistor Q1 can be larger.

[0025] The working principle of the present invention is as follows: The current I0 is the total current in the circuit. The current IO is the sum of the current in the load RL and the current flowing through the bypass resistor R1. The sampling resistor R2 is used to detect the voltage across the load RL and feedback it to the operational amplifier IC1 through the second resistor R4, thereby adjusting the output voltage of the operational amplifier IC1. When the current across the load resistor RL increases, the voltage across the sampling resistor R2 increases. This voltage is fed back to the operational amplifier IC1 through the second resistor R4, and the operational amplifier IC1 outputs a low voltage. The current at the gate electrode of the MOS transistor Q1 decreases, and the total current I0 remains unchanged. When the current across the load RL decreases, the voltage across the sampling resistor R2 decreases. The output voltage of the operational amplifier IC1 increases, the current at the gate electrode of the MOS transistor Q1 increases, and the total current IO remains unchanged.

[0026] Embodiment 3: Please refer to Figure 3As shown in the figure, a bypass parallel constant current source circuit includes a controlled constant current source and a load RL, and also includes a controllable load. The controllable load is connected in parallel with the load RL. Among them, the controllable load includes an operational amplifier IC1, a reference power supply, a bypass resistor R1, a feedback unit, and an operational amplifier IC2 for detecting current. One end of the bypass resistor R1 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source. One end of the sampling resistor R2 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source through the load RL. The non-inverting input terminal and the inverting input terminal of the operational amplifier IC2 are respectively connected to both ends of the sampling resistor R2. The output terminal of the operational amplifier IC2 is connected to the inverting input terminal of the operational amplifier IC1 through the feedback unit. The output terminal of the operational amplifier IC1 is connected to one end of the bypass resistor R1, and the non-inverting input terminal of the operational amplifier IC1 is connected to the reference power supply.

[0027] Further, it also includes a MOS transistor Q1. The output terminal of the operational amplifier IC1 is connected to the gate of the MOS transistor Q1. The source of the MOS transistor Q1 is connected to the positive electrode of the controlled constant current source, and the drain of the MOS transistor Q1 is connected to the negative electrode of the controlled constant current source through the bypass resistor R1. With the above scheme, by using the characteristic of the MOS transistor to change the voltage to control the current, and the driving ability of the MOS transistor Q1 is greater than that of the operational amplifier IC1, the current flowing out of the MOS transistor Q1 can be larger.

[0028] Further, the feedback unit includes a first resistor R3 and a second resistor R4. One end of the second resistor R4 is connected to the output terminal of the operational amplifier IC2. The other end of the second resistor R4 is respectively connected to one end of the first resistor R3 and the inverting input terminal of the operational amplifier IC1. The other end of the first resistor R3 is connected to the gate of the MOS transistor Q1. With the above scheme, the current output by the first resistor R3 is fed back to the operational amplifier IC1, and the current output by the second resistor R4 is fed back to the operational amplifier IC1.

[0029] The working principle of the present invention is as follows: The dedicated operational amplifier IC2 detects the current signal and converts it into a voltage signal for output. When the current passing through the load RL increases, the output voltage of the current monitoring becomes higher, the output voltage of the operational amplifier IC2 decreases, the current passing through the gate of the MOS transistor Q1 becomes smaller, and the total current I0 remains unchanged. On the contrary, when the current passing through the load RL decreases, the voltage of the sampling resistor R2 decreases, the output voltage of the current monitoring becomes lower, the output of the operational amplifier IC2 becomes higher, the current passing through the MOS transistor Q1 becomes larger, and the total current remains unchanged.

[0030] Example 4: Refer to Figure 4As shown in the figure, a bypass parallel constant current source circuit includes a controlled constant current source and a load RL, and also includes a controllable load. The controllable load is connected in parallel with the load RL. Among them, the controllable load includes a sampling resistor R2, an operational amplifier IC1, a feedback unit, a bypass resistor R1, a reference power supply, and an operational amplifier IC2 for current detection. One end of the sampling resistor R2 is connected to the positive pole of the controlled constant current source, and the other end is connected to the negative pole of the controlled constant current source through the load RL. The other end of the sampling resistor R2 is also connected to the negative pole of the controlled constant current source through the bypass resistor R1. Both ends of the operational amplifier IC2 are respectively connected to both ends of the sampling resistor R2. The output end of the operational amplifier IC2 is connected to the inverting input end of the operational amplifier IC1 through the feedback unit. The non-inverting input end is connected to the reference power supply. The output end of the operational amplifier IC1 is respectively connected to the input end of the feedback unit and one end of the bypass resistor R1.

[0031] Further, it also includes a MOS transistor Q1. The output end of the operational amplifier IC1 is connected to the gate of the MOS transistor Q1. The source of the MOS transistor Q1 is connected to the other end of the sampling resistor R2. The drain of the MOS transistor Q1 is respectively connected to the input end of the feedback unit and one end of the bypass resistor R1. Utilizing the characteristic of the MOS transistor to control current by changing voltage, and the driving ability of the MOS transistor Q1 is greater than that of the operational amplifier IC1, so that the current flowing out of the MOS transistor Q1 can be larger.

[0032] Further, the feedback unit includes a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected to one end of the bypass resistor R1, and the other end is connected to one end of the second resistor R4. The other end of the second resistor R4 is connected to the output end of the operational amplifier IC2. With the above scheme, the current output by the first resistor R3 is fed back to the operational amplifier IC1, and the current output by the second resistor R4 is fed back to the operational amplifier IC1.

[0033] Compared with the prior art, the present invention includes a controllable load. The controllable load is connected in parallel with the load and the controllable load includes an operational amplifier IC1 and a feedback unit. By using the operational amplifier IC1 and the feedback unit to cooperate with each other to replace the traditional structure of the cooperation between the MOS transistor and the diode, the current on the bypass flows through the feedback unit to the operational amplifier IC1. The operational amplifier IC1 outputs a current corresponding to the main circuit according to the magnitude of the feedback current to achieve the effect of the total output current remaining unchanged, having the characteristic of stable output current, and solving the problems of unsatisfactory performance and easy instability of the traditional controlled constant current source.

[0034] The working principle of the present invention is as follows: The total current IO is monitored by using the sampling resistor R2 and the operational amplifier IC2. When the total current IO increases, the voltage drop across the sampling resistor R2 increases, and the voltage output by the operational amplifier IC2 rises. It is input to the inverting input terminal of the operational amplifier IC1 through the second resistor R4, and the output voltage of the operational amplifier IC1 decreases, and the current passing through the MOS transistor Q1 becomes smaller. On the contrary, when the total current IO decreases, the voltage drop across the sampling resistor R2 becomes smaller, the output voltage of the current monitoring decreases, the output current of the operational amplifier IC1 increases, and finally the total current I0 remains unchanged.

[0035] Embodiment 5: Refer to Figure 5 As shown, in the specific Embodiment 5 of the present invention, one end of the sampling resistor R2 is connected to one end of the bypass resistor R1, and the other end is connected to the negative pole of the controlled constant current source. The non-inverting input terminal of the operational amplifier IC2 is connected to one end of the sampling resistor R2, and the other end is connected to the negative pole of the controlled constant current source. The connection methods, structures, and principles of the remaining components are all the same as those in Embodiment 3.

[0036] The above embodiments are only descriptions of the preferred embodiments of the present invention, and do not limit the scope of the present invention. Without departing from the design spirit of the present invention, various deformations and improvements made by those of ordinary skill in the art to the technical solutions of the present invention shall fall within the protection scope determined by the claims of the present invention.

Claims

1. A bypass parallel constant current source circuit, comprising a controlled constant current source and a load (RL), characterized in that, It further includes a controllable load, and the controllable load is connected in parallel with the load (RL). Among them, the controllable load includes an operational amplifier (IC1), a reference power supply, a bypass resistor (R1), and a feedback unit. One end of the bypass resistor (R1) and one end of the load (RL) are both connected to the positive electrode of the controlled constant current source. The other end of the bypass resistor (R1) is connected to the negative electrode of the controlled constant current source. The other end of the load (RL) is connected to the negative electrode of the controlled constant current source through a sampling resistor (R2). One end of the load (RL) is connected to the inverting input terminal of the operational amplifier (IC1) through the feedback unit. The output terminal of the operational amplifier (IC1) is respectively connected to one end of the bypass resistor (R1) and the input terminal of the feedback unit. Among them, the non-inverting input terminal of the operational amplifier (IC1) is connected to the reference power supply; The feedback unit includes a first resistor (R3) and a second resistor (R4). One end of the first resistor (R3) is connected to the inverting input terminal of the operational amplifier (IC1), and the other end is connected to the output terminal of the operational amplifier (IC1). One end of the second resistor (R4) is connected to one end of the load (RL), and the other end is connected to the inverting input terminal of the operational amplifier (IC1); It further includes an MOS transistor (Q1). The source electrode of the MOS transistor (Q1) is connected to the positive electrode of the controlled constant current source. The gate electrode of the MOS transistor (Q1) is connected to the output terminal of the operational amplifier (IC1). The drain electrode of the MOS transistor (Q1) is connected to one end of the bypass resistor (R1).

2. The bypass parallel constant current source circuit according to claim 1, characterized in that, It includes a controlled constant current source and a load RL. It is characterized in that it further includes a controllable load, and the controllable load is connected in parallel with the load RL. Among them, the controllable load includes an operational amplifier IC1, a reference power supply, a bypass resistor R1, a feedback unit, and an operational amplifier IC2 for detecting current. One end of the bypass resistor R1 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source. One end of the sampling resistor R2 is connected to the positive electrode of the controlled constant current source, and the other end is connected to the negative electrode of the controlled constant current source through the load RL. The non-inverting input terminal and the inverting input terminal of the operational amplifier IC2 are respectively connected to both ends of the sampling resistor R2. The output terminal of the operational amplifier IC2 is connected to the inverting input terminal of the operational amplifier IC1 through the feedback unit. The output terminal of the operational amplifier IC1 is connected to one end of the bypass resistor R1. The non-inverting input terminal of the operational amplifier IC1 is connected to the reference power supply.

3. The bypass parallel constant current source circuit according to claim 2, characterized in that, It further includes an MOS transistor Q1. The output terminal of the operational amplifier IC1 is connected to the gate electrode of the MOS transistor Q1. The source electrode of the MOS transistor Q1 is connected to the positive electrode of the controlled constant current source. The drain electrode of the MOS transistor Q1 is connected to the negative electrode of the controlled constant current source through the bypass resistor R1.

4. The bypass parallel constant current source circuit according to claim 2, characterized in that, The feedback unit includes a first resistor R3 and a second resistor R4. One end of the second resistor R4 is connected to the output terminal of the operational amplifier IC2. The other end of the second resistor R4 is respectively connected to one end of the first resistor R3 and the inverting input terminal of the operational amplifier IC1. The other end of the first resistor R3 is connected to the gate electrode of the MOS transistor Q1.

5. The bypass parallel constant current source circuit according to claim 1, characterized in that, It includes a controlled constant current source and a load RL, and also includes a controllable load. The controllable load is connected in parallel with the load RL. Among them, the controllable load includes a sampling resistor R2, an operational amplifier IC1, a feedback unit, a bypass resistor R1, a reference power supply, and an operational amplifier IC2 for current detection. One end of the sampling resistor R2 is connected to the positive pole of the controlled constant current source, and the other end is connected to the negative pole of the controlled constant current source through the load RL. Moreover, the other end of the sampling resistor R2 is also connected to the negative pole of the controlled constant current source through the bypass resistor R1. Both ends of the operational amplifier IC2 are respectively connected to both ends of the sampling resistor R2. The output end of the operational amplifier IC2 is connected to the inverting input end of the operational amplifier IC1 through the feedback unit. The non-inverting input end is connected to the reference power supply. The output end of the operational amplifier IC1 is respectively connected to the input end of the feedback unit and one end of the bypass resistor R1.

6. The bypass parallel constant current source circuit according to claim 5, characterized in that, It also includes an MOS transistor Q1. The output end of the operational amplifier IC1 is connected to the gate of the MOS transistor Q1. The source of the MOS transistor Q1 is connected to the other end of the sampling resistor R2. The drain of the MOS transistor Q1 is respectively connected to the input end of the feedback unit and one end of the bypass resistor R1.

7. The bypass parallel constant current source circuit according to claim 5, characterized in that, The feedback unit includes a first resistor R3 and a second resistor R4. One end of the first resistor R3 is connected to one end of the bypass resistor R1, and the other end is connected to one end of the second resistor R4. The other end of the second resistor R4 is connected to the output end of the operational amplifier IC2.

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