A thermal insulation pipe leakage detection device

Abstract

The invention discloses a thermal insulation pipe leakage detection device, which belongs to the field of heating technology, and includes a main control MCU, an NB-IOT module, a boost circuit, a leakage detection circuit, a demodulation circuit and a battery, wherein the output end of the main control MCU is connected to the input end of the boost circuit, the output end of the boost circuit is connected to the input end of the leakage detection circuit, the output end of the leakage detection circuit is connected to the input end of the demodulation circuit, the input end of the main control MCU is connected to the output end of the demodulation circuit, and the output end is connected to the input end of the NB-IOT module, and a power supply is respectively connected to the main control MCU and the NB-IOT module to supply power thereto. The invention can automatically detect leakage and automatically give an alarm without human intervention, can timely detect the occurrence of leakage, and has low cost.

Description

Technical Field

[0001] The invention relates to the technical field of heating, and in particular to a thermal insulation pipeline leakage detection device. Background Art

[0002] In the field of centralized heating, heat pipes are generally laid directly buried. The pipes are generally divided into three layers from the inside to the outside, namely the working steel pipe layer, the polyurethane insulation layer, and the polyethylene protective layer. The length of the pipe is about 200m. Because it is laid underground, leakage cannot be discovered in time. Only when the leakage is very large can manual inspections find the leakage point, resulting in delayed maintenance and energy waste.

[0003] The existing leakage detection scheme is generally implemented by burying alarm lines inside the pipeline. The staff will regularly carry special detection equipment to detect the alarm lines to infer whether there is leakage. The disadvantages of using the alarm line scheme are: first, it is necessary to carry special equipment to the site for detection regularly. Since there is no power supply on site, it is generally powered by a large lithium battery, which makes the equipment very heavy. The site is generally high temperature and closed, which poses a certain risk to the personal safety of patrol personnel. Second, it is impossible to carry out 24-hour inspections, so the leakage is not discovered in time, resulting in greater equipment damage and even danger to pedestrians around. Summary of the invention

[0004] The purpose of the present invention is to provide a thermal insulation pipeline leakage detection device to timely discover the leakage of thermal pipelines.

[0005] To achieve the above objectives, the present invention adopts an insulated pipe leakage detection device, including: a main control MCU, an NB-IOT module, a boost circuit, a leakage detection circuit, a demodulation circuit and a battery. The output end of the main control MCU is connected to the input end of the boost circuit, the output end of the boost circuit is connected to the input end of the leakage detection circuit, the output end of the leakage detection circuit is connected to the input end of the demodulation circuit, the input end of the main control MCU is connected to the output end of the demodulation circuit, and the output end is connected to the input end of the NB-IOT module, and the power supply is respectively connected to the main control MCU and the NB-IOT module to power them.

[0006] Furthermore, the boost circuit includes a boost converter, the EN pin and the VIN pin of the boost converter are connected and then connected to one end of the capacitor C4, the other end of the capacitor C4 is grounded, one end of the inductor L1 is connected to the positive electrode of the diode D1 and then connected to the SW pin of the boost converter, the other end of the inductor L1 is connected to one end of the capacitor C4 and then connected to the voltage output end of the main control MCU, the negative electrode of the diode D2 is connected to one end of the resistor R4, to one end of the capacitor C1 and to one end of the capacitor C3 in sequence, the other end of the resistor R4 is connected to the other end of the capacitor C1 and then connected to the FB pin of the boost converter and one end of the resistor R6, the other end of the resistor R6 is grounded, one end of the capacitor C3 is connected to a 2.4V power supply and the other end is grounded, and the GND pin of the boost converter is grounded.

[0007] 1. Further, the leakage detection circuit includes a rectifier bridge D1, U3, a buck switching regulator U4 and a single-chip microcomputer U5;

[0008] The voltage output end of the main control MCU forms a voltage output end VB through a rectifier bridge D1, and the voltage output end VB is connected to one end of a resistor R7, and the voltage output end VB is also connected to the source of the PMOS tube Q1, and the other end of the resistor R7 is respectively connected to one end of U3 and to the gate of the PMOS tube Q1, and the other end of U3 is grounded;

[0009] When the gate and source voltage of the PMOS tube Q1 is greater than the turn-on voltage, the PMOS tube Q1 is turned on and forms a back-end working voltage VZ, VZ is connected to the emitter of the transistor Q7 and one end of R19, the other end of R19 is connected to the emitter of the transistor Q8 and the base of the transistor Q7, the base of the transistor Q8 is connected to the collector of the transistor Q7 and then to one end of the resistor R20, the other end of the resistor R20 is grounded, the collector of the transistor Q8 is respectively connected to the negative electrode of the voltage regulator tube D5 and the positive electrode of the capacitor C8, the positive electrode of the voltage regulator tube D5 and the negative electrode of the capacitor C8 are both grounded, and the negative electrode of the voltage regulator tube D5 and the positive electrode of the capacitor C8 are connected to form a voltage output terminal VIN;

[0010] The EN pin of the buck switching regulator U4 is connected to the IN pin of the buck switching regulator U4 via the resistor R13 and then connected to the voltage output terminal VIN. The BST pin of the buck switching regulator U4 is connected to the SW pin of the buck switching regulator U4 via the capacitor C5. The SW pin of the buck switching regulator U4 is connected to one end of the inductor L2 and the negative electrode of the voltage regulator D4 respectively. The positive electrode of the voltage regulator D4 is grounded. The other end of the inductor L2 is grounded via the capacitor C6, the capacitor C7, and one end of the resistor R5 and one end of R6 in sequence. The other end of R5 is connected to the voltage source VCC. The FB pin of the buck switching regulator U4 is connected between the resistor R5 and the resistor R6. The GND pin of the buck switching regulator U4 is grounded.

[0011] The voltage source VCC is connected to the VDD pin of the single-chip computer U5, the PA0 pin of the single-chip computer U5 is connected to the base of the transistor Q6 via the resistor R16, the collector of the transistor Q6 is connected to one end of the resistor R18, the other end of the resistor R18 is grounded, one end of the resistor R18 is connected to the base of the transistor Q5 via the resistor R17, the emitter of the transistor Q6 is connected to the power supply VCC, the emitter of the transistor Q5 is grounded, the collector of the transistor Q5 is connected to one end of the resistor R9 via the resistor R10, the other end of the resistor R9 is connected to one end of R19, The other end of R9 is connected to the emitter of transistor Q2, one end of R9 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to the emitter of transistor Q3, the emitter of transistor Q3 is connected to the voltage source V20 and one end of resistor R8 respectively, the other end of resistor R8 is connected to the base of transistor Q3 and the emitter of transistor Q4 respectively, the base of transistor Q4 is connected to the collector of transistor Q3 and then to one end of resistor R11, the other end of resistor R11 is grounded, and the collector of transistor Q4 is grounded via resistor R14.

[0012] Further, the demodulation circuit includes a detection resistor R2, a comparator U2A and a diode D3;

[0013] The output end of the boost circuit is connected to the positive input end of the comparator U2A after forming the voltage VBUS through the detection resistor R2. The output end of the boost circuit is connected to the positive electrode of the diode D3 after passing through the detection resistor R2. The negative electrode of the diode D3 is connected to one end of the resistor R5 and the positive electrode of the capacitor C2 in sequence through the resistor R3. The other end of the resistor R5 and the negative electrode of the capacitor C2 are both grounded.

[0014] The positive electrode of capacitor C2 is connected to the negative input terminal of comparator U2A, and the output terminal of comparator U2A is connected to the main control MCU via pull-up resistor R1. The output terminal of comparator U2A is also connected to the serial port interface pin of the main control MCU via RX_TTL.

[0015] Furthermore, the main control MCU model is STM32L053R8T6.

[0016] Furthermore, the leakage detection circuits are arranged at intervals in the pipeline insulation layer.

[0017] Compared with the prior art, the present invention has the following technical effects: the battery of the present invention supplies power to the main control MCU and the NB-IOT module. The main control MCU is usually in sleep mode. After being awakened at a fixed time, the boost circuit is turned on to supply power to the leakage detection circuit. When the leakage detection circuit detects a leakage, it will send a 20mA signal on the bus. The 20mA signal is demodulated into a TTL signal through a demodulation circuit. When the main control MCU receives this signal, it sends an alarm message to the server and related personnel through the NB-IOT module. This solution can automatically detect leakage and automatically alarm without human intervention, can detect the occurrence of leakage in a timely manner, and has low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings:

[0019] Figure 1 It is a structural schematic diagram of a thermal insulation pipe leakage detection device;

[0020] Figure 2 It is the topology diagram of the boost circuit;

[0021] Figure 3 is the leakage detection circuit topology diagram;

[0022] Figure 4 It is the demodulation circuit topology diagram;

[0023] Figure 5 It is the schematic diagram of leakage detection circuit installation. DETAILED DESCRIPTION

[0024] In order to further illustrate the features of the present invention, please refer to the following detailed description and drawings of the present invention. The drawings are for reference and illustration only and are not intended to limit the scope of protection of the present invention.

[0025] like Figure 1 As shown, this embodiment discloses an insulated pipe leakage detection device, including a main control MCU, an NB-IOT module, a boost circuit, a leakage detection circuit, a demodulation circuit and a battery, the output end of the main control MCU is connected to the input end of the boost circuit, the output end of the boost circuit is connected to the input end of the leakage detection circuit, the output end of the leakage detection circuit is connected to the input end of the demodulation circuit, the input end of the main control MCU is connected to the output end of the demodulation circuit, and the output end is connected to the input end of the NB-IOT module, and the power supply is respectively connected to the main control MCU and the NB-IOT module to power them.

[0026] Among them, the battery powers the main MCU (model STM32L053R8T6) and the NB-IOT module (model BC95). The main MCU is usually in sleep mode. After waking up at a fixed time, the boost circuit is turned on to power the leakage detection circuit. When the leakage detection circuit detects a leakage, it will send a 20mA signal on the bus. The 20mA signal is demodulated into a TTL signal through the demodulation circuit. When the main MCU receives this signal, it sends an alarm message to the server and relevant personnel through the NB-IOT module.

[0027] Furthermore, if Figure 2 As shown, VBAT is the input voltage of the battery. The input voltage is stabilized by the voltage-stabilizing capacitor C4 and enters the 5th pin of the boost converter U1 (model: TPS61040). The 4th pin of U1 is connected to the 5th pin of U1. At the same time, VBAT is connected to one end of the inductor L1, and the other end of L1 is connected to the 1st pin of U1 and to one end of the diode D2. The output of D2 is connected to one end of R4 and to one end of C1 and C3. The voltage divided by the resistors R4 and R6 enters the 3rd pin of U1 as the feedback voltage. The capacitor C1 and the resistor R4 are connected in parallel for filtering. The capacitor C3 is used for voltage stabilization. The 2nd pin of U1 is grounded.

[0028] Furthermore, if Figure 3As shown, the structure of the leakage detection circuit is as follows: the bus voltage forms a voltage VB through a rectifier bridge D1, VB is connected to one end of a resistor R7 and is also connected to the S end of a PMOS tube Q1, the other end of the resistor R7 is connected to one end of U3, the other end of U3 is grounded, and U3 is composed of two probes that are very close to each other, the two probes are fixed on a base, and a wire is led out of each of the two probes. U3 is usually free of water leakage, and its resistance is very high. Its voltage is close to VB. Since the gate and source voltage of Q1 is less than the turn-on voltage, Q1 is cut off. When water leakage occurs, the resistance of U3 decreases rapidly, and the voltage of U3 decreases. Since the gate and source voltage of Q1 is greater than the turn-on voltage, Q1 is turned on, forming the back-end working voltage VZ. VZ is connected to the E pole of transistor Q7, one end of R19, one end of R9 and the E pole of Q2. The other end of R19 is connected to the E pole of Q8, and the B pole of Q8 is connected to one end of resistor R20. The other end of resistor R20 is grounded. Since the B pole voltage of Q8 is lower than the E pole voltage of Q8, Q8 is turned on, and current flows through resistor R19, so the E pole voltage of Q8 will partially drop. Since the E pole of Q8 is connected to the B pole of Q7, the B pole voltage of Q7 will partially drop. Since the E pole voltage of Q7 is greater than the B pole voltage, Q7 is turned on, and the voltage difference between the E pole and the B pole of Q7 is about 0. 7V, this voltage difference acts on both ends of R19, and a fixed current will flow through R19. This current passes through the E pole and C pole of Q8, and is connected to the negative pole of the voltage regulator D5 and the positive pole of the capacitor C8, thereby forming a voltage VIN. The positive pole of D5 is grounded, and the negative pole of C8 is grounded. VIN is connected to the 5th pin of the step-down switching regulator U4 (model MP2459GJ), and is connected to one end of the resistor R13. The other end of the resistor R13 is connected to the 4th pin of U4, so that U4 can work normally. Capacitor C5 is connected between the 1st and 6th pins of U4, and the 6th pin of U1 is connected to the negative end of the Schottky diode D4, and is connected to one end of the inductor L2. The other end of L2 is connected to the voltage-stabilizing capacitor C6 and the filter capacitor C7. The stabilized voltage VCC enters the 3rd pin of U4 as a feedback signal after being divided by the resistors R15 and R14. VCC enters the 4th pin of the microcontroller U5 (model STM8L001J3) to provide voltage for U5.When the first pin of U5 outputs a high level, this high level is connected to the B pole of the PNP transistor Q6 through the resistor R16, and the E pole of Q6 is connected to VCC, so that Q6 is cut off, and the C pole of Q6 is a low level, that is, the voltage on R18 is a low level, and this low level is connected to the B pole of the NPN transistor Q5 through the resistor R17, and the E pole of Q5 is grounded, so that Q5 is cut off, and no current flows through the resistor R10, and there is no voltage drop. The voltage of the B pole of Q2 is pulled up to VZ through the resistor R9, resulting in the PNP transistor The B and E pole voltages of tube Q2 are equal, so Q2 is cut off, the voltage V20 is 0, and the 20mA current at the back end does not work; when the first foot of U5 outputs a low level, this low level is connected to the B pole of the PNP transistor Q6 through the resistor R16, and the E pole of Q6 is connected to VCC, so that Q6 is turned on, so that the C pole of Q6 is a high level, that is, the voltage on R18 is a high level, and this high level is connected to the B pole of the NPN transistor Q5 through the resistor R17, and the E pole of Q5 is grounded, so that Q5 is turned on, Q2 The B pole voltage of Q2 is obtained by voltage division by resistors R9 and R10. The B pole voltage of Q2 is lower than the E pole voltage of Q2, so Q2 is turned on and generates voltage V20. V20 is connected to one end of resistor R8, and the other end of R8 is connected to the E pole of Q4. The B pole of Q4 is connected to one end of resistor R11, and the other end of R11 is grounded. Since the E pole of Q4 is higher than the B pole voltage, Q4 is turned on, so the E pole voltage of Q4 decreases. The E pole of Q4 is connected to the B pole of Q3, so the B pole voltage of Q3 decreases. Since the E pole of Q3 The A-pole voltage is greater than the B-pole voltage of Q3, so Q3 is turned on, and the voltage between the E-pole and the B-pole of Q3 is about 0.7V. This 0.7V voltage is the voltage across the resistor R8, so the current of the resistor R8 is 0.7V / R8, and the resistance of R8 is appropriately set to make the current 20mA. Through the above analysis, we know that when the first pin of U5 outputs a high level, the bus current does not increase; when the first pin of U5 outputs a low level, the bus increases the current of 20mA, and the demodulation circuit demodulates the changed current.

[0029] Furthermore, if Figure 4As shown, the structure of the demodulation circuit is as follows: the boosted voltage V24 passes through the detection resistor R2 to form the voltage VBUS, which is connected to the third pin of the comparator U2A. VBUS is also connected to the positive electrode of the diode D3, and the negative electrode of the diode D3 is connected to one end of the resistor R3. The other end of the resistor R3 is connected to one end of the resistor R5, and is also connected to one end of the capacitor C2, and is also connected to the second pin of the comparator U2A. The eighth pin of the comparator U2A is connected to V24, and the first pin of the comparator U2A is connected to one end of the pull-up resistor R1, and the other end of the resistor R1 is connected to VBAT. When there is no communication, VBUS charges the capacitor C2 through D3 and R3, and the voltage of C2 Close to the bus voltage VBUS, when the bus has a current of 20mA, a voltage drop occurs on R2, and VBUS decreases. Due to the unidirectional conduction characteristic of diode D3, the voltage of C2 does not decrease and remains at the previous bus voltage. Since the positive terminal voltage of comparator U2A is lower than the negative terminal voltage, the comparator outputs a low level, that is, RX_TTL is a low level; when the bus does not have a current of 20mA, the positive terminal voltage of comparator U2A is higher than the negative terminal voltage, and the first pin of comparator U2A outputs a high impedance, which is pulled up to VBAT through resistor R1, so that RX_TTL is a high level, and RX_TTL is connected to the serial port interface pin of the master MCU.

[0030] Furthermore, if Figure 5 As shown, leakage detection circuits are installed at a certain distance L in the pipeline insulation layer. The leakage detection circuit closest to the control host is numbered 1, and the leakage detection circuit farthest is numbered N. All leakage detection circuits use two common wires to connect to the control host. When a leakage detection circuit M leaks, the leakage detection circuit sends its own number to the control host. The control host calculates that the distance between the leakage point and the control host is M×L. The control host sends this information to the server or informs relevant personnel through text messages.

[0031] Among them, the thermal insulation pipe includes three parts: outer protective layer, thermal insulation layer and anti-leakage layer. The outer protective layer is made of polyethylene jacket pipe or fiberglass or other materials.

[0032] It should be noted that in the pipeline leakage detection device in this embodiment, when a leak occurs at any detection location, the detection circuit at that location is powered and works, and sends the location information of that location to the host. After the host reads the information, it sends the information to the server or the mobile phone of the relevant personnel.

[0033] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A thermal insulation pipe leakage detection device, characterized in that: include: The main control MCU, the NB-IOT module, the boost circuit, the leakage detection circuit, the demodulation circuit and the battery, the output end of the main control MCU is connected to the input end of the boost circuit, the output end of the boost circuit is connected to the input end of the leakage detection circuit, the output end of the leakage detection circuit is connected to the input end of the demodulation circuit, the input end of the main control MCU is connected to the output end of the demodulation circuit, and the output end is connected to the input end of the NB-IOT module, and the power supply is respectively connected to the main control MCU and the NB-IOT module to supply power to them; The boost circuit includes a boost converter, an EN pin of the boost converter is connected to a VIN pin and then connected to one end of a capacitor C4, the other end of the capacitor C4 is grounded, one end of an inductor L1 is connected to a positive electrode of a diode D1 and then connected to a SW pin of the boost converter, the other end of the inductor L1 is connected to one end of the capacitor C4 and then connected to a voltage output end of the main control MCU, the negative electrode of the diode D2 is sequentially connected to one end of a resistor R4, to one end of a capacitor C1 and to one end of a capacitor C3, the other end of the resistor R4 is connected to the other end of the capacitor C1 and then connected to the FB pin of the boost converter and one end of a resistor R6, the other end of the resistor R6 is grounded, one end of the capacitor C3 is connected to a 2.4V power supply and the other end is grounded, and the GND pin of the boost converter is grounded; The leakage detection circuit includes a rectifier bridge D1, U3, a buck switching regulator U4 and a single-chip microcomputer U5; The voltage output end of the main control MCU forms a voltage output end VB through a rectifier bridge D1, and the voltage output end VB is connected to one end of a resistor R7, and the voltage output end VB is also connected to the source of the PMOS tube Q1, and the other end of the resistor R7 is respectively connected to one end of U3 and to the gate of the PMOS tube Q1, and the other end of U3 is grounded; When the gate and source voltage of the PMOS tube Q1 is greater than the turn-on voltage, the PMOS tube Q1 is turned on and forms a back-end working voltage VZ, VZ is connected to the emitter of the transistor Q7 and one end of R19, the other end of R19 is connected to the emitter of the transistor Q8 and the base of the transistor Q7, the base of the transistor Q8 is connected to the collector of the transistor Q7 and then to one end of the resistor R20, the other end of the resistor R20 is grounded, the collector of the transistor Q8 is respectively connected to the negative electrode of the voltage regulator tube D5 and the positive electrode of the capacitor C8, the positive electrode of the voltage regulator tube D5 and the negative electrode of the capacitor C8 are both grounded, and the negative electrode of the voltage regulator tube D5 and the positive electrode of the capacitor C8 are connected to form a voltage output terminal VIN; The EN pin of the buck switching regulator U4 is connected to the IN pin of the buck switching regulator U4 via the resistor R13 and then connected to the voltage output terminal VIN. The BST pin of the buck switching regulator U4 is connected to the SW pin of the buck switching regulator U4 via the capacitor C5. The SW pin of the buck switching regulator U4 is connected to one end of the inductor L2 and the negative electrode of the voltage regulator D4 respectively. The positive electrode of the voltage regulator D4 is grounded. The other end of the inductor L2 is grounded via the capacitor C6, the capacitor C7, and one end of the resistor R5 and one end of R6 in sequence. The other end of R5 is connected to the voltage source VCC. The FB pin of the buck switching regulator U4 is connected between the resistor R5 and the resistor R6. The GND pin of the buck switching regulator U4 is grounded. The voltage source VCC is connected to the VDD pin of the single-chip computer U5, the PA0 pin of the single-chip computer U5 is connected to the base of the transistor Q6 via the resistor R16, the collector of the transistor Q6 is connected to one end of the resistor R18, the other end of the resistor R18 is grounded, one end of the resistor R18 is connected to the base of the transistor Q5 via the resistor R17, the emitter of the transistor Q6 is connected to the power supply VCC, the emitter of the transistor Q5 is grounded, the collector of the transistor Q5 is connected to one end of the resistor R9 via the resistor R10, the other end of the resistor R9 is connected to one end of R19, The other end of R9 is connected to the emitter of transistor Q2, one end of R9 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to the emitter of transistor Q3, the emitter of transistor Q3 is connected to the voltage source V20 and one end of resistor R8 respectively, the other end of resistor R8 is connected to the base of transistor Q3 and the emitter of transistor Q4 respectively, the base of transistor Q4 is connected to the collector of transistor Q3 and then connected to one end of resistor R11, the other end of resistor R11 is grounded, and the collector of transistor Q4 is grounded via resistor R14; The demodulation circuit includes a detection resistor R2, a comparator U2A and a diode D3; The output end of the boost circuit is connected to the positive input end of the comparator U2A after forming the voltage VBUS through the detection resistor R2. The output end of the boost circuit is connected to the positive electrode of the diode D3 after passing through the detection resistor R2. The negative electrode of the diode D3 is connected to one end of the resistor R5 and the positive electrode of the capacitor C2 in sequence through the resistor R3. The other end of the resistor R5 and the negative electrode of the capacitor C2 are both grounded. The positive electrode of capacitor C2 is connected to the negative input terminal of comparator U2A, and the output terminal of comparator U2A is connected to the main control MCU via pull-up resistor R1. The output terminal of comparator U2A is also connected to the serial port interface pin of the main control MCU via RX_TTL. The leakage detection circuits are arranged at a distance of L in the pipeline insulation layer, and each leakage detection circuit is numbered. When a leakage detection circuit M leaks, the leakage detection circuit sends its own number to the control host, and the control host calculates that the distance between the leakage point and the control host is M×L.

2. The thermal insulation pipe leakage detection device according to claim 1, characterized in that: The main control MCU model is STM32L053R8T6.

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