Power Grid Simulation Source System

Abstract

The invention discloses a power grid simulation source system, comprising a power grid simulation source; the invention adopts a power grid simulation source system composed of a power grid simulation source, a current detection module, a voltage detection module, and a central controller, and performs dynamic power factor compensation on a sample under test through a power factor compensation circuit, so that the adaptability of the sample under test to the power supply grid can be tested, and the detection of normal and abnormal characteristics of the power supply grid is realized, and a three-phase harmonic generation module is controlled to output harmonic voltages with multiple frequencies superimposed at the same time through a PWM controller, so that independent control of PWM rectification and inversion is achieved, and the accuracy and reliability of the control logic are further ensured, and the precise control of the harmonic order and amplitude is realized, and the potential safety hazards in the operation process of the system are reduced; the system has many advantages such as strong anti-interference ability, high operation stability, accurate and reliable data testing, fast operation speed, high work efficiency, simple wiring and convenient operation, and safe operation process.

Description

Technical Field

[0001] The invention relates to a power quality detection system, in particular to a power grid simulation source system for power quality detection. Background Art

[0002] In recent years, with the rapid development of power grid technology, the continuous increase in diversified electricity demand, and the large-scale access of intermittent distributed energy, the complexity of user-side equipment has become increasingly high, and there are many power quality problems in the power supply grid. In addition, the power quality detection system equipment will inevitably experience aging, failure, and interference from harsh environments during long-term operation, resulting in an increase in the failure rate of system equipment, a decrease in measurement accuracy, or the generation of invalid abnormal data, and a decrease in the overall reliability of the system equipment, which has made the three-phase imbalance problem and the power grid harmonic problem increasingly serious. At present, the main disadvantages of the existing power grid simulation source system are: on the one hand, due to the lack of an effective power factor compensation mechanism or unreasonable power factor compensation settings, under-compensation and over-compensation are prone to occur, which makes the system equipment unable to perform its due functions, damages the power equipment, and even endangers the safety of the system equipment and other power facilities, greatly reducing the service life of the system equipment; on the other hand, due to the unreasonable design of three-phase harmonic sources and reactive power compensation, the nonlinear loads and impact loads connected to the power grid system are prone to voltage fluctuations, voltage sags and bulges, and serious three-phase imbalance. The accuracy and reliability of the control logic cannot be ensured, and it is difficult to achieve precise control of the harmonic order and amplitude, which makes the low-voltage power quality detection system equipment prone to abnormal operating conditions, and even causes system failures, fires and other safety hazards without timely alarms; in addition, there are many problems such as complicated design, poor parallel expansion capability, low operating stability, low data test accuracy, cumbersome wiring and complex operation, and unsafe operation process. Summary of the invention

[0003] The technical problem solved by the present invention is to overcome the defects of the prior art and provide a power grid simulation source system, which consists of a power grid simulation source, a current detection module, a voltage detection module, and a central controller. The power factor compensation circuit performs dynamic power factor compensation on the sample under test, so that the adaptability of the sample under test to the power supply grid can be tested, and the normal and abnormal characteristics of the power supply grid can be detected. The PWM controller is used to control the three-phase harmonic generation module to simultaneously output harmonic voltages with multiple frequencies superimposed, thereby achieving independent control of PWM rectification and inversion, further ensuring the accuracy and reliability of the control logic, achieving precise control of the harmonic order and amplitude, and reducing safety hazards during system operation.

[0004] In order to solve the above technical problems, the present invention is solved by the following technical solutions:

[0005] The power grid simulation source system includes a power grid simulation source connected to a power grid, a current detection module for sampling current of the power grid simulation source, a voltage detection module for sampling voltage of the power grid simulation source, a central controller for controlling the system, and a host computer connected to the central controller. The sample to be tested is connected to the power grid simulation source through a first transformer, the current detection module and the voltage detection module are respectively connected to the central controller through a power factor compensation circuit, and the power grid simulation source, the first transformer, and the sample to be tested are all connected to the central controller. Through the setting of the power factor compensation circuit, the power factor can reach 0.95, the harmonic current content is less than 3% FS, and the interference to the power grid is small.

[0006] Preferably, the power factor compensation circuit includes a voltage-stabilized power supply, a power factor compensation main circuit, a PWM pulse modulation and drive control circuit, and a phase current voltage detection and comparison circuit that are connected to each other. The voltage-stabilized power supply supplies power to the circuit. The power factor compensation main circuit includes a first filter inductor, a second filter inductor, a first filter capacitor, a second filter capacitor, a third filter capacitor, a charge and discharge capacitor, an absorption capacitor, a coupling capacitor, a second transformer, a current detection resistor, a first voltage detection resistor, a second voltage detection resistor, a first power switch element, and a second power switch element. One end of the first filter inductor is connected to the input end L of the alternating current, the other end of the first filter inductor is connected to one end of the charge and discharge capacitor, the first voltage detection resistor, and the current detection resistor, the other end of the charge and discharge capacitor is connected to one end of the primary winding N1 of the second transformer, the other end of the primary winding N1 of the second transformer is connected to the first power switch element and the second power switch element in parallel, the cathode of the first power switch element and the anode of the second power switch element are connected to the common end N of the alternating current, and the cathode of the first power switch element and the second power switch element are connected to the common end N of the alternating current. The first drive circuit and the isolation drive circuit are respectively connected to the PWM pulse modulation and drive control circuit with the drive pole; one end of the first filter capacitor is connected to the input terminal L of the alternating current, and the other end of the first filter capacitor is connected to the common terminal N of the alternating current; one end of the second filter capacitor is connected to the first filter inductor, and the other end of the second filter capacitor is connected to the common terminal N of the alternating current; the other end of the first voltage detection resistor is respectively connected to the voltage detection circuit of the phase current voltage detection and comparison circuit and one end of the second voltage detection resistor, and the other end of the second voltage detection resistor is connected to the common terminal N of the alternating current; the other end of the current detection resistor is connected to the output terminal LM of the alternating current through the second filter inductor; the absorption capacitor is connected in parallel with the secondary winding N2 of the second transformer, one end of the absorption capacitor is connected to the output terminal LM of the alternating current, the other end of the absorption capacitor is connected to one end of the coupling capacitor, and the other end of the coupling capacitor is connected to the common terminal N of the alternating current; one end of the third filter capacitor and the sample under test are respectively connected to the output terminal LM of the alternating current, and the other end of the third filter capacitor and the sample under test are respectively connected to the common terminal N of the alternating current. Wherein, when the power factor compensation circuit is working, the alternating current AC is inputted into the input terminal L and the common terminal N of the power factor compensation main circuit, and the alternating current AC is supplied to the circuit consisting of the charging and discharging capacitor, the primary winding N1 of the second transformer, the first power switch element, and the second power switch element through the first filter capacitor, the first filter inductor, and the second filter capacitor, and then supplied to the sample under test after filtering through the current detection resistor, the second filter inductor, and the third filter capacitor;

[0007] Specifically, the voltage detection circuit of the phase current voltage detection and comparison circuit detects the terminal voltage of the sample under test after voltage division by the first voltage detection resistor and the second voltage detection resistor in the power factor compensation main circuit; the current detection circuit detects the current flowing through the sample under test through the current detection resistor, and then transmits the detected voltage and current waveform to the current and voltage comparison circuit for comparison, and controls the PWM pulse modulation circuit in the PWM pulse modulation and drive control circuit by controlling the voltage to control the drive circuit and the isolation drive circuit, and respectively controls the switching of the first power switch element and the second power switch element; the phase detection circuit processes the voltage waveform detected by the voltage detection circuit and transmits it to the PW The phase and automatic power factor control circuit in the M pulse modulation and drive control circuit controls the on-off sequence of the first power switch element and the second power switch element through the PWM pulse modulation circuit, the first drive circuit and the isolation drive circuit. The primary winding N1 of the second transformer performs pulse charging on the charge and discharge capacitor in the 0-π / 2 cycle and pulse discharge on the charge and discharge capacitor in the 3π / 2-2π cycle; performs pulse discharge on the charge and discharge capacitor in the π / 2-π cycle and pulse charging on the charge and discharge capacitor in the π-3 / 2π cycle; when the power factor is lower than 1, the current and voltage comparison circuit output in the phase current voltage detection and comparison circuit The PWM pulse modulation circuit in the constant voltage control PWM pulse modulation and drive control circuit controls the on and off time of the first power switch element and the second power switch element respectively through the first drive circuit and the isolation drive circuit, thereby controlling the on and off time of the primary winding N1 of the second transformer and the charging and discharging capacitor; when the alternating current is pulsed on and off within the 0-π / 2 and π-3 / 2π cycles, the first power switch element and the second power switch element adjust the charge amount of the charging and discharging capacitor by adjusting the PWM pulse width, i.e., the on and off time; when the alternating current is pulsed on and off within the π / 2-π and 3 / 2π-2π cycles, the first power switch element and the second power switch element adjust the charge amount of the charging and discharging capacitor by adjusting the PWM on and off time. The discharge amount of the discharge capacitor; adjusting the charge and discharge amount of the compensation charge and discharge capacitor is equivalent to adjusting the capacitance value of the compensation charge and discharge capacitor, thereby realizing dynamic compensation; when the first power switch element and the second power switch element are respectively turned on, when the current passes through the first filter inductor, the charge and discharge capacitor and the primary winding N1 of the second transformer, electric energy is stored in the first filter inductor. At the moment of shutdown, the electric energy stored in the first filter inductor is released after being filtered by the second filter inductor and the third filter capacitor, and the power factor of the sample under test is corrected; on the other hand, the electric energy stored in the second transformer is released through the secondary winding N2, the absorption capacitor and the coupling capacitor, and the power factor of the sample under test is corrected again.

[0008] Preferably, the sample under test is connected to a three-phase harmonic source for outputting a harmonic voltage through a third transformer, the three-phase harmonic source includes a detection module, a harmonic generator for outputting a harmonic voltage, and a PWM controller for controlling the voltage frequency and amplitude of the harmonic voltage output by the harmonic generator, the harmonic generator is connected to the PWM controller, and the PWM controller is connected to a host computer; the harmonic generator includes a first communication module, a relay output module, an analog output module, and a three-phase harmonic generation module, the input end of the detection module is connected to the power supply grid, the output end of the detection module is connected to the host computer, and the host computer is connected to the first communication module. The signal module is respectively connected to the input end of the relay output module and the input end of the analog output module, the output end of the relay output module and the output end of the analog output module are respectively connected to the three-phase harmonic generation module, and the three-phase harmonic generation module is connected to the power supply grid; the three-phase harmonic source is used to output harmonic voltage, and the three-phase harmonic source can output high-order harmonics of 2 to 50 times of three-phase harmonics, which can realize parallel operation of multiple units and have the ability of parallel expansion, and has many advantages such as strong anti-interference ability, high operation stability, accurate and reliable data testing, fast operation speed, high work efficiency, simple wiring and convenient operation, and safe operation process.

[0009] In the present invention, the sample under test is connected to the harmonic generator through a third transformer. The third transformer converts the harmonic voltage output by the harmonic generator and transmits electric energy, thereby improving the adaptability of the three-phase harmonic source in the process of testing the compensation ability of the sample under test for the power quality.

[0010] In the patent of the present invention, the three-phase harmonic generation module is provided with a front filter, a harmonic power module and a rear filter which are connected in sequence. The harmonic power module includes a PWM rectifier for establishing a stable DC voltage, a DC side energy storage capacitor, and a PWM inverter for generating a given voltage signal. The PWM rectifier, the DC side energy storage capacitor, and the PWM inverter are connected in sequence. The output end of the front filter is connected to the input end of the PWM rectifier, the output end of the PWM inverter is connected to the rear filter, and the output end of the PWM controller is connected to the PWM rectifier and the PWM inverter respectively. Among them, the three-phase current waveform interface, the state monitoring display interface and the harmonic generation number setting interface are set and displayed by the host computer; the three-phase harmonic generation module formed by the front filter, the harmonic power module and the rear filter is adopted, and the three-phase harmonic generation module is controlled to output harmonic voltages with multiple frequencies superimposed at the same time through the PWM controller, so as to achieve independent control of PWM rectification and inversion, ensure the accuracy and reliability of the control logic, and realize precise control of the harmonic number and amplitude.

[0011] Specifically, both the front filter and the rear filter adopt RLC filtering, wherein both the front filter and the rear filter include a filter inductor, a filter resistor, and a filter capacitor that are connected to each other, the filter inductor is connected in series to the PWM rectifier, and the filter resistor and the filter capacitor are connected in series and then connected in parallel to the PWM rectifier.

[0012] In the patent of the present invention, the three-phase harmonic generating module includes an A-phase harmonic generating module, a B-phase harmonic generating module, and a C-phase harmonic generating module with completely the same structure. The A-phase harmonic generating module, the B-phase harmonic generating module, and the C-phase harmonic generating module are all provided with a three-phase harmonic generating circuit. The three-phase harmonic generating circuit includes a state monitor, an AC contactor, a relay, a monotonic detuning circuit, a high-pass detuning circuit, and an anti-parallel thyristor. The input end of the state monitor is connected to the power supply grid through a circuit breaker, the output end of the state monitor is connected to one end of the relay contact through the AC contactor, the other end of the relay contact is connected to one end of the monotonic detuning circuit or the high-pass detuning circuit, the other end of the monotonic detuning circuit or the high-pass detuning circuit is connected to one end of the anti-parallel thyristor, the other end of the anti-parallel thyristors of each branch are connected together, the trigger signal input end of the anti-parallel thyristor is connected to the analog output module, the coil of the relay is connected to the relay output module, and the communication port of the state monitor is connected to the first communication module. The status monitor is mainly used to realize the status monitoring, interlocking function and zero-crossing signal detection of each branch, to ensure the correct attraction and inrush-free switching of relays and AC contactors.

[0013] In the present invention, the monotonic detuning circuit includes a first resistor, a first inductor, and a first capacitor connected in series.

[0014] In the patent of the present invention, the high-pass detuning circuit includes a second resistor, a second inductor, a second capacitor, and a third capacitor. The third capacitor is connected in series with the second resistor and then in parallel with the second inductor to form a parallel branch, which is then connected in series with the second capacitor.

[0015] Preferably, the PWM controller adopts a single-chip microcomputer, the single-chip microcomputer is provided with a dual-port parallel RAM, the dual-port parallel RAM has a data input port, a data output port, an address input port, and an address scanning port, and the data input port and the address input port of the dual-port parallel RAM are connected to the single-chip microcomputer;

[0016] Preferably, the single-chip microcomputer is connected to a first 8-bit parallel port analog-to-digital converter and a second 8-bit parallel port analog-to-digital converter for specifying the amplitude, the data port of the first 8-bit parallel port analog-to-digital converter and the data port of the second 8-bit parallel port analog-to-digital converter are both connected to the single-chip microcomputer, and the REF port of the first 8-bit parallel port analog-to-digital converter and the REF port of the second 8-bit parallel port analog-to-digital converter are connected to the output of the reference module;

[0017] Preferably, the single-chip microcomputer is also connected to a third 8-bit parallel port analog-to-digital converter and a fourth 8-bit parallel port analog-to-digital converter for controlling the output waveform, and the third 8-bit parallel port analog-to-digital converter and the fourth 8-bit parallel port analog-to-digital converter are both connected to the single-chip microcomputer through the data output port of the dual-port parallel port RAM;

[0018] Preferably, the output ports of the first 8-bit parallel port analog-to-digital converter and the second 8-bit parallel port analog-to-digital converter are respectively connected to the first operational amplifier array, the output ends of the first operational amplifier array are respectively connected to the REF ports of the third 8-bit parallel port analog-to-digital converter and the fourth 8-bit parallel port analog-to-digital converter, the output ends of the third 8-bit parallel port analog-to-digital converter and the fourth 8-bit parallel port analog-to-digital converter are respectively connected to the second operational amplifier array, and the output end of the second operational amplifier array is connected to the harmonic generator.

[0019] In the present invention, the single-chip microcomputer writes the waveform data into the dual-port parallel RAM through the data input port and the address input port to establish a waveform table. The phase shift can be realized by writing different addresses. The single-chip microcomputer transmits the high 8 bits and low 8 bits of the amplitude signal to the first 8-bit parallel analog-to-digital converter and the second 8-bit parallel analog-to-digital converter respectively. The first 8-bit parallel analog-to-digital converter and the second 8-bit parallel analog-to-digital converter calculate the output voltage through the reference module and pass it to the first operational amplifier array. The first operational amplifier array passes the output value to the REF port of the third 8-bit parallel analog-to-digital converter and the fourth 8-bit parallel analog-to-digital converter through proportional accumulation, thereby determining the amplitude of the output waveform.

[0020] In the patent of the present invention, the single-chip microcomputer writes the output waveform data into the dual-port parallel RAM, and writes the data at each time point into the third 8-bit parallel analog-to-digital converter and the fourth 8-bit parallel analog-to-digital converter. The third 8-bit parallel analog-to-digital converter and the fourth 8-bit parallel analog-to-digital converter calculate the output voltage through the reference voltage of their own REF port, and transmit it to the second operational amplifier array, thereby outputting the required waveform phase.

[0021] Preferably, the detection module includes a current transformer and an analog-to-digital converter, the input end of the current transformer is connected to the power supply grid, the output end of the current transformer is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the host computer.

[0022] In the patent of the present invention, the central controller is also connected to a reactive simulation source for providing a reactive compensation signal. The three-phase harmonic source and the reactive simulation source are connected in parallel with the sample under test through a third transformer. The reactive simulation source is provided with a reactive generator. The reactive generator includes a first reactor for storing energy and filtering high-frequency switching ripple current, a PWM converter for providing reactive compensation signals in the form of a three-phase fully controlled bridge topology, and a second drive circuit. The first reactor is connected to the power supply grid through the third transformer, the AC side of the PWM converter is connected to the first reactor, the DC side of the PWM converter is connected to the energy storage capacitor, and the PWM converter is connected to the central controller through the second drive circuit; the three-phase harmonic source and the reactive simulation source are connected in parallel with the sample under test through a third transformer, and the third transformer is connected to the harmonic output of the harmonic generator. The wave voltage is converted into voltage and electric energy is transmitted, which improves the adaptability of the three-phase harmonic source in the process of testing the compensation ability of the tested sample for the power quality; the PWM converter is composed of insulated gate bipolar transistors, which are driven by voltage space vector modulation technology to generate compensation current waveforms, and the energy storage capacitor stores the DC energy generated by the insulated gate bipolar transistors; the second drive circuit receives the control signal from the central controller, drives the semiconductor power devices of the PWM converter, and also takes into account the protection function of the semiconductor power devices; the reactive simulation source can compensate for reactive power, adjust three-phase imbalance, and suppress harmonics, avoiding mutual interference problems, and can flexibly configure reactive power online, effectively realizing the reasonable compensation of reactive power, and providing safety protection for system equipment installed in extremely limited space.

[0023] In the present invention, the harmonic generator is arranged in the harmonic source cabinet, the single-chip computer is arranged in the harmonic control cabinet, the first transformer and the third transformer are arranged in each transformer cabinet, the power grid simulation source, the harmonic source cabinet, the harmonic control cabinet, the reactive power simulation source, and the transformer cabinet are all arranged next to the sample to be tested, the sample to be tested is arranged on the test frame, the test frame is arranged on the wall, the test frame is provided with a wiring rack, the wiring rack is supported by a support frame under the ceiling, the support frame is fixed on the wall or the ceiling, the wiring rack is provided with a wire trough, the cable is buried in the wire trough, the power grid simulation source, the harmonic source cabinet, the harmonic control cabinet, the reactive power simulation source, the transformer cabinet, and the sample to be tested are connected to the power supply grid through the cable. The installation structure formed by the support frame, the wiring rack, and the test frame not only provides high stability, reliability, and balance for the installation and wiring of the system equipment, but also makes the system design compact and has high safety, and makes full use of the limited test space.

[0024] Preferably, the central controller is connected to a monitoring system for monitoring the operation of the system. Among them, the monitoring system includes a power quality analyzer for detecting harmonics of a three-phase harmonic source and transmitting the detected harmonic values ​​to a central controller, a temperature sensor for detecting temperature signals of system equipment, a smoke sensor for detecting smoke signals of system equipment, a time monitoring module for monitoring the working status of the system, and an alarm module for alarming the system. The alarm module is connected to a host computer, and the power quality analyzer, the temperature sensor, the smoke sensor, the time monitoring module, and the alarm module are all connected to the central controller; the alarm module includes a current and voltage alarm module for issuing an alarm message for alarming when the current value and / or voltage value received by the central controller exceeds a threshold value, a time alarm module for issuing an alarm message for alarming when the time value received by the central controller exceeds a threshold value, a temperature alarm module for issuing an alarm message for alarming when the temperature value received by the central controller exceeds a threshold value, a smoke alarm module for issuing an alarm message for alarming when the smoke concentration received by the central controller exceeds a threshold value, and a harmonic alarm module for issuing an alarm message for alarming when the harmonic value received by the central controller exceeds a threshold value. The current and voltage alarm module, the time alarm module, the temperature alarm module, the smoke alarm module, and the harmonic alarm module are all connected to the central controller.

[0025] In the patent of the present invention, the monitoring system also includes a second communication module, which is connected to the central controller and the alarm module respectively, and the alarm information is transmitted to the host computer through the second communication module.

[0026] In the patent of the present invention, the monitoring system also includes a data storage module connected to the central controller, through which the alarm information is stored, and the data storage module can also store low-voltage power quality detection data.

[0027] In the present invention, the data storage module includes a database server and a disk array connected to each other. The database server is connected to the central controller. The central controller stores the alarm information in the disk array through the database server, and the host computer reads the alarm information from the disk array. By combining the data storage module formed by the database server and the disk array with the technical solution of the above-mentioned monitoring system, the reliability of the power quality detection system is improved, thereby improving the integrity and accuracy of the power quality data, and different monitoring functions can be set according to monitoring requirements. An evaluation system can be established using the data stored in the database server, and the reliability of the low-voltage power quality detection system can be inferred based on the quality of the data, thereby realizing remote reliability evaluation of the low-voltage power quality detection system, and can also diagnose and analyze the reliability of the system, and perform corresponding inspection and maintenance on the system based on the historical change trend of the reliability evaluation.

[0028] In the patent of the present invention, the reactive power simulation source is provided with an RS485 interface, and the reactive power generator is connected to the central controller via the RS485 interface.

[0029] In the present invention, the first transformer and the third transformer are connected to the central controller via RS485 interfaces respectively.

[0030] The present invention has significant technical effects due to the adoption of the above technical scheme: a power grid simulation source system consisting of a power grid simulation source, a current detection module, a voltage detection module, and a central controller is adopted, and dynamic power factor compensation is performed on the sample under test through a power factor compensation circuit, so that the adaptability of the sample under test to the power supply grid can be tested, and the detection of normal and abnormal characteristics of the power supply grid is realized. The three-phase harmonic generation module is controlled to output harmonic voltages with multiple frequencies superimposed at the same time through a PWM controller, so that independent control of PWM rectification and inversion is achieved, and the accuracy and reliability of the control logic are further ensured, and accurate control of the harmonic order and amplitude is realized, and the safety hazards during the operation of the system are reduced; the system has many advantages such as strong anti-interference ability, high operation stability, accurate and reliable data testing, fast operation speed, high work efficiency, simple wiring and convenient operation, and safe operation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a principle block diagram of an embodiment of a power grid simulation source system of the present invention.

[0032] Figure 2 The figure is a circuit diagram of an embodiment of a power factor compensation circuit of the present invention.

[0033] Figure 3 It is a principle block diagram of an embodiment of a reactive power generator of the present invention.

[0034] Figure 4 The circuit diagram of the reactive power generator embodiment of the present invention, which is composed of a first reactor and a PWM converter.

[0035] Figure 5 This is a principle block diagram of an embodiment of the present invention in which a three-phase harmonic source detects a sample under test.

[0036] Figure 6 4 is a circuit principle block diagram of a three-phase harmonic source embodiment of the present invention.

[0037] Figure 7 4 is a circuit schematic diagram of an embodiment of a three-phase harmonic generating circuit of the present invention.

[0038] Figure 8 The schematic diagram of the main circuit of the three-phase harmonic generation module of the present invention.

[0039] Fig. 9The schematic diagram of the PWM controller of the present invention adopts a single-chip microcomputer embodiment.

[0040] Fig.10 It is a structural schematic diagram of an installation embodiment of a harmonic source cabinet, a harmonic control cabinet, and a measured sample of the present invention.

[0041] Fig.11 This is a block diagram of the d-axis current closed-loop feedback control of a PWM controller embodiment of the present invention.

[0042] Fig.12 To use the feedforward decoupling algorithm Fig.11 Block diagram of d-axis current closed-loop feedback control after feedforward decoupling.

[0043] Fig.13 For the general Fig.12 Simplified d-axis current closed-loop feedback control block diagram.

[0044] Fig.14 This is a decoupled d-axis current inner loop control block diagram of the present invention.

[0045] Fig.15 For the general Fig.14 Simplified d-axis current inner loop control block diagram. DETAILED DESCRIPTION

[0046] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0047] Grid simulation source system, such as Figure 1-10As shown, it includes a power grid simulation source 3 connected to a power grid 4, a current detection module 35 for sampling current on the power grid simulation source 3, a voltage detection module 36 for sampling voltage on the power grid simulation source 3, a central controller 15 for controlling the system, and a host computer 13 connected to the central controller 15. The sample under test 1 is connected to the power grid simulation source 3 through a first transformer 2, the current detection module 35 and the voltage detection module 36 are respectively connected to the central controller 15 through a power factor compensation circuit 34, and the power grid simulation source 3, the first transformer 2, and the sample under test 1 are all connected to the central controller 15; the power factor compensation circuit 34 includes a voltage-stabilized power supply 344, a power factor compensation main circuit 341, a PWM pulse modulation and driving circuit 344, which are connected to each other. The control circuit 343, the phase current voltage detection and comparison circuit 342, the voltage stabilizer 344 supplies power to the circuit, the power factor compensation main circuit 341 includes a first filter inductor 34109, a second filter inductor 34101, a first filter capacitor 34110, a second filter capacitor 34111, a third filter capacitor 34112, a charge and discharge capacitor 34107, an absorption capacitor 34113, a coupling capacitor 34114, a second transformer 34106, a current detection resistor 34102, a first voltage detection resistor 34103, a second voltage detection resistor 34104, a first power switch element 34108, and a second power switch element 34105. One end of the first filter inductor 34109 is connected to the AC current. The input terminal L is connected, the other end of the first filter inductor 34109 is connected to one end of the charge and discharge capacitor 34107, the first voltage detection resistor 34103, and the current detection resistor 34102, the other end of the charge and discharge capacitor 34107 is connected to one end of the primary winding N1 of the second transformer 34106, the other end of the primary winding N1 of the second transformer 34106 is connected to the first power switch element 34108 and the second power switch element 34105 connected in parallel, the cathode of the first power switch element 34108 and the anode of the second power switch element 34105 are connected to the common terminal N of the alternating current, the cathode of the first power switch element 34108 and the anode of the second power switch element 34105 are connected to the driving pole of the PWM The first drive circuit 3434 and the isolation drive circuit 3432 of the pulse modulation and drive control circuit 343; one end of the first filter capacitor 34110 is connected to the input terminal L of the alternating current, and the other end of the first filter capacitor 34110 is connected to the common terminal N of the alternating current; one end of the second filter capacitor 34111 is connected to the first filter inductor 34109, and the other end of the second filter capacitor 34111 is connected to the common terminal N of the alternating current; the other end of the first voltage detection resistor 34103 is respectively connected to the voltage detection circuit 3423 of the phase current voltage detection and comparison circuit 342 and one end of the second voltage detection resistor 34104, and the other end of the second voltage detection resistor 34104 is connected to the common terminal N of the alternating current;The other end of the current detection resistor 34102 is connected to the output terminal LM of the alternating current through the second filter inductor 34101; the absorption capacitor 34113 is connected in parallel with the secondary winding N2 of the second transformer 34106, one end of the absorption capacitor 34113 is connected to the output terminal LM of the alternating current, the other end of the absorption capacitor 34113 is connected to one end of the coupling capacitor 34114, and the other end of the coupling capacitor 34114 is connected to the common terminal N of the alternating current; one end of the third filter capacitor 34112 and the sample under test 1 are respectively connected to the output terminal LM of the alternating current, and the other ends of the third filter capacitor 34112 and the sample under test 1 are respectively connected to the common terminal N of the alternating current. Wherein, when the power factor compensation circuit is working, the alternating current AC is inputted into the input terminal L and the common terminal N of the power factor compensation main circuit, and the alternating current AC is supplied to the circuit consisting of the charging and discharging capacitor, the primary winding N1 of the second transformer, the first power switch element, and the second power switch element through the first filter capacitor, the first filter inductor, and the second filter capacitor, and then supplied to the sample under test after filtering through the current detection resistor, the second filter inductor, and the third filter capacitor;

[0048] In this embodiment, the voltage detection circuit 3423 of the phase current voltage detection and comparison circuit detects the terminal voltage of the sample under test after voltage division by the first voltage detection resistor and the second voltage detection resistor in the power factor compensation main circuit; the current detection circuit 3421 detects the current flowing through the sample under test through the current detection resistor, and then transmits the detected voltage and current waveform to the current and voltage comparison circuit 3422 for comparison, and controls the PWM pulse modulation circuit 3433 in the PWM pulse modulation and drive control circuit by controlling the voltage to control the first drive circuit 3434 and the isolation drive circuit 3432, so as to switch the first power switch element 34108 and the second power switch element 34105 respectively. The phase detection circuit 3424 processes the voltage waveform detected by the voltage detection circuit 3423 and transmits it to the phase and automatic power factor control circuit 3431 in the PWM pulse modulation and drive control circuit. The phase and automatic power factor control circuit 3431 controls the on-off sequence of the first power switch element 34108 and the second power switch element 34105 through the PWM pulse modulation circuit 3433, the first drive circuit 3434 and the isolation drive circuit 3432. The primary winding N1 of the second transformer performs pulse charging on the charging and discharging capacitor in the 0-π / 2 cycle and pulse discharging on the charging and discharging capacitor in the 3π / 2-2π cycle; the charging and discharging capacitor is pulsed in the π / 2-π cycle. The first power switch element and the second power switch element are connected to the phase current voltage detection circuit and the phase current voltage detection circuit respectively control the on and off time of the first power switch element and the second power switch element through the first drive circuit and the isolation drive circuit, thereby controlling the on and off time of the primary winding N1 of the second transformer and the charge and discharge capacitor; when the alternating current is pulsed on and off within the 0-π / 2 and π-3 / 2π cycles, the first power switch element and the second power switch element adjust the charge and discharge capacitor by adjusting the PWM pulse width, i.e., the on and off time. Charge amount; when the pulse is turned on and off in the π / 2-π and 3 / 2π-2π cycles of the alternating current, the first power switch element and the second power switch element adjust the discharge amount of the charge-discharge capacitor by adjusting the PWM on-off time; adjusting the charge-discharge amount of the compensation charge-discharge capacitor is equivalent to adjusting the capacitance value of the compensation charge-discharge capacitor, thereby realizing dynamic compensation; when the first power switch element and the second power switch element are turned on respectively, when the current passes through the first filter inductor, the charge-discharge capacitor and the primary winding N1 of the second transformer, electric energy is stored in the first filter inductor. At the moment of shutdown, the electric energy stored in the first filter inductor is released after being filtered by the second filter inductor and the third filter capacitor, and the power factor correction of the sample under test is performed;On the other hand, the electric energy stored in the second transformer is released through the secondary winding N2, the absorption capacitor and the coupling capacitor, and the power factor of the measured sample is corrected again. ;

[0049] In this embodiment, the sample under test 1 is connected to a three-phase harmonic source 5 for outputting a harmonic voltage through a third transformer 37. The three-phase harmonic source 5 includes a detection module 53, a harmonic generator 52 for outputting a harmonic voltage, and a PWM controller 51 for controlling the voltage frequency and amplitude of the harmonic voltage output by the harmonic generator 52. The harmonic generator 52 is connected to the PWM controller 51, and the PWM controller 51 is connected to the host computer 13; the harmonic generator 52 includes a first communication module 524, a relay output module 522, The analog output module 523, the three-phase harmonic generating module 521, the input end of the detection module 53 is connected to the power supply grid 4, the output end of the detection module 53 is connected to the host computer 13, the host computer 13 is connected to the input end of the relay output module 522 and the input end of the analog output module 523 through the first communication module 524, the output end of the relay output module 522 and the output end of the analog output module 523 are respectively connected to the three-phase harmonic generating module 521, and the three-phase harmonic generating module 521 is connected to the power supply grid 4.

[0050] In this embodiment, the PWM controller 51 uses a three-phase decoupling algorithm to simulate the normal and abnormal characteristics of the three-phase balance or imbalance of the power supply grid. The three-phase decoupling algorithm includes the following specific contents:

[0051] The input current of the PWM controller 51 is provided by the following formula (A):

[0052]

[0053] Formula (A) shows that the d-axis and q-axis currents are coupled to each other. The following formula (B) is obtained by Laplace transforming formula (A):

[0054]

[0055] with i 1d As the object of control, U 1d As the output of the PWM controller 51, the following equation (B) can be obtained: Fig.11 The d-axis current closed-loop feedback control block diagram is shown in FIG. The current closed-loop controller output U is derived from the d-axis current closed-loop feedback control block diagram. 1d The calculation formula (C) is:

[0056]

[0057] Among them, there is symmetry between the d-axis current and the q-axis current. In addition to being affected by the control variable U 1d, U 1q In addition to the influence of the grid voltage U 2d , U 2q The disturbance effect of the d-axis and q-axis currents is mutually coupled, which causes certain difficulties in the design of the PWM controller 51. The Laplace transform of formula (A) effectively reduces the influence of this difficulty on the system. Fig.11 It can be seen that the d-axis current is not only related to the current setting, but also affected by the q-axis current and the d-axis component interference of the power supply grid voltage. Therefore, the feedforward decoupling algorithm is used to eliminate the influence of the coupled q-axis current and the d-axis component interference of the power supply grid voltage. The d-axis current inner loop closed-loop control block diagram using the feedforward decoupling algorithm is shown in Fig.12 As shown, the closed-loop controller output U calculated by the feedforward decoupling algorithm is derived from the d-axis current inner loop closed-loop control block diagram. 1d The calculation formula (D) is:

[0058]

[0059] Among them, Fig.12 Simplified Fig.13 ,from Fig.13 It can be seen that after using the feedforward decoupling algorithm to eliminate the disturbances of the q-axis coupling current and the power supply grid voltage, the current inner loop controlled object can be simplified into a simple first-order inertia link; at the same time, due to the introduction of the grid disturbance voltage as feedforward compensation, the system's anti-interference ability is greatly improved.

[0060] Specifically, the current controller C(s) is selected as the PI controller, and the transfer function of C(s) is shown as function (E):

[0061]

[0062] in, Considering the delay of current inner loop signal sampling and the small inertia characteristics of PWM control, the decoupled d-axis current inner loop control block diagram is as follows: Fig.14 As shown, Fig.14 In, T S is the current sampling period of the inner loop, K PWM is the equivalent gain of the bridge PWM; the small time constant T S Combined, the simplified decoupled d-axis current inner loop control block diagram is obtained as follows Fig.15 As shown; when considering that the current inner loop needs to obtain faster current following performance, according to Fig.15 It can be seen from the simplified decoupled d-axis current inner loop control block diagram that it is only necessary to offset the pole of the current control object transfer function by the zero point of the designed PI regulator, that is: The corrected current inner loop open-loop transfer function is shown as function (F):

[0063]

[0064] When the system damping ratio ζ=0.707, the calculation formula (G) can be obtained:

[0065]

[0066] Solving formula (G) yields the calculation formula (H) for the current inner loop PI regulation control parameters:

[0067]

[0068] Depend on Fig.15 The current inner loop closed-loop transfer function after decoupling is obtained as shown in function (I):

[0069]

[0070] When the switching frequency is high enough, that is, T S Enough hours, due to S 2 The coefficient of the term is much smaller than that of the term S, so S can be ignored. 2 term, then function (I) is simplified to function (J):

[0071]

[0072] Substituting the calculation formula (H) into function (J) yields the equivalent transfer function of the simplified inner loop of the current as shown in function (K):

[0073]

[0074] Function (K) shows that the inner current loop is approximately equivalent to an inertial link, and the inertial time constant of the inertial link is 3T S ; Obviously, when the switching frequency is high enough, the current inner loop has a faster dynamic response; when the closed-loop gain of the closed-loop control system is reduced to -3dB or its phase shift is -45°, this point can be defined as the closed-loop system bandwidth f b ; Since the current inner loop can be equivalent to a first-order inertia link, the bandwidth of the current inner loop is f bi The calculation formula is shown in formula (L):

[0075]

[0076] Among them, f S is the current inner loop PWM switch modulation frequency; from formula (L), it can be seen that the PWM controller designed by the present invention not only meets the rapidity requirement, but also has a strong suppression capability for high-frequency interference such as switching frequency noise.

[0077] In this embodiment, the PWM controller 51 adopts a single-chip microcomputer 510, and the single-chip microcomputer 510 is provided with a dual-port parallel RAM19, and the dual-port parallel RAM19 has a data input port, a data output port, an address input port, and an address scan port. The data input port and the address input port of the dual-port parallel RAM19 are connected to the single-chip microcomputer 510; the single-chip microcomputer 510 is connected to a first 8-bit parallel analog-to-digital converter 24 and a second 8-bit parallel analog-to-digital converter 26 for specifying the amplitude, and the data port of the first 8-bit parallel analog-to-digital converter 24 and the data port of the second 8-bit parallel analog-to-digital converter 26 are both connected to the single-chip microcomputer 510, and the REF port of the first 8-bit parallel analog-to-digital converter 24 and the REF port of the second 8-bit parallel analog-to-digital converter 26 are connected to the output of the reference module 25.

[0078] In this embodiment, the single-chip microcomputer 510 is also connected to a third 8-bit parallel port analog-to-digital converter 20 and a fourth 8-bit parallel port analog-to-digital converter 22 for controlling the output waveform. The third 8-bit parallel port analog-to-digital converter 20 and the fourth 8-bit parallel port analog-to-digital converter 22 are both connected to the single-chip microcomputer 510 through the data output port of the dual-port parallel port RAM19.

[0079] In this embodiment, the output ports of the first 8-bit parallel analog-to-digital converter 24 and the second 8-bit parallel analog-to-digital converter 26 are respectively connected to the first operational amplifier array 23, the output end of the first operational amplifier array 23 is respectively connected to the REF port of the third 8-bit parallel analog-to-digital converter 20 and the fourth 8-bit parallel analog-to-digital converter 22, the output ends of the third 8-bit parallel analog-to-digital converter 20 and the fourth 8-bit parallel analog-to-digital converter 22 are respectively connected to the second operational amplifier array 21, and the output end of the second operational amplifier array 21 is connected to the harmonic generator 52.

[0080] In this embodiment, the single-chip microcomputer writes the waveform data into the dual-port parallel RAM through the data input port and the address input port to establish a waveform table. The phase shift can be achieved by writing different addresses. The single-chip microcomputer transmits the high 8 bits and low 8 bits of the amplitude signal to the first 8-bit parallel analog-to-digital converter and the second 8-bit parallel analog-to-digital converter respectively. The first 8-bit parallel analog-to-digital converter and the second 8-bit parallel analog-to-digital converter calculate the output voltage through the reference module and transmit it to the first operational amplifier array. The first operational amplifier array transmits the output value to the REF port of the third 8-bit parallel analog-to-digital converter and the fourth 8-bit parallel analog-to-digital converter through proportional accumulation, thereby determining the amplitude of the output waveform.

[0081] In this embodiment, the single-chip microcomputer writes the output waveform data into the dual-port parallel RAM, and writes the data at each time point into the third 8-bit parallel analog-to-digital converter and the fourth 8-bit parallel analog-to-digital converter. The third 8-bit parallel analog-to-digital converter and the fourth 8-bit parallel analog-to-digital converter calculate the output voltage through the reference voltage of their own REF ports, and transmit it to the second operational amplifier array, thereby outputting the required waveform phase.

[0082] In this embodiment, the detection module 6 includes a current transformer 61 and an analog-to-digital converter 62. The input end of the current transformer 61 is connected to the power supply grid 4, the output end of the current transformer 61 is connected to the input end of the analog-to-digital converter 62, and the output end of the analog-to-digital converter 62 is connected to the host computer 13.

[0083] In this embodiment, the central controller 15 is connected to a monitoring system for monitoring the operation of the system. The monitoring system includes a power quality analyzer 14 for detecting the harmonics of the three-phase harmonic source 5 and transmitting the detected harmonic values ​​to the central controller 15, a temperature sensor 8 for detecting the temperature signal of the system equipment, a smoke sensor 9 for detecting the smoke signal of the system equipment, a time monitoring module 10 for monitoring the working state of the system, and an alarm module 12 for alarming the system. The three-phase harmonic source 5 and the reactive power simulation source 32 are connected in parallel with the sample under test 1 through a transformer 2, the power grid simulation source 3 is connected to the power grid 4, the power grid simulation source 3 is connected to the sample under test 1 through a transformer 2, the alarm module 12 is connected to the host computer 13, and the power grid simulation source 3, the three-phase harmonic source 5, the reactive power simulation source 32, the transformer 2, the sample under test 1, the power quality analyzer 14, the temperature sensor 8, the smoke sensor 9, the time monitoring module 10, and the alarm module 12 are all connected to the central controller. 15 is connected; the alarm module 12 includes a current and voltage alarm module 121 for issuing an alarm message for alarming when the current value and / or voltage value received by the central controller 15 exceeds a threshold value, a time alarm module 122 for issuing an alarm message for alarming when the time value received by the central controller 15 exceeds a threshold value, a temperature alarm module 123 for issuing an alarm message for alarming when the temperature value received by the central controller 15 exceeds a threshold value, a smoke alarm module 124 for issuing an alarm message for alarming when the smoke concentration received by the central controller 15 exceeds a threshold value, and a harmonic alarm module 125 for issuing an alarm message for alarming when the harmonic value received by the central controller 15 exceeds a threshold value. The current and voltage alarm module 121, the time alarm module 122, the temperature alarm module 123, the smoke alarm module 124, and the harmonic alarm module 125 are all connected to the central controller 15.

[0084] In this embodiment, the three-phase harmonic generating module 521 is provided with a pre-filter 16, a harmonic power module 17, and a post-filter 18 which are connected in sequence. The harmonic power module 17 includes a PWM rectifier 171 for establishing a stable DC voltage, a DC side energy storage capacitor, and a PWM inverter 173 for generating a given voltage signal. The PWM rectifier 171, the DC side energy storage capacitor 172, and the PWM inverter 173 are connected in sequence. The output end of the pre-filter 16 is connected to the input end of the PWM rectifier 171, the output end of the PWM inverter 173 is connected to the post-filter 18, and the output end of the PWM controller 51 is respectively connected to the PWM rectifier 171 and the PWM inverter 173. Among them, the three-phase current waveform interface, status monitoring display interface and harmonic generation frequency setting interface are set and displayed through the host computer; a three-phase harmonic generation module formed by a front filter, a harmonic power module and a post-filter is adopted, and the three-phase harmonic generation module is controlled to simultaneously output harmonic voltages with multiple frequencies superimposed through a PWM controller, thereby achieving independent control of PWM rectification and inversion, ensuring the accuracy and reliability of the control logic, and realizing precise control of the harmonic frequency and amplitude.

[0085] In this embodiment, both the front filter and the rear filter adopt RLC filtering, wherein both the front filter and the rear filter include a filter inductor, a filter resistor, and a filter capacitor that are connected to each other, the filter inductor is connected in series to the PWM rectifier, and the filter resistor and the filter capacitor are connected in series and then connected in parallel to the PWM rectifier.

[0086] In this embodiment, the three-phase harmonic generating module 521 includes an A-phase harmonic generating module 5211, a B-phase harmonic generating module 5212, and a C-phase harmonic generating module 5213, which are completely identical in structure. The A-phase harmonic generating module, the B-phase harmonic generating module, and the C-phase harmonic generating module are all provided with a three-phase harmonic generating circuit 5210, which includes a state monitor 52102, an AC contactor 52103, a relay 52104, a monotonic harmonic elimination circuit 52105, a high-pass harmonic elimination circuit 52107, and an anti-parallel thyristor 52106. The input end is connected to the power supply grid through the circuit breaker 52101, the output end of the state monitor is connected to one end of the relay contact through the AC contactor, the other end of the relay contact is connected to one end of the monotonic detuning circuit or the high-pass detuning circuit, the other end of the monotonic detuning circuit or the high-pass detuning circuit is connected to one end of the anti-parallel thyristor, the other end of the anti-parallel thyristor of each branch is connected together, the trigger signal input end of the anti-parallel thyristor is connected to the analog output module, the coil of the relay is connected to the relay output module, and the communication port of the state monitor is connected to the first communication module. The state monitor is mainly used to realize the state monitoring, interlocking function and zero-crossing signal detection of each branch, to ensure the correct attraction and inrush current-free switching of the relay and the AC contactor.

[0087] In this embodiment, the monotonic detuning circuit 52105 includes a first resistor 521053, a second inductor 521052, and a first capacitor 521051 connected in series.

[0088] In this embodiment, the high-pass detuning circuit 52107 includes a second resistor 521073, a third inductor 521071, a second capacitor 521072, and a third capacitor 521074. The third capacitor is connected in series with the second resistor and then in parallel with the third inductor to form a parallel branch, which is then connected in series with the second capacitor.

[0089] In this embodiment, the central controller 15 is also connected to a reactive simulation source 32 for providing a reactive compensation signal. The three-phase harmonic source 5 and the reactive simulation source 32 are connected in parallel with the sample under test 1 through a third transformer 37. The reactive simulation source 32 is provided with a reactive generator 6. The reactive generator 6 includes a first inductor 61 for storing energy and filtering high-frequency switching ripple current, a PWM converter 62 for providing reactive compensation signals in the form of a three-phase fully controlled bridge topology, and a second drive circuit 64. The first inductor 61 is connected to the power supply grid 4 through the third transformer 37, the AC side of the PWM converter 62 is connected to the first inductor 61, the DC side of the PWM converter 62 is connected to the energy storage capacitor 63, and the PWM converter 62 is connected to the central controller 15 through the second drive circuit 64; the three-phase harmonic source and the reactive simulation source are connected in parallel with the sample under test through the third transformer. The third transformer converts the harmonic voltage output by the harmonic generator into voltage and transmits electric energy, thereby improving the adaptability of the three-phase harmonic source in the process of testing the compensation ability of the tested sample for the power quality; the PWM converter is composed of insulated gate bipolar transistors, which are driven by the voltage space vector modulation technology to generate a compensation current waveform, and the energy storage capacitor stores the DC energy generated by the insulated gate bipolar transistors; the second drive circuit receives the control signal from the central controller, drives the semiconductor power device of the PWM converter, and also takes into account the protection function of the semiconductor power device; the reactive simulation source can compensate for reactive power, adjust three-phase imbalance, and suppress harmonics, avoiding mutual interference problems, and can flexibly configure reactive power online, effectively realizing the reasonable compensation of reactive power, and providing safety protection for system equipment installed in extremely limited space.

[0090] In this embodiment, the harmonic generator 52 is arranged in the harmonic source cabinet 30, the single-chip computer 510 is arranged in the harmonic control cabinet 31, the first transformer 2 and the third transformer 37 are respectively arranged in a transformer cabinet 31, the power grid simulation source 3, the harmonic source cabinet 30, the harmonic control cabinet 31, the reactive power simulation source 32, and the transformer cabinet 31 are all arranged next to the sample under test 1, the sample under test 1 is arranged on the test frame 27, the test frame 27 is arranged on the wall, the test frame 27 is provided with a wiring rack 28, the wiring rack 28 is supported by a support frame 29 under the ceiling, the support frame 29 is fixed on the wall or the ceiling, the wiring rack 28 is provided with a wire trough 280, and the cable is buried in the wire trough 280, the power grid simulation source 3, the harmonic source cabinet 30, the harmonic control cabinet 31, the reactive power simulation source 32, the transformer 2 cabinet, and the sample under test 1 are all connected to the power supply grid 4 through cables. The installation structure formed by the support frame, wiring frame and test frame not only provides high stability, reliability and balance for the installation and wiring of system equipment, but also makes the system design compact and safe, and fully utilizes the limited test space.

[0091] In this embodiment, the monitoring system further includes a second communication module 11 , which is connected to the central controller 15 and the alarm module respectively, and transmits the alarm information to the host computer 13 through the second communication module 11 .

[0092] In this embodiment, the monitoring system further includes a data storage module 7 connected to the central controller 15 , and the alarm information is stored through the data storage module 7 .

[0093] In this embodiment, the data storage module 7 includes a database server 71 and a disk array 72 connected to each other. The database server 71 is connected to the central controller 15. The central controller 15 stores the alarm information in the disk array 72 through the database server 71, and the host computer 13 reads the alarm information from the disk array 72. By combining the data storage module formed by the database server and the disk array with the technical solution of the above-mentioned monitoring system, the reliability of the power quality detection system is improved, thereby improving the integrity and accuracy of the power quality data, and different monitoring functions can be set according to monitoring requirements, and an evaluation system can be established using the data stored in the database server. The reliability of the low-voltage power quality detection system can be inferred based on the quality of the data, thereby realizing remote reliability evaluation of the low-voltage power quality detection system, and the system reliability can also be diagnosed and analyzed, and the system can be correspondingly repaired and maintained based on the historical change trend of the reliability evaluation.

[0094] In this embodiment, the reactive power simulation source 32 is provided with an RS485 interface, and the reactive power generator 6 is connected to the central controller 15 via the RS485 interface.

[0095] In this embodiment, the first transformer and the third transformer are respectively connected to the central controller 15 via RS485 interfaces.

[0096] In conclusion, the above is only a preferred embodiment of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention should fall within the scope of the patent of the present invention.

Claims

1. The power grid simulation source system is characterized by: The system comprises a power grid simulation source (3) connected to a power grid (4), a current detection module (35) for sampling current of the power grid simulation source (3), a voltage detection module (36) for sampling voltage of the power grid simulation source (3), a central controller (15) for controlling the system, and a host computer (13) connected to the central controller (15); the sample to be tested (1) is connected to the power grid simulation source (3) via a first transformer (2); the current detection module (35) and the voltage detection module (36) are respectively connected to the central controller (15) via a power factor compensation circuit (34); the power grid simulation source (3), the first transformer (2), and the sample to be tested (1) are all connected to the central controller (15); The central controller (15) is connected to a monitoring system for monitoring the operation of the system, the monitoring system comprising a power quality analyzer (14) for detecting the harmonics of the three-phase harmonic source (5) and transmitting the detected harmonic values ​​to the central controller (15), a temperature sensor (8) for detecting the temperature signal of the system equipment, a smoke sensor (9) for detecting the smoke signal of the system equipment, a time monitoring module (10) for monitoring the working state of the system, an alarm module (12) for alarming the system, and a three-phase harmonic source (5). The power source (5) and the reactive power simulation source (32) are connected in parallel with the sample under test (1) through a transformer (2); the power grid simulation source (3) is connected to the power grid (4); the power grid simulation source (3) and the sample under test (1) are connected through a transformer (2); the alarm module (12) is connected to the host computer (13); the power grid simulation source (3), the three-phase harmonic source (5), the reactive power simulation source (32), the transformer (2), the sample under test (1), the power quality analyzer (14), the temperature sensor (8), the smoke sensor (9), and the time monitoring device (13) are connected. The control module (10) and the alarm module (12) are both connected to the central controller (15); the alarm module (12) comprises a current and voltage alarm module (121) for issuing an alarm message for alarming when the current value and / or voltage value received by the central controller (15) exceeds a threshold value, a time alarm module (122) for issuing an alarm message for alarming when the time value received by the central controller (15) exceeds a threshold value, a temperature alarm module (123) for issuing an alarm message for alarming when the temperature value received by the central controller (15) exceeds a threshold value, a smoke alarm module (124) for issuing an alarm message for alarming when the smoke concentration received by the central controller (15) exceeds a threshold value, and a harmonic alarm module (125) for issuing an alarm message for alarming when the harmonic value received by the central controller (15) exceeds a threshold value; the current and voltage alarm module (121), the time alarm module (122), the temperature alarm module (123), the smoke alarm module (124), and the harmonic alarm module (125) are all connected to the central controller (15); The sample under test (1) is connected to a three-phase harmonic source (5) for outputting a harmonic voltage via a third transformer (37); the three-phase harmonic source (5) comprises a detection module (53), a harmonic generator (52) for outputting a harmonic voltage, and a PWM controller (51) for controlling the voltage frequency and amplitude of the harmonic voltage output by the harmonic generator (52); the harmonic generator (52) is connected to the PWM controller (51), and the PWM controller (51) is connected to a host computer (13); the harmonic generator (52) comprises a first communication module (524), a relay output module (522), an analog quantity An output module (523), a three-phase harmonic generation module (521), an input end of the detection module (53) is connected to a power supply network (4), an output end of the detection module (53) is connected to a host computer (13), the host computer (13) is respectively connected to an input end of a relay output module (522) and an input end of an analog output module (523) via a first communication module (524), an output end of the relay output module (522) and an output end of the analog output module (523) are respectively connected to a three-phase harmonic generation module (521), and the three-phase harmonic generation module (521) is connected to a power supply network (4); The three-phase harmonic generation module (521) is provided with a pre-filter (16), a harmonic power module (17), and a post-filter (18) which are connected in sequence. The harmonic power module (17) comprises a PWM rectifier (171) for establishing a stable DC voltage, a DC side energy storage capacitor, and a PWM inverter (173) for generating a given voltage signal. The PWM rectifier (171), the DC side energy storage capacitor (172), and the PWM inverter (173) are connected in sequence. The output end of the pre-filter (16) is connected to the input end of the PWM rectifier (171), the output end of the PWM inverter (173) is connected to the post-filter (18), and the output end of the PWM controller (51) is respectively connected to the PWM rectifier (171) and the PWM inverter (173); The three-phase harmonic generation module (521) includes an A-phase harmonic generation module (5211), a B-phase harmonic generation module (5212), and a C-phase harmonic generation module (5213) with completely identical structures. The A-phase harmonic generation module, the B-phase harmonic generation module, and the C-phase harmonic generation module are all provided with a three-phase harmonic generation circuit (5210). The three-phase harmonic generation circuit includes a state monitor (52102), an AC contactor (52103), a relay (52104), a monotonic detuning circuit (52105), a high-pass detuning circuit (52107), and an anti-parallel thyristor (52106). , the input end of the state monitor is connected to the power supply grid through the circuit breaker (52101), the output end of the state monitor is connected to one end of the relay contact through the AC contactor, the other end of the relay contact is connected to one end of the monotonic detuning circuit or the high-pass detuning circuit, the other end of the monotonic detuning circuit or the high-pass detuning circuit is connected to one end of the anti-parallel thyristor, the other end of the anti-parallel thyristor of each branch is connected together, the trigger signal input end of the anti-parallel thyristor is connected to the analog output module, the coil of the relay is connected to the relay output module, and the communication port of the state monitor is connected to the first communication module; The PWM controller (51) uses a three-phase decoupling algorithm to simulate the normal and abnormal characteristics of the three-phase balance or imbalance of the power supply network. The three-phase decoupling algorithm includes the following specific contents: The input current of the PWM controller (51) is provided by the following formula (A): Formula (A) shows that the d-axis and q-axis currents are coupled to each other. The following formula (B) is obtained by Laplace transforming formula (A): with i 1d As the object of control, U 1d As the output of the PWM controller (51), the current closed-loop controller output U is derived from formula (B): 1d The calculation formula (C) is: Among them, there is symmetry between the d-axis current and the q-axis current. In addition to being affected by the control variable U 1d , U 1q In addition to the influence of the grid voltage U 2d , U 2q The feedforward decoupling algorithm is used to eliminate the influence of the coupled q-axis current and the d-axis component of the power grid voltage. The closed-loop controller output U is calculated by the feedforward decoupling algorithm. 1d The calculation formula (D) is: At the same time, due to the introduction of grid disturbance voltage as feedforward compensation; Specifically, the current controller C(s) is selected as the PI controller, and the transfer function of C(s) is shown as function (E): in, T S is the current sampling period of the inner loop, K PWM is the equivalent gain of the bridge PWM; the small time constant T S Merge; When considering that the current inner loop needs to obtain faster current following performance, the zero point of the designed PI regulator offsets the pole of the current control object transfer function, that is: The corrected current inner loop open-loop transfer function is shown as function (F): When the system damping ratio ζ=0.707, the calculation formula (G) can be obtained: Solving formula (G) yields the calculation formula (H) for the current inner loop PI regulation control parameters: The current inner loop closed-loop transfer function after decoupling is obtained as shown in function (I): When the switching frequency is high enough, that is, T S Enough hours, due to S 2 The coefficient of the term is much smaller than that of the term S, so S can be ignored. 2 term, then function (I) is simplified to function (J): Substituting the calculation formula (H) into function (J) yields the equivalent transfer function of the simplified inner loop of the current as shown in function (K): Function (K) shows that the inner current loop is approximately equivalent to an inertial link, and the inertial time constant of the inertial link is 3T S ; When the switching frequency is high enough, the current inner loop has a faster dynamic response; When the closed-loop gain of the closed-loop control system is reduced to -3dB or its phase shift is -45°, this point is defined as the closed-loop system bandwidth f b ; Since the current inner loop can be equivalent to a first-order inertia link, the bandwidth of the current inner loop is f bi The calculation formula is shown in formula (L): Among them, f S is the current inner loop PWM switch modulation frequency.

2. The power grid simulation source system according to claim 1, characterized in that: The power factor compensation circuit (34) comprises a voltage-stabilized power supply (344), a power factor compensation main circuit (341), a PWM pulse modulation and drive control circuit (343), and a phase current voltage detection and comparison circuit (342) which are connected to each other. The voltage-stabilized power supply (344) supplies power to the circuit. The power factor compensation main circuit (341) comprises a first filter inductor (34109), a second filter inductor (34101), a first filter capacitor (34110), a second filter capacitor (34111), a third filter capacitor (34112), a charge and discharge capacitor (34107), an absorption capacitor (34113), a coupling capacitor (34114), and a second transformer (34106), a current detection resistor (34102), a first voltage detection resistor (34103), a second voltage detection resistor (34104), a first power switch element (34108), a second power switch element (34105), one end of a first filter inductor (34109) is connected to an input end L of an alternating current, the other end of the first filter inductor (34109) is connected to a charging and discharging capacitor (34107), a first voltage detection resistor (34103), and one end of a current detection resistor (34102), the other end of the charging and discharging capacitor (34107) is connected to one end of a primary winding N1 of a second transformer (34106), and the second transformer (341 06) is connected to the first power switch element (34108) and the second power switch element (34105) in parallel, the cathode of the first power switch element (34108) and the anode of the second power switch element (34105) are connected to the common terminal N of the alternating current, the cathodes and driving poles of the first power switch element (34108) and the second power switch element (34105) are respectively connected to the first driving circuit (3434) and the isolation driving circuit (3432) of the PWM pulse modulation and driving control circuit (343); one end of the first filter capacitor (34110) is connected to the input terminal L of the alternating current, and the first filter capacitor (34110) is connected to the input terminal L of the alternating current. ) is connected to the common terminal N of the alternating current; one end of the second filter capacitor (34111) is connected to the first filter inductor (34109), and the other end of the second filter capacitor (34111) is connected to the common terminal N of the alternating current; the other end of the first voltage detection resistor (34103) is respectively connected to the voltage detection circuit (3423) of the phase current voltage detection and comparison circuit (342) and one end of the second voltage detection resistor (34104), and the other end of the second voltage detection resistor (34104) is connected to the common terminal N of the alternating current; the other end of the current detection resistor (34102) is connected to the output terminal LM of the alternating current through the second filter inductor (34101);The absorption capacitor (34113) is connected in parallel with the secondary winding N2 of the second transformer (34106), one end of the absorption capacitor (34113) is connected to the output terminal LM of the alternating current, the other end of the absorption capacitor (34113) is connected to one end of the coupling capacitor (34114), and the other end of the coupling capacitor (34114) is connected to the common terminal N of the alternating current; one end of the third filter capacitor (34112) and the sample under test (1) are respectively connected to the output terminal LM of the alternating current, and the other ends of the third filter capacitor (34112) and the sample under test (1) are respectively connected to the common terminal N of the alternating current.; 3. The power grid simulation source system according to claim 2, characterized in that: The PWM controller (51) adopts a single-chip microcomputer (510), the single-chip microcomputer (510) is provided with a dual-port parallel RAM (19), the dual-port parallel RAM (19) has a data input port, a data output port, an address input port, and an address scanning port, the data input port and the address input port of the dual-port parallel RAM (19) are connected to the single-chip microcomputer (510); the single-chip microcomputer (510) is connected to a first 8-bit parallel analog-to-digital converter (24) and a second 8-bit parallel analog-to-digital converter (26) for specifying amplitude, the data port of the first 8-bit parallel analog-to-digital converter (24) and the data port of the second 8-bit parallel analog-to-digital converter (26) are both connected to the single-chip microcomputer (510), and the REF port of the first 8-bit parallel analog-to-digital converter (24) and the REF port of the second 8-bit parallel analog-to-digital converter (26) are connected to the output of the reference module (25).

4. The power grid simulation source system according to claim 3, characterized in that: The single-chip computer (510) is also connected to a third 8-bit parallel port analog-to-digital converter (20) and a fourth 8-bit parallel port analog-to-digital converter (22) for controlling the output waveform. The third 8-bit parallel port analog-to-digital converter (20) and the fourth 8-bit parallel port analog-to-digital converter (22) are both connected to the single-chip computer (510) via the data output port of the dual-port parallel port RAM (19).

5. The power grid simulation source system according to claim 4, characterized in that: The output ports of the first 8-bit parallel port analog-to-digital converter (24) and the second 8-bit parallel port analog-to-digital converter (26) are respectively connected to the first operational amplifier array (23); the output end of the first operational amplifier array (23) is respectively connected to the REF port of the third 8-bit parallel port analog-to-digital converter (20) and the fourth 8-bit parallel port analog-to-digital converter (22); the output ends of the third 8-bit parallel port analog-to-digital converter (20) and the fourth 8-bit parallel port analog-to-digital converter (22) are respectively connected to the second operational amplifier array (21); and the output end of the second operational amplifier array (21) is connected to the harmonic generator (52).

6. The power grid simulation source system according to claim 5, characterized in that: The detection module (6) comprises a current transformer (61) and an analog-to-digital converter (62); the input end of the current transformer (61) is connected to the power supply grid (4); the output end of the current transformer (61) is connected to the input end of the analog-to-digital converter (62); and the output end of the analog-to-digital converter (62) is connected to a host computer (13).

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