Electronic device and method of manufacturing the same

Abstract

The present invention discloses an electronic device and a manufacturing method thereof. The manufacturing method comprises: providing an insulating substrate, wherein the insulating substrate has a first surface and a second surface opposite to each other; forming a plurality of sub-matrix circuits on the insulating substrate, each sub-matrix circuit comprising at least one thin film transistor; arranging at least one functional chip on the first surface, wherein the functional chip is electrically connected to the sub-matrix circuit; forming a plurality of through holes on the insulating substrate and arranging at least one conductive material in the through holes, so that the functional chip is electrically connected to the second surface via the sub-matrix circuits and the conductive material; arranging a protective layer on the first surface and covering the functional chips; cutting the insulating substrate and the protective layer to form a plurality of electronic packaging units; and electrically connecting the conductive material of the electronic packaging unit to a driving circuit board, wherein the driving circuit board faces the second surface of the insulating substrate, and the functional chips are electrically connected to the driving circuit board via the sub-matrix circuits and the conductive materials in the through holes.

Description

Technical Field

[0001] The invention relates to an electronic device and a manufacturing method thereof. Background Art

[0002] In the manufacturing of traditional optoelectronic devices, multiple thin film transistors are made on a substrate to form a thin film transistor substrate, and then the thin film transistors are used to drive the corresponding optoelectronic elements. Taking organic light emitting diode display devices as an example, if there are multiple different product sizes or functions, the method of using thin film transistors to drive the organic light emitting diodes to emit light must design corresponding thin film processes for each product size or function of the organic light emitting diode device, and expensive thin film transistor processes / masks / substrates / materials are required, which is very unfavorable to the changing product needs and is also quite inflexible in application. Summary of the invention

[0003] The purpose of the present invention is to provide an electronic device and a manufacturing method thereof. The present invention does not need to design its process for each product size and function. In addition to saving the cost of expensive thin film transistor process / mask / substrate / materials and making the cost lower, it is more flexible in application and can be applied to various product requirements.

[0004] To achieve the above-mentioned purpose, a manufacturing method of an electronic device according to the present invention includes: providing an insulating substrate, wherein the insulating substrate has a first surface and a second surface opposite to each other; forming a plurality of sub-matrix circuits on the insulating substrate, each sub-matrix circuit comprising at least one thin film transistor; disposing at least one functional chip on the first surface, wherein the functional chip is electrically connected to the sub-matrix circuit; forming a plurality of through holes in the insulating substrate and disposing at least one conductive material in these through holes, so that the functional chip is electrically connected to the second surface via these sub-matrix circuits and the conductive material; disposing a protective layer on the first surface and covering these functional chips; cutting the insulating substrate and the protective layer to form a plurality of electronic packaging units; and electrically connecting the conductive material of the electronic packaging unit to a driving circuit board, wherein the driving circuit board faces the second surface of the insulating substrate, and the functional chip is electrically connected to the driving circuit board via the sub-matrix circuit and the conductive material in the through hole.

[0005] In one embodiment, in the step of forming the through holes, the insulating substrate is irradiated with laser to form the through holes on the insulating substrate.

[0006] In one embodiment, the manufacturing method further includes: providing the conductive material by surface treating the through holes with the second surface to form a conductive layer in the through holes.

[0007] In one embodiment, each sub-matrix circuit further includes at least one scan line and at least one data line, and the thin film transistor is electrically connected to the scan line and the data line.

[0008] In one embodiment, the functional wafer includes an optoelectronic wafer, a thermoelectric wafer, a piezoelectric wafer, or a sensing wafer.

[0009] In one embodiment, the driving circuit board includes at least one driving chip.

[0010] In one embodiment, the conductive material is attached by surface mounting technology or anisotropic conductive paste to be electrically connected to the driving circuit board.

[0011] In one embodiment, the insulating substrate is made of glass, resin, or ceramic.

[0012] To achieve the above-mentioned object, an electronic device according to the present invention includes a driving circuit board and a plurality of electronic packaging units arranged on the driving circuit board, each electronic packaging unit includes an insulating substrate, a sub-matrix circuit, at least one functional chip and a protective layer. The insulating substrate has a plurality of through holes and a first surface and a second surface opposite to each other. The sub-matrix circuit is arranged on the insulating substrate, and the sub-matrix circuit includes at least one thin film transistor. The functional chip is arranged on the first surface, and the functional chip is electrically connected to the driving circuit board via the sub-matrix circuit and the through holes. The protective layer is arranged on the first surface of the insulating substrate and covers the functional chip; wherein the driving circuit board faces the second surface of the insulating substrate, and the functional chip is electrically connected to the driving circuit board via the sub-matrix circuit and the conductive material in the through hole.

[0013] In one embodiment, the thickness of the insulating substrate is less than 50 micrometers, and the thickness of the thin film transistor is less than 20 micrometers.

[0014] In one embodiment, the insulating substrate is made of glass, resin, or ceramic.

[0015] In one embodiment, the sub-matrix circuit further includes at least one scan line and at least one data line, and the thin film transistor is electrically connected to the scan line and the data line.

[0016] In one embodiment, the electronic package unit includes a plurality of functional chips, wherein the sub-matrix circuits electrically connected to the functional chips form a matrix circuit.

[0017] In one embodiment, these sub-matrix circuits of a plurality of electronic packages are combined to form a matrix circuit.

[0018] In one embodiment, the driving circuit board includes at least one connection circuit, and the connection circuit includes a plurality of connection pads and a plurality of wires. The connection pads and the wires are connected in series with the sub-matrix circuits.

[0019] In one embodiment, the driving circuit board further includes at least one driving chip, and the driving chip is electrically connected to the sub-matrix circuits of the electronic packaging units via the connecting circuits.

[0020] In one embodiment, the functional wafer comprises an optoelectronic wafer, a thermoelectric wafer, or a piezoelectric wafer.

[0021] In one embodiment, a side length of one of the electronic packages is greater than 50 microns.

[0022] To achieve the above object, an electronic device according to the present invention includes a plurality of electronic packaging units and a driving circuit board. Each electronic packaging unit includes an insulating substrate, at least one sub-matrix circuit, at least one Functional chip and protective layer. The insulating substrate has a plurality of through holes and a first surface and a second surface opposite to each other. The matrix circuit is arranged on the insulating substrate, and the sub-matrix circuit includes at least one thin film transistor. The functional chip is arranged on the first surface of the insulating substrate. The protective layer is arranged on the first surface of the insulating substrate and covers the functional chip. The driving circuit board faces the second surface of the insulating substrate, and the functional chips are electrically connected to the driving circuit board through the sub-matrix circuits and the through holes.

[0023] As mentioned above, in the electronic device and the manufacturing method thereof of the present invention, by packaging a plurality of sub-matrix circuits and functional chips on an insulating substrate together, and using conductive materials to electrically connect the functional chips to the second surface of the insulating substrate via these sub-matrix circuits and the conductive materials, the purpose of using the same thin film transistor substrate (electronic packaging unit) to share in many different electronic devices can be achieved. Therefore, the present invention does not need to design thin film processes for each product size or function of each electronic device. In addition to saving the cost of expensive thin film transistor processes / masks / substrates / materials and making the cost lower, it is more flexible in application and can be applied to a variety of product requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 The figure is a flow chart of a method for manufacturing an electronic packaging unit according to a preferred embodiment of the present invention.

[0025] FIG. 2A to FIG. 2F They are schematic diagrams of a manufacturing process of an electronic packaging unit according to an embodiment of the present invention.

[0026] FIG. 3A to FIG. 3C They are schematic diagrams of the manufacturing process of an electronic packaging unit according to another embodiment of the present invention.

[0027] Figure 4A The figure is a schematic diagram of the cooperation between the electronic packaging unit and the driving circuit board according to an embodiment of the present invention.

[0028] Figure 4BThe figure is a top view of a plurality of electronic packaging units and a driving circuit board according to an embodiment of the present invention.

[0029] Figure 5A and Figure 5B They are respectively a circuit schematic diagram and a layout schematic diagram of an electronic packaging unit according to another embodiment of the present invention.

[0030] Fig. 6A and Figure 6B They are Figure 5B A schematic cross-sectional view of an electronic packaging unit along lines AA and BB.

[0031] Figure 6C and Fig.6D They are Figure 5B Schematic diagrams of different embodiments of the cross-section of the electronic packaging unit along line BB.

[0032] Figure 7 FIG. 4 is a schematic diagram of the layout of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0033] An electronic device and a manufacturing method thereof according to a preferred embodiment of the present invention will be described below with reference to the related drawings, wherein the same elements will be described with the same reference numerals.

[0034] Figure 1 FIG. 1 is a flow chart of a method for manufacturing an electronic packaging unit according to a preferred embodiment of the present invention. Figure 1As shown, the manufacturing method of the electronic packaging unit may include: providing an insulating substrate, wherein the insulating substrate has a first surface and a second surface opposite to each other (step S01); forming a plurality of sub-matrix circuits on the insulating substrate, each sub-matrix circuit including at least one thin film transistor (step S02); disposing at least one functional chip on the first surface, wherein the functional chip is electrically connected to the sub-matrix circuit (step S03); forming a plurality of through holes on the insulating substrate and disposing at least one conductive material in these through holes, so that the functional chip is electrically connected to the second surface through these sub-matrix circuits and the conductive material (step S04); disposing a protective layer on the first surface and covering these functional chips (step S05); and cutting the insulating substrate and the protective layer to form a plurality of electronic packaging units (step S06). The insulating substrate may include a hard substrate or a soft substrate. In some embodiments, if the insulating substrate is a soft substrate, in order to allow subsequent components to be smoothly formed on the soft substrate through subsequent processes and to facilitate the operation of the soft substrate, the soft substrate needs to be first formed on a rigid carrier (for example, it can be adhered by an adhesive layer), and then the rigid carrier is removed in a subsequent step. However, if the insulating substrate is a hard substrate, this is not necessary. In addition, the sequence of the above steps does not necessarily follow the sequence of S01 to S06. In different embodiments, the sequence may be different, which will be described below with an embodiment.

[0035] Please refer to Figure 1 And cooperate FIG. 2A to FIG. 2F , to illustrate each of the above steps. Among them, FIG. 2A to FIG. 2F They are schematic diagrams of the manufacturing process of the electronic packaging unit 1 according to an embodiment of the present invention.

[0036] First, if Figure 2AAs shown, step S01 is: providing an insulating substrate 11, wherein the insulating substrate 11 has a first surface S1 and a second surface S2 opposite to each other. The material of the insulating substrate 11 can be glass, resin, metal or ceramic, or a composite material. Among them, the resin material can be flexible and can include organic polymer materials, and the glass transition temperature (Glass Transition Temperature, Tg) of the organic polymer material can be, for example, between 250 degrees Celsius and 600 degrees Celsius, and the preferred temperature range can be, for example, between 300 degrees Celsius and 500 degrees Celsius. With such a high glass transition temperature, a thin film process can be directly performed in the subsequent process to form a thin film transistor and other components or circuits. Here, the organic polymer material can be a thermoplastic material, such as polyimide (PI), polyethylene (Polyethylene, PE), polyvinyl chloride (Polyvinylchloride, PVC), polystyrene (PS), acrylic (acrylic), fluorinated polymer (Fluoropolymer), polyester fiber (polyester) or nylon (nylon). In some embodiments, if the insulating substrate 11 is to be a flexible substrate, a polyimide (PI) material can be used. The PI substrate is first set by, for example, gluing or coating, and then formed on a rigid carrier after curing (thermal curing or photocuring) to form a flexible substrate.

[0037] Then, if Figure 2AAs shown, step S02: forming a plurality of sub-matrix circuits 121 on the insulating substrate 11, wherein each sub-matrix circuit 121 may include at least one thin film transistor. Here, each sub-matrix circuit 121 on the insulating substrate 11 may be connected to each other or not connected. When not connected, each sub-matrix circuit 121 is arranged at intervals. In addition, each sub-matrix circuit 121 may also include interlaced first conductive wires and second conductive wires. Furthermore, a plurality of sub-matrix circuits 121 may be defined as a matrix circuit 12, wherein the sub-matrix circuit 121 may be the minimum unit of the matrix circuit 12 or a combination thereof, and any plurality of sub-matrix circuits 121 may be combined into the matrix circuit 12, and the combined matrix circuit 12 may be a rectangle, a rhombus, a triangle, or other concave polygons or convex polygons, and each sub-matrix circuit 121 may include at least one thin film transistor T. The thin film transistor T in this embodiment is formed on the upper surface (first surface S1) of the insulating substrate 11 by a thin film process as an example. In different embodiments, the thin film transistor T may also be formed on the lower surface (second surface S2) of the insulating substrate 11, and is not limited thereto. In addition to the thin film transistors T, the sub-matrix circuit 121 may also include other thin film elements or circuits, such as thin film resistors, capacitors, conductive layers, metal layers, first wires or second wires, etc. In some embodiments, the thickness of the insulating substrate 11 may be less than 50 microns, the thickness of the thin film transistors T may be less than 20 microns, and the total thickness of the insulating substrate 11 plus the matrix circuit 12 may be less than 100 microns, so that the entire electronic packaging unit 1 can be easily bent and flexible. The above-mentioned thin film process may be a semiconductor process, and may include a low temperature polysilicon (LTPS) process, an amorphous silicon (α-Si) process or a metal oxide (such as IGZO) semiconductor process, without limitation.

[0038] Afterwards, the electrical connection pads 122 may be manufactured by, for example, a printing process. In some embodiments, in order to facilitate the subsequent chip packaging process, after step S02 is completed, Figure 2A The substrate is cut into appropriate sizes to suit packaging process equipment. Figure 2BAs shown, step S03: at least one functional chip 13 is disposed on the first surface S1 of the insulating substrate 11, wherein the functional chip 13 is electrically connected to the sub-matrix circuit 121. Here, the sub-matrix circuit 121 and the functional chip 13 are directly disposed on the insulating substrate 11. Here, the functional chip 13 can be disposed on the first surface S1 of the insulating substrate 11 by wire bonding or flip chip bonding, and is electrically connected to the sub-matrix circuit 121. In some embodiments, the functional chip 13 may include an optoelectronic chip, a thermoelectric chip, a piezoelectric chip, or a sensor chip. Here, the optoelectronic chip may include but is not limited to a light emitting diode chip (LED chip), a micro LED chip (microLED chip), or other optoelectronic chips, and the sensor chip may include an infrared sensor chip, an ultrasonic sensor chip, a temperature sensor chip, or an image sensor. When the functional chip 13 is a photoelectric chip, a piezoelectric chip or a thermoelectric chip, the controller outside the matrix circuit 12 can control the switch of the functional chip 13 through the first wire, the second wire and the thin film transistor T; when the functional chip 13 is a sensing chip, the data sensed by the functional chip can be transmitted to the outside through the first wire, the second wire and the thin film transistor.

[0039] In addition, each sub-matrix circuit 121 of the present embodiment may further include at least one metal layer 123, the metal layer 123 is disposed on the first surface S1 of the insulating substrate 11, and at least one electrical connection pad 122 is formed on the metal layer 123 and connected to the metal layer 123, so that the function chip 13 can be electrically connected to the metal layer 123 of the sub-matrix circuit 121 via the electrical connection pad 122. Here, the connection between the function chip 13 and the electrical connection pad 122 is The bonding method can be wire bonding or flip chip bonding (flip chip), eutectic bondingbonding, such as Au-Sn), anisotropic conductive film (ACF) bonding, anisotropic conductive paste (ACP) bonding, solder ball bonding or ultrasonic bonding, which is not particularly limited in the present invention. In the present embodiment, the functional chip 13 can be an optoelectronic chip (such as an LED), and its electrode can be set on the electrical connection pad 122 using flip chip bonding, taking the electrical connection pad 122 and the metal layer 123 as an example to be electrically connected to the thin film transistor T. In some embodiments, for example, the material can be melted by heating to form a conductive material such as a solder ball or a gold bump (Au bump), or by using materials such as copper glue, silver glue, or anisotropic conductive glue (ACP), so that the two electrodes of the functional chip 13 are electrically connected to the electrical connection pad 122 and the metal layer 123 respectively. In some embodiments, the electrical connection pad 122 electrically connected to the two electrodes E1 and E2 (not shown in the figure) of the functional chip 13 can be, for example, but not limited to, a thickened copper glue pad.

[0040] like Figure 2C As shown, step S04 is to form a plurality of through holes H on the insulating substrate 11 and to place at least one conductive material (not shown) in these through holes H, so that the functional chip 13 is electrically connected to the second surface S2 via these sub-matrix circuits 121 and the conductive material. Here, the insulating substrate 11 can be irradiated with a laser (e.g., a laser) to form a plurality of through holes H that penetrate the first surface S1 and the second surface S2. The laser can be irradiated downward from the first surface S1 to form the through holes H on the insulating substrate 11; or the laser can be irradiated upward from the second surface S2 to form the through holes H on the insulating substrate 11 to expose a portion of the metal layer 123. Figure 2C The embodiment of the present invention takes the case where a laser is irradiated upward from the second surface S2 to the insulating substrate 11 to form a through hole H. In this embodiment, one of the electrodes of the functional chip 13 and two of the electrodes (gate and source, or gate and drain) of the thin film transistor T can be electrically connected to the second surface S2 after the through hole H is filled with a conductive material. In addition, in order to improve the adhesion between the conductive material and the metal layer 123, in some embodiments, such as Figure 2DAs shown, the metal layer 123 in the through hole H can be subjected to a surface treatment process from the second surface S2 to form a conductive layer 15 in the through hole H, thereby improving the bonding strength between the metal layer 123 and the conductive material, so that the functional chip 13 and the sub-matrix circuit 121 can be electrically connected to the second surface S2 via the through hole H and the conductive material, for example, electrically connected to the connection pads disposed on the second surface S2. The surface treatment can be chemical tin plating, chemical gold plating, and / or copper glue coating, which is not limited. It is particularly mentioned that in step S04, if the through hole H is formed from the second surface S2 and the material of the insulating substrate 11 is a soft substrate (such as PI), the rigid substrate must be removed before the through hole H is formed before the drilling process can be performed.

[0041] Then, if Figure 2E As shown, step S05 is to set a protective layer 14 on the first surface S1 of the insulating substrate 11 and cover the functional chips 13. Here, the protective layer 14 can be covered on the functional chips 13 by resin transfer molding or sealant dispensing. In addition to covering the functional chips 13, the protective layer 14 of this embodiment can also cover at least part of the sub-matrix circuit 121 to protect the sub-matrix circuit 121 and the functional chip 13 from being invaded by foreign matter or moisture and damaging their characteristics.

[0042] It is further explained that in the above-mentioned steps S03 to S05, if the through hole H is formed from the second surface S2, the protective layer 14 can be firstly provided (step S05) after the functional chip 13 is provided (step S03), and then the step S04 of forming the through hole H and providing the conductive material is performed. In addition, if the through hole H is formed from the first surface S1, the step S04 of forming the through hole H and filling the conductive material (such as copper paste) can be performed first, and then the functional chip 13 is provided (step S03), and then the protective layer 14 is provided (step S05).

[0043] Finally, if Figure 2F As shown, step S06 is: cutting the insulating substrate 11 and the protective layer 14 to form a plurality of individually packaged electronic packaging units 1. In some embodiments, the manufacturing method may further include: electrically connecting the conductive material to the driving circuit board (not shown). Here, the conductive material may be attached to the driving circuit board using, for example, surface mounting technology or anisotropic conductive paste. The driving circuit board may include at least one driving chip and a connecting circuit, and the driving chip may drive the functional chip 13 via the connecting circuit and via the connecting pads, the conductive material and the sub-matrix circuit 121.

[0044] Please refer to FIG. 3A to FIG. 3C , which are schematic diagrams of the manufacturing process of an electronic packaging unit according to another embodiment of the present invention.

[0045] In this embodiment, after completing the above steps S01 and S02, Figure 3A As shown, the laser can be irradiated downward from the first surface S1 to the insulating substrate 11 to form a through hole H, and then, as shown in FIG. Figure 3B As shown, the conductive material 16 can be filled into the through hole H from the first surface S1, so that the functional chip 13 can be electrically connected to the second surface S2 via the sub-matrix circuit 121 and the conductive material 16. Here, the conductive material 16 is, for example but not limited to, a copper paste, a silver paste, a solder paste, or anisotropic conductive paste (ACP) and other materials that are cured. In addition, if the conductive material 16 is copper paste as an example, the copper paste filled in the through hole H can be partially exposed to the first surface S1 of the insulating substrate 11, so as to directly form an electrical connection pad 122 on the first surface S1 side of the insulating substrate 11, so that the functional chip 13 and the sub-matrix circuit 121 can be electrically connected to the second surface S2 via the electrical connection pad 122 and the conductive material 16 in the through hole H, as shown in FIG. Figure 3C As shown. Of course, the electrical connection pad 122 can also be formed on the conductive material 16 by, for example, a printing process, and is not limited. In addition, when the conductive material 16 (such as copper glue) is filled into the through hole H from the first surface S1, it can be partially located on the second surface S2, and the conductive material 16 exposed on the second surface S2 can also be surface treated to prevent the exposed conductive material 16 from being oxidized. In addition, if the insulating substrate 11 is a soft substrate, and the through hole H is formed from the first surface S1 and filled with the conductive material 16, the rigid substrate can be removed before the surface treatment of the conductive material 16, or the rigid substrate can be removed after the step S05 of setting the protective layer 14.

[0046] Please refer to Figure 4A , which is a schematic diagram of an electronic packaging unit 1a and a driving circuit board 2 in an embodiment of the present invention. The electronic device 3a may include an electronic packaging unit 1a and a driving circuit board 2. The electronic packaging unit 1a of this embodiment may be used with the driving circuit board 2. The electronic packaging unit 1a may include an insulating substrate 11, at least one sub-matrix circuit 121, at least one functional chip 13 and a protective layer 14. The insulating substrate 11 has a plurality of through holes H and a first surface S1 and a second surface S2 opposite to each other. The sub-matrix circuit 121 is disposed on the first surface S1 of the insulating substrate 11, and the sub-matrix circuit 121 may include at least one thin film transistor T. The functional chip 13 is disposed on the first surface S1, and the functional chip 13 is electrically connected to at least one driving chip 21 and a connecting circuit 22 of the driving circuit board 2 via the sub-matrix circuit 121 and the through holes H. The protective layer 14 is disposed on the first surface S1 of the insulating substrate 11 and covers the functional chip 13 and the sub-matrix circuit 121. In addition, other technical features of the electronic packaging unit 1a may refer to the above-mentioned electronic packaging unit 1, which will not be repeated here.

[0047] In some embodiments, the side length of the electronic packaging unit 1a may be greater than 50 microns. In some embodiments, the side length of the electronic packaging unit 1a may be between 400 microns and 600 microns. In some embodiments, the electronic packaging unit 1a may include a plurality of thin film transistors T. In some embodiments, the electronic packaging unit 1a may include a plurality of functional chips 13, that is, a packaging unit may include a plurality of functional chips 13 or a plurality of thin film transistors T. In addition, these sub-matrix circuits 121 electrically connected to these functional chips 13 may form a matrix circuit. In some embodiments, a plurality of sub-matrix circuits 121 of a plurality of electronic packaging units 1a may also be combined to form a matrix circuit. The matrix circuit is electrically connected to the driving circuit board 2 to drive these functional chips 13 in the matrix circuit of these electronic packaging units 1a via the driving circuit board 2. In addition, the driving circuit board 2 may be a flexible circuit board or a rigid circuit board, without limitation.

[0048] In this embodiment, the driving circuit board 2 faces the second surface S2 of the insulating substrate 11, and the functional chip 13 can be electrically connected to the driving circuit board 2 through the sub-matrix circuit 121, the through holes H, and the connection pads P, so that the driving circuit board 2 can drive the electronic packaging unit 1a. The through holes H can be filled with conductive materials 16 (such as copper glue, silver glue, solder paste or ACP materials), so that the driving circuit board 2 can be electrically connected to the functional chip 13 and the sub-matrix circuit 121 through the connection pads P and the conductive materials 16 in the through holes H. In some embodiments, the conductive material 16 can be attached to the driving circuit board 2 by, for example, surface mount technology (SMT) or anisotropic conductive paste (ACP). In some embodiments, the connection pads P can be formed by filling the through holes H with conductive materials 16 (such as copper glue) and exposing them on the second surface S2 of the insulating substrate 11 and curing them. In other words, the materials of the connection pads P and the conductive material 16 can be the same.

[0049] Please refer to Figure 4B , which is a top view schematic diagram of a plurality of electronic packaging units 1a electrically connected to a driving circuit board 2a according to an embodiment of the present invention. The electronic device 3b may include a plurality of electronic packaging units 1a and a driving circuit board 2a. The present embodiment The driving circuit board 2a may include at least one driving chip (two are shown here). The driving chips 21a, 21b), at least one connecting circuit 22 (a plurality of connecting circuits 22 are shown here) and a substrate 23. The substrate 23 can be a soft substrate or a hard substrate, and the driving chips 21a, 21b and the plurality of connecting circuits 22 can be arranged on the substrate 23 and face the second surface of the insulating substrate 11.

[0050] A plurality of electronic packaging units 1a are disposed at intervals on the driving circuit board 2a (they can be arranged in straight rows, horizontal rows, or a matrix of rows and columns, or arranged in a polygonal or irregular shape according to the needs of the client), and are electrically connected to the driving circuit board 2a respectively. The plurality of electronic packaging units 1a of the present embodiment are arranged in a matrix of rows and columns to form an active matrix (AM) electronic device, such as but not limited to an active matrix LED display, an active matrix microLED display, an active matrix sensor array, an active matrix antenna array, an active matrix laser array, an active matrix projection array, or an active matrix millimeter wave radar array.

[0051] In some embodiments, the connection circuit 22 may include a plurality of connection pads P and a plurality of wires L, and the connection pads P and the wires L of the connection circuit 22 may be connected in series to the sub-matrix circuit 121 of the electronic package unit 1a. The function chip 13 of each electronic package unit 1a may be electrically connected to the corresponding driver chips 21a and 21b of the driver circuit board 2a through the sub-matrix circuit 121, through holes, connection pads P and corresponding wires L (connection circuit 22), so that the driver circuit board 2a can drive these electronic package units 1a respectively, or receive the sensing data of these electronic package units 1a. In some embodiments, the driver chip 21a may include, for example but not limited to, a scan driver chip, and the driver chip 21b may include, for example but not limited to, a data driver chip, and the driver chips 21a and 21b may drive the corresponding electronic package unit 1a respectively through the correspondingly connected connection circuit 22. The connection circuit 22 of the driver circuit board 2a is taken as a two-dimensional dotted line as an example, and the multiple wires L of the connection circuit 22 are segments of two-dimensional dotted lines, that is, there are longitudinal and transverse ones, but they are not electrically connected to each other. After being connected by the electronic packaging unit 1a having the sub-matrix circuit 121, a matrix electronic device with greater design freedom in area and shape can be assembled. In other words, the manufacturer can design the required size of the driving circuit board 2a by himself, and then electrically connect the electronic packaging unit 1a to complete the electronic device. The technical features of the electronic packaging unit 1a and the driving circuit board 2a can refer to the same components mentioned above, and will not be repeated here.

[0052] Figure 5A and Figure 5B are respectively a circuit diagram and a layout diagram of an electronic packaging unit 1b according to another embodiment of the present invention, and Fig. 6A and Figure 6B They are Figure 5B A schematic cross-sectional view of the electronic packaging unit 1b along the straight line AA and the straight line BB. Figure 5A The circuit of the electronic packaging unit 1b is based on 2T1C as an example.

[0053] like Figure 5A and Figure 5B As shown, in this embodiment, the sub-matrix circuit 121b ( Fig. 6A ) includes two thin film transistors T1 and T2, at least one scan line SL, at least one data line DL and a capacitor C. The thin film transistors T1 and T2 are electrically connected to the scan line SL and the data line DL respectively. The functional chip 13 of this embodiment is, for example, a light emitting diode (LED, represented by a dotted box). The component connection relationship of the electronic packaging unit 1b can be referred to Figure 5A In addition, the second surface S2 of the insulating substrate 11 facing the electronic packaging unit 1b can be driven by a driving circuit board (not shown), and the functional chips 13 can be electrically connected to the driving circuit board via the sub-matrix circuit 121b and the through holes H, so that the driving circuit board can drive the electronic packaging unit 1b through the connection pads P.

[0054] exist Figure 5B In the through hole H, there is a connection pad P1 electrically connected to the data signal (data line DL), a connection pad P2 electrically connected to the scan signal (scan line SL), and a connection pad P3 electrically connected to the voltage (Vdd). It is particularly noted that in the above step of forming the through hole H, because drilling a hole on the insulating substrate 11 requires a certain area, and only drilling is performed on the insulating substrate 11, if the connection pad on the first surface S1 side is not damaged, conduction can be achieved through the conductive material after drilling; in addition, if the conductive material filled in the through hole H after drilling is copper glue, the copper glue filled in the through hole H can be exposed to the first surface S1 and the second surface S2 of the insulating substrate 11, so as to directly form a connection pad on both the first surface S1 side and the second surface S2 side of the insulating substrate 11 (for example Figure 5B In this case, the drilling area can be smaller than or equal to the area of ​​the connection pad on the first surface S1 side; and the size of the connection pad located on the second surface S2 side and formed of copper paste can be smaller than, equal to or larger than the size of the connection pad P on the first surface S1 side, without limitation.

[0055] like Figure 5B , Fig. 6A and Figure 6BAs shown, the scan signal can be electrically connected to the gate (metal layer 123) of the thin film transistor T1 through the connection pad (not shown) located on the second surface S2 side, the through hole H2 (and the connection pad P2), and the data signal can be electrically connected to the drain (or source) of the thin film transistor T1 through the connection pad (not shown) located on the second surface S2 side, the through hole H1 (and the connection pad P1), and the metal layer 123, and the voltage Vdd can be electrically connected to the metal layer 123 and the drain (or source) of the thin film transistor T2 through the connection pad (not shown) located on the second surface S2 side, the through hole H3 (and the connection pad P3), and another voltage Vss (for example, ground) can be electrically connected to the metal layer 123 and the electrode E1 of the functional chip 13 through the connection pad (not shown) located on the second surface S2 side and the through hole H4. In addition, other technical features of the electronic packaging unit 1b can refer to the above-mentioned electronic packaging unit 1 or 1a, which will not be described here.

[0056] Also, please refer to Figure 6C and Fig.6D As shown, they are Figure 5B Schematic diagrams of different embodiments of the cross-section of the electronic packaging unit along line BB.

[0057] exist Figure 6B In the embodiment, the sub-matrix circuit 121b electrically connected to the electrode E2 of the functional chip 13 is composed of an insulating layer 124, a metal layer 125 (the source or drain of the thin film transistor T2) and an electrical connection pad 122 in order from the first surface S1 of the insulating substrate 11 upwards. Figure 6C In the embodiment, the sub-matrix circuit of the electrode E2 electrically connected to the functional chip 13 is composed of the metal layer 123, the metal layer 125 (the source or drain of the thin film transistor T2) and the electrical connection pad 122 (the insulating layer 124 has a through hole, and the metal layer 125 is located in the through hole) from the first surface S1 of the insulating substrate 11 upward. Fig.6D In the figure, the sub-matrix circuit electrically connected to the electrode E2 of the functional chip 13 is composed of a metal layer 123 and an electrical connection pad 122 (the insulating layer 124 has a through hole, and the electrical connection pad 122 is located in the through hole) from the first surface S1 of the insulating substrate 11 upward, and the source or drain (metal layer 125) of the thin film transistor T2 is electrically connected to the electrical connection pad 122 and the electrode E2 of the functional chip 13 through the metal layer 123.

[0058] Figure 7 FIG. 1 is a schematic diagram of the layout of an electronic device 3 according to an embodiment of the present invention. Figure 7 As shown, in this embodiment, the electronic device 3 includes three electronic packaging units 1b (indicated by rectangular dashed lines) arranged side by side and electrically connected, and a driving circuit board (not shown, but may be, for example, Figure 4BTake the driving circuit board 2a of the insulating substrate 11a as an example, wherein the driving circuit board can face the second surface of the insulating substrate 11a, and the functional chips 13 can be electrically connected to the driving circuit board through the sub-matrix circuits and the conductive materials in the through holes, respectively, so that the driving circuit board can drive the electronic packaging units 1b. The driving circuit board may include all the technical features of the above-mentioned driving circuit boards 2 and 2a, and the technical contents of the driving circuit boards 2 and 2a and the electronic packaging unit 1b have been described in detail above, and will not be further described here.

[0059] In some embodiments, the three electronic packaging units 1b of the electronic device 3 can be three sub-pixels, and the three functional chips 13 in the three sub-pixels can be red, blue and green LEDs respectively to form a full-color pixel unit, thereby forming a full-color LED display, and the electronic packaging units 1b can be driven by the driving circuit board to display images. Of course, in different embodiments, less than or greater than three electronic packaging units 1b can be combined into one electronic device, and the present invention is not limited. Since each electronic packaging device unit 1b has a sub-matrix circuit, the combination of multiple sub-matrix circuits can drive the circuit board to form an active matrix circuit of any size and a corresponding functional chip matrix, thereby controlling the functional chip or receiving a signal from the functional chip.

[0060] As mentioned above, the electronic packaging unit of the present invention can be spliced ​​into a desired size according to the product application requirements of the electronic device, and the application flexibility is quite large. In addition, in the known electronic devices, the method of driving using the lead frame is passive matrix (PM), so that the amount of driver IC is relatively large, but the electronic device composed of multiple electronic packaging units in the present invention can be an active matrix electronic device. Under the same resolution, the amount of driver IC can be less and the cost can be lower. In some embodiments, if the electronic device is an LED or microLED backlight source, the function of local dimming can also be achieved.

[0061] In addition, in the conventional method of driving optoelectronic elements with thin film transistors, for example, when driving organic light emitting diodes (OLEDs) with thin film transistors on thin film transistor substrates, it is necessary to design for the size or function of each product and use expensive thin film transistor processes, masks, substrates and materials, which is very unfavorable for the changing and diverse product requirements. However, the present invention divides the matrix circuit into multiple sub-matrix circuits and packages them together with the functional chip, so that the same thin film transistor substrate (electronic packaging unit) can be shared by many products, thereby solving the above problems. At the same time, when implementing displays with the same pixel area but different resolutions, the electronic packaging units of the present invention can be combined arbitrarily. Compared with displays directly formed with large substrates, the present invention can save the number of mask sets and reduce costs. In addition, the total area of ​​the required thin film transistor substrate (i.e., the total area of ​​the sub-matrix circuit substrate) is much smaller than that of the conventional TFT matrix substrate area, which can further reduce the cost of electronic devices. Therefore, when the present invention is used in the manufacture of large-sized electronic devices, the large-sized substrate can have a better area utilization rate, and various sizes can be formed through different application combinations, which can make good use of the cutting of the thin film transistor substrate and save manufacturing costs.

[0062] In summary, in the electronic device and the manufacturing method thereof of the present invention, by packaging together a plurality of sub-matrix circuits and functional chips on an insulating substrate, and by using a conductive material to electrically connect the functional chip to the second surface of the insulating substrate via these sub-matrix circuits and the conductive material, the purpose of using the same thin film transistor substrate (electronic packaging unit) to share in many different electronic devices can be achieved. Therefore, the present invention does not need to design a thin film process for each product size or function of an electronic device. In addition to saving the cost of expensive thin film transistor processes / masks / substrates / materials and making the cost lower, it is more flexible in application and can be applied to a variety of product requirements.

[0063] The above description is for illustrative purposes only and is not intended to be limiting. Any equivalent modifications or changes made thereto without departing from the spirit and scope of the present invention shall be included in the scope of the appended claims.

Claims

1. A method for manufacturing an electronic device, comprising: Providing an insulating substrate, wherein the insulating substrate has a first surface and a second surface opposite to each other; forming a plurality of sub-matrix circuits on the insulating substrate, each of the sub-matrix circuits comprising at least one thin film transistor; Disposing at least one functional chip on the first surface of the insulating substrate, wherein the functional chip is electrically connected to the sub-matrix circuit; Forming a plurality of through holes in the insulating substrate and disposing at least one conductive material in the plurality of through holes, so that the functional chip is electrically connected to the second surface via the sub-matrix circuit and the conductive material; Disposing a protective layer on the first surface of the insulating substrate and covering the functional chip; Cutting the insulating substrate and the protective layer to form a plurality of electronic packaging units; as well as The conductive materials of the multiple electronic packaging units are electrically connected to a driving circuit board, wherein the driving circuit board includes at least one connecting circuit, the connecting circuit includes a plurality of conductive wires, the multiple electronic packaging units are spaced apart on the driving circuit board, the plurality of conductive wires are electrically connected to the sub-matrix circuits of the multiple electronic packaging units, the driving circuit board faces the second surface of the insulating substrate, and the functional chip is electrically connected to the driving circuit board via the sub-matrix circuit and the conductive material in the through hole. 2 . The manufacturing method according to claim 1 , wherein in the step of forming the through hole, the insulating substrate is irradiated with laser light to form the through hole in the insulating substrate. 3 . The manufacturing method according to claim 1 , wherein the conductive material is provided by performing surface treatment on the through hole through the second surface to form a conductive layer in the through hole. 4 . The manufacturing method according to claim 1 , wherein each of the sub-matrix circuits further comprises at least one scan line and at least one data line, and the thin film transistor is electrically connected to the scan line and the data line. 5 . The manufacturing method according to claim 1 , wherein the functional chip comprises an optoelectronic chip, a thermoelectric chip, a piezoelectric chip, or a sensor chip. The manufacturing method according to claim 1 , wherein the driving circuit board comprises at least one driving chip. 7 . The manufacturing method according to claim 6 , wherein the conductive material is attached to the driving circuit board by using surface mounting technology or anisotropic conductive paste to be electrically connected to the driving circuit board. 8 . The manufacturing method according to claim 1 , wherein the insulating substrate is made of glass, resin, or ceramic.

9. An electronic device comprising: A driving circuit board, comprising at least one connecting circuit, wherein the connecting circuit comprises a plurality of conducting wires; as well as A plurality of electronic packaging units are arranged at intervals on the driving circuit board, each of the electronic packaging units comprising: An insulating substrate having a plurality of through holes and a first surface and a second surface opposite to each other; A sub-matrix circuit is disposed on the insulating substrate, wherein the sub-matrix circuit includes at least one thin film transistor; at least one functional chip, disposed on the first surface, the functional chip being electrically connected to the driving circuit board via the sub-matrix circuit and the through hole; and A protective layer, disposed on the first surface of the insulating substrate and covering the functional chip; The plurality of wires are electrically connected to the sub-matrix circuits of the plurality of electronic packaging units, the driving circuit board faces the second surface of the insulating substrate, and the functional chip is electrically connected to the driving circuit board via the sub-matrix circuit and the conductive material in the through hole. 10 . The electronic device as claimed in claim 9 , wherein the thickness of the insulating substrate is less than 50 micrometers, and the thickness of the thin film transistor is less than 20 micrometers. 11 . The electronic device as claimed in claim 9 , wherein the insulating substrate is made of glass, resin, or ceramic.

12. The electronic device as claimed in claim 9, wherein the sub-matrix circuit further comprises at least one scan line and at least one data line, and the thin film transistor is electrically connected to the scan line and the data line.

13. The electronic device as claimed in claim 9, comprising a plurality of functional chips, wherein: The plurality of sub-matrix circuits electrically connected to the plurality of functional chips form a matrix circuit.

14. The electronic device as claimed in claim 9, wherein a plurality of the sub-matrix circuits of the plurality of electronic packaging units are combined to form a matrix circuit. 15 . The electronic device as claimed in claim 13 , wherein the connection circuit further comprises a plurality of connection pads, and the plurality of connection pads and the plurality of conductive lines are connected in series to a plurality of the sub-matrix circuits. 16 . The electronic device as claimed in claim 15 , wherein the driving circuit board further comprises at least one driving chip, and the driving chip is electrically connected to the sub-matrix circuit of the electronic packaging unit via the connecting circuit.

17. The electronic device as claimed in claim 9, wherein the functional chip comprises an optoelectronic chip, a thermoelectric chip, a piezoelectric chip, or a sensor chip.

18. The electronic device as claimed in claim 9, wherein a side length of one of the plurality of electronic packaging units is greater than 50 microns.

19. An electronic device comprising: A plurality of electronic packaging units, each of the electronic packaging units comprising: An insulating substrate having a plurality of through holes and a first surface and a second surface opposite to each other, at least one sub-matrix circuit, disposed on the insulating substrate, the sub-matrix circuit comprising at least one thin film transistor; at least one functional chip disposed on the first surface of the insulating substrate; and A protective layer, disposed on the first surface of the insulating substrate and covering the functional chip; as well as The driving circuit board comprises at least one connecting circuit, wherein the connecting circuit comprises a plurality of conducting wires, wherein the plurality of electronic packaging units are arranged at intervals on the driving circuit board, wherein the plurality of conducting wires are electrically connected to the sub-matrix circuits of the plurality of electronic packaging units, wherein the driving circuit board faces the second surface of the insulating substrate, and the functional chip is electrically connected to the driving circuit board via the sub-matrix circuit and the through hole.

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