A ladder driving circuit

Abstract

The present invention provides a step driving circuit, comprising: a p-type pull-up driving tube, an n-type pull-down driving tube, a driving resistor, a gate voltage detection circuit and a p-type accelerating driving tube. The switching speed requirements of the power tube are met, the EMI characteristics of the switching power supply are improved, when the gate voltage exceeds the Miller platform voltage, the driving resistor is bypassed through the switch, and the fast driving stage is entered. The step driving circuit of the present invention is driven in two stages, and provides a reasonable driving current through the driving resistor near the Miller platform so that the opening speed of the power tube is moderate, the driving delay and the conduction loss are reduced; the rapid opening of the power tube does not generate a radiation interference source; and the common phenomenon caused by the failure to turn off the p-type accelerating driving tube in time due to the delay of the gate voltage detection circuit is effectively avoided, thereby avoiding the driving loss.

Description

Technical Field

[0001] The invention belongs to a power MOS tube driving circuit, and in particular relates to a step driving circuit of a low-threshold MOS tube. Background Art

[0002] like Figure 1 As shown, it is the basic architecture of the MOS driving circuit in the prior art. The p-type channel MOS transistor PG1 is a pull-up driving MOS transistor of the output stage of the driving circuit. When the power MOS transistor NMO is turned on, sufficient current is provided to increase the gate voltage of the power transistor. The n-type channel MOS transistor NMG is a pull-down driving MOS transistor of the output stage of the driving circuit. When the power MOS transistor NMO is turned off, a sufficiently large current is extracted from the gate of the power transistor to reduce the gate voltage below the threshold voltage. The gate control signals of the MOS transistor PG1 and the MOS transistor NMG are the signal TPSW and the signal TNSW respectively. In order to improve the driving efficiency and avoid the MOS transistor PG1 and the MOS transistor NMG being turned on at the same time, when the power transistor is turned on, the signal TNSW is first changed to a low voltage to turn off the MOS transistor NMG, and then the signal TPSW is changed to a low voltage to turn on the MOS transistor PG1. When the power transistor is turned off, the signal TPSW is first changed to a high voltage to turn off the MOS transistor PG1, and then the signal TNSW is changed to a high voltage to turn on the MOS transistor NMG. In a switching power supply, the switching speed of the power tube cannot be too fast, otherwise it will generate large dv / dt and di / dt, and generate large electromagnetic interference, affecting the normal operation of equipment near the switching power supply. Figure 1 In the figure, a driving resistor RG is connected in series between the MOS tube PG1 and the driving output port GATE to limit the opening speed of the power tube. Under the action of the signal TNSW and the signal TPSW, the gate voltage waveform when the power tube is turned on is as follows: Figure 2 shown.

[0003] At time t1, the signal TNSW first becomes a low voltage, and the MOS tube NMG is turned off;

[0004] At time t2, the signal TPSW becomes a low voltage, and the MOS tube PG1 is turned on;

[0005] During the period from t2 to t3, the turned-on MOS tube PG1 charges the gate of the power MOS tube through the driving resistor RG, causing its voltage to gradually rise.

[0006] During the period of t3 to t4, the drain voltage of the power tube begins to drop. Due to the effect of the capacitor Cgd from the gate to the drain of the power tube, a discharge current is generated. This current is exactly equal to the current passing through the driving resistor RG, which is approximately (VDD-Vmiller) / RG. Therefore, at this time, the gate voltage of the power tube is maintained at the platform voltage Vmiller. This effect is called the Miller effect, and the corresponding platform voltage is called the Miller platform. The time width of the Miller platform is the time size of the change of the drain voltage of the power tube. The smaller the Miller platform, the faster the switching speed of the power tube. Conversely, the larger the Miller platform, the slower the switching speed of the power tube.

[0007] At time t4, the drain voltage of the power tube drops to close to the minimum voltage. From this point on, the capacitor Cgd no longer passes current, so the startup current provided by the driving resistor RG to the gate is not offset by the current of the capacitor Cgd, and the gate voltage rises again to make the power tube more fully turned on;

[0008] At time t5, the gate voltage reaches the maximum voltage, which is the maximum voltage VDD that the drive circuit can provide;

[0009] At time t6, the signal TPSW first changes to a high level, turning off the MOS tube PG1;

[0010] At time t7, the signal TNSW changes to a high level, and the MOS tube NMG draws current from the gate and starts the shutdown process.

[0011] With the development of semiconductor technology, BCD technology is becoming more and more mature. The technology can provide various voltage-resistant LDMOS devices, and the power tube and controller circuit can be designed on the same chip. The threshold voltage of this device is generally small, usually between 0.7V and 1.5V, because this is conducive to designing the power supply voltage of the controller chip to be relatively low and the power consumption is small. Because of the advantage of low threshold voltage of power tube, VDMOS single-tube devices with a withstand voltage value of less than 200V are gradually developing in the direction of low threshold voltage, but new problems will be encountered in the driving circuit of low-threshold power MOS tubes. For example, it is difficult to compromise between switching speed and turn-on delay time in the selection of driving resistors. From the above analysis, it can be seen that in the Miller platform time period t3~t4, the current through the driving resistor RG is approximately:

[0012]

[0013] For low-threshold power tubes, the Miller platform voltage Vmiller is small. In order to reduce the switching speed, that is, to increase the time width of the Miller platform, the low-threshold power tube needs to select a larger driving resistor than the high-threshold power tube. However, this also causes the gate voltage of the power tube MOS tube to rise to the maximum driving voltage. It takes more time, such as Figure 2 The time period of t4 to t5 is relatively long. When the duty ratio of the switching power supply is relatively small, the power tube will be turned off between t4 and t5. That is, when the power tube is not fully turned on, the power tube is required to be turned off again, resulting in the following situation: Figure 3 The driving waveform shown will result in greater losses. Summary of the invention

[0014] In view of this, the present invention proposes a step driving circuit to solve the technical problem that the driving resistance of the existing driving circuit is difficult to simultaneously meet the requirements for the switching speed of the power tube and the requirement for a small driving delay, that is, the power tube cannot be fully driven.

[0015] In order to have a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. This summary is not intended to be a general review, nor is it intended to identify key / important components or to delineate the scope of protection of these embodiments. Its only purpose is to present some concepts in a simple form as a preface to the detailed description that follows.

[0016] The present invention adopts the following technical solution:

[0017] In some optional embodiments, a step driving circuit is provided, comprising: a p-type pull-up driving tube, an n-type pull-down driving tube, a driving resistor, a gate voltage detection circuit and a p-type accelerating driving tube;

[0018] The source of the p-type pull-up driving tube is connected to the positive power port of the gate voltage detection circuit;

[0019] The drain of the p-type pull-up driving tube is connected to the source of the p-type acceleration driving tube and the first port of the driving resistor;

[0020] The second port of the driving resistor is connected to the drain of the p-type acceleration driving tube, the drain of the n-type pull-down driving tube, and the detection signal input port of the gate voltage detection circuit;

[0021] The output controller port of the gate voltage detection circuit is connected to the gate of the p-type acceleration drive tube;

[0022] The gates of the p-type pull-up driving tube and the n-type pull-down driving tube receive controller signals respectively.

[0023] In some optional embodiments, the step drive circuit further includes: a power input positive port, an output port and an input power negative port; the source of the p-type pull-up drive tube and the power positive port of the gate voltage detection circuit are both connected to the power input positive port; the second port of the drive resistor is connected to the output port; the power negative port of the gate voltage detection circuit and the source of the n-type pull-down drive tube are both connected to the input power negative port.

[0024] In some optional embodiments, the gate voltage detection circuit includes: a bias MOS tube, a detection MOS tube and a bias resistor; the source of the bias MOS tube serves as the negative power supply port of the gate voltage detection circuit; the gate and drain of the bias MOS tube are connected to the source of the detection MOS tube; the gate of the detection MOS tube serves as the detection signal input port of the gate voltage detection circuit; the drain of the detection MOS tube is connected to the second port of the bias resistor and serves as the output controller port of the gate voltage detection circuit; the first port of the bias resistor serves as the positive power supply port of the gate voltage detection circuit.

[0025] In some optional embodiments, the gate voltage detection circuit is a Schmitt trigger; the input end of the Schmitt trigger serves as the detection signal input port of the gate voltage detection circuit; the output end of the Schmitt trigger serves as the output controller port of the gate voltage detection circuit; the positive threshold voltage input port of the Schmitt trigger serves as the positive power supply port of the gate voltage detection circuit; and the negative threshold voltage input port of the Schmitt trigger serves as the negative power supply port of the gate voltage detection circuit.

[0026] The beneficial effects brought by the present invention are as follows: by detecting the gate driving voltage of the power tube, when the gate voltage is below the Miller platform voltage, the driving current is provided to the power tube through the driving resistor, thereby meeting the switching speed requirement of the power tube and improving the EMI characteristics of the switching power supply; when the gate voltage exceeds the Miller platform voltage, the driving resistor is bypassed through the switch to enter the fast driving stage; the step driving circuit of the present invention is divided into two stages and provides a reasonable driving current through the driving resistor near the Miller platform so that the opening speed of the power tube is moderate and has better EMI characteristics; after exceeding the Miller platform, the driving voltage rises rapidly so that the power tube is turned on quickly, reducing the driving delay and the conduction loss; since the drain voltage of the power tube has dropped to a low voltage after exceeding the Miller platform, the rapid opening of the power tube will not generate a radiation interference source; at the same time, the driving current of the p-type acceleration driving tube comes from the p-type pull-up driving tube and is controlled by the p-type pull-up driving tube, so that the common phenomenon caused by the failure to turn off the p-type acceleration driving tube in time due to the delay of the gate voltage detection circuit can be effectively avoided, thereby avoiding the driving loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a basic driving circuit schematic diagram of a power MOS tube in the prior art;

[0028] Figure 2 It is the driving voltage waveform of the power MOS tube driving circuit under the timing effect in the prior art;

[0029] Figure 3 The existing driving circuit has abnormal driving waveform in the application of low threshold MOS tube;

[0030] Figure 4 is a circuit schematic diagram of a ladder driving circuit of the present invention;

[0031] Figure 5 The invention is a step driving circuit including a gate voltage detection circuit specifically implementing the circuit diagram;

[0032] Figure 6 The present invention is a circuit diagram of an implementation of a Schmitt trigger as a gate voltage detection circuit;

[0033] Figure 7 Graph 1 is the driving waveform of the step driving circuit of the present invention. DETAILED DESCRIPTION

[0034] The following description and accompanying drawings fully demonstrate specific embodiments of the present invention so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent possible variations only. Unless clearly required, separate components and functions are optional, and the order of operation may vary. The parts and features of some embodiments may be included in or replace the parts and features of other embodiments.

[0035] like Figures 4 to 7 As shown, in some illustrative embodiments, a step driving circuit is provided, including: a p-type pull-up driving tube PG1, an n-type pull-down driving tube NMG, a driving resistor RG, a gate voltage detection circuit and a p-type accelerating driving tube PG2.

[0036] The gate voltage detection circuit includes four ports: an output controller port 101 , a positive power port 102 , a negative power port 103 , and a detection signal input port 104 .

[0037] The ladder driving circuit of the present invention further comprises: a power input positive port VDD, an output port GATE and an input power negative port GND.

[0038] The gates of the p-type pull-up driving tube PG1 and the n-type pull-down driving tube NMG are connected to the controller signal TPSW and the signal TNSW respectively; the source of the p-type pull-up driving tube PG1 is connected to the positive power supply port 102 of the gate voltage detection circuit, and the source of the p-type pull-up driving tube PG1 and the positive power supply port 102 of the gate voltage detection circuit are both connected to the positive power input port VDD; the drain of the p-type pull-up driving tube PG1 is connected to the source of the p-type acceleration driving tube PG2 and the first port of the driving resistor RG; the second port of the driving resistor RG is connected to the drain of the p-type acceleration driving tube PG2. The gate of the p-type acceleration driving tube PG2 is connected to the drain of the n-type pull-down driving tube NMG, and the detection signal input port 104 of the gate voltage detection circuit, and the second port of the driving resistor RG, the drain of the p-type acceleration driving tube PG2, the drain of the n-type pull-down driving tube NMG, and the detection signal input port 104 of the gate voltage detection circuit are all connected to the output port GATE; the negative power supply port 103 of the gate detection circuit and the source of the n-type pull-down driving tube NMG are both connected to the negative input power supply port GND; the output controller port 101 of the gate detection circuit is connected to the gate of the p-type acceleration driving tube PG2.

[0039] The working principle of the step driving circuit of the present invention is as follows:

[0040] The pull-up driving process of the step driving circuit: the control signal TNSW of the n-type pull-down power tube NMG first becomes a low-level voltage to make it in the cut-off state, and the p-type pull-up driving tube PG1 also becomes a low-level voltage immediately afterwards to make it conductive, and the first port of the driving resistor RG becomes a high-level voltage, providing a driving current for the output port GATE of the step driving circuit, and the voltage of the output port GATE begins to rise. At this time, the gate voltage detection circuit detects the size of the step driving voltage. When the output port voltage of the step driving circuit is less than the set value, the output controller port 101 of the gate voltage detection circuit is a high-level voltage, making the p-type acceleration driving tube PG2 in the cut-off state; when the output port GATE voltage of the step driving circuit is greater than the set value, the output controller port 101 of the gate voltage detection circuit outputs a low-level voltage, making the p-type acceleration driving tube PG2 in the conductive state, then the driving resistor RG is bypassed by the p-type acceleration driving tube PG2, and the driving current directly passes through the p-type acceleration driving tube PG2 instead of the driving resistor RG, providing a larger driving current for the output port GATE of the step driving circuit, and the port driving voltage rises rapidly to the maximum value.

[0041] Pull-down driving process of the step driving circuit: the control signal TPSW of the p-type pull-up power tube PG1 first becomes a high-level voltage to make it in the off state, and the n-type pull-down driving tube NMG also becomes a high-level voltage immediately afterwards to make it conductive. Since the driving current of the p-type acceleration driving tube PG2 comes from the current provided by the p-type pull-up power tube PG1, after the p-type pull-up driving tube PG1 is turned off, no matter whether the p-type acceleration driving tube PG2 is in the on state or in the off state, it can no longer provide driving current, so that the current common phenomenon will not be caused after the n-type pull-down driving tube NMG is turned on, and the output voltage of the step driving circuit gradually decreases. When the voltage drops to the set value again, the output voltage of the gate voltage detection circuit returns to the high-level voltage, and the p-type acceleration driving tube PG2 returns to the off state.

[0042] The step driving circuit of the present invention has the function of detecting the gate driving voltage of the power tube. When the gate voltage is below the Miller platform voltage, the power tube provides driving current to the power tube through the driving resistor, thereby meeting the switching speed requirement of the power tube and improving the EMI characteristics of the switching power supply; when the gate voltage exceeds the Miller platform voltage, the driving resistor is bypassed through the switch, and the fast driving stage is entered. This two-step driving can solve the problems encountered by the existing driving circuit in driving the low-threshold power MOS tube.

[0043] The gate voltage detection circuit includes: a bias MOS tube NM2, a detection MOS tube NM3 and a bias resistor Rd.

[0044] The source of the bias MOS tube NM2 is used as the negative power supply port 103 of the gate voltage detection circuit; the gate and drain of the bias MOS tube NM2 are connected to the source of the detection MOS tube NM3; the gate of the detection MOS tube NM3 is used as the detection signal input port 104 of the gate voltage detection circuit; the drain of the detection MOS tube NM3 is connected to the second port of the bias resistor Rd and serves as the output controller port 101 of the gate voltage detection circuit; the first port of the bias resistor Rd is used as the positive power supply port 102 of the gate voltage detection circuit. The working principle of the gate voltage detection circuit is: when the input voltage of the detection signal input port 104 is greater than the sum of the gate-source voltages of the detection MOS tube NM3 and the bias MOS tube NM2, the drain voltage of the detection MOS tube NM3, that is, the voltage of the output controller port 101, begins to decrease, and as the input detection voltage increases, the output controller port 101 eventually outputs a low voltage; on the contrary, when the input detection voltage decreases from a high level voltage to a low level voltage until its voltage is less than the sum of the gate-source voltages of the detection MOS tube NM3 and the bias MOS tube NM2, the voltage of the output controller port 101 begins to rise and eventually reaches the maximum power supply voltage VDD. A Schmitt trigger can also be simply used as a gate voltage detection circuit, such as Figure 6The input end of the Schmitt trigger is used as the detection signal input port of the gate voltage detection circuit; the output end of the Schmitt trigger is used as the output controller port of the gate voltage detection circuit; the positive threshold voltage input port of the Schmitt trigger is used as the positive power port of the gate voltage detection circuit; and the negative threshold voltage input port of the Schmitt trigger is used as the negative power port of the gate voltage detection circuit.

[0045] like Figure 7 As shown, it is the driving waveform of the present invention. In the rising stage t4-t5 after the driving voltage is greater than the Miller platform, the dynamics of the driving tube are accelerated at time t45, and the driving tube is quickly turned on to avoid Figure 3 The phenomenon in which the driving voltage begins to drop and shuts down before reaching the maximum value.

[0046] Those skilled in the art will also appreciate that the various illustrative logic blocks, modules, circuits, and algorithmic steps described in conjunction with the embodiments herein can all be implemented as electronic hardware, computer software, or a combination thereof. In order to clearly illustrate the interchangeability between hardware and software, various illustrative components, blocks, modules, circuits, and steps are generally described above around their functions. Whether such functions are implemented as hardware or software depends on specific applications and the design constraints imposed on the entire system. A skilled person can implement the described functions in an alternative manner for each specific application, but such implementation decisions should not be interpreted as departing from the scope of protection of the present disclosure.

Claims

1. A step driving circuit, characterized in that: include: A p-type pull-up drive tube, an n-type pull-down drive tube, a drive resistor, a gate voltage detection circuit and a p-type acceleration drive tube, and also includes: a power input positive port, an output port and an input power negative port; The source of the p-type pull-up driving tube is respectively connected to the positive power port and the positive power input port of the gate voltage detection circuit; The drain of the p-type pull-up driving tube is connected to the source of the p-type acceleration driving tube and the first port of the driving resistor; The second port of the driving resistor is respectively connected to the drain of the p-type acceleration driving tube, the drain of the n-type pull-down driving tube, the detection signal input port of the gate voltage detection circuit, and the output port; The source of the n-type pull-down driving tube and the negative power port of the gate voltage detection circuit are connected to the negative power port of the input power supply; The output controller port of the gate voltage detection circuit is connected to the gate of the p-type acceleration drive tube; The gates of the p-type pull-up driving tube and the n-type pull-down driving tube receive controller signals respectively.

2. A step driving circuit according to claim 1, characterized in that: The gate voltage detection circuit comprises: a bias MOS tube, a detection MOS tube and a bias resistor; The source of the bias MOS tube serves as the negative power port of the gate voltage detection circuit; The gate and drain of the bias MOS tube are connected to the source of the detection MOS tube; The gate of the detection MOS tube serves as a detection signal input port of the gate voltage detection circuit; The drain of the detection MOS tube is connected to the second port of the bias resistor and serves as the output controller port of the gate voltage detection circuit; The first port of the bias resistor serves as a positive power port of the gate voltage detection circuit.

3. A step driving circuit according to claim 1, characterized in that: The gate voltage detection circuit is a Schmitt trigger; the input end of the Schmitt trigger serves as the detection signal input port of the gate voltage detection circuit; the output end of the Schmitt trigger serves as the output controller port of the gate voltage detection circuit; the positive threshold voltage input port of the Schmitt trigger serves as the positive power supply port of the gate voltage detection circuit; and the negative threshold voltage input port of the Schmitt trigger serves as the negative power supply port of the gate voltage detection circuit.

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