Electronic devices and circuits

Abstract

The present disclosure relates to circuits and electronic devices. The present invention discloses an electronic device and a circuit. The electronic device may include a channel layer and a barrier layer covering the channel layer. In one embodiment, the electronic device may include a component arranged along a current path between a gate terminal and a gate electrode of a first transistor. In another embodiment, the electronic device may include a second transistor, wherein a source electrode and a gate electrode of the second transistor are coupled to the gate electrode of the first transistor, and a drain electrode of the second transistor is coupled to the gate terminal. The circuit may include a transistor and a diode. The transistor may include a drain, a gate, and a source, wherein the drain is coupled to the drain terminal, and the source is coupled to the source terminal. The diode may have an anode coupled to the gate terminal and a cathode coupled to the gate of the transistor.

Description

Technical Field

[0001] The present disclosure relates to circuits and electronic devices, and more particularly, to circuits and electronic devices including enhancement mode transistors. Background Art

[0002] The high electron mobility transistor may include an enhancement transistor. One type of such transistor may include a p-type GaN gate electrode. A high electron mobility transistor with a p-type GaN gate electrode may have a threshold voltage of about 1.5V. In an attempt to increase the threshold voltage, a component may be added between the gate terminal and the p-type GaN gate electrode. The component may include a Schottky diode between a metal gate interconnect and a p-type GaN gate electrode, wherein the metal gate interconnect is coupled to the cathode of the Schottky diode and the p-type GaN gate electrode is coupled to the anode of the Schottky diode. In another structure, an n-type GaN layer may be disposed between a metal gate interconnect and a p-type GaN gate electrode. A pn ​​junction diode is formed at an interface between the n-type GaN layer and the p-type GaN gate electrode. In another structure, a dielectric layer may be disposed between a p-type GaN gate electrode and an interconnect connected to a source electrode of the transistor. Such attempts to increase the threshold voltage may result in the threshold voltage being too high, the threshold may become unstable and may shift over time, or may impair control of the transistor. It is desirable to further improve the enhancement high electron mobility transistor without the aforementioned adverse complications. Summary of the invention

[0003] The problem to be solved by the present invention relates to increasing the voltage of a transistor required to turn on the transistor while maintaining substantially the same or lower on-state resistance and gate current of the transistor.

[0004] According to one aspect of the present invention, an electronic device is provided. The electronic device may include: a channel layer, the channel layer covering a substrate; a barrier layer, the barrier layer covering the channel layer; a gate electrode of a first transistor, the gate electrode covering the channel layer, wherein the first transistor is an enhancement mode transistor; a gate terminal; and a first component having a threshold voltage, wherein the first component is arranged along a current path between the gate terminal and the gate electrode.

[0005] In one embodiment, the first component may be a first diode having an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate electrode.

[0006] In a specific embodiment, the electronic device may further include a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode, and the cathode of the second diode is coupled to the anode of the first diode.

[0007] In a more specific embodiment, the threshold voltage of the second diode can be less than the threshold voltage of the first transistor.

[0008] In another specific embodiment, the electronic device can further include a second transistor having a source electrode, a gate electrode, and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode, and the drain electrode of the second transistor is coupled to the anode of the first diode.

[0009] In a further embodiment, the electronic device can further include a second component. The channel layer can include GaN, and the blocking layer includes Al x Ga (1-x) GaN, where 0 < x ≤ 0.4, the first transistor can be an enhancement-mode high electron mobility transistor, and the gate electrode can include a p-type semiconductor material. The second component can be a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode, and the cathode of the second diode is coupled to the anode of the first diode, or a second transistor that is a depletion-mode high electron mobility transistor having a source electrode, a gate electrode, and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode, and the drain electrode of the second transistor is coupled to the anode of the first diode. The threshold voltage of the second component can be less than the threshold voltage of the first transistor, and the first transistor, as well as the first and second components, can be located on the same die.

[0010] In another aspect, an electronic device is provided. The electronic device can include: a channel layer that covers a substrate; a blocking layer that covers the channel layer; a gate electrode of a first transistor that covers the channel layer; a gate terminal; and a second transistor having a source electrode, a gate electrode, and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the gate electrode of the first transistor, and the drain electrode of the second transistor is coupled to the gate terminal.

[0011] In one embodiment, the first transistor is an enhancement-mode transistor, and the second transistor is a depletion-mode transistor.

[0012] In a further aspect, a circuit is provided. The circuit can include: a drain terminal, a gate terminal, and a source terminal; a first transistor that is an enhancement-mode transistor including a drain, a gate, and a source, wherein the drain is coupled to the drain terminal, and the source is coupled to the source terminal; and a first diode having an anode and a cathode, wherein the anode is coupled to the gate terminal, and the cathode is coupled to the gate of the first transistor.

[0013] In one embodiment, the circuit may further include a component, wherein the component is a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode and the cathode of the second diode is coupled to the anode of the first diode, or a second transistor having a source, a gate, and a drain, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode and the drain electrode of the second transistor is coupled to the anode of the first diode, wherein the first transistor is an enhancement mode high electron mobility transistor.

[0014] The technical effect achieved by the present invention is to realize an electronic device and a circuit having a first component coupled between a gate terminal and a gate of a transistor. The first component can help increase the voltage required to be applied at the gate terminal to turn on the transistor. In a specific embodiment, a second component can be coupled to a terminal of the first component, wherein the second component can help to more quickly dissipate the charge that may otherwise accumulate between the first component and the gate electrode of the transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The embodiments are shown by way of example in the drawings and are not limited thereto.

[0016] Figure 1 A schematic diagram of a circuit including a transistor and a diode according to one embodiment is included.

[0017] Figure 2 A schematic diagram of a circuit including a transistor and back-to-back diodes according to another embodiment is included.

[0018] Figure 3 Included are schematic diagrams of circuits including a transistor and a combination of a diode and another transistor connected in parallel according to further embodiments.

[0019] Figure 4 A schematic diagram of a circuit including a transistor and a group of diodes connected in series and another diode connected in parallel with the group of diodes is included according to yet another embodiment.

[0020] Figure 5 An illustration of a cross-sectional view of a portion of a workpiece including a substrate and several layers after patterning a gate electrode layer is included.

[0021] Figure 6 Included is an illustration of a top view after patterning the gate electrode layer, such as Figure 5 shown.

[0022] Figure 7 After forming a source electrode, a drain electrode and a set of interconnects Figure 6 Illustration of a cross-sectional view of a workpiece.

[0023] Figure 8 An illustration of a top view of the workpiece after forming source and drain electrodes and a set of interconnects, as shown Figure 7 shown.

[0024] Fig. 9 Including after forming another level of interconnect Figure 7 Illustration of a cross-sectional view of a workpiece.

[0025] Fig.10 include Fig. 9 an illustration of a cross-sectional view of another portion of a workpiece, wherein such other portion includes Figure 2 One of the diodes shown.

[0026] Fig.11 include Fig.10 An illustration of a cross-sectional view of another portion of a workpiece, wherein such other portion includes a transistor connected in parallel with a diode, such as Figure 3 shown.

[0027] Fig.12 Including comparison circuit and Figure 2 A graph of the drain current and gate current as a function of the gate voltage for a circuit.

[0028] Fig.13 include Figure 2 A graph of the drain current as a function of the drain voltage of a circuit.

[0029] The skilled person will appreciate that the elements in the drawings are illustrated for simplicity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to help improve understanding of the embodiments of the present invention. DETAILED DESCRIPTION

[0030] The following description in conjunction with the accompanying drawings is provided to help understand the teachings disclosed herein. The following discussion will focus on the specific implementation and implementation of the teachings. This emphasis is provided to help describe the teachings and should not be interpreted as a limitation on the scope or applicability of the teachings. However, other implementations may be adopted based on the teachings as disclosed in this application.

[0031] III-V material is intended to mean a material comprising at least one Group 13 element and at least one Group 15 element. III-N material is intended to mean a semiconductor material comprising at least one Group 13 element and nitrogen.

[0032] The term "metal" or any variation thereof is intended to mean a material containing elements within any of Groups 1 to 12, and elements within Groups 13 to 16, along the line defined by atomic numbers 13 (Al), 31 (Ga), 50 (Sn), 51 (Sb), and 84 (Po) and below. Metals do not include Si or Ge.

[0033] The term "pn junction diode" is intended to refer to a diode formed at the junction of a p-type semiconductor material and an n-type semiconductor material. The pn junction diode is compared to a Schottky diode, which is formed when a metal material and a dopant having a relatively low to moderate dopant concentration (such as up to 1×10 18 atoms / cm 3 ) is formed at the interface of the semiconductor material.

[0034] The term "semiconductor base material" refers to the main material within a semiconductor substrate, region or layer, and does not refer to any dopants within the semiconductor substrate, region or layer. A boron-doped Si layer has Si as the semiconductor base material, and a C-doped GaN layer has GaN as the semiconductor base material.

[0035] The term "threshold voltage" with respect to a component is intended to mean the voltage at which a significant current (greater than the leakage current) flows through such a component. For a diode, the threshold voltage corresponds to the forward bias voltage at which a significant current begins to flow through the diode. For many diodes, such a forward voltage is in the range of 1V to 2V. For an n-channel depletion transistor, the voltage just above the pinch-off voltage corresponds to the threshold voltage.

[0036] The terms "comprises," "comprising," "including," "having," or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a method, article, or apparatus that includes a list of features is not necessarily limited to only those features but may include other features not expressly listed or inherent to such method, article, or apparatus. In addition, unless expressly specified to the contrary, "or" refers to an inclusive or and not an exclusive or. For example, a condition A or B is satisfied by any of the following: A is true (or present) and B is false (or absent), A is false (or absent) and B is true (or present), and both A and B are true (or present).

[0037] In addition, "a" or "an" is used to describe the elements and components described herein. This is for convenience only and to give a general sense of the scope of the invention. The description should be considered to include one, at least one, or the singular also includes the plural, and vice versa, unless it is clearly intended to be contrary. For example, when a single item is described herein, more than one item can be used in place of the single item. Similarly, where more than one item is described herein, a single item can be used in place of the more than one item.

[0038] The use of the words "about," "approximately," or "substantially" is intended to mean that the value of a parameter is close to the specified value or position. However, slight differences may prevent the value or position from being exactly as specified. Therefore, from the ideal goal of being exactly as described, differences of up to ten percent (10%) for the values ​​are reasonable differences.

[0039] The group numbers corresponding to the columns within the periodic table are based on the November 28, 2016 edition of the IUPAC Periodic Table.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the invention belongs. The materials, methods, and examples are illustrative only and are not intended to be limiting. Where not described herein, many details regarding specific materials and processing actions are conventional and can be found in textbooks and other sources in the semiconductor and electronics fields.

[0041] Circuits and electronic devices may include enhancement mode transistors that allow for a more stable increased threshold voltage over time while maintaining an acceptable low gate current. Circuits and electronic devices are well suited for enhancement mode high electron mobility transistors (HEMTs). In one embodiment, a diode may be used between the gate terminal and the gate of the HEMT. The anode of the diode is coupled to the gate terminal, and the cathode of the diode is coupled to the gate of the transistor. Therefore, when the circuit is turned on, the diode is forward biased. Therefore, the threshold of the circuit may be a function of the sum of the forward biased on-state voltage of the diode and the threshold voltage of the transistor. This circuit is compared to a conventional circuit in which the diode has a reverse configuration, and specifically, the cathode of the diode is coupled to the gate terminal and the anode is coupled to the gate of the transistor. The threshold of a conventional circuit may be a function of the sum of the reverse biased breakdown voltage of the diode and the threshold voltage of the transistor. The new circuit and electronic device may provide better control of the threshold voltage of the circuit, which is more stable over time. The circuits and electronic devices are well suited for HEMTs, and all of the components in the circuits and electronic devices can be integrated into a single die without requiring any additional masking or other processing operations or increasing the overall area occupied by the circuits and devices.

[0042] In one aspect, an electronic device may include: a channel layer covering a substrate; a barrier layer covering the channel layer; a gate electrode of a transistor covering the channel layer; a gate terminal; and a component having a threshold voltage. The component is disposed along a current path between the gate terminal and the gate electrode.

[0043] In another aspect, an electronic device may include: a channel layer covering a substrate; a barrier layer covering the channel layer; a gate electrode of a first transistor covering the channel layer; a gate terminal; and a second transistor having a source electrode, a gate electrode, and a drain electrode. The source electrode and the gate electrode of the second transistor are coupled to the gate electrode of the first transistor, and the drain electrode of the second transistor is coupled to the gate terminal.

[0044] In another aspect, the circuit may include a drain terminal, a gate terminal, and a source terminal, a transistor, and a diode. The transistor may include a drain, a gate, and a source, wherein the drain is coupled to the drain terminal and the source is coupled to the source terminal. The diode may have an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate of the transistor.

[0045] Figure 1 A circuit 100 according to one embodiment is included. The circuit 100 includes a source terminal 102, a gate terminal 104, and a drain terminal 106. The circuit 100 includes a transistor 122 having a source, a gate, and a drain. The source is coupled to the source terminal 102, and the drain is coupled to the drain terminal 106. In one embodiment, the transistor is a HEMT, and in a specific embodiment is an enhancement mode HEMT. The circuit 100 also includes a diode 142 having an anode and a cathode, wherein the anode is coupled to the gate terminal 104 and the cathode is coupled to the gate of the transistor 122. The diode 142 can be a Schottky diode or a pn junction diode. Although not shown, other components may be used, such as a gate controller that controls a gate signal for turning on and off the transistor 122, a gate driver for providing sufficient gate voltage to operate the transistor 122, another suitable component, or any combination thereof.

[0046] The diode 142 helps increase the voltage required at the gate terminal 104 to turn on the circuit 100. In a non-limiting embodiment, the diode 142 can double the voltage required at the gate terminal 104 to turn on the transistor 122. When the transistor 122 is not frequently turned on and off, after the transistor 122 is turned on, charge can accumulate between the diode 142 and the gate of the transistor 122. When the transistor 122 is turned off, the source terminal 102 and the gate terminal 104 can be at substantially the same voltage. The accumulated charge causes the diode 142 to be reverse biased because the cathode of the diode 142 is at a higher voltage than the anode of the diode 142. The accumulated charge can be dissipated through the diode 142 as leakage current.

[0047] In another embodiment, transistor 122 may be turned on and off more frequently. Therefore, the charge accumulated between diode 142 and the gate of transistor 122 may need to be dissipated more quickly. Figure 2 and Figure 3 Embodiments are included in which additional components may be used to help dissipate the accumulated charge without significantly interfering with circuit operation when transistor 122 is turned on.

[0048] exist Figure 2 , circuit 200 includes diodes 142 and 252 in a back-to-back diode configuration. Specifically, diode 252 includes an anode and a cathode, wherein the anode of diode 252 is coupled to the cathode of diode 142, and the cathode of diode 252 is coupled to the anode of diode 142. In one embodiment, the on-state forward bias voltage of diode 252 (a particular type of threshold voltage) is less than the threshold voltage of transistor 122. Therefore, the charge accumulated at the node between the gate of transistor 122 and diodes 142 and 252 can be made less than the threshold voltage of transistor 122. Similar to diode 142, diode 252 can be a Schottky diode, a pn junction diode, or a junction barrier diode. The junction barrier diode is a hybrid of a Schottky diode and a pn junction diode having a pattern, and is a well-known structure for reducing the on-state voltage in SiC diodes. Diodes 142 and 252 can be of the same type (e.g., both are Schottky diodes or both are pn junction diodes) or different types (e.g., one diode is a Schottky diode and the other diode is a pn junction diode), and can have the same or different characteristics (e.g., on-state forward bias voltage, area, resistance between the gate electrode and the terminals of the diode (e.g., the cathode of diode 142 and the anode of diode 252)).

[0049] exist Figure 3 , circuit 300 includes a transistor 352 having a source, a gate, and a drain. The gate and source of transistor 352 are coupled to the cathode of diode 142, and the drain of transistor 352 is coupled to the anode of diode 142. In one embodiment, transistor 352 is a depletion-mode transistor, and in a specific embodiment is a depletion-mode HEMT. In another embodiment (not shown), transistor 352 can be an enhancement-mode transistor. When an enhancement-mode transistor is used for transistor 352, the threshold voltage of transistor 352 is less than the threshold voltage of transistor 122. Therefore, the charge accumulated at the gate of transistor 122 and the node between diode 142 and transistor 352 can be made less than the threshold voltage of transistor 122.

[0050] Figure 4A circuit 400 is included that includes a set of diodes 441, 442, 443, ... 44n connected in series. As used herein, the branch of the circuit 400 that includes the diodes 441 to 44n is referred to as an accumulation branch, and the branch of the circuit 400 that includes the diode 252 is referred to as a dissipation branch. In this embodiment, the additional diodes along the accumulation branch help to further increase the voltage at the gate terminal 104 for turning on the transistor 122. Within the accumulation branch, a skilled person can perform circuit simulations to determine the number of diodes that should be connected in series within the accumulation branch. Figure 4 A diode 252 is also shown, and in another embodiment, a transistor 352 may be used in the dissipative branch in place of the diode 252. In a specific embodiment, more than one diode or transistor may be used in the dissipative branch. When more than one component is used in the dissipative branch, such components may be connected in parallel with each other. Thus, the number of diodes in the accumulation branch may be different from the number of components in the dissipative branch.

[0051] Attention will now be turned to the physical structure and process flow used to implement the previously described circuits. Emphasis will be placed primarily on Figures 1 to 3 After reading this specification, the skilled person will be able to modify the physical components and process flows to achieve the following: Figure 4 The circuit shown.

[0052] Figure 5 A cross-sectional view of a portion of a workpiece 500 in which a HEMT is being formed is included. Referring to the aforementioned circuit, the workpiece 500 includes a portion 522 in which a transistor structure corresponding to the transistor 122 is formed, and a portion 542 in which a component structure corresponding to a component between the gate terminal 104 and the gate of the transistor 122 is formed. The workpiece may include a substrate 502, a buffer layer 504, a channel layer 506, a barrier layer 508, a gate electrode 524, and a semiconductor member 544. The substrate 502 may include silicon, sapphire (single crystal Al2O3), silicon carbide (SiC), aluminum nitride (AlN), gallium oxide (Ga2O3), spinel (MgAl2O4), another suitable substantially single crystalline material, etc. The selection of the specific material and crystal orientation along the major surface may be selected based on the composition of the overlying semiconductor layer.

[0053] Buffer layer 504 may include a III-N material, and in one specific embodiment, includes Al a Ga (1-a)N, where 0≤a≤1. The composition of the buffer layer 504 may depend on the composition of the channel layer 506 and the designed operating voltage of the HEMT. The composition of the buffer layer 504 may vary according to the thickness, such that the closer the buffer layer 504 is to the substrate 502, the higher its aluminum content is, and the closer it is to the channel layer 506, the higher its gallium content is. In a specific embodiment, the cation (metal atom) content in the buffer layer 504 close to the substrate 502 may be 10 atomic % to 100 atomic % Al, with the remainder being Ga, and the cation content in the buffer layer 504 close to the channel layer 506 may be 0 atomic % to 50 atomic % Al, with the remainder being Ga. In another embodiment, the buffer layer 504 may include a plurality of films. The buffer layer 504 may have a thickness in the range of approximately 1 micron to 5 microns.

[0054] The channel layer 506 may include a semiconductor base material such as Al z Ga (1-z) N, where 0≤z≤0.1 and has a thickness in the range of about 20nm to 4000nm. In a specific embodiment, the channel layer 506 is a GaN layer (z=0). The channel layer 506 may be inadvertently doped or doped with an electron donor (n-type) dopant or an electron acceptor (p-type) dopant. In an embodiment, the concentration of the acceptor (when the carrier is an electron) or the donor (when the carrier is a hole) can be reasonably kept as low as possible.

[0055] In a specific embodiment, when metal organic chemical vapor deposition (MOCVD) is used to form the channel layer 506, the acceptor may include carbon from the source gas (e.g., Ga(CH3)3). In a specific embodiment, a minimum trap concentration is desired, but may be limited by growth or deposition conditions and precursor purity. Therefore, as the channel layer 506 grows, some carbon may become incorporated, and this carbon may cause unintentional doping. The carbon content can be controlled by controlling deposition conditions such as deposition temperature and flow rate. In one embodiment, the carrier impurity concentration of the channel layer 506 is greater than 0 atoms / cm 3 And at most 1×10 14 atoms / cm 3 , up to 1×10 15 atoms / cm 3 , or at most 1×10 16 atoms / cm 3 In a specific embodiment, the carrier impurity concentration is 1×10 13 atoms / cm 3 Up to 1×10 16 atoms / cm 3 within the range.

[0056] In one embodiment, the channel layer 506 has a thickness of at least 50 nm. When the thickness is less than 50 nm, it may be more difficult to generate, maintain, or both, the 2DEG. In another embodiment, the channel layer 506 has a thickness of at most 5000 nm. In a specific embodiment, a thickness in the range of 50 nm to 300 nm can provide a thick enough channel layer 506 to allow for proper generation and maintenance of the 2DEG and still obtain a reasonable on-state resistance (R DSON ).

[0057] The barrier layer 508 may comprise a III-V semiconductor material, such as a III-N semiconductor material. In a specific embodiment, the barrier layer may comprise Al b In c Ga (1-b-c) N, where 0 < b ≤ 1 and 0 ≤ c ≤ 0.3. The barrier layer 508 may include a single film or multiple films. When the barrier layer 508 includes multiple films, the aluminum content may remain substantially the same or increase with increasing distance from the channel layer 506. As the aluminum content in the barrier layer 508 increases, the thickness of the barrier layer 508 may be relatively thinner. In one embodiment, the barrier layer 508 has a thickness of at least 10 nm, and in another embodiment, the barrier layer 508 has a thickness of at most 150 nm. In a specific embodiment, the barrier layer 508 has a thickness in the range of 20 nm to 90 nm.

[0058] In one embodiment, the gate electrode 524 and the semiconductor member 544 may be formed from a gate electrode layer. The formed transistor structure (corresponding to transistor 122) is an enhancement-mode HEMT. The gate electrode 524 and the semiconductor member 544 may comprise a p-type semiconductor material. In a specific embodiment, the gate electrode 524 and the semiconductor member 544 may comprise p-type GaN. The p-type dopant may comprise Mg, Zn, Cd, etc. The gate electrode 524 and the semiconductor member 544 may have a thickness in the range of 10 nm to 300 nm. In another embodiment, if desired or needed, the gate electrode 524 and the semiconductor member 544 may be thicker.

[0059] The technician can select one of several techniques to form the gate electrode 524 and the semiconductor component 544 from the gate electrode layer. For example, the gate electrode layer can be deposited on the barrier layer 508, or the patterned layer can be formed before the gate electrode layer is formed. In one embodiment, the patterned layer may include a sacrificial layer removed after the gate electrode 524 and the semiconductor component 544 are formed. In another embodiment (not shown), the patterned layer may include access regions for source electrodes and drain electrodes formed above the channel layer. In this embodiment, the patterned layer may remain in the completed transistor structure. For simplicity, the gate electrode 524 and the semiconductor component 544 are shown as being located on the barrier layer 508. In another embodiment, the gate electrode 524, the semiconductor component 544, or both may be recessed in the barrier layer 508 or contact the channel layer 506. After reading this specification, the technician will be able to select the process technology for forming the gate electrode 524 and the semiconductor component 544 to meet the needs or expectations of a specific application. In other embodiments (not shown), a spacer layer is formed between the channel layer 506 and the barrier layer 508 .

[0060] Figure 6 An exemplary layout of an electronic device is included. Portion 522 includes gate electrode 524, and portion 542 includes semiconductor member 544. It should be noted that gate electrode 524 and semiconductor member 544 are spaced apart and do not contact each other. The shape of semiconductor member 544 can correspond to a gate terminal interconnect, and semiconductor member 544 can have a portion 644 corresponding to a subsequently formed gate pad and a portion 648 corresponding to a gate runner, wherein the gate pad and the gate runner are formed at a higher level interconnect to be formed later. The source electrode and the drain electrode have not yet been formed and are therefore not in Figure 6 Shown in.

[0061] Figure 7A workpiece is included after forming an insulating layer 700, a source electrode 722 and a drain electrode 725, a gate electrode interconnect 724, a gate terminal interconnect 742, and another interconnect 744. The insulating layer 700 may be formed over the barrier layer 508, the gate electrode 524, and the semiconductor component 544. The insulating layer 700 may include an oxide, a nitride, or an oxynitride. The insulating layer 700 may have a thickness in the range of 50nm to 500nm. The insulating layer 700 may be patterned to define contact openings for the source electrode 722 and the drain electrode 726 and the interconnects 724, 742, and 744. In one embodiment, the contact openings may extend through the insulating layer 700 and fall on the barrier layer 508, the gate electrode 524, and the semiconductor component 544. In another embodiment, the contact openings for source and drain electrodes 722 and 726 and interconnect 744 may extend through a portion, but not all, of the thickness of barrier layer 508 , or extend through the entire thickness of barrier layer 508 and contact channel layer 506 .

[0062] The conductive layer is formed above the insulating layer 700 and in the contact opening. The conductive layer may include a single film or multiple films. The conductive layer may include an adhesive film and a barrier film. Such a film may include Ta, TaSi, Ti, TiW, TiSi, TiN, etc. The conductive layer may also include a conductor film. The body film may include Al, Cu, or another material that is more conductive than other films in the conductive layer. In one embodiment, the body film may include at least 90% by weight of Al or Cu. The body film may have a thickness at least as thick as other films in the conductive layer. In one embodiment, the thickness of the body film is in the range of 20nm to 900nm, and in a more specific embodiment, in the range of 50nm to 500nm. More or less films may be used in the conductive layer. The number and composition of the films in the conductive layer may depend on the needs or expectations of a particular application. After reading this specification, the technician will be able to determine the composition of the conductive layer modulated to suit its device. The conductive layer is patterned to form a source electrode 722 and a drain electrode 726, as well as interconnects 724, 742, and 744.

[0063] The contact openings for the source and drain electrodes 722 and 726 and the interconnection 744 and the contact openings for the interconnections 724 and 742 may be defined using the same process sequence or different process sequences. The source and drain electrodes 722 and 726 and the interconnection 744 and the interconnections 724 and 742 may be formed using the same process sequence or different process sequences. In addition, the source and drain electrodes 722 and 726 and the interconnection 744 may be formed at one interconnection level, and the interconnections 724 and 742 may be formed at different interconnection levels. Figure 8 Included is a top view of a portion of a workpiece at this point in processing.

[0064] Fig. 9 The workpiece includes a workpiece after forming the insulating layer 900 and the interconnect 924. The combination of the interconnects 744 and 924 corresponds to Figures 1 to 3 142 and the gate of transistor 122. Insulating layer 900 includes any composition and thickness as described above with respect to insulating layer 700. Insulating layer 900 can have the same composition or a different composition than insulating layer 700, and can have the same thickness or a different thickness than insulating layer 700. Insulating layer 900 can be patterned to define a via opening for interconnect 924. A conductive layer is formed over insulating layer 900 and within the via opening. The conductive layer for interconnect 924 includes any composition and thickness as described above with respect to source electrode 722 and drain electrode 726 and interconnects 724, 742, and 744. The conductive layer of interconnect 924 may have the same composition or a different composition than the conductive layer used for the underlying electrodes and interconnects 722, 724, 726, 742, and 744, and may have the same thickness or a different thickness than the conductive layer used for the underlying electrodes and interconnects 722, 724, 726, 742, and 744. The conductive layer is patterned to form interconnect 924.

[0065] One or more interconnect levels and passivation layers may be formed over the workpiece. Each interconnect level may include an interlayer dielectric layer and an interconnect. A conductive layer may be used at each interconnect level. The conductive layer may be the same as or different from other conductive layers previously described in this specification. A substantially completed electronic device, including an enhanced HEMT, has been formed. The 2DEG 910 is discontinuous below the gate electrode 524 and the semiconductor member 544. When an appropriate voltage is applied, the 2DEG becomes continuous, including below the gate electrode 524 and the semiconductor member 544. As will be described later in this specification with reference to Fig.12 As discussed, the threshold voltage for turning on circuit 100 can be increased to over 3V.

[0066] Fig. 9 The structure shown can be used for Figure 1 , Figure 2 and 3 The diode 142 and transistor 122 are shown in the figure. Figure 2 and 3 The circuits in the figures include additional components. Fig.10 An exemplary structure that can be used for diode 252 is shown. Fig.10524. The semiconductor component 1042 may be formed simultaneously with the semiconductor component 542. The semiconductor component 1042 may be formed during a different process sequence than the gate electrode 524, or at least one operation in the process sequence for forming the gate electrode 524 may be shared with the process sequence for forming the semiconductor component 1042. For example, in order to make the threshold voltage lower than the threshold voltage of the diode including the semiconductor component 1042, the semiconductor component 1042 may be patterned to be narrower than the gate electrode 524. In another embodiment, a thinner p-type GaN layer may be used to form the semiconductor component 1042 than the p-type GaN layer used to form the gate electrode 524. The diode 252 may be formed at the interface of the semiconductor component 1042 and the barrier layer 508.

[0067] Interconnect 1052 may be formed simultaneously with gate terminal interconnect 742. Another portion of interconnect 924 is electrically connected to and contacts interconnect 1052. Thus, interconnect 1052 may also be part of a node between the anode of diode 252, the cathode of diode 142, and the gate of transistor 122 (see Figure 2 ). Interconnect 1062 may be formed simultaneously with gate terminal interconnect 742, and interconnect 1064 may be formed simultaneously with interconnect 924. Although not shown, interconnect 1064 or possibly another interconnect may be connected to gate terminal 104. Thus, interconnects 742, 1062, and 1064 may be part of a node between gate terminal 104, the cathode of diode 252, and the anode of diode 142.

[0068] In another embodiment (not shown), semiconductor member 1042 may not be present, and interconnect 1052 may contact barrier layer 508 to form a Schottky diode. In this embodiment, interconnect 1052 may be formed simultaneously with source electrode 722 and drain electrode 726. In another embodiment, interconnect 1052 may be formed of a metal having a lower work function than source electrode 722 and drain electrode 726. In further embodiments, a junction barrier diode may be used.

[0069] Fig.11 Includes transistor 352 ( Figure 3 ) is an exemplary transistor structure. Fig.11 , gate electrode 1124 may be formed simultaneously with gate electrode 524. Source electrode 1122 and drain electrode 1126 may be formed simultaneously with source electrode 722 and drain electrode 726. Interconnect 1134 may be formed simultaneously with gate electrode interconnect 724. Source electrode 1122 and interconnects 1134 and 924 may be the gate and source of transistor 352, the cathode of diode 142, and the gate of transistor 122 (see FIG. Figure 3 ). Interconnect 1164 may be formed simultaneously with interconnect 924. Although not shown, interconnect 1164 or possibly another interconnect may be connected to gate terminal 104. Thus, drain electrode 1126 and interconnects 742 and 1164 may be part of a node between gate terminal 104, the cathode of diode 252, and the anode of diode 142.

[0070] For circuits 200 and 300 , a gate voltage in the range of −0.5 V to −1 V may be used to open the circuit and take the voltage on the gate electrode 724 of transistor 122 to 0V.

[0071] Fig.12 Including comparison circuit and Figure 2 The comparison circuit may be the same as circuit 200 except that diodes 142 and 252 are not present. Thus, gate terminal 104 is directly connected to the gate of transistor 122. When the drain current (the current flowing from drain terminal 106 to source terminal 102, or Ids) is greater than 0A, the circuit is turned on. Fig.12 As shown, the threshold voltage (Vth) of the comparison circuit is about 1.5 V (the voltage difference between the gate terminal 104 and the source terminal 102, or Vgs≈1.5 V), and the Vth of the circuit 200 is about 3.1 V (Vgs≈3.1 V). Therefore, the addition of the diode 142 increases the Vth, and in one embodiment, this increase is twice the Vth of the comparison circuit. Fig.12 Also included is a graph of gate current (the current flowing from gate terminal 104 to source terminal 102, or Igs) as a function of Vgs. In the range of about 3.1 V to 5.3 V, the Igs of circuit 200 is lower than the comparison circuit. At higher Vgs, the Igs of the two circuits are approximately the same.

[0072] Fig.13 include Figure 2 The simulation of circuit 200 in FIG. 1 was performed to ensure that circuit 200 has acceptable performance when Vgs is in the range of -20 V to 20 V. When Vgs is about 8 V, the saturation current of Ids is reached, and for a particular simulation, the saturation current is about 0.33 A. It will be appreciated by those skilled in the art that the actual value of the saturation current is a function of the particular transistor structure used for transistor 122 (e.g., the channel width of the transistor structure), and is less affected by the presence or absence of diodes 142 and 252. When Vgs is 10 V, Igs is about 1×10 -5 A, and does not reach 1×10 until Vgs reaches about 19V -3 A. Therefore, circuit 200 has acceptable performance when Vgs varies from -20V to 20V.

[0073] Embodiments described herein can help provide circuits that allow threshold voltage modulation to be suitable for the needs or expectations of a particular application. The gate of an enhancement mode transistor can be coupled to one or more diodes that can be used to increase the voltage between the source terminal and the gate terminal for conducting the circuit. The geometry and quantity of one or more diodes can be designed to achieve the desired threshold voltage of the circuit. The circuit has good drain current characteristics and an acceptable low gate current.

[0074] In some embodiments, another diode or transistor can be connected in parallel with one or more diodes to help dissipate charge faster than if such other diodes or transistors were not present. In a specific embodiment, a back-to-back diode configuration can be used. When the gate voltage of the circuit increases, current flows through one or more diodes along the charge accumulation branch to the gate of the enhancement transistor. When the circuit is disconnected, the charge at the gate of the enhancement transistor can be dissipated through another diode along the charge dissipation branch of the circuit.

[0075] In another specific embodiment, the configuration can include transistors along the dissipation branch of the circuit. Circuit 300 is turned on in a manner similar to the back-to-back configuration (circuit 200). When the circuit is turned off, the voltage on the source and gate of the transistor is higher than the voltage on the drain. The charge will be dissipated through the transistor along its charge dissipation branch.

[0076] Compared to conventional circuits having a diode with a reverse configuration (a single diode with the cathode coupled to the gate terminal and the anode coupled to the gate of an enhancement mode transistor), the embodiments described herein provide better control over the threshold voltage of the circuit. Embodiments may also provide the circuit with a more stable threshold voltage over time.

[0077] These embodiments are well suited for enhancement mode transistors, and in particular enhancement mode HEMTs. Components of the circuit can be formed on the same die and in or over the same channel layer. In a specific embodiment, the components along the conductive path between the gate terminal and the gate of the enhancement mode transistor can be located below the gate pad or gate runner, and therefore, the components do not increase the area occupied by the circuit. The formation of the components does not require any additional masking or other processing operations. Existing masking layers can be modified to provide the features of the components.

[0078] Many different aspects and embodiments are possible. Some of those aspects and embodiments are described below. After reading this specification, the skilled person will recognize that those aspects and embodiments are only exemplary and do not limit the scope of the invention. Embodiments can be according to any one or more of the following listed projects.

[0079] Embodiment 1: An electronic device may include:

[0080] a channel layer, the channel layer covering the substrate;

[0081] a barrier layer, the barrier layer covering the channel layer;

[0082] a gate electrode of a first transistor, the gate electrode covering the channel layer, wherein the first transistor is an enhancement mode transistor;

[0083] a gate terminal; and

[0084] A first component has a threshold voltage, wherein the first component is disposed along a current path between the gate terminal and the gate electrode.

[0085] Embodiment 2: The electronic device according to embodiment 1, wherein the first component is located below the gate pad or below the gate runner.

[0086] Embodiment 3: The electronic device of Embodiment 1, wherein the first component is a first diode having an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate electrode.

[0087] Embodiment 4: The electronic device according to Embodiment 3, wherein the first diode is a Schottky diode, a pn junction diode, or a junction barrier diode.

[0088] Embodiment 5: The electronic device according to Embodiment 4 further includes a second component connected in parallel with the first component.

[0089] Embodiment 6: The electronic device of Embodiment 5, wherein the second component is a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode, and the cathode of the second diode is coupled to the anode of the first diode.

[0090] Embodiment 7: An electronic device according to Embodiment 5, wherein the second component is a second transistor having a source electrode, a gate electrode and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode, and the drain electrode of the second transistor is coupled to the anode of the first diode.

[0091] Embodiment 8: The electronic device according to Embodiment 7, wherein the second transistor is a depletion-mode high electron mobility transistor.

[0092] Embodiment 9: The electronic device of Embodiment 5, wherein a threshold voltage of the second component is less than a threshold voltage of the first transistor.

[0093] Embodiment 10: The electronic device according to Embodiment 5, wherein the first transistor and the first and second components are located on the same die.

[0094] Embodiment 11: The electronic device according to Embodiment 5, further comprising a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode, and the cathode of the second diode is coupled to the gate electrode of the first transistor.

[0095] Embodiment 12: The electronic device according to Embodiment 1, wherein the first transistor has a first threshold voltage, and the second component has a second threshold voltage less than the first threshold voltage.

[0096] Embodiment 13: The electronic device according to Embodiment 1, wherein the channel layer comprises Al z Ga (1-z) N, where 0 ≤ z ≤ 0.1, and the blocking layer comprises Al x In y Ga (1-x-y) N, where 0 < x ≤ 0.6 and 0 ≤ y ≤ 0.3.

[0097] Embodiment 14: The electronic device according to Embodiment 5, wherein:

[0098] the channel layer comprises GaN,

[0099] the blocking layer comprises Al x Ga (1-x) N, where 0 < x ≤ 0.4,

[0100] the first transistor is an enhancement-mode high electron mobility transistor,

[0101] the gate electrode comprises a p-type semiconductor material,

[0102] the second component is:

[0103] a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode, and the cathode of the second diode is coupled to the anode of the first diode, or

[0104] a second transistor that is a depletion-mode high electron mobility transistor having a source electrode, a gate electrode, and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode, and the drain electrode of the second transistor is coupled to the anode of the first diode,

[0105] The threshold voltage of the second component is less than the threshold voltage of the first transistor, and

[0106] The first transistor and the first component and the second component are located on a same die.

[0107] Embodiment 15: An electronic device may include:

[0108] a channel layer, the channel layer covering the substrate;

[0109] a barrier layer, the barrier layer covering the channel layer;

[0110] a gate electrode of a first transistor, the gate electrode covering the channel layer;

[0111] a gate terminal; and

[0112] A second transistor having a source electrode, a gate electrode and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the gate electrode of the first transistor, and the drain electrode of the second transistor is coupled to the gate terminal.

[0113] Embodiment 16: An electronic device according to Embodiment 15, wherein the second transistor is a depletion-mode transistor.

[0114] Embodiment 17: An electronic device according to Embodiment 16, wherein the first transistor is an enhancement mode transistor.

[0115] Embodiment 18: The electronic device according to Embodiment 15, wherein the first transistor and the second transistor are high electron mobility transistors.

[0116] Embodiment 19: A circuit may include:

[0117] a drain terminal, a gate terminal, and a source terminal;

[0118] a first transistor, the first transistor being an enhancement mode transistor including a drain, a gate and a source, wherein the drain is coupled to the drain terminal and the source is coupled to the source terminal;

[0119] A first diode has an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate of the first transistor.

[0120] Embodiment 20: The circuit of Embodiment 19 further comprising a component, wherein the component is:

[0121] a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode and the cathode of the second diode is coupled to the anode of the first diode, or

[0122] a second transistor having a source, a gate, and a drain, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode and the drain electrode of the second transistor is coupled to the anode of the first diode,

[0123] The first transistor is an enhanced high electron mobility transistor.

[0124] It should be noted that not all activities described above in the general description or examples are required, that a portion of a specific activity may not be required, and that one or more additional activities may be performed in addition to those described. Also, the order in which the activities are listed is not necessarily the order in which the activities are performed.

[0125] Beneficial effects, other advantages, and solutions to problems have been described above with respect to specific embodiments. However, these beneficial effects, advantages, solutions to problems, and any features that may cause any beneficial effect, advantage, or solution to occur or become more obvious should not be construed as key, required, or essential features of any or all claims.

[0126] The description and illustration of the embodiments described herein are intended to provide a general understanding of the structures of various embodiments. The description and illustration are not intended to be used as an exhaustive and comprehensive description of all elements and features of the equipment and systems using the structures or methods described herein. Individual embodiments may also be provided in a single embodiment in combination, whereas various features described in the context of a single embodiment for the sake of simplicity may also be provided individually or in any sub-combination. In addition, reference to values ​​expressed as ranges includes all values ​​within the range. Many other embodiments are apparent only to the technician after reading this specification. Other embodiments may be used and derived from the present disclosure so that structural replacement, logical replacement or other changes may be performed without departing from the scope of the present disclosure. Therefore, the present disclosure should be considered exemplary, not restrictive.

Claims

1. An electronic device comprising: Channel layer, the channel layer covering the substrate, wherein the channel layer contains Al z Ga (1-z) N, where 0 ≤ z ≤ 0.1; Barrier layer, the barrier layer covering the channel layer, wherein the barrier layer contains Al x In y Ga (1-x-y) N, where 0 < x ≤ 0.6 and 0 ≤ y ≤ 0.3; a gate electrode of a first transistor, the gate electrode covering the channel layer, wherein the first transistor is an enhancement mode transistor; a gate terminal; as well as A first diode includes an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate electrode. 2 . The electronic device of claim 1 , further comprising a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode, and the cathode of the second diode is coupled to the anode of the first diode. 3 . The electronic device according to claim 2 , wherein a threshold voltage of the second diode is smaller than a threshold voltage of the first transistor.

4. The electronic device according to claim 1 further includes a second transistor having a source electrode, a gate electrode and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode, and the drain electrode of the second transistor is coupled to the anode of the first diode.

5. The electronic device according to claim 1, further comprising a component, wherein: The channel layer comprises GaN, The barrier layer comprises Al x Ga (1-x) N, where 0 <x≤0.4, The first transistor is an enhancement mode high electron mobility transistor, The gate electrode comprises a p-type semiconductor material, The components are: a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode and the cathode of the second diode is coupled to the anode of the first diode, or a second transistor, the second transistor being a depletion-mode high electron mobility transistor having a source electrode, a gate electrode, and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the first diode, and the drain electrode of the second transistor is coupled to the anode of the first diode, The threshold voltage of the component is less than the threshold voltage of the first transistor, and The first transistor, the first diode, and the component are located on a same die.

6. An electronic device comprising: a channel layer, the channel layer covering the substrate; a barrier layer, the barrier layer covering the channel layer; a gate electrode of a first transistor, the gate electrode covering the channel layer; a gate terminal; a diode comprising an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate electrode; as well as A second transistor having a source electrode, a gate electrode and a drain electrode, wherein the source electrode and the gate electrode of the second transistor are coupled to the cathode of the diode, and the drain electrode of the second transistor is coupled to the anode of the diode. 7 . The electronic device of claim 6 , wherein the first transistor is an enhancement mode transistor, and the second transistor is a depletion mode transistor.

8. A circuit comprising: a drain terminal, a gate terminal, and a source terminal; a first transistor, the first transistor being an enhancement mode transistor including a drain, a gate and a source, wherein the drain is coupled to the drain terminal and the source is coupled to the source terminal; a first diode having an anode and a cathode, wherein the anode is coupled to the gate terminal and the cathode is coupled to the gate of the first transistor; as well as A component having a first terminal coupled to the gate of the first transistor and a second terminal coupled to the gate terminal, wherein: The components are configured such that a forward bias direction is from the gate to the gate terminal of the first transistor, and The component has a threshold voltage less than a threshold voltage of the first transistor.

9. The circuit of claim 8, further comprising a component, wherein the component is: a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the cathode of the first diode and the cathode of the second diode is coupled to the anode of the first diode, or a second transistor having a source, a gate, and a drain, wherein the source and the gate of the second transistor are coupled to the cathode of the first diode and the drain of the second transistor is coupled to the anode of the first diode, The first transistor is an enhanced high electron mobility transistor.

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