A UIS test circuit and MOSFET avalanche energy compensation method thereof

Abstract

The invention discloses a UIS test circuit and a MOSFET avalanche energy compensation method thereof. The UIS test circuit comprises a DC power supply, an inductor, a switch, a diode, a gate drive module, a line impedance, a MOSFET and a current sampling module. The positive electrode of the DC power supply is connected to the inductor through the switch, the inductor is connected to the drain of the MOSFET under test through the line impedance, the gate of the MOSFET under test is connected to the gate drive module, the gate drive module controls the on-off between the source and the drain through a control signal, the source of the MOSFET under test is connected to the negative electrode of the DC power supply through a current sampling component, and the diode is connected in parallel with the MOSFET under test to maintain the current in the loop. The UIS test circuit and the MOSFET avalanche energy compensation method thereof of the invention can quickly and accurately test the avalanche energy of the MOSFET and compensate for it.

Description

Technical Field

[0001] The invention relates to the technical field of avalanche tolerance test equipment, in particular to a UIS test circuit and a MOSFET avalanche energy compensation method. Background Art

[0002] MOSFET is a metal oxide field effect transistor (MOSFET). It is widely used in power electronic equipment due to its simple manufacturing process, high integration, strong anti-interference ability, high speed, low power consumption and other advantages. With the increasing use of MOSFET devices and diodes in special environments such as high-frequency switching and automotive electronics, avalanche failure has become the main failure mode of power MOSFET devices. The ability to load energy during avalanche breakdown will affect the safe working area and life of the device. It is considered an important indicator of device safety, so the test of avalanche energy of MOSFET devices is also particularly important.

[0003] The avalanche test process is to simulate the process of avalanche when the device is actually turned off according to the set voltage, current and inductance conditions to see if the device under test is damaged. Devices that cannot withstand this specified energy are unqualified products. In the test process, the energy value stored in the inductor during the charging process is related to the set inductance value and current value, but in the actual discharge process of the inductor, its energy is consumed by the measured MOSFET and line impedance in the circuit to generate heat, which often leads to a large error between the measurement result and the actual result, which is a huge misjudgment for engineering, especially in the low-voltage and high-current MOSFET avalanche energy test process, so there is a hidden danger to production safety. Summary of the invention

[0004] The purpose of the present invention is to overcome the defects of the prior art and provide a UIS test circuit and a MOSFET avalanche energy compensation method, which can quickly and accurately measure the avalanche energy of MOSFET and realize the compensation of avalanche energy during UIS test of MOSFET.

[0005] In order to achieve the purpose of the present invention, the technical solution adopted is:

[0006] The UIS test circuit of the present invention is used to test the avalanche tolerance of MOSFET, and includes a DC power supply, an inductor, a switch, a diode, a gate drive module, a line impedance, a MOSFET and a current sampling module. The positive electrode of the DC power supply is connected to the inductor through a switch; the inductor is connected to the drain of the MOSFET under test through the line impedance; the gate of the MOSFET under test is connected to the gate drive module; the gate drive module controls the on-off between the source and the drain through a control signal; the source of the MOSFET under test is connected to the negative electrode of the DC power supply through a current sampling component; the diode is connected in parallel with the MOSFET under test to maintain the current in the loop; the control signal of the switch and the control signal of the gate drive module are generated simultaneously.

[0007] The MOSFET avalanche energy compensation method of the present invention comprises the following steps:

[0008] S101: Perform UIS pre-test of MOSFET avalanche energy, set the inductance L and current I, and calculate the loading energy according to the energy formula:

[0009] S102: Obtain the current value of the current sampling module (8) and the voltage value Vds across the measured MOSFET (7), and calculate the actual energy consumption value of the MOSFET (7) according to the energy formula: Therefore, the energy consumed by the line impedance (6) and the diode (4) is E2 = E-E1;

[0010] S103: Since the line impedance (6) and the diode (4) are both pure resistive elements, the energy consumed by the line impedance (6) is calculated according to the formula: The energy consumed by diode (4) is That is, E2 = E3 + E4;

[0011] S104: According to the above formula and the simultaneous equation, the value of the line impedance (6) can be obtained and substituted into the energy formula to obtain the compensation energy value:

[0012] S105: Determine the avalanche withstand capability of MOSFET (7) in the MOSFET avalanche energy test method L is the inductance of the inductor (2), Vds is the voltage value across the tested MOSFET, Vd is the voltage value across the diode, I is the current value of the current measurement module (5), and R is the resistance value of the line impedance (6), thereby calculating the accurate avalanche withstand capacity of the MOSFET (7).

[0013] The MOSFET avalanche energy testing method comprises the following steps:

[0014] S201: Connecting the MOSFET (7) under test to the UIS test circuit;

[0015] S202: When the switch (3) and the MOSFET (7) are turned on at the same time, the positive electrode of the DC power supply (1), the switch (3), the inductor (2), the MOSFET (7), the current sampling module (8) and the negative electrode of the DC power supply (1) form a charging circuit, and the inductor (2) stores energy;

[0016] S203: When the switch (3) and the MOSFET (7) are turned off at the same time, the inductor (2) releases electric energy, applies an avalanche voltage to the MOSFET (7) to make the MOSFET (7) enter an avalanche breakdown state, and the inductor (2), the MOSFET (7), the current sampling module (8), and the diode (4) form a test loop to measure the avalanche energy of the MOSFET (7);

[0017] The UIS test circuit and MOSFET avalanche energy compensation method of the present invention have the following beneficial effects:

[0018] 1. The UIS test circuit of the present invention can quickly and accurately measure the avalanche energy of MOSFET;

[0019] 2. The MOSFET avalanche energy compensation method of the present invention can accurately compensate and calibrate the MOSFET avalanche energy, especially for UIS testing of low-voltage and high-current MOSFETs. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for the description of the embodiments or the prior art solutions are briefly introduced below. Obviously, the drawings described below are only part of the embodiments of the present invention, not all of the embodiments. Ordinary technicians in this field can also obtain other drawings based on these drawings without making creative work.

[0021] Figure 1 is a schematic diagram of a UIS test circuit of an embodiment;

[0022] Figure 2 It is a flow chart of the MOSFET avalanche energy compensation method;

[0023] Figure 3 It is a schematic diagram of the pin signals of the MOSFET device under test; DETAILED DESCRIPTION

[0024] The UIS test circuit and MOSFET avalanche energy compensation method of the present invention will be described in more detail below in conjunction with the schematic diagram, wherein the preferred embodiment of the present invention is shown, and it should be understood that those skilled in the art can modify the present invention described herein and still achieve the beneficial effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art and not as a limitation of the present invention.

[0025] For the sake of clarity, not all features of the actual embodiments are described. In the following description, well-known functions and structures are not described in detail because they would clutter the invention with unnecessary detail. It should be recognized that in the development of any actual embodiment, a large number of implementation details must be made to achieve the developer's specific goals, such as changing from one embodiment to another according to the limitations of the relevant system or the relevant business. In addition, it should be recognized that such development work may be complex and time-consuming, but it is just a routine task for those skilled in the art.

[0026] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the drawings are in very simplified form and in non-precise proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention.

[0027] Embodiment 1:

[0028] like Figure 1 As shown, the UIS test circuit of this embodiment is used to measure the avalanche energy of the MOSFET, and the UIS test circuit includes a DC power supply, an inductor, a switch, a diode, a gate drive module, a line impedance, a MOSFET and a current sampling module. The positive electrode of the DC power supply is connected to the inductor through a switch; the inductor is connected to the drain of the MOSFET under test through the line impedance; the gate of the MOSFET under test is connected to the gate drive module; the gate drive module controls the on-off between the source and the drain through a control signal; the source of the MOSFET under test is connected to the negative electrode of the DC power supply through the current sampling module; the diode is connected in parallel with the MOSFET under test to maintain the current in the loop; the control signal of the switch and the control signal of the gate drive module are generated simultaneously.

[0029] Of course, the switch of this embodiment can also be replaced by a transistor or a thyristor, etc., as long as the device can realize the function of a controllable switch-type power device, and there is no limitation on this.

[0030] The current sampling module in this embodiment is connected in series between the source of the MOSFET and the negative electrode of the DC power supply, but the current measurement module is not limited to this connection method. For example, the current sampling module can also be located between the line impedance and the inductor, which is also within the scope of the present invention.

[0031] The MOSFET avalanche energy testing method comprises the following steps:

[0032] S201: Connecting the MOSFET (7) under test to the UIS test circuit;

[0033] S202: When the switch (3) and the MOSFET (7) are turned on at the same time, the positive electrode of the DC power supply (1), the switch (3), the inductor (2), the MOSFET (7), the current sampling module (8) and the negative electrode of the DC power supply (1) form a charging circuit, and the inductor (2) stores energy;

[0034] S203: When the switch (3) and the MOSFET (7) are turned off at the same time, the inductor (2) releases electric energy, applies an avalanche voltage to the MOSFET (7) to make the MOSFET (7) enter an avalanche breakdown state, and the inductor (2), the MOSFET (7), the current sampling module (8), and the diode (4) form a test loop to measure the avalanche energy of the MOSFET (7);

[0035] Embodiment 2:

[0036] The MOSFET avalanche energy compensation method of the present invention comprises the following steps:

[0037] S101: Perform UIS pre-test of MOSFET avalanche energy, set the inductance L and current I, and calculate the loading energy according to the energy formula:

[0038] S102: Obtain the current value of the current sampling module (8) and the voltage value Vds across the measured MOSFET (7), and calculate the actual energy consumption value of the MOSFET (7) according to the energy formula: Therefore, the energy consumed by the line impedance (6) and the diode (4) is E2 = E-E1;

[0039] S103: Since the line impedance (6) and the diode (4) are both pure resistive elements, the energy consumed by the line impedance (6) is calculated according to the formula: The energy consumed by diode (4) is That is, E2 = E3 + E4;

[0040] S104: According to the above formula and the simultaneous equation, the value of the line impedance (6) can be obtained and substituted into the energy formula to obtain the compensation energy value:

[0041] S105: Determine the avalanche withstand capability of MOSFET (7) in the MOSFET avalanche energy test method L is the inductance of the inductor (2), Vds is the voltage value across the tested MOSFET, Vd is the voltage value across the diode, I is the current value of the current measurement module (5), and R is the resistance value of the line impedance (6), thereby calculating the accurate avalanche withstand capacity of the MOSFET (7).

[0042] In addition, it is obvious in the MOSFET avalanche energy testing method of this embodiment that its compensation energy is more obvious in the low-voltage and high-current UIS measurement circuit. Therefore, this compensation method is more important in the low-voltage and high-current UIS measurement circuit, and accurately and quickly solves the measurement error problem of MOSFET avalanche energy.

[0043] Embodiment three:

[0044] like Figure 2 As shown, the pin signals of the MOSFET device under test are: VGS is the voltage between the gate and source of the MOSFET device under test; IDS is the current flowing between the drain and source of the MOSFET device under test; VDS is the voltage between the drain and source of the MOSFET device under test 10; in addition, time T1 is the process in which the MOSFET device under test works in the linear region, the current continues to increase, and the inductor stores energy at the same time; time T2 is the process in which the MOSFET device under test works in the cut-off region and absorbs avalanche energy.

[0045] It should be understood that the specific embodiments described above are only used to explain the present invention, and are not used to limit the present invention. Obvious changes or modifications derived from the spirit of the present invention are still within the protection scope of the present invention.

Claims

1. A MOSFET avalanche energy compensation method, the UIS test circuit used comprises a DC power supply (1), an inductor (2), a switch (3), a diode (4), a gate drive module (5), a line impedance (6), a MOSFET (7) and a current sampling module (8); the positive electrode of the DC power supply (1) is connected to the inductor (2) through the switch (3); the inductor (2) is connected to the drain of the MOSFET (7) under test through the line impedance (6); the gate of the MOSFET (7) under test is connected to the gate drive module (5); the gate drive module (5) controls the on-off between the source and the drain through a control signal; the source of the MOSFET (7) under test is connected to the negative electrode of the DC power supply (1) through the current sampling module (8); the diode (4) is connected in parallel with the MOSFET (7) under test to maintain the current in the loop; the control signal of the switch (3) and the control signal of the gate drive module (5) are generated simultaneously; It is characterized in that The MOSFET avalanche energy compensation method comprises the following steps: S101: Perform UIS pre-test of MOSFET avalanche energy, set the inductance L and current I, and calculate the loading energy according to the energy formula: ; S102: Obtaining the current value of the current sampling module (8) and the voltage value across the measured MOSFET (7) VdS According to the energy formula, the actual energy consumption of MOSFET (7) is , so the energy consumed by the line impedance (6) and the diode (4) is ; S103: Since the line impedance (6) and the diode (4) are both pure resistive elements, the energy consumed by the line impedance (6) is calculated according to the formula: , the energy consumed by diode (4) is ,Right now ; S104: According to the above formula and the simultaneous equation, the value of line impedance (6) can be obtained and substituted into the energy formula to obtain the compensation energy value ratio: ; S105: According to the MOSFET avalanche energy test method, the avalanche energy of MOSFET (7) is , L is the inductance of the inductor (2), Vds is the voltage value across the tested MOSFET, Vd is the voltage value across the diode, I is the current value of the current sampling module (8), and R is the resistance value of the line impedance (6), thereby calculating the accurate avalanche energy of the MOSFET (7).

2. The MOSFET avalanche energy compensation method according to claim 1, comprising the following steps: S201: Connecting the MOSFET (7) under test to the UIS test circuit; S202: When the switch (3) and the MOSFET (7) are turned on at the same time, the positive electrode of the DC power supply (1), the switch (3), the inductor (2), the MOSFET (7), the current sampling module (8) and the negative electrode of the DC power supply (1) form a charging circuit, and the inductor (2) stores energy; S203: When the switch (3) and the MOSFET (7) are turned off at the same time, the inductor (2) releases electric energy, applies an avalanche voltage to the MOSFET (7) to cause the MOSFET (7) to enter an avalanche breakdown state, and the inductor (2), the MOSFET (7), the current sampling module (8), and the diode (4) form a test loop to measure the avalanche energy of the MOSFET (7).

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