Bonding wire and semiconductor package including the same

Abstract

A bonding wire, a semiconductor package including the bonding wire, and a wire bonding method are provided. A bonding wire for connecting a first pad to a second pad is provided. The bonding wire includes a ball portion bonded to the first pad, a neck portion formed on the ball portion, and a wire portion extending from the neck portion to the second pad. At least a portion of the top surface of the neck portion is not covered by the wire portion, and the wire portion is in contact with the neck portion, the ball portion, and the first pad.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2018-0116580 filed on September 28, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a bonding wire having a reduced loop height and a strong connection structure, a semiconductor package including the bonding wire, and a wire bonding method. Background Art

[0004] A semiconductor package may include an assembly board and a plurality of semiconductor chips stacked on the assembly board. A plurality of semiconductor chips may be stacked on the assembly board using an adhesive film. A bonding wire may be connected between two adjacent semiconductor chips stacked using an adhesive film. The bonding wire may have a ring height. As the size and thickness of semiconductor packages used in electronic devices decrease, it is necessary to reduce the ring height of bonding wires in semiconductor packages. Summary of the invention

[0005] Various exemplary embodiments provide a bonding wire for reducing a ring height and ensuring reliability of a connection structure, and a semiconductor package including the bonding wire.

[0006] Various exemplary embodiments also provide a wire bonding method that reduces a loop height of a bonding wire and ensures reliability of a connection structure.

[0007] According to one aspect of an exemplary embodiment, a bonding wire for connecting a first pad to a second pad is provided. The bonding wire includes a ball portion bonded to the first pad, a neck portion formed on the ball portion, and a wire portion extending from the neck portion to the second pad. At least a portion of the top surface of the neck portion is not covered by the wire portion, and the wire portion contacts the neck portion, the ball portion, and the first pad.

[0008] According to one aspect of another exemplary embodiment, there is provided a semiconductor package, comprising: a semiconductor chip having a first pad on a top surface of the semiconductor chip; an assembly board having a second pad on a top surface of the assembly board, the semiconductor chip being mounted on the assembly board; and a bonding wire configured to connect the first pad to the second pad. The bonding wire comprises a ball portion bonded to the first pad; a neck formed on the ball portion; and a wire portion extending from the neck to the second pad, a portion of the top surface of the neck being covered by the wire portion, and the wire portion being in contact with the neck, the ball portion, and the first pad.

[0009] According to one aspect of an exemplary embodiment, a semiconductor package is provided, comprising: a semiconductor chip having a first pad on the top surface of the semiconductor chip; an assembly board having a second pad on the top surface of the assembly board, the semiconductor chip being mounted on the assembly board; a bonding wire; the bonding wire being configured to connect the first pad to the second pad; and an adhesive film disposed on the top surface of the semiconductor chip, the first pad, and a portion of the bonding wire. The bonding wire comprises a ball portion bonded to the first pad; a neck formed on the ball portion; a wire portion extending from the neck portion to the second pad; and a press-fit portion bonded to the second pad, the top surface of the neck portion being completely covered by the adhesive film, and the wire portion being in contact with the neck portion, the ball portion, and the first pad.

[0010] According to one aspect of an exemplary embodiment, a wire bonding method for connecting a first pad and a second pad is provided. The wire bonding method includes: forming a ball portion by bonding a free air ball generated at a first end of the wire to a first pad using a capillary; forming a neck on the ball portion by vertically moving the capillary away from the first pad; substantially flattening at least a portion of a top surface of the neck by horizontally moving the capillary toward the second pad; forming a wire portion by vertically moving the capillary toward the first pad, the wire portion being connected to the neck; and extending and bonding the wire portion to the second pad by moving the capillary to the second pad. The pressing area of ​​the wire portion is V-shaped and contacts the neck, the ball portion, and the first pad. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other aspects, features and advantages will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1A is a cross-sectional view of a semiconductor package including bonding wires according to an exemplary embodiment;

[0013] Figure 1B yes Figure 1A A cross-sectional view of region BB in FIG.

[0014] Figure 1C is a top view of the first pad portion;

[0015] Figure 1D is a top view of the second pad portion;

[0016] Figure 2A is a cross-sectional view of a semiconductor package including bonding wires according to one or more exemplary embodiments;

[0017] Figure 2B yes Figure 2A A cross-sectional view of region BB in FIG.

[0018] Figure 3 is a flow chart of a wire bonding method according to an exemplary embodiment;

[0019] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G and Figure 4H are cross-sectional views of various stages in a wire bonding method according to an exemplary embodiment;

[0020] Figure 5 is a schematic diagram illustrating a moving direction of a capillary in a wire bonding method according to an exemplary embodiment;

[0021] Fig. 6A and Figure 6B is a cross-sectional view of some stages in a wire bonding method according to one or more exemplary embodiments;

[0022] Figure 7 is a top view of a semiconductor module including a semiconductor package according to an exemplary embodiment; and

[0023] Figure 8 is a block diagram of a system of a semiconductor package according to an exemplary embodiment. DETAILED DESCRIPTION

[0024] It should be understood that when an element or layer is referred to as "above another element or layer", "above another element or layer", "on another element or layer", "connected to another element or layer" or "coupled to another element or layer", the element or layer may be directly on another element or layer, directly above another element or layer, directly on another element or layer, directly connected to another element or layer, or directly coupled to another element or layer, or there may be intermediate elements or intermediate layers. In contrast, when an element is referred to as "directly on another element or layer", "directly above another element or layer", "directly on another element or layer", "directly connected to another element or layer" or "directly coupled to another element or layer", there are no intermediate elements or intermediate layers. The same reference numerals always refer to the same element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0025] Figure 1A is a cross-sectional view of a semiconductor package including bonding wires according to an exemplary embodiment. Figure 1B yes Figure 1A Cross-sectional view of region BB in FIG. Figure 1C is a top view of the first pad portion. Figure 1D is a top view of the second pad portion.

[0026] Reference Figure 1A , Figure 1B , Figure 1C and Figure 1D , the semiconductor package 100 may include a first semiconductor chip 110 , a second semiconductor chip 120 , an assembly board 210 , a molding member 310 , and bonding wires 10 .

[0027] The semiconductor package 100 may include a first semiconductor chip 110 and a second semiconductor chip 120 vertically stacked on an assembly board 210 .

[0028] The first semiconductor chip 110 and the second semiconductor chip 120 may each be electrically connected to the assembly board 210 through the bonding wires 10. In addition, the first semiconductor chip 110 and the second semiconductor chip 120 may be attached to each other through the adhesive films AF.

[0029] Each of the first semiconductor chip 110 and the second semiconductor chip 120 may include a memory chip or a logic chip. For example, the first semiconductor chip 110 and the second semiconductor chip 120 may both include the same type of memory chip, or one of the first semiconductor chip 110 and the second semiconductor chip 120 may include a memory chip and the other may include a logic chip.

[0030] The memory chip may include a volatile memory chip or a nonvolatile memory chip. The volatile memory chip may include, for example, an existing volatile memory chip such as a dynamic random access memory (DRAM), a static RAM (SRAM), or a thyristor RAM (TRAM), or a volatile memory chip under development. The nonvolatile memory chip may include, for example, an existing nonvolatile memory chip such as a flash memory, a magnetic RAM (MRAM), a spin transfer torque MRAM (STT-MRAM), a ferroelectric RAM (FRAM), a phase change RAM (PRAM), or a resistive RAM (RRAM), or a nonvolatile memory chip under development.

[0031] The logic chip may be implemented as, for example, a microprocessor, a graphic processor, a signal processor, a network processor, a chipset, an audio codec, a video codec, an application processor, or a system on a chip, but is not limited thereto.

[0032] Although the semiconductor package 100 in which the first semiconductor chip 110 and the second semiconductor chip 120 are stacked is shown, the number of semiconductor chips stacked in the semiconductor package 100 is not limited to two. For example, one, three, four or more semiconductor chips may be stacked in the semiconductor package 100.

[0033] The first semiconductor chip 110 may include a first semiconductor substrate 113 and a chip pad 115. The chip pad 115 may be referred to as a first pad herein. The first semiconductor substrate 113 may have a top surface and a bottom surface facing each other. The first semiconductor substrate 113 may include a semiconductor device layer. The chip pad 115 may be formed on the semiconductor device layer. The chip pad 115 may include at least one material of aluminum (Al), copper (Cu), nickel (Ni), tungsten (W), platinum (Pt) and gold (Au).

[0034] The first semiconductor substrate 113 may include, for example, silicon. Alternatively, the first semiconductor substrate 113 may include a semiconductor element such as germanium or a compound semiconductor such as silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide (InAs), or indium phosphide (InP). The first semiconductor substrate 113 may have a silicon-on-insulator (SOI) structure. For example, the first semiconductor substrate 113 may include a buried oxide (BOX) layer. The first semiconductor substrate 113 may include a conductive region, such as a well doped with impurities or a structure doped with impurities. The first semiconductor substrate 113 may have a variety of isolation structures including a shallow trench isolation (STI) structure.

[0035] A passivation layer may be formed on the first semiconductor substrate 113 to protect the semiconductor device layer and other structures in the first semiconductor substrate 113 from external impact or moisture. The passivation layer may expose at least a portion of the top surface of the chip pad 115 .

[0036] An adhesive film may be disposed between the top surface of the assembly board 210 and the bottom surface of the first semiconductor chip 110 to attach the first semiconductor chip 110 to the assembly board 210 .

[0037] The second semiconductor chip 120 may be mounted on the top surface of the first semiconductor chip 110. An adhesive film AF may be disposed between the top surface of the first semiconductor chip 110 and the bottom surface of the second semiconductor chip 120 to attach the second semiconductor chip 120 to the first semiconductor chip 110.

[0038] The second semiconductor chip 120 may include a second semiconductor substrate 123 and a chip pad 125. The second semiconductor substrate 123 may have a top surface and a bottom surface facing each other. The second semiconductor substrate 123 may include a semiconductor device layer. The chip pad 125 may be formed on the semiconductor device layer.

[0039] Adhesive film AF may include, for example, die attach film (DAF). DAF may be divided into inorganic adhesives or polymer adhesives. Polymer adhesives may be divided into thermosetting resins and thermoplastic resins. Thermosetting resins have a three-dimensional cross-linked structure after the monomer is heated and do not soften when reheated. In contrast, thermoplastic resins show plasticity when heated and have a linear polymer structure. There is also a hybrid type produced by mixing these two types of resins.

[0040] The assembly board 210 is a support board and may include a body portion 211, a lower protective layer, and an upper protective layer. The assembly board 210 may be formed based on a printed circuit board (PCB), a wafer substrate, a ceramic substrate, a glass substrate, an interposer, etc. In some exemplary embodiments, the assembly board 210 may include a PCB. However, the assembly board 210 is not limited to a PCB.

[0041] Internal wiring 214 may be formed in assembly board 210. Internal wiring 214 may be electrically connected to first and second semiconductor chips 110 and 120 through bonding wires 10 connected to upper pads 215 in the top surface of assembly board 210. Upper pads 215 may be referred to herein as second pads.

[0042] In addition, the external connection terminal 230 may be located on the lower pad 213 in the bottom surface of the assembly board 210. The assembly board 210 may be electrically connected to and mounted on a module board or a system board of an electronic product through the external connection terminal 230. The external connection terminal 230 may include, for example, a column structure, a ball structure, or a solder layer.

[0043] Internal wiring 214 may be formed in a single layer or multiple layers in the body portion 211. External connection terminals 230 may be electrically connected to the first and second semiconductor chips 110 and 120 through the internal wiring 214. The lower and upper protective layers protect the body portion 211 and may include, for example, solder resist.

[0044] When the assembly board 210 is a PCB, the main body 211 can be implemented by compressing a polymer material such as a thermosetting resin, an epoxy resin such as flame retardant 4 (FR-4), bismaleimide triazine (BT) or Ajinomoto build-up film (ABF), or a phenolic resin to a certain thickness to form a thin profile, coating both surfaces of the thin profile with copper foil, and using patterning to form an internal wiring 214 (i.e., a transmission path for electrical signals). In addition to the lower pad 213 and the upper pad 215, a lower protective layer and an upper protective layer can also be formed by coating the entire bottom surface and top surface of the main body 211 with a solder resist layer.

[0045] Meanwhile, the PCB may be classified into a single-layer PCB having the internal wiring 214 on only one side and a double-layer PCB having the internal wiring 214 on both sides. In addition, at least three layers of copper foil may be formed using an insulator called a prepreg, and at least three internal wirings 214 may be formed according to the number of layers of the copper foil, thereby realizing a multi-layer PCB. The assembly board 210 is not limited to the structure or material of the above-mentioned PCB.

[0046] The molding member 310 may be formed to surround the first and second semiconductor chips 110 and 120 and the bonding wires 10 .

[0047] The molding member 310 may include, for example, an epoxy molding compound. In some exemplary embodiments, the molding member 310 is not limited to the epoxy molding compound, but may include various materials such as epoxy materials, thermosetting materials, thermoplastic materials, ultraviolet (UV) materials, etc. Thermosetting materials may include phenolic curing agents, anhydride curing agents, amine curing agents, and acrylic polymer additives.

[0048] The molding member 310 is formed by injecting an appropriate amount of molding material onto the assembly board 210 through an injection process, thereby forming the outer shape of the semiconductor package 100. If necessary, the outer shape of the semiconductor package 100 is formed by applying pressure to the molding material in a pressurization process such as pressing. At this time, the process conditions such as the delay time between the injection and pressing of the molding material, the amount of the injection molding material, and the pressing temperature / pressure may be set in consideration of the physical properties of the molding material such as viscosity.

[0049] A side surface and a top surface of the molding member 310 may be at right angles. A marking pattern (eg, a barcode, numbers, characters, or symbols) including information of the first and second semiconductor chips 110 and 120 may be formed in a portion of the side surface of the molding member 310 .

[0050] The molding member 310 may be used to protect the first semiconductor chip 110 and the second semiconductor chip 120 from external influences such as contamination and impact. To this end, the molding member 310 may have a thickness at least sufficient to completely surround the first semiconductor chip 110 and the second semiconductor chip 120. The molding member 310 completely covers the assembly board 210, and the width of the molding member 310 may be substantially the same as the width of the semiconductor package 100.

[0051] The bonding wires 10 may electrically connect each of the chip pads 115 and 125 to the upper pad 215 .

[0052] At least one of a control signal, a power signal, and a ground signal for operation of each of the first semiconductor chip 110 and the second semiconductor chip 120 may be received through the bonding wire 10. A data signal to be stored in each of the first semiconductor chip 110 and the second semiconductor chip 120 may be received through the bonding wire 10. Data stored in the first semiconductor chip 110 and the second semiconductor chip 120 may be output through the bonding wire 10.

[0053] Although the bonding wires 10 are arranged only on one surface of each of the first semiconductor chip 110 and the second semiconductor chip 120 in the drawings, the arrangement of the bonding wires 10 is not limited thereto. For example, the bonding wires 10 may be arranged on each of at least two surfaces of each of the first semiconductor chip 110 and the second semiconductor chip 120.

[0054] The bonding wire 10 may include at least one material of Au, silver (Ag), Cu, and Al. In some exemplary embodiments, the bonding wire 10 may be connected using thermocompression bonding, ultrasonic bonding, or thermosonic bonding, which is a combination of thermocompression bonding and ultrasonic bonding.

[0055] For convenience of description, the bonding wire 10 connecting the chip pad 115 of the first semiconductor chip 110 to the upper pad 215 will be exemplarily described.

[0056] The bonding wire 10 may include a ball portion 11, a neck portion 13, a line portion 15, and a stitch part 17. Specifically, the ball portion 11 may be in direct contact with the top surface of the chip pad 115. The neck portion 13 may be located on the top surface of the ball portion 11. The stitch part 17 may be in direct contact with the top surface of the upper pad 215. The line portion 15 may connect the neck portion 13 and the stitch part 17 to each other. In other words, the bonding wire 10 may be bonded to the chip pad 115 using a ball bonding method and bonded to the upper pad 215 using a stitch bonding method.

[0057] At least a portion of the top surface 13T of the neck portion 13 of the bonding wire 10 may not be covered by the wire portion 15. The portion of the top surface 13T of the neck portion 13 not covered by the wire portion 15 may be substantially flat.

[0058] In some exemplary embodiments, the wire portion 15 of the bonding wire 10 may contact the neck portion 13, the ball portion 11, and the chip pad 115. In detail, the wire portion 15 may contact the top and side surfaces of the neck portion 13, the top and side surfaces of the ball portion 11, and the top surface of the chip pad 115.

[0059] In some exemplary embodiments, a V-shaped pressing area 15P may be formed in a portion of the wire portion 15 of the bonding wire 10 connected to the neck portion 13. A recessed point in the pressing area 15P (i.e., a point in the pressing area 15P where the top surface of the wire portion 15 is at the lowest level) may be located in an area where the wire portion 15 contacts the top surface of the chip pad 115. The level of the recessed point in the pressing area 15P may be lower than that of the top surface 13T of the neck portion 13. In addition, the lowest bottom surface of the pressing area 15P may contact the top surface of the chip pad 115 along the edge of the bottom surface of the ball portion 11.

[0060] In some exemplary embodiments, a portion of the bonding wire 10 may pass through the inside of the adhesive film AF. The adhesive film AF may have a V-shaped protruding area AFP in a portion corresponding to the pressed area 15P.

[0061] In the side cross-sectional view, the sum TH of the height of the ball portion 11 and the height of the neck 13 may be about 35 μm to about 40 μm. When the sum TH of the height of the ball portion 11 and the height of the neck 13 is less than 35 μm, the reliability of the strong connection structure may be reduced. In contrast, when the sum TH of the height of the ball portion 11 and the height of the neck 13 is greater than 40 μm, the thickness AFH of the adhesive film AF increases, and therefore, it may be difficult to realize a short and lightweight semiconductor package.

[0062] like Figure 1C As shown, the diameter 11D of the ball portion 11 may be greater than the diameter 13D of the neck portion 13. The diameter 13D of the neck portion 13 may be smaller than the maximum width 15PW of the pressed area 15P. The diameter 15D of the normal area of ​​the wire portion 15 may be smaller than the maximum width 15PW of the pressed area 15P.

[0063] The bonding wire 10 may be bent to form a loop. In this case, the loop height LH from the top surface of the chip pad 115 to the highest top surface of the bonding wire 10 may be greater than the height from the top surface of the chip pad 115 to the recessed point 15V of the bonding wire at the pressing area 15P. In other words, the height of the recessed point 15V of the bonding wire 10 may be relatively lower than the loop height LH. The adhesive film AF may be formed such that the thickness AFH of the adhesive film AF is greater than the loop height LH of the bonding wire 10, thereby preventing the bonding wire 10 from directly contacting the second semiconductor chip 120.

[0064] Since the pressed area 15P is formed by applying a mechanical force to the wire portion 15 , a cutting defect may occur in the pressed area 15P of the wire portion 15 .

[0065] According to an exemplary embodiment, the V-shaped pressing area 15P in the bonding wire 10 is formed to contact the neck portion 13 , the ball portion 11 , and the chip pad 115 , so that the loop height LH of the bonding wire 10 may be reduced and the occurrence of cutting defects in the pressing area 15P may also be reduced.

[0066] Therefore, in the semiconductor package 100 including the bonding wire 10 having the pressed area 15P, the thickness AFH of the adhesive film AF covering a portion of the bonding wire 10 may be reduced.

[0067] Therefore, the semiconductor package 100 including the bonding wire 10 can reduce the loop height LH of the bonding wire 10 and ensure the reliability of the connection structure, thereby reducing the overall thickness of the semiconductor package 100. Therefore, the semiconductor package 100 can have high integration and high capacity and can be short and lightweight.

[0068] Figure 2A is a cross-sectional view of a semiconductor package including a bonding wire 20 according to some exemplary embodiments. Figure 2B yes Figure 2A Cross-section of region BB.

[0069] Since the elements of the bonding wire 20 and the elements of the semiconductor package 200 and the materials included in each element are the same as those in the above reference Figure 1A , Figure 1B , Figure 1C and Figure 1D Those described are the same or similar, so the following description will focus on the differences.

[0070] Reference Figure 2A and Figure 2B , the semiconductor package 200 may include a first semiconductor chip 110 , a second semiconductor chip 120 , an assembly board 210 , a molding member 310 , and bonding wires 20 .

[0071] The bonding wire 20 may include a ball portion 21, a neck portion 23, a wire portion 25, and a press-fit portion 27. Specifically, the ball portion 21 may be in direct contact with the top surface of the chip pad 115. The neck portion 23 may be located on the top surface of the ball portion 21. The press-fit portion 27 may be in direct contact with the top surface of the upper pad 215. The wire portion 25 may connect the neck portion 23 and the press-fit portion 27 to each other. In other words, the bonding wire 20 may be bonded to the chip pad 115 using a ball bonding method and bonded to the upper pad 215 using a press-fit bonding method.

[0072] The top surface 23T of the neck 23 of the bonding wire 20 may not be covered by the wire portion 25. In other words, the entire top surface 23T of the neck 23 may be completely covered by the adhesive film AF. The top surface 23T of the neck 23 not completely covered by the wire portion 25 may be substantially flat.

[0073] In some exemplary embodiments, the wire portion 25 of the bonding wire 20 may contact the neck portion 23, the ball portion 21, and the chip pad 115. Specifically, the wire portion 25 of the bonding wire 20 may contact the side surface of the neck portion 23, the top and side surfaces of the ball portion 21, and the top surface of the chip pad 115.

[0074] Figure 3 is a flow chart of a wire bonding method according to an exemplary embodiment.

[0075] The wire bonding method may include the processes described below. The order of the processes may be different from the order of the processes described. For example, two processes described sequentially may be performed substantially simultaneously or in reverse order.

[0076] Reference Figure 3 , the wire bonding method S10 may include: in operation S110, forming a ball portion by bonding a free air ball generated at an end of the wire to a first pad using a capillary; in operation S120, forming a neck on the ball portion by vertically moving the capillary upward; in operation S130, making at least a portion of a top surface of the neck substantially horizontal by horizontally moving the capillary toward a second pad; in operation S140, forming a wire portion connected to the neck by vertically moving the capillary downward; and in operation S150, extending and bonding the wire portion to the second pad by moving the capillary to the second pad.

[0077] In the wire bonding method S10, a V-shaped pressing area is formed so that the wire portion can contact the neck portion, the ball portion, and the first pad, so that the loop height of the bonding wire formed on the first pad can be reduced, and cutting defects in the neck portion and the wire portion can also be reduced. At this time, the capillary can move from the first pad toward the second pad instead of moving in the opposite direction.

[0078] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G and Figure 4H are cross-sectional views of various stages in a wire bonding method according to an exemplary embodiment.

[0079] Reference Figure 4A , the first semiconductor chip 110 may include a chip pad 115. The assembly board 210 may include an upper pad 215. Hereinafter, the chip pad 115 and the upper pad 215 are referred to as a first pad and a second pad, respectively.

[0080] The first semiconductor chip 110 may be arranged on the assembly board 210 in a manner that the second pads 215 are not covered. An adhesive film may be provided between the top surface of the assembly board 210 and the bottom surface of the first semiconductor chip 110 to attach the first semiconductor chip 110 to the assembly board 210.

[0081] The capillary CA may be arranged, for example, at a first bonding position above the first pad 115. In some exemplary embodiments, the capillary CA may be located at a level corresponding to a certain height above the first pad 115 (eg, an electronic flame-off height).

[0082] A portion of the reserved wire 10P may protrude from the center hole of the capillary CA. The reserved wire 10P may include at least one material of Au, Ag, Cu, and Al. An electric spark may be provided to the reserved wire 10P protruding from the center hole of the capillary CA so that the lower end of the reserved wire 10P may be melted. Therefore, a free air ball 10F may be formed at the lower end of the reserved wire 10P in the center hole of the capillary CA. In some exemplary embodiments, ultrasonic energy or heat energy may be provided to the lower end of the reserved wire 10P instead of the electric spark.

[0083] The reserved wire 10P can be restricted from moving in the capillary CA by closing the clamp.

[0084] Reference Figure 4B , the capillary CA can move toward the first pad 115 so that the free air ball 10F (see Figure 4A ) may contact the first pad 115.

[0085] The free air ball 10F may be pressed between the capillary CA and the first pad 115, so that the ball portion 11 and the neck portion 13 may be formed at the lower end of the reserved line 10P. Heat energy and / or ultrasonic energy may be provided to the first semiconductor chip 110 so that the ball portion 11 may be bonded to the first pad 115. Therefore, a ball bonding method of bonding the ball portion 11 to the first pad 115 may be implemented.

[0086] The neck 13 may be formed in conformity with the chamfer in the capillary CA. The diameter of the neck 13 may be smaller than the diameter of the ball 11. Therefore, the neck 13 may be completely seated on the top surface of the ball 11.

[0087] Reference Figure 4C , the capillary CA may move upward perpendicularly to the top surface of the first pad 115 , so that the neck 13 may be exposed outside the capillary CA.

[0088] The capillary CA may vertically move to a height corresponding to a first distance D1 from the first pad 115. The first distance D1 may be about 35 μm to about 40 μm.

[0089] In some exemplary embodiments, the capillary CA may be moved vertically until the top surface of the neck 13 is at the same level as the bottom surface of the capillary CA.

[0090] Reference Figure 4D , the capillary CA may move toward the second pad 215 in parallel with the top surface of the first pad 115 , so that a portion of the top surface 13T of the neck 13 may be exposed.

[0091] The capillary CA may be horizontally moved a second distance D2 from the center of the neck 13 toward the second pad 215. The second distance D2 may be about 35 μm to about 45 μm, but is not limited thereto.

[0092] In some exemplary embodiments, the capillary CA may be horizontally moved in a state where the top surface 13T of the neck 13 and the bottom surface of the capillary CA are at the same level. In this case, the top surface 13T of the neck 13 may be partially in contact with the reserved line 10P. In other words, the bottom surface of the capillary CA may push the portion of the reserved line 10P in contact with the top surface 13T of the neck 13 toward the second pad 215, so that a portion of the top surface 13T of the neck 13 may be exposed.

[0093] Reference Figure 4E The capillary CA may move downward perpendicularly to the top surface of the first pad 115 so that the bottom surface of the capillary CA may press the wire portion 15 downward, thereby forming a V-shaped pressing area 15P in the wire portion 15 connected to the neck 13 .

[0094] The pressed area 15P may be formed by applying mechanical force to the line portion 15 using the capillary CA. The capillary CA may move downward a third distance D3 from the top surface 13T of the neck 13 perpendicularly to the top surface of the first pad 115. The third distance D3 may be about 20 μm to about 30 μm, but is not limited thereto.

[0095] The capillary CA may move horizontally so that the central hole of the capillary CA may be located above the first pad 115 not occupied by the ball portion 11, and then move downward perpendicularly to the top surface of the first pad 115. The wire portion 15 may be pressed downward by the bottom surface of the capillary CA so that a pressed area 15P may be formed in the cylindrical wire portion 15, the pressed area 15P being V-shaped and having a maximum width greater than the diameter of the neck portion 13.

[0096] In some exemplary embodiments, the pressing area 15P may be formed using the capillary CA so that the line portion 15 may contact the neck portion 13, the ball portion 11, and the first pad 115. In detail, the line portion 15 may contact the top and side surfaces of the neck portion 13, the top and side surfaces of the ball portion 11, and the top surface of the first pad 115.

[0097] In some exemplary embodiments, the depressed point 15V in the pressed area 15P may be located in an area where the line portion 15 contacts the top surface of the first pad 115. In addition, the depressed point 15V in the pressed area 15P may be lower than the top surface 13T of the neck 13.

[0098] Reference Figure 4F , the capillary CA may move upward perpendicularly to the top surface of the first pad 115 .

[0099] In the side cross-sectional view, the sum TH of the height of the ball portion 11 and the height of the neck portion 13 may be about 35 μm to about 40 μm. This is because when the sum TH of the height of the ball portion 11 and the height of the neck portion 13 is less than 35 μm, the reliability of the strong connection structure may be reduced, and when the sum TH of the height of the ball portion 11 and the height of the neck portion 13 is greater than 40 μm, the thickness of the adhesive film may be increased in the subsequent process, and therefore, it may be difficult to realize a short and lightweight semiconductor package.

[0100] The jig may be opened to allow the reserved line 10P to form a line portion 15 vertically extending from the top surface of the first pad 115 .

[0101] Reference Figure 4G , the capillary CA, which has moved vertically upward from the first pad 115 , may move horizontally toward the second bonding position (eg, the second pad 215 ).

[0102] When the capillary CA moves with the clamp open, the wire portion 15 released from the lower end of the capillary CA may extend along with the sliding of the capillary CA.

[0103] Through this operation, a wire loop may be formed between the first pad 115 and the second pad 215. The wire portion 15 may form a wire loop and move along the curved path of the capillary CA without interruption.

[0104] Reference Figure 4H When the capillary CA moves vertically upward from the top surface of the second pad 215 in a state where the jig is closed, the reserved wire 10P may be cut from the nip portion 17. As a result, the bonding wire 10 electrically connecting the first pad 115 and the second pad 215 to each other may be formed.

[0105] Due to the upward movement of the capillary CA, the press-fit portion 17 may be formed in the portion where the reserved wire 10P is bonded to the second pad 215. In other words, a press-fit bonding method of bonding the press-fit portion 17 as a portion of the bonding wire 10 to the second pad 215 may be implemented.

[0106] In some exemplary embodiments, when the reserved wire 10P is cut from the nip 17 , heat energy or ultrasonic energy may be applied to the reserved wire 10P.

[0107] The capillary CA can be moved upward to a level corresponding to the electronic flame extinguishing height. Thereafter, the capillary CA can perform a new wire bonding process or be in a standby state. For example, the capillary CA can repeat Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G and Figure 4H At the various stages shown, a plurality of bonding wires 10 are formed.

[0108] Therefore, the wire bonding method can reduce the loop height of the bonding wire 10 and improve the reliability of the strong connection structure. Therefore, the semiconductor package 100 (see Figure 1A ) to form a semiconductor package 100 that is short, lightweight, highly integrated, and high-capacity.

[0109] Figure 5 is a schematic diagram illustrating a moving direction of a capillary in a wire bonding method according to an exemplary embodiment.

[0110] Reference Figure 5 , a bonding line can be formed by continuous movement of the capillary from point "a" to point "b", to point "c", to point "d", to point "e", to point "f", to point "g".

[0111] After a free air ball is formed at the end of the reserved line, the capillary can use a ball bonding method to press the free air ball down to the center of the first pad 115. When the ball portion 11 and the neck portion 13 are completely formed using the ball bonding method, the position of the capillary is marked with point "a", and the movement path of the capillary is represented by points "a", "b", "c", "d", "e", "f", and "g".

[0112] In the first movement from point "a" to point "b", the ball portion 11 and the neck portion 13 may be formed on the top surface of the first pad 115. The first movement may refer to the movement of the capillary moving upward perpendicularly to the top surface of the first pad 115, and may correspond to the above reference numeral 14. Figure 4C Description made.

[0113] In the second movement from point "b" to point "c", a portion of the top surface of the neck 13 may be formed to be substantially flat and exposed. The second movement may refer to the movement of the capillary parallel to the top surface of the first pad 115 toward the second pad 215, and may correspond to the above reference numeral 200. Figure 4D Description made.

[0114] In the third movement from point "c" to point "d", the line portion may be pressed downward by the capillary so that a V-shaped pressing area may be formed in the line portion connected to the neck 13. The third movement may refer to a movement in which the capillary moves downward perpendicularly to the top surface of the first pad 115 and may correspond to the above reference numeral 140. Figure 4E Description made.

[0115] In the fourth movement from point "d" to point "e", the line portion may be elongated. The fourth movement may refer to the movement of the capillary moving upward perpendicularly to the top surface of the first pad 115, and may correspond to the above reference numeral 140. Figure 4F Description made.

[0116] In the fifth movement from point "e" to point "f", the wire portion may slide along the curved path of the capillary toward the second pad 215 and fall on the second pad 215. The fifth movement may refer to the movement of the capillary along the curved path from the top surface of the first pad 115 toward the center of the second pad 215, and may correspond to the above reference numeral 240. Figure 4G Description made.

[0117] In the sixth movement from point "f" to point "g", the reserved line is cut off to form a press-fit portion, so that a bonding wire electrically connecting the first pad 115 and the second pad 215 to each other can be formed. The sixth movement may refer to a movement in which the capillary moves upward perpendicularly to the top surface of the second pad 215, and may correspond to the above reference Figure 4H Description made.

[0118] In the wire bonding method according to an exemplary embodiment, the consecutive first to sixth movements of the capillary from point "a" to point "b", to point "c", to point "d", to point "e", to point "f", and to point "g" can be performed in the direction from the first pad 115 to the second pad 215, rather than in the opposite direction.

[0119] Therefore, since the capillary only moves horizontally forward from the center of the first pad 115 to the center of the second pad 215, but not in the opposite direction, the product efficiency and process efficiency of the bonding wire can be improved.

[0120] Fig. 6A and Figure 6B are cross-sectional views of some stages in a wire bonding method according to some exemplary embodiments.

[0121] In detail, the following description will be given based on the above reference Figure 2A and Figure 2B An example of a method of manufacturing the bonding wire 20 of the exemplary embodiment is described.

[0122] Fig. 6A Corresponding to the above reference Figure 4D Describe the stage. Figure 6B Corresponding to the above reference Figure 4E The method for manufacturing the bonding wire 20 is similar to that described above. Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F , Figure 4G and Figure 4H The wire bonding methods described are the same or similar, and the following description will focus on the differences between these methods.

[0123] Reference Fig. 6A , the capillary CA may move toward the second pad 215 in parallel with the top surface of the first pad 115 , so that the top surface 23T of the neck 23 may be completely exposed without being covered by the reserved line 20P.

[0124] The capillary CA may be moved horizontally from the center of the neck 23 toward the second pad 215 by a second distance D2′. The second distance D2′ may be greater than the above reference Figure 4D The second distance D2 is described as the second distance D2′ may be about 35 μm to about 45 μm, but is not limited thereto.

[0125] In some exemplary embodiments, the capillary CA may move horizontally in a state where the top surface 23T of the neck portion 23 and the bottom surface of the capillary CA are at the same level.

[0126] In this case, the top surface 23T of the neck 23 may not contact the reserved line 20P, but the side surface of the neck 23 may contact the reserved line 20P. In other words, the bottom surface of the capillary CA may push all the reserved lines 20P in contact with the top surface 23T of the neck 23 toward the second pad 215, so that all the top surface 23T of the neck 23 may be exposed.

[0127] Reference Figure 6B The capillary CA may move downward perpendicularly to the top surface of the first pad 115 , so that the capillary CA may press the line portion 25 downward, thereby forming a V-shaped pressing area 25P in the line portion 25 connected to the neck 23 .

[0128] The pressing area 25P may be formed by applying mechanical force to the line portion 25 using the capillary CA. The capillary CA may move downward from the top surface 23T of the neck portion 23 perpendicularly to the top surface of the first pad 115 by a third distance D3. The third distance D3 may be about 20 μm to about 30 μm (not limited thereto).

[0129] In some exemplary embodiments, the pressing area 25P may be formed using the capillary CA so that the line portion 25 may contact the neck portion 23, the ball portion 21, and the first pad 115. Specifically, the line portion 25 may contact the side surface of the neck portion 23, the top surface and side surface of the ball portion 21, and the top surface of the first pad 115.

[0130] In some exemplary embodiments, the depressed point 25V of the pressed area 25P may be located in an area where the line portion 25 contacts the top surface of the first pad 115. Also, the depressed point 25V of the pressed area 25P may be lower than the top surface 23T of the neck 23.

[0131] Therefore, according to the present exemplary embodiment, the wire bonding method can reduce the loop height of the bonding wire 20 and ensure the reliability of a strong connection structure. Therefore, the semiconductor package 200 (see FIG. 2 ) including the bonding wire 20 can be reduced. Figure 2A ) to achieve a semiconductor package 200 that is short, light, highly integrated, and has a high capacity.

[0132] Figure 7 is a top plan view of a semiconductor module including a semiconductor package according to an exemplary embodiment.

[0133] Reference Figure 7 , the semiconductor module 1000 may include a module board 1010 , a control chip 1020 mounted on the module board 1010 , and a plurality of semiconductor packages 1030 mounted on the module board 1010 .

[0134] A plurality of input / output terminals 1050 that can be inserted into a socket of a main board may be arranged on one side of the module board 1010. At least one of the semiconductor packages 1030 may include a reference Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 2A and Figure 2B Any of the semiconductor packages 100 and 200 described.

[0135] Figure 8 is a block diagram of a system of a semiconductor package according to an exemplary embodiment.

[0136] Reference Figure 8 , the system 1100 may include a controller 1110 , an input / output device 1120 , a memory 1130 , an interface 1140 , and a bus 1150 .

[0137] The system 1100 may send or receive information. The system 1100 may be a mobile system. In some example embodiments, the mobile system may be a portable computer, a web tablet, a mobile phone, a digital music player, or a memory card.

[0138] The controller 1110 may control executable programs in the system 1100. The controller 1110 may include a microprocessor, a digital signal processor, a microcontroller, or a device similar thereto.

[0139] The input / output device 1120 may be used to input or output data of the system 1100. The system 1100 may be connected to an external device (e.g., a personal computer or a network) via the input / output device 1120, and may exchange data with the external device. The input / output device 1120 may include, for example, a touch panel, a keyboard, or a display.

[0140] The memory 1130 may store data used for the operation of the controller 1110 or data processed by the controller 1110. The memory 1130 may include a reference Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 2A and Figure 2B Any of the semiconductor packages 100 and 200 described.

[0141] The interface 1140 may be a data transmission path between the system 1100 and an external device. The controller 1110 , the input / output device 1120 , the memory 1130 , and the interface 1140 may communicate with each other via a bus 1150 .

[0142] While the inventive concepts have been particularly shown and described with reference to exemplary embodiments thereof, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A bonding wire for connecting a first pad to a second pad, the bonding wire comprising: a ball portion bonded to the first pad; a neck formed on the ball portion; as well as A line portion extending from the neck to the second pad, At least a portion of a top surface of the neck portion is not covered by the line portion, and the line portion is in contact with the neck portion, a side surface of the ball portion, and the first pad.

2. The bonding wire according to claim 1, wherein A first portion of the top surface of the neck is covered by the line portion, and a second portion of the top surface of the neck adjacent to the first portion is substantially flat.

3. The bonding wire according to claim 2, wherein: The line portion contacts a top surface of the neck portion, a side surface of the neck portion, a top surface of the ball portion, the side surface of the ball portion, and a top surface of the first pad.

4. The bonding wire according to claim 1, wherein The entire top surface of the neck is not covered by the line portion, and the top surface of the neck is substantially flat.

5. The bonding wire according to claim 4, wherein The line portion contacts a side surface of the neck portion, a top surface of the ball portion, the side surface of the ball portion, and a top surface of the first pad.

6. The bonding wire according to claim 1, wherein The pressed area of ​​the wire portion is V-shaped and connected to the neck portion and the side surfaces of the ball portion.

7. The bonding wire according to claim 6, wherein In a side cross-sectional view of the bonding wire, a bottom surface of the pressing region contacts a top surface of the first pad along an edge of a bottom surface of the ball portion.

8. The bonding wire according to claim 6, wherein In the top view of the joining wire, the diameter of the ball portion is larger than the diameter of the neck portion, the diameter of the neck portion is smaller than the maximum width of the pressed area of ​​the wire portion, and the maximum width of the pressed area of ​​the wire portion is larger than the diameter of the normal area of ​​the wire portion. 9 . The bonding wire according to claim 1 , further comprising a press-fit portion provided at an end portion of the wire portion and directly bonded to the second pad.

10. The bonding wire according to claim 9, wherein The bonding wire is bonded to the first pad using a ball bonding method and is bonded to the second pad using a press bonding method.

11. A semiconductor package, comprising: a semiconductor chip having a first pad on a top surface of the semiconductor chip; an assembly board having a second pad on a top surface of the assembly board, the semiconductor chip being mounted on the assembly board; as well as a bonding wire configured to connect the first pad to the second pad, Wherein, the bonding wire comprises: a ball portion bonded to the first pad; a neck formed on the ball; and a line portion extending from the neck portion to the second pad, and A portion of a top surface of the neck portion is covered by the line portion, and the line portion is in contact with the neck portion, a side surface of the ball portion, and the first pad.

12. The semiconductor package according to claim 11, further comprising an adhesive film disposed on a top surface of the semiconductor chip, the first pad, and a portion of the line portion, in, The adhesive film has a thickness greater than a distance from a top surface of the first pad to a highest top surface of the line portion.

13. The semiconductor package according to claim 12, wherein: The portion of the line portion contacts a top surface of the neck portion, a side surface of the neck portion, a top surface of the ball portion, the side surface of the ball portion, and a top surface of the first pad.

14. The semiconductor package according to claim 13, wherein: A protruding area of ​​the adhesive film in an area where the line portion contacts the top surface of the first pad is V-shaped.

15. The semiconductor package according to claim 11, wherein The bonding wire is bonded to the first pad using a ball bonding method and is bonded to the second pad using a press bonding method.

16. A semiconductor package, comprising: a semiconductor chip having a first pad on a top surface of the semiconductor chip; an assembly board having a second pad on a top surface of the assembly board, the semiconductor chip being mounted on the assembly board; a bonding wire configured to connect the first pad to the second pad; as well as an adhesive film disposed on the top surface of the semiconductor chip, the first pad, and a portion of the bonding wire, Wherein, the bonding wire comprises: a ball portion bonded to the first pad; a neck formed on the ball portion; A line portion extending from the neck portion to the second pad; and bonded to the press-fit portion of the second pad, and wherein a top surface of the neck portion is completely covered by an adhesive film, and the wire portion is in contact with the neck portion, a side surface of the ball portion, and the first pad.

17. The semiconductor package according to claim 16, wherein: The adhesive film has a thickness greater than a sum of a height of the ball portion and a height of the neck portion.

18. The semiconductor package according to claim 16, wherein: The line portion contacts a side surface of the neck portion, a top surface of the ball portion, the side surface of the ball portion, and a top surface of the first pad.

19. The semiconductor package according to claim 18, wherein: The pressing area of ​​the line portion is V-shaped and contacts the top surface of the first pad along an edge of the bottom surface of the ball portion.

20. The semiconductor package according to claim 16, wherein The bonding wire is bonded to the first pad using a ball bonding method and is bonded to the second pad using a press bonding method.

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