Infrared detector driving circuit and infrared detector system

Abstract

The present invention discloses a driver circuit for an infrared detector and an infrared detector system. The driver circuit includes a power supply circuit for powering the driver circuit chip and the infrared detector's readout circuit; a bias voltage driver circuit for providing a driving bias voltage level for the infrared detector; and a signal conditioning circuit for differentially outputting the analog signal output by the infrared detector. The driver circuit of the present invention completes the driving of the infrared detector and the preliminary conditioning of the analog signal.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit design, and in particular to a driving circuit of an infrared detector and an infrared detector system. Background Art

[0002] The infrared detector driver circuit bridges the gap between the detector and the main signal processing board. It provides the infrared detector with power supply voltage and various biases, enabling proper operation and outputting infrared imaging signals. This signal is then fed into the main signal processing circuit for photoelectric signal readout and processing. The various bias voltages required for proper operation of the infrared detector must meet certain tolerances, variable ranges, bias noise, and maximum current requirements. Furthermore, due to inherent limitations of infrared detectors and their manufacturing process, they are highly sensitive to external input signals, resulting in weak output signals and susceptibility to interference. Summary of the Invention

[0003] The embodiments of the present invention provide a driving circuit for an infrared detector and an infrared detector system, which are used to drive the infrared detector and perform preliminary conditioning of analog signals.

[0004] In a first aspect, an embodiment of the present invention provides a driving circuit for an infrared detector, comprising:

[0005] A power supply circuit, used to supply power to the chip of the driving circuit and the readout circuit of the infrared detector;

[0006] A bias voltage driving circuit, used for providing a driving bias voltage level for the infrared detector;

[0007] The signal conditioning circuit is used for performing differential output on the analog signal output by the infrared detector.

[0008] Optionally, the power supply circuit includes multiple low-dropout linear regulators (LDOs) connected in parallel;

[0009] The input ends of the multiple LDOs are all connected to VCC, and the output ends of the multiple LDOs are respectively used to power the chip of the driving circuit and the readout circuit of the infrared detector.

[0010] Optionally, the bias voltage driving circuit includes an analog bias circuit and a digital bias circuit;

[0011] The digital bias circuit is used to convert the main signal sent by the FPGA into a level so as to meet the driving level requirements of the infrared detector;

[0012] The analog bias circuit is used to provide an adjustable analog bias drive for the infrared detector.

[0013] Optionally, the digital bias circuit includes multiple level conversion circuits and RC filter circuits connected in sequence;

[0014] Wherein, the level conversion circuit is used to convert the level of the main signal sent by the FPGA;

[0015] The RC filter circuit includes a first-order RC low-pass filter, and the cutoff frequency of the first-order RC low-pass filter is determined according to the frequency multiplication of the main signal.

[0016] Optionally, the analog bias circuit includes: a first-stage operational amplifier circuit and a second-stage operational amplifier circuit;

[0017] Wherein, the first-stage operational amplifier circuit includes a first amplifier, a non-inverting input terminal of the first amplifier is connected to a reference voltage, and an inverting input terminal of the first amplifier is connected to an output terminal of the first amplifier;

[0018] The second-stage operational amplifier circuit includes a second amplifier and a third amplifier, the output end of the first amplifier is connected to the non-inverting input ends of the second amplifier and the third amplifier respectively through a sliding resistor, and the inverting input ends of the second amplifier and the third amplifier are connected to the output ends of the second amplifier and the third amplifier respectively;

[0019] The output terminals of the second amplifier and the third amplifier serve as the first and second output terminals of the analog bias circuit respectively.

[0020] Optionally, the signal conditioning circuit includes: a reference circuit and a multi-channel output circuit, wherein the output end of the reference circuit is respectively connected to the input ends of the multi-channel output circuit;

[0021] The reference circuit includes a fourth amplifier, a non-inverting input terminal of the fourth amplifier is connected to a reference voltage, an inverting input terminal of the fourth amplifier is connected to an output terminal of the fourth amplifier, and the output terminal of the fourth amplifier serves as a reference voltage terminal;

[0022] Any one of the output circuits comprises: a fifth amplifier and a sixth amplifier, wherein the non-inverting input terminal of the fifth amplifier is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier is connected to the output terminal of the fifth amplifier, and the inverting input terminal of the sixth amplifier is connected to the inverting input terminal of the fifth amplifier and the output terminal of the sixth amplifier;

[0023] The non-inverting input terminal of the sixth amplifier, the output terminal of the sixth amplifier, and the output terminal of the fifth amplifier serve as the first, second, and third output terminals of the output circuit, respectively.

[0024] In a second aspect, an embodiment of the present invention provides an infrared detector system, which includes the aforementioned driving circuit.

[0025] The embodiment of the present invention completes the driving of the infrared detector and the preliminary conditioning of the analog signal through the power supply circuit, the bias voltage driving circuit and the signal conditioning circuit, and achieves positive technical effects.

[0026] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are specifically listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present invention. The same reference symbols are used throughout the drawings to represent the same components. In the drawings:

[0028] Figure 1 This is a principle block diagram of a driving circuit according to a first embodiment of the present invention;

[0029] Figure 2 This is a power supply block diagram of the first embodiment of the present invention;

[0030] Figure 3 This is a block diagram of the digital bias principle of the first embodiment of the present invention;

[0031] Figure 4 This is a block diagram of the analog bias principle of the first embodiment of the present invention;

[0032] Figure 5 This is a block diagram of the analog signal conditioning principle of the first embodiment of the present invention. DETAILED DESCRIPTION

[0033] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0034] A first embodiment of the present invention provides a driving circuit for an infrared detector, comprising:

[0035] A power supply circuit, used to supply power to the chip of the driving circuit and the readout circuit of the infrared detector;

[0036] A bias voltage driving circuit, used for providing a driving bias voltage level for the infrared detector;

[0037] The signal conditioning circuit is used for performing differential output on the analog signal output by the infrared detector.

[0038] The embodiment of the present invention completes the driving of the infrared detector and the preliminary conditioning of the analog signal by improving the power supply circuit, the bias voltage driving circuit and the signal conditioning circuit.

[0039] Optionally, the power supply circuit includes multiple low-dropout linear regulators (LDOs) connected in parallel;

[0040] The input ends of the multiple LDOs are all connected to VCC, and the output ends of the multiple LDOs are respectively used to power the chip of the driving circuit and the readout circuit of the infrared detector.

[0041] Specifically, this embodiment proposes a design scheme for a power supply circuit, including multiple low-dropout linear regulators LDOs arranged in parallel, for example, Figure 2 The circuit includes three power supplies, among which the input ends of multiple LDOs are connected to VCC, that is, the entire circuit is powered by VCC, and the first-level power supply adjustment is provided by LDO, such as Figure 2 As shown, the specific chip selection scheme can be determined according to needs. In this embodiment, Lingte chips can be selected. For example, the solution for powering the chip of the driving circuit can be selected LT3055, with a maximum output current of 500mA to meet the power supply of 8-way operational amplifiers and other chips; the solution for providing power for the readout circuit in the detector can be two LT1761s, with a maximum output current of 100mA and a maximum noise of only 20uV within a given bandwidth.

[0042] Optionally, the bias voltage driving circuit includes an analog bias circuit and a digital bias circuit;

[0043] The digital bias circuit is used to convert the main signal sent by the FPGA into a level so as to meet the driving level requirements of the infrared detector;

[0044] The analog bias circuit is used to provide an adjustable analog bias drive for the infrared detector.

[0045] Specifically, in this embodiment, the driving bias of the infrared detector is divided into an analog bias circuit and a digital bias circuit, wherein:

[0046] The digital bias circuit converts the main signal from the FPGA to meet the infrared detector's drive level requirements. The digital bias voltage, generated by the main signal processing board FPGA, is first converted by a voltage conversion chip in the drive circuit to meet the detection drive level requirements. The analog bias circuit provides adjustable analog bias drive for the infrared detector.

[0047] Optionally, the digital bias circuit includes multiple level conversion circuits and RC filter circuits connected in sequence;

[0048] Wherein, the level conversion circuit is used to convert the level of the main signal sent by the FPGA;

[0049] The RC filter circuit includes a first-order RC low-pass filter, and the cutoff frequency of the first-order RC low-pass filter is determined according to the frequency multiplication of the main signal.

[0050] Specifically, in this embodiment, if Figure 3 As shown, the digital bias is sent by the main signal processing board FPGA, and firstly the voltage conversion chip is used for level conversion in the driving circuit to meet the driving level requirements of the detection, and then RC filtering is performed. The filtering circuit adopts a first-order RC low-pass filter, and the cut-off frequency f is designed to be aMHZ. For example, a can be twice the frequency of the digital signal Dig1. Figure 1 、 Figure 3 As shown, in this embodiment, the digital bias circuit may include multiple level conversion circuits and RC filter circuits with the same circuit structure.

[0051] Optionally, the analog bias circuit includes: a first-stage operational amplifier circuit and a second-stage operational amplifier circuit;

[0052] Wherein, the first-stage operational amplifier circuit includes a first amplifier, a non-inverting input terminal of the first amplifier is connected to a reference voltage, and an inverting input terminal of the first amplifier is connected to an output terminal of the first amplifier;

[0053] The second-stage operational amplifier circuit includes a second amplifier and a third amplifier, the output end of the first amplifier is connected to the non-inverting input ends of the second amplifier and the third amplifier respectively through a sliding resistor, and the inverting input ends of the second amplifier and the third amplifier are connected to the output ends of the second amplifier and the third amplifier respectively;

[0054] The output terminals of the second amplifier and the third amplifier serve as the first and second output terminals of the analog bias circuit respectively.

[0055] Specifically, if Figure 4 As shown, the analog bias circuit meets the requirements of voltage adjustment, low noise and small drive current. In this embodiment, it includes a first-stage operational amplifier circuit and a second-stage operational amplifier circuit. In this embodiment, the voltage reference chip ADR443 of Analog Devices can be used to provide a reference voltage eV, with a voltage regulation accuracy of ±3mV. After the reference voltage is output, it is first followed by the first-stage operational amplifier circuit (U1) to increase the drive capability. Figure 4As shown, the first-stage operational amplifier circuit includes a first amplifier U1 , a non-inverting input terminal of the first amplifier U1 is connected to a reference voltage, and an inverting input terminal of the first amplifier U1 is connected to an output terminal of the first amplifier U1 .

[0056] Then the voltage is adjusted again by the second-stage operational amplifier circuit (U2, U3). There are sliding rheostats in front of the input terminals of the U2 and U3 operational amplifiers, and the input voltage is adjusted by the sliding rheostats in conjunction with the voltage divider resistors. Specifically, the second-stage operational amplifier circuit includes a second amplifier U2 and a third amplifier U3. The output terminal of the first amplifier U1 is connected to the non-inverting input terminals of the second amplifier U2 and the third amplifier U3 through the sliding rheostat, and the inverting input terminals of the second amplifier U2 and the third amplifier U3 are connected to the output terminals of the second amplifier U2 and the third amplifier U3, respectively.

[0057] Optionally, the signal conditioning circuit includes: a reference circuit and a multi-channel output circuit, wherein the output end of the reference circuit is respectively connected to the input ends of the multi-channel output circuit;

[0058] The reference circuit includes a fourth amplifier, a non-inverting input terminal of the fourth amplifier is connected to a reference voltage, an inverting input terminal of the fourth amplifier is connected to an output terminal of the fourth amplifier, and the output terminal of the fourth amplifier serves as a reference voltage terminal;

[0059] Any one of the output circuits comprises: a fifth amplifier and a sixth amplifier, wherein the non-inverting input terminal of the fifth amplifier is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier is connected to the output terminal of the fifth amplifier, and the inverting input terminal of the sixth amplifier is connected to the inverting input terminal of the fifth amplifier and the output terminal of the sixth amplifier;

[0060] The non-inverting input terminal of the sixth amplifier, the output terminal of the sixth amplifier, and the output terminal of the fifth amplifier serve as the first, second, and third output terminals of the output circuit, respectively.

[0061] Specifically, in this embodiment, if Figure 5 As shown, the reference circuit includes a fourth amplifier U4, the non-inverting input of the fourth amplifier U4 is connected to the reference voltage, the inverting input of the fourth amplifier U4 is connected to the output of the fourth amplifier U4, and the output of the fourth amplifier U4 serves as a reference voltage terminal.

[0062] The infrared detector analog signal has 8 output terminals, single-ended output, and dynamic range mV to nV. Therefore, in this embodiment, the output circuit includes 8 differential operational amplifier chips, such as Figure 5 As shown, the voltage reference chip provides the reference power supply, and the 8-way single-ended analog signals are converted into differential signals through the 8-way differential operational amplifier chip respectively. The center level of the adjusted eight-way differential analog signals is adapted to the back-end analog-to-digital conversion chip.

[0063] like Figure 5 As shown, the first output circuit includes: a fifth amplifier U411 and a sixth amplifier U412, the non-inverting input terminal of the fifth amplifier U411 is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier U411 is connected to the output terminal of the fifth amplifier U411, and the non-inverting input terminal of the sixth amplifier U412 is connected to the inverting input terminal of the fifth amplifier U411 and the output terminal of the sixth amplifier U412;

[0064] The inverting input terminal of the sixth amplifier U412, the output terminal of the sixth amplifier U412 and the output terminal of the fifth amplifier U411 serve as the first, second and third output terminals of the output circuit respectively. Figure 5 OUT1, OUT1+, OUT1-, see Figure 5 As shown, 8 channels with the same output circuit structure can be used to connect to 8 channels of single-ended analog signals.

[0065] For example, various analog bias voltages required by an infrared detector in this embodiment are shown in Table 1:

[0066] Table 1 Various types of detector analog bias

[0067]

[0068] The digital bias voltage is shown in Table 2:

[0069] Table 2 Various digital bias voltages of detectors

[0070]

[0071] The infrared detector driver circuit must provide power and various bias signals to the detector while also conditioning the analog signal. This requires a well-designed circuit design and chip selection. Furthermore, the circuit design must be highly resistant to interference, minimizing signal transmission interference.

[0072] The technical solution of this invention, through the use of a two-stage LDO power regulation method, ensures the power supply of various chips, provides a detector bias power supply with a good signal-to-noise ratio, improves power efficiency, and saves chip usage and costs. The analog signal conditioning method proposed in this embodiment increases the driving capability of analog signal transmission, improves signal stability and anti-interference capabilities, and maximizes the dynamic output of analog signals, facilitating back-end analog-to-digital conversion.

[0073] A second embodiment of the present invention provides an infrared detector system, which includes the aforementioned driving circuit.

[0074] The driver board of the driving circuit in this embodiment is an analog-digital combined circuit, including digital signal driving, analog signal driving, and analog signal adjustment parts. It is applied to a certain type of infrared detector and connects the infrared detector and the main signal processing circuit.

[0075] The aforementioned driving circuit is applied to a certain type of infrared focal plane detector to complete the detector driving and preliminary conditioning of the analog signal.

[0076] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0077] The serial numbers of the above embodiments of the present invention are for description only and do not represent the advantages or disadvantages of the embodiments.

[0078] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are protected by the present invention.

Claims

1. A driving circuit for an infrared detector, characterized in that: include: A power supply circuit, used to supply power to the chip of the driving circuit and the readout circuit of the infrared detector; A bias voltage driving circuit, used for providing a driving bias voltage level for the infrared detector; A signal conditioning circuit, used for performing differential output of the analog signal output by the infrared detector; The power supply circuit includes multiple low-dropout linear regulators (LDOs) connected in parallel. The input ends of the multiple LDOs are all connected to VCC, and the output ends of the multiple LDOs are used to power the chip of the driving circuit and the readout circuit of the infrared detector respectively; Bias voltage driving circuit, including analog bias circuit and digital bias circuit; The digital bias circuit is used to convert the main signal sent by the FPGA into a level so as to meet the driving level requirements of the infrared detector; The analog bias circuit is used to provide an adjustable analog bias drive for the infrared detector; The analog bias circuit includes: a first-stage operational amplifier circuit and a second-stage operational amplifier circuit; Wherein, the first-stage operational amplifier circuit includes a first amplifier, a non-inverting input terminal of the first amplifier is connected to a reference voltage, and an inverting input terminal of the first amplifier is connected to an output terminal of the first amplifier; The second-stage operational amplifier circuit includes a second amplifier and a third amplifier, the output end of the first amplifier is connected to the non-inverting input ends of the second amplifier and the third amplifier respectively through a sliding resistor, and the inverting input ends of the second amplifier and the third amplifier are connected to the output ends of the second amplifier and the third amplifier respectively; The output terminals of the second amplifier and the third amplifier serve as the first and second output terminals of the analog bias circuit respectively.

2. The driving circuit of the infrared detector according to claim 1, wherein: The digital bias circuit includes multiple level conversion circuits and RC filter circuits connected in sequence; Wherein, the level conversion circuit is used to convert the level of the main signal sent by the FPGA; The RC filter circuit includes a first-order RC low-pass filter, and the cutoff frequency of the first-order RC low-pass filter is determined according to the frequency multiplication of the main signal.

3. The driving circuit of the infrared detector according to claim 1, wherein: The signal conditioning circuit includes: a reference circuit and a multi-channel output circuit, wherein the output end of the reference circuit is respectively connected to the input ends of the multi-channel output circuit; The reference circuit includes a fourth amplifier, a non-inverting input terminal of the fourth amplifier is connected to a reference voltage, an inverting input terminal of the fourth amplifier is connected to an output terminal of the fourth amplifier, and the output terminal of the fourth amplifier serves as a reference voltage terminal; Any one of the output circuits comprises: a fifth amplifier and a sixth amplifier, wherein the non-inverting input terminal of the fifth amplifier is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier is connected to the output terminal of the fifth amplifier, and the inverting input terminal of the sixth amplifier is connected to the inverting input terminal of the fifth amplifier and the output terminal of the sixth amplifier; The non-inverting input terminal of the sixth amplifier, the output terminal of the sixth amplifier, and the output terminal of the fifth amplifier serve as the first, second, and third output terminals of the output circuit, respectively.

4. An infrared detector system, characterized in that: The infrared detector system comprises the driving circuit according to any one of claims 1 to 3.

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