A PD power supply circuit that automatically identifies active PoE and passive PoE

Abstract

This invention provides a PD power supply circuit that automatically identifies active PoE and passive PoE, including a passive PoE circuit, an active PoE circuit, and a PoE identification circuit. The beneficial effect of this invention is that it can automatically identify active PoE and passive PoE power supply.

Description

Technical Field

[0001] The present invention relates to a PD power supply circuit, and in particular to a PD power supply circuit capable of automatically identifying active PoE and passive PoE. Background Art

[0002] Currently, there are two main architectures for existing PD applications:

[0003] 1. Active design method;

[0004] 2. Passive design methods;

[0005] The two technologies are quite different. Active PoE complies with IEEE802.3af / at / bt standards and has a supply voltage of 36 to 57V. Passive PoE injects power from an injector and does not follow the corresponding standards. To reduce costs, in industrial power supply environments, active PoE PD cannot be used if the supply voltage is lower than 36V.

[0006] Currently, products with PD power supply cannot be compatible with both active PoE and passive PoE below 36V. In particular, passive PoE power supply is required without changing the product in a 24V industrial power supply environment. Summary of the invention

[0007] In order to solve the problems in the prior art, the present invention provides a PD power supply circuit that automatically identifies active PoE and passive PoE.

[0008] The present invention provides a PD power supply circuit for automatically identifying active PoE and passive PoE, comprising a phase switching circuit, a passive PoE circuit, an active PoE circuit and a PoE identification circuit, wherein the passive PoE circuit and the active PoE circuit are respectively connected to the PoE identification circuit, and the PoE identification circuit is mainly composed of a diode D3, a diode D6, a resistor R3, a resistor R5, a resistor R6, a transistor Q2, a transistor Q4, a relay RL1, and a capacitor C2, one end of the resistor R6 is grounded, and the other end is connected to the anode of the diode D3, the output end of the passive PoE circuit, the output end of the active PoE circuit, the diode The cathode of D3 is respectively connected to the voltage output end, one end of the resistor R5 is connected between the resistor R6 and the anode of the diode D3, the other end of the resistor R5 is connected to the capacitor C2 and then grounded, the base of the transistor Q4 is connected between the resistor R5 and the capacitor C2, the emitter of the transistor Q4 is grounded, the collector of the transistor Q4 is connected to the resistor R3 and then connected to the working voltage VDD, the base of the transistor Q2 is connected between the collector of the transistor Q4 and the resistor R3, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the relay RL1, and the active PoE circuit includes an active PoE PD chip U1 and a grading resistor R2, one end of the grading resistor R2 is connected to the CLASS pin of the active PoE PD chip U1, and the other end of the grading resistor R2 is connected to the relay RL1.

[0009] As a further improvement of the present invention, when the switch of the active PoE PD chip is at the negative pole, the passive PoE circuit includes a diode D2, a diode D7, a resistor R1, a resistor R4, a capacitor C1, and a MOS tube Q3. The resistor R1 and the capacitor C1 constitute a delay circuit. The cathode of the diode D2 is connected to the voltage input end, the anode of the diode D2 is connected to one end of the resistor R1, and the other end of the resistor R1 is respectively connected to the cathode of the diode D7, one end of the resistor R4, one end of the capacitor C1, and the gate of the MOS tube Q3. The anode of the diode D7, the other end of the resistor R4, the other end of the capacitor C1, and the source of the MOS tube Q3 are connected to the negative pole (ground) of the input power supply, and the drain of the MOS tube Q3 is grounded.

[0010] As a further improvement of the present invention, when the switch of the active PoE PD chip is at the positive pole, the passive PoE circuit includes a diode D14, a diode D9, a resistor R9, a resistor R7, a capacitor C3, and a MOS tube Q5. The resistor R9 and the capacitor C3 constitute a delay circuit. The anode of the diode D14 is connected to the negative pole (ground) of the input power supply, the cathode of the diode D14 is connected to one end of the resistor R9, and the other end of the resistor R9 is respectively connected to the anode of the diode D9, one end of the resistor R7, one end of the capacitor C3, and the gate of the MOS tube Q5. The cathode of the diode D9, the other end of the resistor R7, the other end of the capacitor C3, and the source of the MOS tube Q5 are connected to the voltage input end, and the drain of the MOS tube Q3 is connected to the voltage output end.

[0011] The beneficial effect of the present invention is that through the above solution, active PoE and passive PoE power supply can be automatically identified. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 The invention discloses a circuit diagram of a PD chip switch at a negative pole of a PD power circuit that automatically identifies active PoE and passive PoE.

[0013] Figure 2 yes Figure 1 The commutation circuit diagram in .

[0014] Figure 3 yes Figure 1 Passive PoE circuit diagram in.

[0015] Figure 4 yes Figure 1 Active PoE circuit diagram in.

[0016] Figure 5 yes Figure 1 The PoE identification circuit diagram in.

[0017] Figure 6 The invention discloses a circuit diagram of a PD chip switch at a positive pole of a PD power circuit that automatically identifies active PoE and passive PoE.

[0018] Figure 7 yes Figure 6 The commutation circuit diagram in .

[0019] Figure 8 yes Figure 6 Passive PoE circuit diagram in.

[0020] Fig. 9 yes Figure 6 Active PoE circuit diagram in.

[0021] Fig.10 yes Figure 6The PoE identification circuit diagram in. DETAILED DESCRIPTION

[0022] The present invention will be further described below in conjunction with the accompanying drawings and specific implementation methods.

[0023] Circuit design such as Figures 1 to 5 , Figures 6 to 10 As shown, Figures 1 to 5 For the case where the PD chip switch is at the negative pole, Figures 6 to 10 For the case where the PD chip switch is at the positive pole, the circuit composition and working principle of the two are the same. The working principle of the case where the PD chip switch is at the negative pole is explained below:

[0024] like Figures 1 to 5 As shown, a PD power supply circuit for automatically identifying active PoE and passive PoE includes a phase switching circuit, a passive PoE circuit, an active PoE circuit and a PoE identification circuit. The passive PoE circuit and the active PoE circuit are respectively connected to the PoE identification circuit. The PoE identification circuit is mainly composed of a diode D3, a diode D6, a resistor R3, a resistor R5, a resistor R6, a transistor Q2, a transistor Q4, a relay RL1, and a capacitor C2. One end of the resistor R6 is grounded, and the other end is connected to the anode of the diode D3. The output end of the passive PoE circuit, the output end of the active PoE circuit, and the diode D The cathodes of the transistors R3 are connected to the voltage output ends respectively, one end of the resistor R5 is connected between the resistor R6 and the anode of the diode D3, the other end of the resistor R5 is connected to the capacitor C2 and then grounded, the base of the transistor Q4 is connected between the resistor R5 and the capacitor C2, the emitter of the transistor Q4 is grounded, the collector of the transistor Q4 is connected to the resistor R3 and then connected to the working voltage VDD, the base of the transistor Q2 is connected between the collector of the transistor Q4 and the resistor R3, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the relay RL1, and the active PoE circuit includes an active PoE PD chip U1 and a grading resistor R2, one end of the grading resistor R2 is connected to the CLASS pin of the active PoE PD chip U1, and the other end of the grading resistor R2 is connected to the relay RL1.

[0025] When the switch of the active PoE PD chip is at the negative pole, the passive PoE circuit includes a diode D2, a diode D7, a resistor R1, a resistor R4, a capacitor C1, and a MOS tube Q3. The resistor R1 and the capacitor C1 constitute a delay circuit. The cathode of the diode D2 is connected to the voltage input end, the anode of the diode D2 is connected to one end of the resistor R1, and the other end of the resistor R1 is respectively connected to the cathode of the diode D7, one end of the resistor R4, one end of the capacitor C1, and the gate of the MOS tube Q3. The anode of the diode D7, the other end of the resistor R4, the other end of the capacitor C1, and the source of the MOS tube Q3 are connected to the negative pole (ground) of the input power supply, and the drain of the MOS tube Q3 is grounded.

[0026] Among them, the active PoE PD chip has commercial chip supply in the industry, which is not the core of this circuit design. The core components of this circuit are the passive PoE circuit and the PoE identification circuit. The core of the design is to be compatible with both active PoE and passive PoE power supply.

[0027] The commutation circuit is mainly composed of rectifier bridge D1, diode D4, rectifier bridge D5, magnetic bead FB1 and magnetic bead FB2. This part of the circuit is a general circuit and is not included in the content of this design. In order to maintain the integrity of the circuit, it is still listed as part of the circuit.

[0028] The passive PoE circuit is mainly composed of resistor R1, resistor R4, diode D2, diode D7, capacitor C1, and MOS tube Q3. Its function is passive PoE power supply and isolated PoE classification.

[0029] The active PoE circuit is mainly composed of resistor R2 and active PoE PD chip U1.

[0030] The PoE identification circuit is mainly composed of a diode D3, a diode D6, a resistor R3, a resistor R5, a resistor R6, a transistor Q2, a transistor Q4, a relay RL1, and a capacitor C2, and has the function of automatically identifying active PoE and passive PoE.

[0031] When it is passive PoE power supply, the diodes D2 and D7 in the passive PD circuit are Zener-broken, and the MOS tube Q3 is turned on to power the subsequent stage. The system generates a 3.3V voltage and powers the identification circuit. The active PoE does not work, but the voltage of the passive PoE power supply may be within the voltage range of the active PoE classification, causing the active PD classification circuit to work and the chip to heat up. When the passive PoE power supply voltage is lower than 30V, the diode D3 of the identification circuit cannot be Zener-broken, the base of the transistor Q4 is at a low level, the transistor Q4 is cut off, the transistor Q2 is turned on, and the normally closed contact of the relay RL1 is disconnected, disconnecting the active PoE classification resistor from the circuit to reduce the heating of the active PD chip.

[0032] When the active PoE power supply is in progress, the active PD circuit works normally and supplies power to the next stage. The system generates a 3.3V voltage and supplies power to the identification circuit. The active PoE classification voltage of 10.5 to 20.5V is within the voltage range of the passive PD. In order not to affect the normal operation of the active PD classification, the delay circuit composed of resistor R1 and capacitor C1 makes the MOS tube Q3 cut off during PoE classification. The active PoE power supply voltage is 36 to 57V. In the identification circuit, the diode D3 Zener breaks down, the base of the transistor Q4 is at a high level, the transistor Q4 is turned on, the transistor Q2 is cut off, and the normally closed contact of the relay RL1 remains normally closed, which does not affect the normal operation of the active PD.

[0033] This circuit involves an active PoE and passive PoE compatible PD power supply circuit, which can automatically identify active PoE power supply or passive PoE power supply.

[0034] The PD power supply circuit for automatically identifying active PoE and passive PoE provided by the present invention has the following advantages:

[0035] 1. Automatically identify active PoE and passive PoE power supply;

[0036] 2. Reduce the heating of active PD chip during passive PoE power supply;

[0037] 3. Simple design and low cost.

[0038] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A PD power supply circuit that automatically identifies active PoE and passive PoE, characterized in that: The invention comprises a passive PoE circuit, an active PoE circuit and a PoE identification circuit. The passive PoE circuit and the active PoE circuit are respectively connected to the PoE identification circuit. The PoE identification circuit mainly comprises a diode D3, a diode D6, a resistor R3, a resistor R5, a resistor R6, a transistor Q2, a transistor Q4, a relay RL1 and a capacitor C2. One end of the resistor R6 is grounded, and the other end is connected to the anode of the diode D3. The output end of the passive PoE circuit, the output end of the active PoE circuit and the cathode of the diode D3 are respectively connected to the voltage output end. The resistor R5 One end of the transistor R5 is connected between the resistor R6 and the anode of the diode D3, the other end of the resistor R5 is connected to the capacitor C2 and then grounded, the base of the transistor Q4 is connected between the resistor R5 and the capacitor C2, the emitter of the transistor Q4 is grounded, the collector of the transistor Q4 is connected to the resistor R3 and then connected to the working voltage VDD, the base of the transistor Q2 is connected between the collector of the transistor Q4 and the resistor R3, the emitter of the transistor Q2 is grounded, the collector of the transistor Q2 is connected to the relay RL1, one end of the grading resistor R2 is connected to the CLASS pin of the active PoE PD chip U1, and the other end of the grading resistor R2 is connected to the relay RL1; When the switch of the active PoE PD chip is at the negative pole, the active PoE circuit includes the active PoE PD chip U1 and the grading resistor R2, the passive PoE circuit includes a diode D2, a diode D7, a resistor R1, a resistor R4, a capacitor C1, and a MOS tube Q3, the resistor R1 and the capacitor C1 constitute a delay circuit, the cathode of the diode D2 is connected to the voltage input end, the anode of the diode D2 is connected to one end of the resistor R1, the other end of the resistor R1 is respectively connected to the cathode of the diode D7, one end of the resistor R4, one end of the capacitor C1, and the gate of the MOS tube Q3, the anode of the diode D7, the other end of the resistor R4, the other end of the capacitor C1, and the source of the MOS tube Q3 are respectively connected to the negative pole of the input power supply, and the drain of the MOS tube Q3 is grounded; When the switch of the active PoE PD chip is at the positive pole, the active PoE circuit includes the active PoE PD chip U2 and the grading resistor R8, and the passive PoE circuit includes a diode D14, a diode D9, a resistor R9, a resistor R7, a capacitor C3, and a MOS tube Q5. The resistor R9 and the capacitor C3 constitute a delay circuit. The anode of the diode D14 is connected to the negative pole of the input power supply, the cathode of the diode D14 is connected to one end of the resistor R9, and the other end of the resistor R9 is respectively connected to the anode of the diode D9, one end of the resistor R7, one end of the capacitor C3, and the gate of the MOS tube Q5. The cathode of the diode D9, the other end of the resistor R7, the other end of the capacitor C3, and the source of the MOS tube Q5 are connected to the voltage input end, and the drain of the MOS tube Q3 is connected to the voltage output end.

Images