Field effect transistor component and method for adjusting drain current of field effect transistor

Abstract

A field effect transistor component (1) is provided, comprising a field effect transistor (T) having a back gate voltage (V BG ) is adjusted to the back gate connection terminal (BG), wherein a gate-source voltage (V GS ) and the drain-source voltage (V DS ) and the drain current (I D ) flows through the field effect transistor (T). In addition, the field effect transistor component (1) comprises a regulating unit (10) connected to the back gate connection terminal (BG), which is configured to regulate the back gate voltage (V BG ) flows through the drain current (I D ) is adjusted to the rated current, where the back gate voltage (V BG ) is regulated at least according to the gate-source voltage (V GS A method for adjusting the drain current of a field effect transistor (T) is also proposed.

Description

Technical Field

[0001] The invention relates to a field effect transistor component and a method for adjusting the drain current of a field effect transistor. Background Art

[0002] Due to parasitic effects, in a field effect transistor, in the saturation region (also called the pinch-off region), the drain current I D As the drain-source voltage V DS In CMOS technology, this undesirable behavior increases with the progress of transistor scaling, so that, for example, the output characteristic curve family of modern CMOS field effect transistors has a significant slope, see also Figure 1 of the prior art.

[0003] The described effect disadvantageously results in a small signal drain-source resistance r DS The reduction of the intrinsic gain A of the field effect transistor i The intrinsic gain of a field effect transistor describes the maximum voltage gain that the field effect transistor can achieve at a certain operating point. For a field effect transistor in a source circuit with a high-resistance load, this voltage gain is determined by the so-called small-signal transconductance g m and the small signal drain-source resistance r DS High values ​​of this parameter are important for applications requiring large gain or high accuracy.

[0004] By means of complex circuit topologies with multiple field effect transistors, it is also possible to design amplifier circuits with high voltage gain using field effect transistors with low intrinsic gain. However, this presupposes the stacking of multiple field effect transistors, which is difficult or even impossible in scaled CMOS technology due to the low supply voltage. Strong I D (V DS The combination of these two effects, ) dependence and low supply voltage, makes high voltage gains impossible or achievable only with considerable effort in scaled CMOS processes. Summary of the invention

[0005] According to the present invention, a field effect transistor component is provided, which comprises a field effect transistor having a back gate connection terminal adjustable by means of a back gate voltage, wherein a gate-source voltage and a drain-source voltage are also present on the field effect transistor, and a drain current flows through the field effect transistor. In addition, the field effect transistor component comprises a regulating unit connected to the back gate connection terminal, the regulating unit being configured to regulate the drain current flowing through the field effect transistor to a rated current by regulating the back gate voltage on the back gate connection terminal, wherein the back gate voltage is regulated at least as a function of the gate-source voltage.

[0006] The invention has the advantage that undesirable parasitic effects can be compensated by adjusting the back gate voltage. This makes it possible, for example, to generate an output characteristic curve with a largely constant drain current in the saturation region of the field effect transistor, as exemplified by Figure 4 , thereby increasing the small signal drain-source resistance and thus improving the inherent gain of the field effect transistor. A regulation system or regulation loop is realized by the present invention, in which at least the gate-source voltage acts as an input parameter, so as to adjust the back gate voltage that acts as an adjustment parameter and thus adjust the drain current to the rated current. The present invention is particularly suitable for field effect transistors with strong penetration from the back gate voltage to the drain current, such as in SOI or FDSOI CMOS technology. However, other field effect transistors can also be preferably used in the sense of the present invention, in which the drain current can be sensitively changed by means of a change in the back gate voltage. The field effect transistor can be, for example, an IGFET, such as a MOSFET, or a JFET, wherein the present invention is not limited to a specific field effect transistor. For example, not only a self-conducting field effect transistor can be considered, but also a self-cutoff field effect transistor can be considered. In addition, the field effect transistor assembly can be connected or integrated into a circuit instead of a field effect transistor of the prior art.

[0007] Preferably, the regulating unit is configured to regulate the back-gate voltage also as a function of the drain-source voltage on the field effect transistor. This can ensure, for example, which operating region the field effect transistor is in, for example, in the linear region or in the saturation region. Thus, the regulating unit can generate a back-gate voltage regulation suitable for the corresponding region.

[0008] Preferably, the rated current in the saturation region of the field effect transistor can be independent of the drain-source voltage. In other words, the back gate voltage is adjusted by the adjustment unit so that the drain current is constant as a function of the drain-source voltage. This maximizes the intrinsic gain of the field effect transistor component.

[0009] In a particular embodiment, the regulating unit can be configured to regulate the back gate voltage of the field effect transistor by the known electrical behavior of the field effect transistor. The advantage of this embodiment is that it is not necessary to explicitly determine the drain current of the field effect transistor. In addition, the regulating unit can undertake additional calibration tasks, for example, to compensate for process fluctuations. The known electrical behavior of the field effect transistor can be provided to the regulating unit, for example, in the form of a data set stored in a memory. Thus, the corresponding correction parameters for the back gate voltage can be determined with the help of these data and the drain-source voltage and the gate-source voltage.

[0010] Alternatively, the regulating unit can be configured to regulate the back gate voltage as a function of the drain current flowing through the field effect transistor. All electrical information, namely drain current, gate-source voltage and drain-source voltage, is therefore available for implementing a regulating loop with a reference element.

[0011] According to a preferred embodiment, the field effect transistor assembly includes a reference field effect transistor, to which a gate-source voltage identical to the gate-source voltage of the field effect transistor is applied, and to which a constant drain-source voltage and a constant back-gate voltage are also applied, so that the drain current flowing through the reference field effect transistor advantageously has no dependence on the drain-source voltage.

[0012] The regulating unit can be configured to regulate the back gate voltage on the field effect transistor in such a way that the drain current through the reference field effect transistor is identical to the drain current through the field effect transistor. The drain current through the reference field effect transistor is thus used as a setpoint variable for the drain current through the field effect transistor. Thus, an independent drain current through the field effect transistor is adjusted by means of the reference field effect transistor, which is independent of the drain-source voltage.

[0013] Furthermore, a circuit, in particular an amplifier circuit, is proposed, which comprises one or more field effect transistor components according to any of the preceding claims. By eliminating or compensating for parasitic effects of field effect transistors, the circuit, in particular the amplifier circuit, can have improved performance.

[0014] The method according to the invention for adjusting the drain current of a field effect transistor comprises substantially the following steps: In a first step, a field effect transistor having a back gate connection adjustable by means of a back gate voltage is provided, wherein a gate-source voltage and a drain-source voltage are also applied to the field effect transistor. In a further step, the drain current is adjusted to a rated current by adjusting the back gate voltage at the back gate connection by means of a regulating unit connected to the back gate connection, wherein the back gate voltage is adjusted at least as a function of the gate-source voltage and the drain-source voltage.

[0015] The advantages of this method correspond to the advantages of the field effect transistor assembly described above.

[0016] In addition, the back gate voltage can be adjusted according to the drain-source voltage.

[0017] Preferably, the rated current in the saturation region of the field effect transistor may be independent of the drain-source voltage.

[0018] In a particular embodiment, the back gate voltage can be regulated by means of the regulating unit according to the known electrical behavior of the field effect transistor.

[0019] Additionally, the method may include adjusting a back gate voltage based on a drain current flowing through the field effect transistor.

[0020] Preferably, the method may include providing a reference field effect transistor, to which a gate-source voltage identical to a gate-source voltage on the field effect transistor is applied, and to which a constant drain-source voltage and a constant back-gate voltage are applied.

[0021] In a further preferred embodiment, the back gate voltage can be regulated by the regulating unit in such a way that the drain current through the reference field effect transistor is identical to the drain current through the field effect transistor.

[0022] Advantageous embodiments of the invention are specified in the dependent claims and are described in the description. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Embodiments of the present invention are further described with reference to the accompanying drawings and / or the following description. The accompanying drawings show:

[0024] Figure 1 : Output characteristic curve family of field effect transistors in the prior art,

[0025] Figure 2 : A field effect transistor component according to the invention according to a first embodiment,

[0026] Figure 3 : A field effect transistor component according to the invention according to a second embodiment,

[0027] Figure 4 : A family of exemplary output characteristic curves of a field effect transistor component according to the present invention. DETAILED DESCRIPTION

[0028] exist Figure 1 FIG. 1 shows a family of output characteristic curves of a field effect transistor in the prior art, in which the output characteristic curves are plotted for a plurality of different gate-source voltages V GS Plot the drain current I flowing through the field effect transistor D As the drain-source voltage V DS Here, in a field effect transistor according to the prior art, an adjustable but constant back gate voltage is set at its back gate connection, which is not explicitly shown here. For each corresponding gate-source voltage V GS The drain current I D Function direction as drain-source voltage V DS The function shows that for a sufficiently small drain-source voltage V DS The linear region 40 and for a sufficiently large drain-source voltage VDS 50, wherein these regions are separated from each other by dividing lines for easier viewing. Figure 1 The drain current I shown in D Goes as the drain-source voltage V DS The function of shows that in the saturation region 50 (also called the pinch-off region), the drain current still rises as a function of the drain-source voltage, which is undesirable and due to parasitic effects. This effect disadvantageously leads to a lower small signal drain-source resistance and therefore a lower intrinsic gain.

[0029] exist Figure 2 A field effect transistor component 1 according to a first specific embodiment of the invention is described in . In this case, the field effect transistor component 1 is integrated, for example, in a circuit, in the present specific case in an amplifier circuit 100 .

[0030] In this case, the field effect transistor component 1 comprises a field effect transistor T having a back gate connection BG which can be adjusted by means of a back gate voltage. In addition, a gate-source voltage V GS and the drain-source voltage V DS , and there is also a drain current I D Flows through the field effect transistor T. In this embodiment, purely by way of example, the source connection S of the field effect transistor T is grounded, so that the voltage applied to the gate connection G of the field effect transistor T corresponds to the gate-source voltage V GS However, the invention is not limited here to the source connection S being grounded.

[0031] Furthermore, the field effect transistor component 1 comprises a regulating unit 10 which is connected to the back gate terminal BG of the field effect transistor T. In this case, the regulating unit 10 is configured to regulate the back gate voltage V at the back gate terminal. BG The drain current I flowing through the field effect transistor T D Adjust to rated current. At least according to gate-source voltage V GS To carry out the back gate voltage V BG of adjustment.

[0032] The field effect transistor device 1 has the following advantages: the back gate voltage V BG To compensate for undesired parasitic effects. For example, the rated current can be selected such that the small-signal drain-source resistance increases accordingly and the intrinsic gain of the field effect transistor T is improved.

[0033] The invention describes a feedback control system or a control loop in which at least the gate-source voltage V GSServes as an input variable to adjust the back gate voltage V that appears as a control variable BG And thus the drain current is adjusted to the rated current.

[0034] Additionally, the regulating unit 10 can also adjust the voltage V of the drain-source voltage V on the field effect transistor T according to the DS Adjust the back gate voltage V BG With a given gate-source voltage V GS The drain-source voltage V DS For example, it is possible to determine in which operating region the field effect transistor T is located, that is, for example, to determine whether the field effect transistor T is in the saturation region 50 or in the linear region 40 .

[0035] Here, the regulating unit 10 can be configured, for example, to directly detect or sense the drain-source voltage V applied to the field effect transistor T. DS and the gate-source voltage V GS Alternatively, the voltage can also be sensed by a corresponding measuring unit (not explicitly shown) and transmitted to the regulating unit 10 .

[0036] In particular, the rated current in the saturation region 50 of the field effect transistor T can be independent of the drain-source voltage V DS Therefore, the back gate voltage V is adjusted according to the input parameters. BG , so that the drain current I D The constant rated current is accordingly followed. This allows the inherent gain to be maximized.

[0037] In this embodiment, only the gate-source voltage V GS and the back gate voltage V BG To carry out the back gate voltage V BG adjustment, but the present invention is not limited thereto.

[0038] In this exemplary embodiment, the regulating unit 10 is further configured to regulate the back gate voltage V of the field effect transistor T according to the known electrical behavior of the field effect transistor T. BG For this purpose, for example, a data set describing the electrical behavior of the field effect transistor T can be stored in a memory 15. The adjustment unit 10 can then access the memory 15. For example, the adjustment unit 10 can include an internal memory 15 in which corresponding data about the electrical behavior of the field effect transistor T are stored. For example, these data can be similar to Figure 1 The output characteristic curves are gate-source voltage V GS Different values ​​of I D (V DS ) form of correlation.

[0039] The regulating unit 10 can sense the gate-source voltage V GS and optionally sense the drain-source voltage V DS By comparing with the known behavior, the back gate voltage V BG Thus, the field effect transistor T can be appropriately corrected by the back gate voltage V BG The desired setpoint current is set, which is constant, for example, in the saturation region 50. In this embodiment, it is advantageously not necessary to determine the drain current I explicitly. D As an input parameter. However, Figure 3 Compared to the embodiment described in , the embodiment described in requires increased layout complexity and complex control technology for the control unit 10 .

[0040] For example, from Figure 4 An exemplary output characteristic diagram of such a field effect transistor arrangement 1 can be seen.

[0041] As in the current Figure 2 As shown in the example, such a field effect transistor assembly 1 can be integrated in a circuit. In this example, the circuit is configured as an amplifier circuit 100. The amplifier circuit 100 is constructed in the form of a typical source circuit, wherein the present invention is not limited to a specific circuit. The amplifier circuit 100 in this embodiment includes an operating voltage V DD , the operating voltage is connected to the drain connection terminal D of the field effect transistor T via the load resistor R1. Therefore, the operating voltage V DD A portion of the drain current I always drops across the load resistor R1. Here, the load resistor R1 also limits the drain current I D In this embodiment, the input voltage of the amplifier circuit 100 is applied to the gate connection terminal G of the field effect transistor T. At the drain connection terminal D, the amplified output voltage V of the amplifier circuit 100 can be tapped. out Thus, the field effect transistor assembly 1 can be used to replace a conventional field effect transistor of the prior art, wherein the circuit, here an amplifier circuit, has no parasitic behavior or has reduced parasitic behavior compared to the circuit of the prior art.

[0042] exist Figure 3 Detailed Description of the Invention A field effect transistor component 1 according to a second embodiment of the present invention is shown in FIG.

[0043] Here, the following details Figure 2 For common points, refer to Figure 2 The contents of the instruction manual.

[0044] As in Figure 2As in the embodiment in FIG. 1 , the field effect transistor component 1 comprises a regulating unit 10, which is connected to the back gate connection BG of the field effect transistor T. The regulating unit 10 is configured to regulate the back gate voltage V at the back gate connection BG. BG To flow through the drain current I of the field effect transistor T D In this embodiment, according to the gate-source voltage V GS And additionally according to the drain current I through the field effect transistor T D To carry out the back gate voltage V BG Optionally, in this embodiment, the drain-source voltage V DS The drain current I D It can be sensed by the regulating unit 10, for example, or it can also be measured by other measuring units and transmitted to the regulating unit 10. Therefore, all electrical information, namely the gate-source voltage V GS and the drain-source voltage V DS and the drain current I D It can be used by the control unit 10 to implement a control loop with a reference element.

[0045] In this preferred embodiment, a reference field effect transistor T1 is used as a reference element. In this embodiment, a gate-source voltage V GS1 , the gate-source voltage is equal to the gate-source voltage V of the field effect transistor T GS same.

[0046] In the present exemplary embodiment, this consistency is achieved by the source connection S1 of the reference field effect transistor T1 being grounded like the source connection S and also by the electrical connection of the gate connection G of the field effect transistor T to the gate connection G1 of the reference field effect transistor T1 which is at a potential. Therefore, through the coupling of the gates G and G1, their potentials are always the same. Since the source connection S and S1 are also at the same potential (because both are connected), the same gate-source voltage V is always applied to the reference field effect transistor T1 as to the field effect transistor T. GS =V GS1 .

[0047] In this embodiment, a constant drain-source voltage V is also applied to the reference field effect transistor T1. DS1 and a constant back gate voltage V BG1 . Therefore, only the gate-source voltage V GS The associated drain current I D1 Flows through the reference field effect transistor T1 to the source connection terminal S1. Therefore, the drain current I D1and the drain-source voltage V DS Not relevant.

[0048] The regulating unit 10 can regulate the back gate voltage V on the field effect transistor T in this way BG , so that the drain current I through the reference field effect transistor T1 D1 The drain current I through the field effect transistor T D Therefore, further, the drain current I D Also becomes related to the drain-source voltage V DS Therefore, the drain current I D1 Equivalent to the rated current of the regulation circuit.

[0049] By doing so, the output characteristic curve in the saturation region 50 of the field effect transistor T can be kept constant, see also, for example, Figure 4 .

[0050] Similar to Figure 1 The field effect transistor assembly 1 can be integrated in a circuit, for example an amplifier circuit 100, for which purpose see Figure 2 The explanation in the manual.

[0051] exist Figure 4 An exemplary output characteristic curve family of the field effect transistor assembly 1 according to the present invention is shown in FIG. GS Plotted as the drain-source voltage V DS The drain current I D .

[0052] As in the prior art Figure 1 As in, for each gate-source voltage V GS The drain current I D The function trend is that for a sufficiently small drain-source voltage V DS shows a linear region 40 and for sufficiently large drain-source voltage V DS Saturation regions 50 are shown, wherein the individual regions are separated by dividing lines for the sake of clarity.

[0053] with Figure 1 In contrast, the output characteristic curve shown in FIG. 5 is saturated in the region of region 50 as the drain-source voltage V DS The function of drain current I has an almost constant trend or at least a significantly decreasing slope. In other words, the drain current I D and the drain-source voltage V DS Advantageously, this results in a correspondingly increased small-signal drain-source resistance r DS And thus also obtains an improved inherent gain Ai .

[0054] Although the present invention has been further shown and described in detail by means of preferred embodiments, the present invention is not limited to the disclosed examples, but other variations may be derived therefrom by a person skilled in the art without departing from the scope of protection of the present invention.

Claims

1. A field effect transistor assembly (1), comprising: Field effect transistor (T), which has the ability to BG ) is adjusted to a back gate connection terminal (BG), wherein a gate-source voltage (V GS ) and the drain-source voltage (V DS ) and the drain current (I D ) flows through the field effect transistor (T); A regulating unit (10) connected to the back gate connection terminal (BG), the regulating unit being configured to regulate the back gate voltage (V BG ) flows through the drain current (I D ) is adjusted to the rated current, It is characterized in that a memory (15) in which data on the electrical behavior of the field effect transistor (T) are stored, The regulating unit (10) is configured to adjust the gate-source voltage (V GS ), the drain-source voltage (V DS ) and the data about the known electrical behavior of the field effect transistor (T) stored in the memory (15) to adjust the back gate voltage (V BG ), so that the rated current in the saturation region (50) of the field effect transistor (T) is proportional to the drain-source voltage (V DS ) is irrelevant.

2. A circuit comprising one or more field effect transistor assemblies (1) according to claim 1.

3. The circuit according to claim 2, wherein: The circuit is configured as an amplifier circuit (100).

4. A method for adjusting the drain current of a field effect transistor (T), the method comprising the following steps: A field effect transistor (T) is provided, wherein the field effect transistor has a back gate voltage (V BG ) is adjusted to a back gate connection terminal (BG), wherein a gate-source voltage (V GS ) and the drain-source voltage (V DS ) and the drain current (I D ) flows through the field effect transistor (T); The back gate voltage (V BG ) flows through the drain current (I D ) is adjusted to the rated current, It is characterized in that storing data about the known electrical behavior of the field effect transistor (T) in a memory (15), According to the gate-source voltage (V GS ), the drain-source voltage (V DS ) and the data about the known electrical behavior of the field effect transistor (T) stored in the memory (15) to adjust the back gate voltage (V BG ), so that the rated current in the saturation region (50) of the field effect transistor (T) is proportional to the drain-source voltage (V DS ) is irrelevant.

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