Oscillators and imaging devices

Abstract

An oscillator and an imaging device are disclosed. An oscillator includes: a resonator including a negative resistance element; a voltage bias circuit configured to apply a voltage across the negative resistance element; and a first shunt element in which a resistor and a capacitor are electrically connected in series, wherein the negative resistance element and the first shunt element are electrically connected to the voltage bias circuit in parallel.

Description

Technical Field

[0001] The present technology relates to an oscillator and an imaging device. Background Art

[0002] An oscillating circuit (resonator) including a negative resistance element such as a resonant tunneling diode (RTD) can be used as a small oscillator for generating a terahertz wave, which is a predetermined electromagnetic wave in a frequency band of 30 GHz to 30 THz. The oscillating circuit is connected to a voltage bias circuit, which applies a voltage value to the negative resistance element, for example, so that the negative resistance element can have a negative resistance characteristic. It is noted that the negative resistance element has a gain in a wide frequency band and a predetermined electromagnetic wave frequency (predetermined frequency). Therefore, connecting the negative resistance element to the voltage bias circuit causes an oscillation of the electromagnetic wave at a resonance point lower than the predetermined frequency (hereinafter referred to as a "parasitic oscillation"), which should be suppressed.

[0003] In this regard, Japanese Patent No. 5717336 and Japanese Patent No. 5612842 disclose an oscillator including an oscillation circuit 100 having a negative resistance element 101 and further including a voltage bias circuit 200. Fig.15A As shown in, Japanese Patent No. 5717336 discloses a configuration in which a resistance element 301 (shunt resistance element; resistor) is arranged in parallel with a negative resistance element 101 to suppress parasitic oscillation. Fig. 15B As shown in , Japanese Patent No. 5612842 discloses a configuration in which a capacitance element 302 (shunt capacitance element; capacitor) is arranged in parallel with a negative resistance element 101 to suppress parasitic oscillation. Summary of the invention

[0004] However, the oscillator according to Japanese Patent No. 5612842 includes the resistor element 301, so the voltage bias circuit 200 needs to constantly pass a direct current. This causes a problem that the oscillator needs to continuously consume power in order to stabilize the oscillation of a predetermined electromagnetic wave. On the other hand, the oscillator according to Japanese Patent No. 5612842 requires only a transient current and does not require a direct current to flow through the voltage bias circuit 200. This makes it possible to reduce power consumption compared to the oscillator according to Japanese Patent No. 5612842. However, there is still a problem in terms of stability in suppressing parasitic oscillations caused by the capacitor element 302.

[0005] Therefore, an object of the present technology is to provide an oscillator capable of providing stable suppression of parasitic oscillation while preventing an increase in power consumption.

[0006] One aspect of the technology of the present disclosure is:

[0007] Oscillators, including:

[0008] A resonator including a negative resistance element;

[0009] a voltage bias circuit configured to apply a voltage across the negative resistance element; and

[0010] a first shunt element in which a resistor and a capacitor are electrically connected in series, wherein

[0011] The negative resistance element and the first shunt element are electrically connected in parallel to the voltage bias circuit.

[0012] According to the present technology, it is possible to provide stable suppression of parasitic oscillation in an oscillator while preventing an increase in power consumption.

[0013] Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1A and Figure 1B Each is a circuit configuration diagram of an oscillator according to a first embodiment;

[0015] Figure 2 is a diagram for explaining the voltage-current characteristics of a negative resistance element;

[0016] Figure 3A and Figure 3B each showing a loss of electromagnetic waves according to a comparative example;

[0017] Figure 3C shows the loss of electromagnetic waves according to the first embodiment;

[0018] Figure 4A and Figure 4B are diagrams each showing an external configuration of an oscillator according to the first embodiment;

[0019] Figure 5A and Figure 5B are diagrams each showing an external configuration of an oscillator according to the first embodiment;

[0020] Fig. 6A and Figure 6B are diagrams each showing an external configuration of a shunt element according to a first embodiment;

[0021] Fig. 7A is a circuit configuration diagram of an oscillator according to a first embodiment;

[0022] Figure 7B is a circuit configuration diagram of an oscillator according to a second embodiment;

[0023] Figure 8is a diagram showing an external configuration of an oscillator according to a second embodiment;

[0024] Fig.9A shows the loss of electromagnetic waves according to the second embodiment;

[0025] Fig. 9B shows the loss of electromagnetic waves according to the third embodiment;

[0026] Fig. 10A is a circuit configuration diagram of an oscillator according to a third embodiment;

[0027] Fig. 10B is a circuit configuration diagram of an oscillator according to a fourth embodiment;

[0028] Fig.11A and Fig. 11B are diagrams each showing an external configuration of an oscillator according to a third embodiment;

[0029] Fig. 12A is a diagram showing an external configuration of an oscillator according to a fourth embodiment;

[0030] Fig. 12B is a diagram showing an external configuration of an oscillator according to a fifth embodiment;

[0031] Fig.13A and Fig. 13B for explaining an oscillator according to a fifth embodiment;

[0032] Fig.14A is a diagram showing an imaging apparatus according to a sixth embodiment;

[0033] Fig. 14B is a diagram showing an imaging device according to a first modification; and

[0034] Fig.15A and Fig. 15B are circuit configuration diagrams each showing a conventional oscillator. DETAILED DESCRIPTION

[0035] Hereinafter, embodiments of the disclosure of the present technology will be described with reference to the accompanying drawings. However, the disclosure of the present technology is not limited to the embodiments, and various modifications and changes can be made within the scope and spirit of the present technology.

[0036] First embodiment

[0037] The oscillator according to the present embodiment includes a voltage bias circuit that applies a voltage to a negative resistance element. The negative resistance element and a shunt element in which a resistor and a capacitor are arranged in series are electrically connected in parallel to the voltage bias circuit. This realizes an oscillator that can provide stable suppression of parasitic oscillation while preventing an increase in power consumption.

[0038] Oscillator Circuit Configuration

[0039] Reference Figure 1A and Figure 1B The circuit configuration of the oscillator 1 according to the present embodiment is described. Figure 1A A simple circuit configuration (minimum circuit configuration) of the oscillator 1 is shown, and Figure 1B 2 shows a more detailed circuit configuration of the oscillator 1. The oscillator 1 includes an oscillation circuit 100, a voltage bias circuit 200, and a shunt element 310.

[0040] The oscillation circuit 100 is a resonator (terahertz oscillation circuit) including elements such as a negative resistance element 101, a capacitor 102, and an inductor 103. More specifically, the negative resistance element 101 and the capacitor 102 and the inductor 103 connected in parallel to the negative resistance element 101 constitute the oscillation circuit 100. The oscillation circuit 100 causes the voltage bias circuit 200 to apply a predetermined voltage to the negative resistance element 101 to generate an oscillation of an electromagnetic wave (terahertz wave; predetermined electromagnetic wave) having a predetermined frequency of 30 GHz to 30 THz. That is, the predetermined electromagnetic wave is an electromagnetic wave determined mainly based on the design parameters of the oscillation circuit 100 so that the oscillation circuit 100 oscillates (resonates). Note that the oscillation of the predetermined electromagnetic wave (terahertz wave) by the oscillation circuit 100 is referred to as "terahertz oscillation" hereinafter.

[0041] As the negative resistance element 101, a voltage-controlled negative resistor can be used. Specifically, the use of a current injection resonant tunneling diode (RTD) makes it possible to configure the oscillation circuit 100 with an electromagnetic wave of a predetermined frequency (terahertz frequency). The resonant tunneling diode is composed of GaAS and InP substrates and quantum wells made of GaAs / AlGaAs and InGaAs / InAlAs epitaxially grown in a lattice matching system on the GaAS and InP substrates.

[0042] Figure 2The voltage-current characteristic of the negative resistance element 101 is shown when a voltage V is applied across the two terminals (anode and cathode) of the negative resistance element (RTD) 101 and the current I flows through the negative resistance element 101. The voltage-current characteristic can be divided into two regions: a region PR where the current value increases as the voltage increases and a region NR where the current value decreases as the voltage increases. The region NR where the current value decreases according to the increased voltage is a region having a negative resistance characteristic and is referred to as a "negative resistance region" hereinafter. Here, when a voltage value Vop is applied across the two terminals of the negative resistance element 101 within the negative resistance region, an electromagnetic wave (terahertz wave) oscillates through the negative resistance element 101, the capacitor 102, and the inductor 103 at a terahertz frequency ft. Note that the applied voltage value Vop is preferably set to a value at or near the center of the voltage range of the negative resistance region NR in order to enhance the stability of the oscillation. However, the voltage is not limited thereto, and any other voltage may be applied as long as it is within the negative resistance region.

[0043] The current value flowing through the negative resistance element 101 when the voltage value Vop is applied is referred to as Iop. Note that the specific value of the voltage value Vop varies depending on the parameters of the negative resistance element 101, and is generally in the range of about 0.5V to 1.5V (voltage) in many cases (at least 0.5V and not more than 1.5V). On the other hand, the specific value of the current value Iop varies depending on the parameters of the negative resistance element 101, and is generally in the range of about 20mA to 150mA (milliamperes) in many cases (at least 20mA and not more than 150mA). However, the value range is not limited to such a voltage value range and current value range, and any range outside such a range may be applied so that the same advantageous effect can be obtained.

[0044] The voltage bias circuit 200 is a circuit for applying a voltage value Vop (DC voltage) in a negative resistance region to the negative resistance element (RTD) 101. Figure 1B As shown in , the voltage bias circuit 200 includes, for example, an ideal voltage source 201, a parasitic inductor 411, a parasitic resistor 412, a parasitic capacitor 413, etc. In addition, since the voltage bias circuit 200 includes parasitic elements such as the parasitic inductor 411, the parasitic resistor 412, and the parasitic capacitor 413, it is not an ideal voltage source itself. Therefore, electromagnetic wave oscillation (parasitic oscillation) may occur at a frequency other than the terahertz frequency ft across the elements included in the oscillation circuit 100 and the parasitic elements included in the voltage bias circuit 200.

[0045] Although in Figure 1A is omitted, but Figure 1BAs shown in FIG. 1 , in many cases, the wiring section 400 is located between the oscillation circuit 100 and the voltage bias circuit 200 in order to realize various functions of the oscillator 1 .

[0046] The wiring portion 400 is arranged between the oscillation circuit 100 and the voltage bias circuit 200, and includes, for example, four parasitic elements: a parasitic inductor 401, a parasitic inductor 402, a parasitic resistor 403, and a parasitic capacitor 404. Thus, parasitic oscillation may occur at a frequency different from the terahertz frequency ft across the elements included in the oscillation circuit 100 and the parasitic elements included in the wiring portion 400.

[0047] The shunt element 310 prevents parasitic oscillation caused by the elements included in the above-mentioned oscillation circuit 100 and other parasitic elements. The shunt element 310 is composed of a resistance element 311 (shunt resistance element) and a capacitance element 312 (shunt capacitance element) arranged in series. Note that in the present embodiment, one terminal of the "shunt element" is connected to a common line (substrate; ground 20), and the other terminal is connected to a line between the oscillation circuit 100 and the voltage bias circuit 200.

[0048] Loss characteristics of electromagnetic waves

[0049] Next, we will refer to FIG. 3A to FIG. 3C The effect of the shunt element 310 of the present embodiment in suppressing parasitic oscillation will be described. Figure 3A and Figure 3B The loss characteristics (cutoff characteristics) of electromagnetic waves in the shunt element included in the oscillator of the comparative example are shown. Figure 3C The loss characteristics of electromagnetic waves in the shunt element 310 of the oscillator 1 according to the present embodiment are shown.

[0050] here, FIG. 3A to FIG. 3C is a schematic diagram showing the loss characteristics of electromagnetic waves for each frequency in a shunt element. FIG. 3A to FIG. 3C In the graph shown, the horizontal axis indicates the frequency, and the vertical axis indicates an example of the amplitude of the electromagnetic wave loss in the shunt element. Here, when the loss (loss amount) increases, the oscillation of the electromagnetic wave can be suppressed. Note that the frequency at the boundary of the range in which the shunt element has loss is referred to as the "cut-off frequency" hereinafter. Specifically, the shunt element can suppress the oscillation of the electromagnetic wave in the frequency band between the cut-off frequency on the higher frequency side and the cut-off frequency on the lower frequency side.

[0051] exist FIG. 3A to FIG. 3C, ft is a terahertz frequency (at least 30 GHz and not more than 30 THz), and fp1, fp2, and fv are each a parasitic oscillation frequency. The parasitic oscillation frequencies fp1 and fp2 are oscillation frequencies of electromagnetic waves generated by parasitic elements of the oscillation circuit 100 and the wiring portion 400. The parasitic oscillation frequency fv is an oscillation frequency of electromagnetic waves generated by parasitic elements in the oscillation circuit 100 and the voltage bias circuit 200.

[0052] Using resistors as shunt elements

[0053] first, Figure 3A An example of loss characteristics in the case where a "resistance element (resistor)" is used as a shunt element is shown. In this case, the shunt element has a loss L1 at all frequencies slightly lower than the terahertz frequency ft, thereby making it possible to suppress parasitic oscillations at parasitic oscillation frequencies fp1, fp2, and fv. That is, in this example, the oscillator has a loss in a wide frequency band, thereby making it possible to fully suppress parasitic oscillations. On the other hand, the oscillator of this example allows current to flow constantly through the resistance element, which causes unnecessary power consumption.

[0054] Using capacitors as shunt elements

[0055] Figure 3B An example of loss characteristics in the case where a “capacitive element (capacitor)” is used as a shunt element is shown. Figure 3B An example of a configuration of an oscillator including two capacitance elements is also shown. More specifically, the oscillator includes a capacitance element having a predetermined capacitance value (a capacitance element having a small capacitance value) and a capacitance element having a larger capacitance value.

[0056] The capacitive element with a small capacitance value has a loss L3 near the frequency fp2 lower than the terahertz frequency ft, and suppresses the parasitic oscillation at the parasitic oscillation frequency fp2. However, any loss at a lower frequency cannot be generated by the capacitive element alone. Therefore, the oscillator also includes a capacitive element with a large capacitance value. The capacitive element with a large capacitance value has a loss L2 near the parasitic oscillation frequencies fp1 and fv lower than the parasitic oscillation frequency fp2, and suppresses the parasitic oscillation at the parasitic oscillation frequencies fp1 and fv.

[0057] However, in this example, when the parasitic oscillation frequency fv is low frequency, or when a parasitic oscillation frequency component lower than fv is included, it is difficult to generate loss by the capacitor element in the low frequency range, and therefore it is difficult to suppress parasitic oscillation. This is because it is easy to reduce the impedance of the capacitor element in the high frequency range, but it is difficult to reduce the impedance of the capacitor element in the low frequency range. In addition, resonance may occur in the capacitor element used as a shunt element and the parasitic inductor 402 included in the wiring portion 400, which even causes the capacitor element to generate parasitic oscillation.

[0058] In this embodiment, resistors and capacitors are used as shunt elements.

[0059] Figure 3C 2 shows an example of loss characteristics when an element in which a resistance element 311 (resistor) and a capacitance element 312 (capacitor) are connected in series is used as the shunt element 310 as in the present embodiment. Figure 3C As shown in , at high frequencies, the resistance element 311 has a loss L0. In other words, the resistance element 311 acts as a shunt element that suppresses parasitic oscillation. In this way, unnecessary energy generated in the oscillation circuit 100 is appropriately lost by the resistance element 311. This makes it possible to prevent the parasitic elements of the wiring portion 400 or the voltage bias circuit 200 from coupling with the oscillation circuit 100, thereby suppressing parasitic oscillation.

[0060] On the other hand, the impedance of the capacitor 312 is large at a cutoff frequency on the low-frequency side that is not greater than the shunt element 310. Thus, there is no loss generated by the shunt element 310 at low frequencies. In other words, the shunt element 310 is in an open circuit state near direct current, and the resistor 311 also does not generate losses, so that the power consumption of the entire oscillator 1 can be suppressed. Thus, the cutoff frequency on the low-frequency side is set to be lower than the lowest parasitic oscillation frequency fv in the oscillation circuit 100, so that the power consumption of the oscillator 1 can be suppressed. Note that the cutoff frequency on the low-frequency side is a frequency determined by the time constants of the capacitor 312 and the resistor 311, and can be adjusted to a very low frequency by adjusting the respective resistance values ​​and capacitance values ​​of the capacitor 312 and the resistor 311.

[0061] Note that in the present embodiment, even if there is resonance between the parasitic inductor 401 or the parasitic inductor 411 and the capacitive element 312 in the shunt element 310 , the loss of the resistive element 311 in the shunt element 310 makes it possible to suppress parasitic oscillation.

[0062] As described above, the shunt element 310 according to the present embodiment includes the resistance element 311 (resistor) that suppresses parasitic oscillation and the capacitance element 312 (capacitor) that suppresses power consumption near direct current. This makes it possible to suppress both parasitic oscillation and unnecessary power.

[0063] Note that, for the resistance element 311, it is preferable to select a resistance value close to the absolute value |Zrtd| of the impedance of the negative resistance element 101 in the negative resistance region in order to stabilize the oscillation of the terahertz wave. Specifically, a value of half to twice of |Zrtd| (at least 1 / 2 and not more than 2 times) is preferably selected as the resistance value. More preferably, the resistance value is 0.8 to 1.2 times (at least 0.8 times and not more than 1.2 times) of |Zrtd|.

[0064] Selecting the resistance value in this way makes it possible to more effectively suppress parasitic oscillations due to parasitic elements and stabilize terahertz oscillations in the oscillation circuit 100. Note that the absolute value |Zrtd| of the impedance in the negative resistance region of the resistance element 311 is generally in the range of several ohms to several tens of ohms. In addition, depending on the oscillation frequency of the oscillator 1, the absolute value |Zrtd| may be as high as about a hundred ohms.

[0065] On the other hand, the capacitance value of the capacitor 312 is preferably set so that the cut-off frequency f0 on the low-frequency side (the frequency determined by the time constant of the resistor element 311 and the capacitor 312) is not greater than the value of the lower limit frequency for suppressing parasitic oscillations. Specifically, the capacitance value C of the capacitor 312 is set so that the impedance 1 / (2πf0×C) of the capacitor 312 at the frequency f0 is sufficiently lower than the resistance value R of the resistor element 311. The capacitance value C is set so that the impedance 1 / (2πf0×C) preferably has at least a portion of the resistance value R, and more preferably has at least a 1 / 10 value of the resistance value R. In other words, it is expected to satisfy R / 10≥1 / (2πf0×C). For example, if the resistance value R is 10Ω and the frequency f0 is 1MHz, then the capacitance value C of the capacitor 312 is preferably at least 160pF.

[0066] Note that unless there are problems with the switching speed and mounting size restrictions in the AC bias circuit used in the sixth embodiment described later, it is desirable that the capacitance value C be as large as possible. Based on the relationship between the parameters of the oscillation circuit and the parasitic oscillation frequency to be suppressed, the values ​​of the resistance element 311 and the capacitance element 312 are preferably set to optimal values.

[0067] Furthermore, it is necessary to carefully determine the position for setting the shunt element 310. Specifically, it is necessary to set the length of the line connecting the negative resistance element 101 and the shunt element 310 to be no greater than 1 / 4 of the wavelength λ of the electromagnetic wave having the maximum parasitic oscillation frequency, the parasitic oscillation of which will be suppressed by the shunt element 310 (which has loss). Figure 3CIn the example shown, the length of the line needs to be 1 / 4 of the wavelength of the electromagnetic wave having the parasitic oscillation frequency fp2. This is because, if the wavelength of the AC signal is short, the phase of the AC signal is greatly changed by only slightly changing the position of the line, and an equivalent capacitor or an equivalent inductor is generated due to reflection at the end of the line. In particular, in order to suppress parasitic oscillations from gigahertz (which is a shorter wavelength) to terahertz, it is necessary to set the shunt element 310 closer to the negative resistance element 101. As described above, if the length of the line connecting the negative resistance element 101 and the shunt element 310 is not greater than 1 / 4 of the wavelength λ, the generation of an equivalent capacitor or an equivalent inductor caused by reflection at the end of the line can be prevented, and parasitic oscillations can be suppressed. Note that the wavelength of the electromagnetic wave with the maximum parasitic oscillation frequency can be referred to as the wavelength corresponding to the cutoff frequency on the high-frequency side of the shunt element 310, and the parasitic oscillation of the electromagnetic wave will be suppressed by the shunt element 310.

[0068] Note that the length of the line connecting the negative resistance element 101 and the shunt element 310 can be set to be no longer than 1 / 4 of the wavelength λm of the predetermined electromagnetic wave (terahertz wave). This setting makes it possible to prevent the generation of an equivalent capacitor or an equivalent inductor due to reflection at the end of the line at all parasitic oscillation frequencies lower than the terahertz frequency ft of the predetermined electromagnetic wave, resulting in more effective suppression of parasitic oscillations.

[0069] External Configuration of Oscillator

[0070] The following will refer to 4A to 6B The external configuration of the oscillator 1 is described. Figure 4A is a schematic diagram showing the external configuration of the oscillator 1 of the present embodiment, and Figure 4B is a schematic diagram showing the chip 600 and its periphery included in the oscillator 1 in more detail.

[0071] like Figure 4A As shown in , the oscillator 1 includes a printed circuit board (PCB) 500 , a package (PKG) 501 , a chip 600 and a voltage bias circuit 200 .

[0072] like Figure 4B As shown in FIG. 6 , a chip 600, a wire 611, a wire 612, and an electrode 641 for wire bonding are formed on the chip 600 and its periphery. The chip 600 includes an oscillation circuit 100, which includes a negative resistance element 101, a shunt element 310, an antenna 602, a wire 603, a wire 605, and two electrodes 640 for wire bonding. Therefore, in this embodiment, the oscillator 1 has Fig. 7A In the circuit configuration shown in , the oscillation circuit 100 and the shunt element 310 are formed on a chip 600 , and the voltage bias circuit 200 is formed on a printed circuit board 500 .

[0073] The chip 600 is mounted in the package 501. Figure 4B As shown in FIG. 5 , two electrodes 640 of the chip 600 are electrically connected to two electrodes 641 included in the package 501 by wire bonding using wires 611 and 612, respectively. Note that although the chip 600 is generally slightly smaller than 1 mm when in use 2 To a few mm 2 chip, but can be used with 10mm 2 The chip is the same size.

[0074] In addition, the package 501 and the voltage bias circuit 200 are as shown in FIG. Figure 4A 600 is mounted on the printed circuit board 500 as shown in . Thus, the oscillation circuit 100 and the voltage bias circuit 200 in the chip 600 are electrically connected via the wires of the printed circuit board 500 and the package 501. Therefore, a DC voltage of the voltage value Vop is applied from the voltage bias circuit 200 to the oscillation circuit 100, so that the oscillation circuit 100 is set to perform terahertz oscillation at the terahertz frequency ft.

[0075] Figure 5A It is schematically shown Figure 4B FIG. 6 is a diagram of the A1-A2-A3-A4 cross section of the chip 600. Figure 5A As shown in FIG. 6 , an insulating film 620 is formed on a chip 600. The oscillation circuit 100 is formed on the chip 600 so as to be embedded in the depth direction of the insulating film 620, and one terminal of the oscillation circuit 100 is connected to the chip 600 (the substrate potential of the chip 600). The other terminal of the oscillation circuit 100 is connected to an antenna 602 formed on the chip 600. Note that the substrate potential of the chip 600 is connected to the electrode 640 through a wire 613 penetrating the insulating film 620.

[0076] One terminal of the shunt element 310 is connected to the chip 600 (substrate potential of the chip 600). The other terminal of the shunt element 310 is connected to the antenna 602 through a wire 603, and is connected to the electrode 640 through a wire 605. Thus, in the present embodiment, the wire 603 is a wire for connecting the shunt element 310 and the oscillation circuit 100 (negative resistance element 101).

[0077] The size of the antenna 602 can be set to an optimal size according to the terahertz frequency ft. For example, the size of the antenna 602 ranges from 100 μm to 2 To several hundred μm 2 Note that, as the antenna 602, several mm may be used depending on the terahertz frequency ft. 2In addition, the antenna 602 of the oscillator 1 according to the present embodiment is not limited to a square antenna, and may have any antenna shape as long as it can output a predetermined electromagnetic wave (terahertz wave).

[0078] Detailed configuration of the shunt element

[0079] Reference Fig. 6A and Figure 6B A detailed configuration example of the shunt element 310 is described. Fig. 6A yes Figure 4B FIG. 4 is an enlarged schematic diagram of the vicinity of the shunt element 310 shown in FIG.

[0080] Shunt element 310 is connected to contact point B0 between line 603 extending to antenna 602 and line 605 extending to electrode 640. Fig. 6A As shown in , the resistor portion 631 of the resistance element 311 is connected to the contact point B0 , and the upper electrode 632 of the capacitance element 312 is connected at the distal end of the resistor portion 631 .

[0081] Figure 6B When following Fig. 6A Schematic diagram of the shunt element 310 when the B1-B2 cross section is cut. A lower electrode 633 having the same size as the upper electrode 632 is formed on the chip 600, and a capacitor is formed by sequentially stacking the lower electrode 633, the dielectric film 634, and the upper electrode 632. Specifically, the shunt element 310 includes a MIM (metal-insulator-metal) capacitor as the capacitive element 312, and the MIM capacitor has a structure in which a dielectric film 634 (insulating film) is sandwiched between a metal lower electrode 633 and a metal upper electrode 632.

[0082] Since the lower electrode 633 is electrically connected to the chip 600 , the shunt element 310 is electrically arranged in parallel with both terminals of the negative resistance element 101 .

[0083] By forming a pattern on the metal thin film so as to have a long wiring length, the resistor portion 631 can be easily formed. Fig. 6A In the example shown, the configuration with a long wiring length is a configuration of a meandering wiring configuration. Any type of film can be used as the metal film as long as the film is a metal such as aluminum used for semiconductor wiring. In addition, the resistance value (sheet resistance value) of the metal film can be easily adjusted by adjusting the type of metal, the width, thickness, length of the wiring, etc. It is noted that any resistor can be used instead of the metal film as long as the resistor can be formed as a desired resistor on the chip 600, including a polysilicon resistor whose resistance value is controlled by adjusting the doping amount of polysilicon.

[0084] The dielectric film 634 can be easily formed using a silicon oxide film, a silicon nitride film, etc. Specifically, the dielectric film 634 can be formed by selecting a low dielectric constant material or a high dielectric constant material according to a desired dielectric constant.

[0085] The upper electrode 632 and the lower electrode 633 can be easily formed of a metal material such as aluminum. Here, for the lower electrode 633, it is necessary to select a material that can withstand the temperature generated in the step of forming the dielectric film 634. In addition, as the upper electrode 632 and the lower electrode 633, any type can be used as long as one having a desired capacitance value including a capacitor using polysilicon as the upper electrode and the lower electrode and a MOS capacitor can be provided on the chip 600. In addition, if there is no problem in use, a configuration not including the lower electrode 633 can be similarly used by replacing the lower electrode 633 with the chip 600.

[0086] Note that in the present embodiment, the insulating film 620 and the dielectric film 634 are formed of different materials, but are not limited thereto. For example, the same insulating film such as a silicon oxide film or a silicon nitride film can be used for the insulating film 620 and the dielectric film 634 as long as they have a desired capacitance value. Using the same insulating film does not require forming different insulating films (dielectric films) on the same chip 600, which makes it possible to form the chip 600 with a simpler structure and a simple manufacturing process.

[0087] In addition, in the present embodiment, since the oscillation circuit 100 and the shunt element 310 are formed on the chip 600 as the same member, the length of the line between the negative resistance element 101 and the shunt element 310 (the length of the line 603) can be shortened. In other words, the length of the line 603 connecting the negative resistance element 101 and the shunt element 310 can be easily set to a length not greater than 1 / 4 of the wavelength λm of the predetermined electromagnetic wave. Thus, with such a small-size configuration of the oscillator 1, stable suppression of parasitic oscillation can be provided while preventing an increase in power consumption.

[0088] Note that, in this embodiment, a configuration in which the chip 600 is formed on the package 501 is described, but the present invention is not limited to this configuration. Figure 5B As shown in , a configuration in which the chip 600 is formed directly on the printed circuit board 500 without the package 501 may be used. This makes it possible to eliminate the package 501 in the oscillator 1, thereby configuring the oscillator 1 with fewer components.

[0089] Beneficial effects

[0090] According to the present embodiment, in an oscillator that causes an oscillation circuit including a negative resistance element to oscillate at a predetermined frequency, it is possible to prevent an increase in power consumption and provide stable suppression of parasitic oscillation.

[0091] Second embodiment

[0092] The oscillator 2 according to the second embodiment is the same as the oscillator 1 according to the first embodiment except for the number of shunt elements and their arrangement positions. Figure 8 The oscillator 2 according to the present embodiment is described. In the oscillator 2 according to the present embodiment, two shunt elements are formed on different members (a chip and a printed circuit board).

[0093] In addition to the printed circuit board 500 , the package 501 , the chip 600 , and the voltage bias circuit 200 included in the oscillator 1 according to the first embodiment, the oscillator 2 further includes a shunt element 520 on the printed circuit board 500 .

[0094] The chip 600 includes a capacitor 302 as a shunt element, replacing the shunt element 310 of the first embodiment. The capacitor 302 is designed so that the length of the line connecting the capacitor 302 and the oscillation circuit 100 (negative resistance element 101) is within 1 / 4 of λm to suppress parasitic oscillation of a high frequency not greater than the terahertz frequency ft. Specifically, for example, Fig.9A As shown in , the capacitor element 302 has a loss L4 near the parasitic oscillation frequency fp2 not greater than the terahertz frequency ft. Note that the length of the line connecting the capacitor element 302 and the oscillation circuit 100 (negative resistance element 101) is not necessarily within λm / 4. This length only needs to be no greater than 1 / 4 of the wavelength of the electromagnetic wave with the maximum parasitic oscillation frequency fp2, the oscillation of which will be suppressed by the capacitor element 302 (which has a loss).

[0095] On the other hand, the capacitor element 302 cannot sufficiently suppress parasitic oscillation at a frequency not greater than a specific frequency (e.g., parasitic oscillation frequency fp1). For this reason, a shunt element 520 that suppresses parasitic oscillation at a frequency not greater than such a specific frequency is formed on the printed circuit board 500. Specifically, for example, Fig.9A As shown in FIG. 5 , the shunt element 520 has a loss L5 near the parasitic oscillation frequencies fp1 and fv.

[0096] In addition, the shunt element 520 is set so that the length of the line connecting the shunt element 520 and the oscillation circuit 100 (negative resistance element 101) is within 1 / 4 of the wavelength λp1 of the parasitic oscillation frequency fp1. Figure 7BAs shown in , the shunt element 520 includes a resistor element 311 and a capacitor element 312 in the same manner as the shunt element 310 described in the first embodiment, so as to obtain the effect of preventing the increase in power consumption. In addition, the resistor element 311 and the capacitor element 312 included in the shunt element 520 are preferably designed to satisfy the conditions regarding the resistance value and the capacitance value described in the first embodiment.

[0097] In this way, in the present embodiment, since the capacitance element 302 suppresses high-frequency parasitic oscillation, the shunt element 520 can be disposed away from the oscillation circuit 100. Therefore, even when a large component that is difficult to form on the chip 600 is used for the shunt element 520, the shunt element 520 can be disposed at an appropriate position.

[0098] Note that the shunt element 520 is preferably formed using a surface mount chip component such as a chip resistor or a chip capacitor. This is because the resistance value of the resistor element 311 and the capacitance value of the capacitor element 312 can be selected to be any value.

[0099] For example, a chip resistor is formed by screen printing a resistor such as a metal film on an alumina substrate so that various resistance values ​​and precision can be achieved. In addition, a chip capacitor is formed by stacking several layers and pressing and baking the stack, each layer having a structure in which a dielectric sheet is sandwiched between internal electrodes. Thus, depending on the selection of the number of dielectric sheets and / or stacked layers to be used, a chip capacitor can have a small capacitance value (e.g., several pF) to a large capacitance value (e.g., several hundred μF).

[0100] Therefore, in this embodiment, a large capacitance value can be easily selected for the shunt element 520, thereby providing more stable suppression of parasitic oscillation when the parasitic oscillation occurs at a lower frequency. In addition, the form of providing the shunt element 520 on a member different from the chip 600 formed with the oscillation circuit 100 has the advantages of easily improving the yield, easily changing the design of the shunt element 520, and easily customizing.

[0101] In the present embodiment, the capacitance element 302 is used as the shunt element formed in the chip 600. However, an element in which a capacitance element and a resistance element are electrically connected in series may be used as the shunt element.

[0102] This enables the oscillator to provide stable suppression of parasitic oscillations over a wide frequency range from the terahertz band to a sufficiently low frequency band. In addition, since a chip component is used for the shunt element 520, parasitic oscillations can be suppressed more reliably with fewer design restrictions.

[0103] Third embodiment

[0104] In the oscillator 2 according to the second embodiment, the shunt element 520 is formed on the printed circuit board 500. However, in the oscillator 3 according to the third embodiment, as shown in FIG. Fig. 10A As shown in the circuit configuration diagram, the shunt element 520 is formed in the package 501. Fig.11A and Fig. 11B , the following description of the oscillator 3 according to the third embodiment will focus on the parts different from the second embodiment.

[0105] Fig.11A 5 is a schematic diagram showing the oscillator 3 of the present embodiment. The package 501 includes pins 503, and the printed circuit board 500 includes a pin socket 504 for the pins 503. Fig. 11B As shown in , the package 501 including the chip 600 can be inserted into and removed from the printed circuit board 500. Therefore, in the case where the user desires to change the characteristics of the oscillator 3 or in the case where the oscillator 3 fails and needs to be replaced, this situation can be easily dealt with by replacing the package 501.

[0106] On the other hand, the line connecting the package 501 and the printed circuit board 500 includes parasitic elements such as parasitic inductors or parasitic capacitors caused by the pin socket 504. For this reason, the oscillator 3 is more likely to generate parasitic oscillation and more likely to interfere with terahertz wave oscillation than the oscillator 2 according to the second embodiment.

[0107] However, according to the configuration of the present embodiment, since parasitic oscillation can be suppressed by the shunt element 520 in the package 501, terahertz wave oscillation can be stabilized even if a parasitic element is added outside the package 501. Specifically, according to the present embodiment, even when the pin socket 504 has a parasitic element, loss of electromagnetic waves even at a sufficiently low frequency can occur in the package 501, making it possible to suppress parasitic oscillation.

[0108] Note that the condition regarding the length of the line connecting the oscillation circuit 100 (negative resistance element 101) and the shunt element 520 and the condition regarding the length of the line connecting the oscillation circuit 100 (negative resistance element 101) and the capacitance element 302 are satisfied as in the second embodiment. In addition, the shunt element is not limited to the capacitance element 302. An element in which a capacitance element and a resistance element are electrically connected in series may be used as a shunt element in place of the capacitance element 302.

[0109] Therefore, the oscillator according to the present embodiment can be easily replaced, and it is possible to prevent an increase in power consumption and provide stable suppression of parasitic oscillation.

[0110] Fourth embodiment

[0111] The fourth embodiment is an embodiment that combines the second embodiment and the third embodiment. More specifically, in this embodiment, three shunt elements are formed on different components (chip, package, printed circuit board). Fig. 12A As shown in , the oscillator 4 according to the present embodiment includes a capacitive element 502 having the same configuration as the capacitive element 302 on the printed circuit board 500 in the second embodiment. In addition, in the oscillator 4, as in the third embodiment, the package 501 can be inserted into and removed from the printed circuit board 500.

[0112] In chip 600, as Fig. 10B As shown in FIG. 5 , the capacitor element 302 is formed as a shunt element. On the other hand, the capacitor element 502 is formed as a shunt element in the package 501. In addition, the shunt element 520 having the resistor element 311 and the capacitor element 312 is formed on the printed circuit board 500. The capacitor element 302 and the capacitor element 502 and the shunt element 520 each have parameters set to suppress different parasitic oscillations, and as shown in FIG. Fig. 9B As shown, the frequency characteristics of the loss are continuous.

[0113] For example, in this embodiment, Fig. 9B As shown in , the capacitor element 302 connected to the oscillation circuit 100 by a short line has a loss L6, which suppresses the oscillation of the electromagnetic wave having the parasitic oscillation frequency fp2 which is a high frequency. On the other hand, the capacitor element 502 connected to the oscillation circuit 100 by a line having a long line has a loss L7, which suppresses the oscillation of the electromagnetic wave having the parasitic oscillation frequency fp1. In addition, the shunt element 520 which requires a line longer than the line for the capacitor element 502 has a loss L8, which suppresses the oscillation of the electromagnetic wave having the parasitic oscillation frequency fv.

[0114] In other words, when the line for connecting to the oscillation circuit 100 (negative resistance element 101) is short, the capacitance element 302 and the capacitance element 502 and the shunt element 520 each suppress the oscillation of the electromagnetic wave in the higher frequency band. In addition, the capacitance element 302 and the capacitance element 502 and the shunt element 520 are each connected to the oscillation circuit 100 (negative resistance element 101) by a line having a length not greater than 1 / 4 of the wavelength of the electromagnetic wave with the maximum frequency, and the parasitic oscillation of the electromagnetic wave will be suppressed by the element itself (which has loss). Note that, as described above, the wavelength of the electromagnetic wave with the maximum frequency at which the parasitic oscillation will be suppressed (with loss) can be referred to as the cutoff frequency on the high frequency side.

[0115] Note that the shunt element is not limited to the capacitance element 302 and the capacitance element 502. An element in which a capacitance element and a resistance element are electrically connected in series may be used as the shunt element instead of the capacitance element 302 and the capacitance element 502.

[0116] With the oscillator according to the present embodiment, parasitic oscillations of each part to be connected (chip to package, package to printed circuit board, printed circuit board to voltage bias circuit) can be suppressed by using a plurality of shunt elements. Therefore, the parameters of each shunt element can be set to more optimized parameters, which leads to the minimum design value required.

[0117] Fifth embodiment

[0118] The oscillator 5 according to the fifth embodiment is the same as the oscillator 1 according to the first embodiment, except that the arrangement position of the voltage bias circuit is different from that of the oscillator 1 according to the first embodiment.

[0119] In this embodiment, if Fig. 12B As shown in FIG. 5 , the voltage bias circuit 200 is not formed on the printed circuit board 500 including the package 501, but is formed on another printed circuit board 510. Here, the printed circuit board 500 and the printed circuit board 510 are electrically connected through a cable 513. Specifically, the connector 511 on the printed circuit board 500 and the connector 512 on the printed circuit board 510 are connected through the cable 513.

[0120] Thus, the voltage bias circuit 200 formed on the printed circuit board 510 can apply the voltage Vop to the chip 600 in the package 501 via the cable 513 .

[0121] In the present embodiment, the shunt element 310 makes it possible to suppress parasitic oscillation even if there is a parasitic element between the oscillation circuit 100 and the voltage bias circuit 200. Thus, even if the voltage bias circuit 200 is provided separately on another printed circuit board 510, the oscillator 5 can generate a predetermined electromagnetic wave (terahertz wave) through the cable 513.

[0122] Therefore, according to this embodiment, in the oscillator, the part generating the predetermined electromagnetic wave (the part having the oscillation circuit) can be separated from the voltage bias circuit, so the layout can be set more freely with fewer restrictions on the design of the part generating the predetermined electromagnetic wave.

[0123] Sixth embodiment

[0124] In the oscillator 1 according to the first embodiment, the voltage bias circuit applies a DC voltage across the negative resistance element. However, in the oscillator 6 according to the present embodiment, the voltage bias circuit applies an AC voltage across the negative resistance element. Note that the oscillator 6 has the same configuration as the oscillator 1 according to the first embodiment except that the AC voltage is applied.

[0125] like Fig.13A As shown in FIG. 1 , the voltage bias circuit 210 applies an alternating voltage (AC voltage) to the oscillation circuit 100 (negative resistance element 101). Specifically, as Fig. 13B As shown in , a voltage that changes at a certain frequency is used as an AC voltage, which is between a voltage value Vop for generating a predetermined electromagnetic wave and a voltage value Voff for stopping the generation of a predetermined electromagnetic wave. The voltage value Voff can be any voltage value outside the negative resistance region, and is, for example, 0V. In addition, as Fig. 13B As shown in , a voltage that changes between two values ​​of a voltage value Vop and a voltage value Voff by means of transition of a pulse wave can be used as the AC voltage. As the frequency of the voltage change, a frequency sufficiently lower than the oscillation frequency of a predetermined electromagnetic wave is used.

[0126] Because the AC voltage is generated, the operation of the voltage bias circuit 210 is more complicated than that of the voltage bias circuit 200 according to the first embodiment. Therefore, the voltage bias circuit 210 includes an element larger than the parasitic element included in the voltage bias circuit 200 according to the first embodiment, in which parasitic oscillation due to the voltage bias circuit 210 and the oscillation circuit 100 is likely to occur. However, even in such a configuration in which parasitic oscillation is more likely to occur, the oscillator 6 can effectively suppress the parasitic oscillation by including the shunt element 310.

[0127] Note that, in the shunt element 310, the frequency (cutoff frequency on the low-frequency side) determined by the time constant of the capacitance element 312 and the resistance element 311 needs to be higher than the frequency at which the voltage bias circuit 210 changes the voltage. For example, in the case of using a rectangular wave voltage, the frequency determined by the time constant is preferably at least several times the frequency at which the voltage bias circuit 210 changes the voltage.

[0128] According to the present embodiment, even in the case of using the voltage bias circuit 210 for alternating current in which parasitic oscillation is more likely to occur, it is possible to prevent an increase in power consumption and provide stable suppression of parasitic oscillation.

[0129] Seventh embodiment

[0130] The oscillator 1 according to the first embodiment can be applied to an imaging device (image acquisition device). Therefore, in this embodiment, an imaging device 10 using the oscillator 1 will be described.

[0131] like Fig.14A As shown in FIG. 1 , the imaging device 10 includes an illumination 801 and an imaging element 802. The illumination 801 is an illumination device including the oscillator 1 according to the first embodiment to irradiate a subject 800 with a terahertz wave 811 (predetermined electromagnetic wave). The imaging element 802 acquires (images) the terahertz wave 812 reflected from the subject 800. The imaging element 802 can acquire information about the subject 800 as an image, which information changes depending on the shape and / or physical property value of the subject 800.

[0132] In this way, when the oscillator 1 is also used for the illumination 801, the oscillator 1 makes it possible to prevent an increase in power consumption and provide stable suppression of parasitic oscillation in the imaging device 10. Thus, stable irradiation can be performed using terahertz waves with little change in properties due to heat generation, etc. Therefore, according to the present embodiment, the imaging device 10 that can acquire accurate information about the subject can be provided.

[0133] First Modification

[0134] Furthermore, the illumination 801 is not limited to the illumination used for the imaging device 10 according to the seventh embodiment, but may be used as Fig. 14B As shown in , it can be used for the imaging device 11 including the oscillator 6 using the voltage bias circuit 210 of the sixth embodiment.

[0135] exist Fig. 14B , the imaging device 11 includes an illumination 801 using an oscillator 6 , an imaging element 802 , and a timing generation unit 803 . The timing generation unit 803 inputs a timing signal 810 to the illumination 801 using the oscillator 6 , and inputs the timing signal 810 to the imaging element 802 .

[0136] The illumination 801 adjusts the voltage change timing of the voltage bias circuit 210 based on the input timing signal 810. When the illumination 801 repeatedly generates and stops the terahertz wave 811 at the adjusted timing within a cycle, a period during which the object 800 is irradiated with the terahertz wave 811 and a period during which the object 800 is not irradiated with the terahertz wave 811 are caused.

[0137] On the other hand, the imaging element 802 performs imaging of the subject 800 in the period in which the illumination 801 emits the terahertz wave and in the period in which the illumination 801 does not emit the terahertz wave based on the input timing signal 810. Then, the imaging element 802 determines the difference between the plurality of pieces of information imaged in the two periods. Based on the difference, the imaging element 802 can remove the electromagnetic wave component (noise component) that is not intentionally emitted, thereby making it possible to improve the SN ratio (signal-to-noise ratio) of the acquired image.

[0138] According to the present modification, it is possible to provide an imaging device (terahertz imaging device) that can acquire image information having a high SN ratio.

[0139] While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments.The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

Claims

1. An oscillator, comprising: a resonator including a negative resistance element; a voltage bias circuit configured to apply a voltage across the negative resistance element; a first shunt element in which a resistor and a capacitor are electrically connected in series; as well as One or more second shunt elements, wherein The negative resistance element and the first shunt element are electrically connected in parallel to a voltage bias circuit, Each of the one or more second shunt elements comprises a capacitor, Each of the one or more second shunt elements, the negative resistance element, and the first shunt element are electrically connected in parallel to a voltage bias circuit, and The shorter the line for connecting to the negative resistance element is, the higher the frequency band of the electromagnetic wave whose oscillation is suppressed by the first shunt element and the one or more second shunt elements.

2. The oscillator according to claim 1, wherein A line connecting at least one of the one or more second shunt elements and the negative resistance element has a length not greater than ¼ of a wavelength of an electromagnetic wave generated by the resonator.

3. The oscillator according to claim 1, wherein: The first shunt element and the one or more second shunt elements are each connected to the negative resistance element through a line having a length not greater than 1 / 4 of the wavelength corresponding to the cutoff frequency on the high frequency side.

4. The oscillator according to claim 1, wherein: The resonator and one of the one or more second shunt elements are formed on the same chip.

5. The oscillator according to claim 1, wherein The first diverter element and the one or more second diverter elements are each formed on different components.

6. The oscillator according to claim 1, wherein Each of the one or more second shunt elements does not include a resistor.

7. The oscillator according to claim 1, further comprising: a first substrate on which a voltage bias circuit is formed; as well as a second substrate on which the resonator is formed, wherein The first substrate and the second substrate are electrically connected via a cable.

8. The oscillator according to claim 1, wherein The resistor of the first shunt element has a resistance value of at least 1 / 2 and not more than twice the absolute value of the impedance of the negative resistance element in the negative resistance region, and The negative resistance region is a region in the voltage-current characteristic where the current decreases as the voltage increases.

9. The oscillator according to claim 1, wherein: R / 10≥1 / (2πf0×C) is satisfied, where C is the capacitance value of the capacitor of the first shunt element, R is the resistance value of the resistor of the first shunt element, and f0 is the cutoff frequency on the low frequency side of the first shunt element.

10. The oscillator according to claim 1, wherein The voltage bias circuit applies an AC voltage across the negative resistance element.

11. The oscillator according to claim 1, wherein: The frequency of the electromagnetic wave generated by the resonator is at least 30 GHz and not more than 30 THz.

12. The oscillator according to claim 1, wherein The first shunt element includes a capacitor in which a dielectric film is sandwiched between two electrodes.

13. The oscillator according to claim 1, wherein The negative resistance element is a resonant tunneling diode.

14. An oscillator comprising: a resonator including a negative resistance element; a voltage bias circuit configured to apply a voltage across the negative resistance element; a first shunt element in which a resistor and a capacitor are electrically connected in series; as well as One or more second shunt elements, wherein The negative resistance element and the first shunt element are electrically connected in parallel to a voltage bias circuit, Each of the one or more second shunt elements comprises a capacitor, Each of the one or more second shunt elements, the negative resistance element, and the first shunt element are electrically connected in parallel to a voltage bias circuit, and The first shunt element and the one or more second shunt elements are each connected to the negative resistance element through a line having a length not greater than 1 / 4 of the wavelength corresponding to the cutoff frequency on the high frequency side.

15. An oscillator comprising: a resonator including a negative resistance element; a voltage bias circuit configured to apply a voltage across the negative resistance element; as well as a first shunt element in which a resistor and a capacitor are electrically connected in series, wherein The negative resistance element and the first shunt element are electrically connected in parallel to a voltage bias circuit, The resistor of the first shunt element has a resistance value of at least 1 / 2 and not more than twice the absolute value of the impedance of the negative resistance element in the negative resistance region, and The negative resistance region is a region in the voltage-current characteristic where the current decreases as the voltage increases.

16. An oscillator comprising: a resonator including a negative resistance element; a voltage bias circuit configured to apply a voltage across the negative resistance element; as well as a first shunt element in which a resistor and a capacitor are electrically connected in series, wherein The negative resistance element and the first shunt element are electrically connected in parallel to a voltage bias circuit, and R / 10≥1 / (2πf0×C) is satisfied, where C is the capacitance value of the capacitor of the first shunt element, R is the resistance value of the resistor of the first shunt element, and f0 is the cutoff frequency on the low frequency side of the first shunt element.

17. An imaging device comprising: A lighting device comprising an oscillator according to any one of claims 1 to 16; as well as The imaging element is configured to image a subject irradiated with the electromagnetic wave generated by the oscillator.

Images