LCD panel and preparation method thereof

Abstract

The present invention relates to the field of panel technology, and in particular to an LCD panel and a preparation method thereof, comprising an under-screen fingerprint detection area, wherein the under-screen fingerprint detection area comprises a first substrate, and a first gate metal layer, a first gate insulating layer, a first source metal layer, a first semiconductor layer, a first passivation layer, a first flat layer and a first transparent layer are sequentially stacked on one side of the first substrate. A TFT device is formed by arranging the first gate metal layer, the first source metal layer and the first semiconductor layer, and a photodiode is formed by arranging the first semiconductor layer and the second semiconductor layer. When light irradiates the device, a photocurrent is generated. When the TFT device is turned on, the current is detected by a sensing line, and the ratio of the charge detected at different positions is different, so that the fingerprint pattern is mapped, thereby realizing the fingerprint recognition function.

Description

Technical Field

[0001] The present invention relates to the technical field of panels, and in particular to an LCD panel and a preparation method thereof. Background Art

[0002] With the explosive growth of the full-screen mobile phone market, the application of under-screen fingerprint technology has gradually become the mainstream standard in the industry. According to different technical characteristics, under-screen fingerprints can be roughly divided into three types: capacitive fingerprint recognition, optical fingerprint recognition and ultrasonic fingerprint recognition. These three under-screen fingerprint technologies have their own advantages and disadvantages. Capacitive fingerprint recognition has the characteristics of low cost, low power consumption, but low sensitivity; optical fingerprint recognition has the characteristics of high sensitivity but high power consumption; ultrasonic fingerprint recognition technology is mainly not technically mature enough.

[0003] Among them, optical fingerprint recognition technology can be combined with OLED (organic light-emitting diode in English) technology to realize under-screen fingerprint technology for the full screen; the backplane (Photo Diode Backplane) equipped with a photosensitive element array is designed under the OLED display screen. When a finger touches it to collect the fingerprint, the light emitted by the OLED screen hits the texture of the finger's fingerprint, and then reflects to the photosensitive element below. The photosensitive element converts the light signal into an electrical signal and transmits it to the data analysis unit to analyze the fingerprint characteristics. However, there is currently no under-screen fingerprint recognition design for LCD (liquid crystal display in English) screens on the market. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an LCD panel and a preparation method thereof, so as to realize fingerprint recognition under the LCD screen without affecting the display quality.

[0005] In order to solve the above technical problems, the first technical solution adopted by the present invention is:

[0006] An LCD panel includes an under-screen fingerprint detection area, wherein the under-screen fingerprint detection area includes a first substrate, and a first gate metal layer, a first gate insulating layer, a first source metal layer, a first semiconductor layer, a first passivation layer, a first flat layer and a first transparent layer are sequentially stacked on one side surface of the first substrate, the first gate insulating layer is in contact with the first gate metal layer, the first substrate and the first source metal layer, respectively, one side surface of the first passivation layer is in contact with the first semiconductor layer and the first source metal layer, respectively, the other side surface of the first passivation layer opposite to the one side surface is in contact with one side surface of the first flat layer, a second semiconductor layer is embedded in the first flat layer, a side surface of the second semiconductor layer away from the first passivation layer is in contact with the first transparent layer, and the other side surface of the first flat layer opposite to the one side surface is in contact with the first transparent layer.

[0007] The second technical solution adopted by the present invention is:

[0008] A method for preparing an LCD panel comprises the following steps:

[0009] S1, providing a first substrate, wherein a first gate metal layer is covered on the first substrate;

[0010] S2, forming a first gate insulating layer, and covering the surface of the first gate metal layer;

[0011] S3, forming a first source metal layer, and covering the surface of the first gate insulating layer;

[0012] S4, forming a first semiconductor layer, and covering the surface of the first source metal layer;

[0013] S5, forming a first passivation layer, and covering the surface of the first semiconductor layer;

[0014] S6, forming a second semiconductor layer, and covering the surface of the first passivation layer;

[0015] S7, forming a first flat layer and covering the surface of the second semiconductor layer; the first flat layer is in contact with the first passivation layer;

[0016] S8, forming a first transparent layer and covering the surface of the first flat layer; the first transparent layer is in contact with the second semiconductor layer.

[0017] The beneficial effects of the present invention are:

[0018] A TFT device is formed by setting a first gate metal layer, a first source metal layer and a first semiconductor layer, and a photodiode is formed by setting a first semiconductor layer and a second semiconductor layer. When light shines on the device, photocurrent is generated. When the TFT device is turned on, the current is detected by the sensor line. The ratio of the detected charge amounts at different positions is different, so that the fingerprint pattern is mapped, thereby realizing the fingerprint recognition function. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of the structure of an under-screen fingerprint detection area of ​​an LCD panel according to the present invention;

[0020] Figure 2 A schematic structural diagram of a liquid crystal display area of ​​an LCD panel according to the present invention;

[0021] Figure 3 A circuit diagram of an under-screen fingerprint detection area of ​​an LCD panel according to the present invention;

[0022] Figure 4 A flow chart of steps of a method for controlling an LCD panel according to the present invention;

[0023] Description of labels:

[0024] 1. Under-screen fingerprint detection area; 101. First substrate; 102. First gate metal layer; 103. First gate insulating layer; 104. First source metal layer; 105. First semiconductor layer; 106. First passivation layer; 107. Second semiconductor layer; 108. First flat layer; 109. First transparent layer;

[0025] 2. Liquid crystal display area; 201. Second substrate; 202. Second gate metal layer; 203. Second gate insulating layer; 204. Second source metal layer; 205. Third semiconductor layer; 206. Second passivation layer; 207. Second flat layer; 208. Top insulating layer; 209. Second transparent layer; 210. Third transparent layer. DETAILED DESCRIPTION

[0026] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in combination with the implementation modes and the accompanying drawings.

[0027] Please refer to Figure 1 , a technical solution provided by the present invention:

[0028] An LCD panel includes an under-screen fingerprint detection area, wherein the under-screen fingerprint detection area includes a first substrate, and a first gate metal layer, a first gate insulating layer, a first source metal layer, a first semiconductor layer, a first passivation layer, a first flat layer and a first transparent layer are sequentially stacked on one side surface of the first substrate, the first gate insulating layer is in contact with the first gate metal layer, the first substrate and the first source metal layer, respectively, one side surface of the first passivation layer is in contact with the first semiconductor layer and the first source metal layer, respectively, the other side surface of the first passivation layer opposite to the one side surface is in contact with one side surface of the first flat layer, a second semiconductor layer is embedded in the first flat layer, a side surface of the second semiconductor layer away from the first passivation layer is in contact with the first transparent layer, and the other side surface of the first flat layer opposite to the one side surface is in contact with the first transparent layer.

[0029] From the above description, it can be seen that the beneficial effects of the present invention are:

[0030] A TFT device is formed by setting a first gate metal layer, a first source metal layer and a first semiconductor layer, and a photodiode is formed by setting a first semiconductor layer and a second semiconductor layer. When light shines on the device, photocurrent is generated. When the TFT device is turned on, the current is detected by the sensor line. The ratio of the detected charge amounts at different positions is different, so that the fingerprint pattern is mapped, thereby realizing the fingerprint recognition function.

[0031] Furthermore, it also includes a liquid crystal display area, which includes a second substrate, and a second gate metal layer, a second gate insulating layer, a second source metal layer, a third semiconductor layer, a second passivation layer, a second flat layer and a top insulating layer are stacked in sequence on one side of the second substrate, a first via is provided on the second passivation layer, a second via is provided on the second flat layer, and a third via is provided on the top insulating layer. The second via is located between the first via and the third via and is respectively connected to the first via and the third via, and the first via, the second via and the third via are all filled with a second transparent layer, and the second transparent layer filled in the first via is in contact with the second source metal layer.

[0032] From the above description, it can be seen that by setting the LCD display area, the backlight will pass through the LCD display area, and the light will be reflected by the hand to the fingerprint detection area under the screen. Since the fingerprint detection area under the screen is blocked by a metal layer, the backlight will be blocked and cannot affect the detection sensitivity of the fingerprint detection area under the screen; the reflection intensity of the light on the hand is different, so the actual light intensity of the photoelectric device irradiated to the fingerprint detection area under the screen is different, and the current converted by the photodiode is different, so the IC can calculate the correspondence between the texture and the current through the algorithm, and finally realize the fingerprint recognition function under the screen.

[0033] Furthermore, two third transparent layers are arranged between the second planar layer and the top insulating layer, and the second transparent layer filled in the third via hole is located between the two third transparent layers.

[0034] Furthermore, the number of the second source metal layers is two, and the third semiconductor layer is located between the two second source metal layers and is in contact with the two second source metal layers respectively.

[0035] It can be seen from the above description that the second gate metal layer, the two second source metal layers and the third semiconductor layer constitute a TFT device, and the second gate metal layer can shield the light of the backlight, thereby avoiding the influence of the backlight on the TFT device.

[0036] Furthermore, the number of the first source metal layers and the number of the first semiconductor layers are both two, one of the two first semiconductor layers is located between the two first source metal layers and is respectively in contact with the two first source metal layers, and the other of the two first semiconductor layers is located on a side surface of one of the first source metal layers away from the first gate insulating layer.

[0037] Furthermore, the second semiconductor layer is in contact with the other of the two first semiconductor layers.

[0038] It can be known from the above description that the second semiconductor layer contacts the other of the two first semiconductor layers to form a photodiode.

[0039] Please refer to Figure 4 , another technical solution provided by the present invention:

[0040] A method for preparing an LCD panel comprises the following steps:

[0041] S1, providing a first substrate, wherein a first gate metal layer is covered on the first substrate;

[0042] S2, forming a first gate insulating layer, and covering the surface of the first gate metal layer;

[0043] S3, forming a first source metal layer, and covering the surface of the first gate insulating layer;

[0044] S4, forming a first semiconductor layer, and covering the surface of the first source metal layer;

[0045] S5, forming a first passivation layer, and covering the surface of the first semiconductor layer;

[0046] S6, forming a second semiconductor layer, and covering the surface of the first passivation layer;

[0047] S7, forming a first flat layer and covering the surface of the second semiconductor layer; the first flat layer is in contact with the first passivation layer;

[0048] S8, forming a first transparent layer and covering the surface of the first flat layer; the first transparent layer is in contact with the second semiconductor layer.

[0049] Please refer to Figures 1 to 3 , Embodiment 1 of the present invention is:

[0050] Please refer to Figure 1, an LCD panel, comprising an under-screen fingerprint detection area 1, the under-screen fingerprint detection area 1 comprising a first substrate 101, a first gate metal layer 102, a first gate insulating layer 103, a first source metal layer 104, a first semiconductor layer 105, a first passivation layer 106, a first flat layer 108 and a first transparent layer 109 are sequentially stacked on one side of the first substrate 101, the first gate insulating layer 103 is in contact with the first gate metal layer 102, the first substrate 101 and the first source metal layer 104, respectively, one side of the first passivation layer 106 is in contact with the first semiconductor layer 105 and the first source metal layer 104, respectively, the other side of the first passivation layer 106 opposite to the one side is in contact with one side of the first flat layer 108, the first flat layer 108 is embedded with a second semiconductor layer 107, the second semiconductor layer 107 is away from the first passivation layer 106 One side is in contact with the first transparent layer 109, and the other side of the first flat layer 108 opposite to the one side is in contact with the first transparent layer 109.

[0051] Please refer to Figure 2 , also includes a liquid crystal display area 2, the liquid crystal display area 2 includes a second substrate 201, and a second gate metal layer 202, a second gate insulating layer 203, a second source metal layer 204, a third semiconductor layer 205, a second passivation layer 206, a second flat layer 207 and a top insulating layer 208 are stacked in sequence on one side of the second substrate 201, a first via hole is provided on the second passivation layer 206, a second via hole is provided on the second flat layer 207, and a third via hole is provided on the top insulating layer 208, the second via hole is located between the first via hole and the third via hole and is respectively connected to the first via hole and the third via hole, the first via hole, the second via hole and the third via hole are all filled with a second transparent layer 209, and the second transparent layer 209 filled in the first via hole is in contact with the second source metal layer 204.

[0052] Please refer to Figure 2 Two third transparent layers 210 are provided between the second planar layer 207 and the top insulating layer 208 , and the second transparent layer 209 filled in the third via hole is located between the two third transparent layers 210 .

[0053] Please refer to Figure 2 , the number of the second source metal layers 204 is two, and the third semiconductor layer 205 is located between the two second source metal layers 204 and contacts the two second source metal layers 204 respectively.

[0054] Please refer to Figure 1, the number of the first source metal layers 104 and the number of the first semiconductor layers 105 are both two, one of the two first semiconductor layers 105 is located between the two first source metal layers 104 and is respectively in contact with the two first source metal layers 104, and the other of the two first semiconductor layers 105 is located on a side surface of one of the first source metal layers 104 away from the first gate insulating layer 103.

[0055] Please refer to Figure 1 The second semiconductor layer 107 is in contact with the other first semiconductor layer 105 of the two first semiconductor layers 105 .

[0056] The circuit connection structure of the TFT device (transistor T1) and the light-emitting diode (diode D1) formed in the under-screen fingerprint detection area 1 can be found in Figure 3 The gate of the transistor T1 is connected to the source of the transistor T1 and the gate wiring of the peripheral device (i.e. Figure 3 Sensor line in the diagram) and the sensor line of the peripheral (i.e. Figure 3 The drain of the transistor T1 is electrically connected to the anode of the diode D1, and the cathode of the diode D1 is grounded; the first gate metal layer 102 serves as the gate of the TFT device, and the two first source metal layers 104 serve as the source and drain of the TFT device respectively.

[0057] In the actual process, the first substrate 101 and the second substrate 201 are the same layer of substrates distributed in different areas, and are simultaneously manufactured during the evaporation process; the thickness of the first substrate 101 and the second substrate 201 are both 0.4 μm-0.5 μm, preferably 0.41 μm;

[0058] The first gate metal layer 102 and the second gate metal layer 202 are the same gate metal layer distributed in different areas, and are formed simultaneously by evaporation coating or chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when making buffer layers). The gate metal layer is preferably made of graphene, carbon nanotubes, nano silver wires and other materials. In view of the fact that the current high-conductivity and bending-resistant material technology has yet to be broken through, the gate metal layer can also be made of metals such as aluminum, molybdenum, titanium, nickel, copper, silver, chromium and other metals with excellent conductivity, and alloys; the thickness of the first gate metal layer 102 and the second gate metal layer 202 is 0.2μm-0.3μm, preferably 0.25μm;

[0059] The first gate insulating layer 103 and the second gate insulating layer 203 are the same gate insulating layer distributed in different regions, and are simultaneously manufactured and formed during a chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when manufacturing buffer layers), and the gate insulating layer is made of SiOx, SiNx, titanium oxide, aluminum oxide, etc.; the thickness of the first gate insulating layer 103 and the second gate insulating layer 203 are both 0.2μm-0.3μm, preferably 0.25μm;

[0060] The first source metal layer 104 and the second source metal layer 204 are the same source metal layer distributed in different areas, and are simultaneously manufactured by evaporation coating or chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when manufacturing buffer layers). The material of the first source metal layer 104 and the second source metal layer 204 is the same as that of the first gate metal layer 102. The thickness of the first source metal layer 104 and the second source metal layer 204 is 0.2 μm-0.3 μm, preferably 0.25 μm;

[0061] The first semiconductor layer 105 and the third semiconductor layer 205 are the same semiconductor layer distributed in different regions, and are simultaneously manufactured by evaporation coating or chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when manufacturing buffer layers). The first semiconductor layer 105 and the second semiconductor layer 107 are made of metal oxide semiconductor materials, such as IGZO, IGZTO and IZO, etc. The thickness of the first semiconductor layer 105 and the second semiconductor layer 107 are both 0.3μm-0.4μm, preferably 0.35μm;

[0062] The first passivation layer 106 and the second passivation layer 206 are the same passivation layer distributed in different areas, and are simultaneously manufactured and formed during a chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when manufacturing the buffer layer), and the material of the passivation layer is the same as that of the gate insulating layer. The thickness of the first passivation layer 106 and the second passivation layer 206 are both 0.5 μm-0.6 μm, preferably 0.55 μm;

[0063] The first flat layer 108 and the second flat layer 207 are the same flat layer distributed in different areas, and are formed simultaneously by a chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when making buffer layers). The material of the flat layer is the same as that of the gate insulating layer. The thickness of the first flat layer 108 and the second flat layer 207 are both 1.5 μm-2.5 μm, preferably 2.0 μm;

[0064] The first transparent layer 109 and the third transparent layer 210 are the same transparent layer distributed in different areas, and are simultaneously manufactured by a chemical vapor deposition (CVD) or physical vapor deposition (PVD) process (because different substrates use different processes when manufacturing the buffer layer), and the first transparent layer 109 and the third transparent layer 210 are both made of ITO, and the thickness of the first transparent layer 109 and the third transparent layer 210 is 0.03 μm-0.1 μm, preferably 0.065 μm;

[0065] The material of the top insulating layer 208 is the same as that of the first gate insulating layer 103 , and the thickness of the top insulating layer 208 is 0.3 μm-0.4 μm, preferably 0.33 μm;

[0066] The material of the second transparent layer 209 is the same as that of the first transparent layer 109 . The thickness of the second transparent layer 209 is 0.03 μm-0.1 μm, preferably 0.065 μm.

[0067] Please refer to Figure 4 , Embodiment 2 of the present invention is:

[0068] A method for preparing an LCD panel comprises the following steps:

[0069] S1, providing a first substrate 101, wherein the first substrate 101 is covered with a first gate metal layer 102;

[0070] S2, forming a first gate insulating layer 103, and covering the surface of the first gate metal layer 102;

[0071] S3, forming a first source metal layer 104, and covering the surface of the first gate insulating layer 103;

[0072] S4, forming a first semiconductor layer 105, and covering the surface of the first source metal layer 104;

[0073] S5, forming a first passivation layer 106, and covering the surface of the first semiconductor layer 105;

[0074] S6, forming a second semiconductor layer 107, and covering the surface of the first passivation layer 106;

[0075] S7, forming a first flat layer 108, and covering the surface of the second semiconductor layer 107; the first flat layer 108 is in contact with the first passivation layer 106;

[0076] S8 , forming a first transparent layer 109 and covering the surface of the first planar layer 108 ; the first transparent layer 109 is in contact with the second semiconductor layer 107 .

[0077] In summary, the present invention provides an LCD panel and a preparation method thereof, wherein a TFT device is formed by setting a first gate metal layer, a first source metal layer and a first semiconductor layer, and a photodiode is formed by setting a first semiconductor layer and a second semiconductor layer. When light irradiates the device, a photocurrent is generated. When the TFT device is turned on, the current is detected by the sensor line. The ratio of the charge detected at different positions is different, so that the fingerprint pattern is mapped, thereby realizing the fingerprint recognition function.

[0078] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An LCD panel, characterized in that: The invention comprises an under-screen fingerprint detection area, wherein the under-screen fingerprint detection area comprises a first substrate, a first gate metal layer, a first gate insulating layer, a first source metal layer, a first semiconductor layer, a first passivation layer, a first flat layer and a first transparent layer are sequentially stacked on one side surface of the first substrate, the first gate insulating layer is in contact with the first gate metal layer, the first substrate and the first source metal layer respectively, one side surface of the first passivation layer is in contact with the first semiconductor layer and the first source metal layer respectively, the other side surface of the first passivation layer opposite to the one side surface is in contact with one side surface of the first flat layer, a second semiconductor layer is embedded in the first flat layer, a side surface of the second semiconductor layer away from the first passivation layer is in contact with the first transparent layer, and the other side surface of the first flat layer opposite to the one side surface is in contact with the first transparent layer; It also includes a liquid crystal display area, the liquid crystal display area includes a second substrate, a second gate metal layer, a second gate insulating layer, a second source metal layer, a third semiconductor layer, a second passivation layer, a second flat layer and a top insulating layer are sequentially stacked on one side of the second substrate, a first via hole is provided on the second passivation layer, a second via hole is provided on the second flat layer, a third via hole is provided on the top insulating layer, the second via hole is located between the first via hole and the third via hole and communicates with the first via hole and the third via hole respectively, the first via hole, the second via hole and the third via hole are all filled with a second transparent layer, and the second transparent layer filled in the first via hole is in contact with the second source metal layer; The number of the first source metal layers and the number of the first semiconductor layers are both two, one of the two first semiconductor layers is located between the two first source metal layers and is respectively in contact with the two first source metal layers, and the other of the two first semiconductor layers is located on a side surface of one of the first source metal layers away from the first gate insulating layer.

2. The LCD panel according to claim 1, characterized in that: Two third transparent layers are arranged between the second planar layer and the top insulating layer, and the second transparent layer filled in the third via hole is located between the two third transparent layers.

3. The LCD panel according to claim 1, wherein: The number of the second source metal layers is two, and the third semiconductor layer is located between the two second source metal layers and is in contact with the two second source metal layers respectively.

4. The LCD panel according to claim 1, wherein: The second semiconductor layer is in contact with the other of the two first semiconductor layers.

5. A method for preparing an LCD panel according to claim 1, characterized in that: The following steps are involved: S1, providing a first substrate, wherein a first gate metal layer is covered on the first substrate; S2, forming a first gate insulating layer, and covering the surface of the first gate metal layer; S3, forming a first source metal layer, and covering the surface of the first gate insulating layer; S4, forming a first semiconductor layer, and covering the surface of the first source metal layer; S5, forming a first passivation layer, and covering the surface of the first semiconductor layer; S6, forming a second semiconductor layer, and covering the surface of the first passivation layer; S7, forming a first planar layer, and covering the surface of the second semiconductor layer; The first planarization layer is in contact with the first passivation layer; S8, forming a first transparent layer and covering the surface of the first flat layer; the first transparent layer is in contact with the second semiconductor layer.

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