Semiconductor MPS diode with reduced current crowding effect and method of manufacturing the same

Abstract

Various embodiments of the present disclosure relate to semiconductor MPS diodes with reduced current crowding effects and methods for manufacturing the same. A fused PN Schottky (MPS) diode comprises: an N substrate, an N drift layer, a P-doped region in the drift layer, an ohmic contact on the P-doped region, a plurality of cells within the P-doped region and being portions of the drift layer without the P-doped region, and anode metallization on the ohmic contact and on the cells to form junction barrier contacts and Schottky contacts, respectively. The P-doped region has a grid-shaped layout that separates each cell from each other and, together with the cells, defines an active area of ​​the MPS diode. Each cell has the same geometric shape among a quadrilateral, a quadrilateral with rounded corners, and a circle; and the ohmic contact extends continuously along the grid-shaped layout at the doped region.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor fused PN-Schottky (MPS) diode with reduced current crowding effect and a method of manufacturing the same. Background Art

[0002] As is known to all, a large bandgap (especially an energy value Eg with a bandgap greater than 1.1 eV), a low on-resistance (R ON Semiconductor materials with high thermal conductivity, high operating frequencies, and high saturation velocities of charge carriers are ideal for producing electronic components such as diodes or transistors, particularly for power applications. One material that possesses these characteristics and is designed for use in the manufacture of electronic components is silicon carbide (SiC). In particular, silicon carbide with its various polytypes (e.g., 3C-SiC, 4H-SiC, 6H-SiC) is preferred over silicon in terms of the properties listed above.

[0003] Electronic devices fabricated on silicon carbide substrates offer numerous advantages over similar devices fabricated on silicon substrates, including low output resistance when on, low leakage current, high operating temperature, and high operating frequency. In particular, SiC Schottky diodes exhibit excellent switching performance, making SiC power devices particularly suitable for high-frequency applications. These applications place high demands on device electrical performance and long-term reliability.

[0004] Figure 1A A fused PN-Schottky (MPS) device 1 of known type is shown in a top view in a Cartesian (three-axis) reference system of axes X, Y, Z. Figure 1B A lateral cross-sectional view of a portion of the MPS device 1 taken along line II in the same reference system is shown.

[0005] Joint Reference Figure 1A and Figure 1B The MPS device 1 includes: a substrate 3 of N-type SiC having a first dopant concentration; a drift layer 2 (epitaxially grown) of N-type SiC having a second dopant concentration lower than the first dopant concentration, extending on a surface 3a of the substrate 3; a cathode terminal 6 of a metal material extending on a surface 3b (opposite to the surface 3a) of the substrate 3; an anode terminal 8 of a metal material (anode metallization) extending on an upper surface 2a of the drift layer 2; a plurality of junction barrier (JB) elements 9 in the drift layer 2, which face the upper surface 2a of the drift layer 2 and each include a corresponding P-type implant region 9' and an ohmic contact 9" of the metal material; and an edge termination region (guard ring) 10, in particular a P-type implant region, which completely surrounds the junction barrier (JB) element 9.

[0006] A Schottky diode 12 is formed at the interface between the drift layer 2 and the metallization of the anode metallization 8. In particular, a Schottky junction (metal-semiconductor) is provided by portions of the drift layer 2 that are in direct electrical contact with corresponding portions of the anode metallization 8.

[0007] The region of the MPS device 1 including the JB element 9 and the Schottky diode 12 (ie, the region included in the guard ring 10 ) is the active region 14 of the MPS device 1 .

[0008] During use in the forward conduction state, since the Schottky starting point (about 0.7V) is lower than the PN starting point (about 2.5V), the MPS device 1 acts as a Schottky diode at lower current densities (low on-state losses) and exhibits the characteristics of a PN diode at sufficiently high current densities. Figure 1A The asymmetric layout of the active region 14 causes a current crowding effect in the corner / rounded regions near the intersection between the implanted region 9' and the guard ring 10. Specifically, the corners in the active region 14 concentrate current at a higher density than in the rest of the active region 14. At very high currents, bipolar conduction tends to be primarily enabled in these regions due to the higher voltage drop caused by the higher current density and the higher temperatures caused by self-heating. Even at relatively low currents, thermal runaway over a very limited area can cause the formation of hot spots with high values ​​up to the melting point of the material, thereby causing device failure or thermomechanical stress, which can ultimately lead to cracks in the die.

[0009] In order to overcome the above problems, known solutions envisage that the JB element 9 and / or the Schottky diode 12 are arranged in a unitary manner instead of being arranged in a unitary manner. Figure 1A The formation of a strip layout in this known solution. Figure 2 and Figure 3 are shown in FIG, wherein the same reference numerals are used to indicate Figure 1A 、 Figure 1B Common elements of the embodiments.

[0010] Figure 2 An embodiment is shown in a top view in an X, Y, Z reference system, in which JB elements 9 are in the form of cells or dots and each include an implantation region 9' having a hexagonal shape, with a corresponding ohmic contact 9' formed within the implantation region 9'. The JB elements 9 are organized into a symmetrical array. The ohmic contacts are discontinuous. A Schottky diode 12 is formed by the drift layer 2 surrounding the JB elements 9 and the anode metallization 8 extending above the drift layer 2.

[0011] Figure 3An embodiment is shown in a top view in an X, Y, Z reference system, wherein both the Schottky diodes 12 and the JB elements 9 are in the form of hexagonal cells or points. More specifically, each JB element 9 is completely surrounded by a corresponding Schottky diode 12; furthermore, each Schottky diode 12 is completely surrounded by adjacent Schottky diodes 12 (in top view) and is separated from adjacent Schottky diodes 12 by a P+ region.

[0012] even though Figure 2 and Figure 3 While the cell-like layout of the proposed solution allows for avoiding current crowding at device corners, the applicant has discovered that small local imbalances in current or temperature in one of the JB elements 9 or Schottky diodes 12 can lead to local electrothermal runaway, which can cause failure of the MPS device. Furthermore, even with the provision of dedicated ohmic contacts 9″, the presence of several bipolar cells does not ensure rapid spreading of the bipolar conduction current across the entire PN junction surface. Summary of the Invention

[0013] To overcome the deficiencies of the prior art, one or more embodiments of the present disclosure provide an MPS diode with reduced current crowding effect and a method for manufacturing the same.

[0014] According to the present disclosure, an MPS diode and a method for manufacturing the same are provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order that the present disclosure may be better understood, preferred embodiments thereof will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:

[0016] Figure 1A and Figure 1B An MPS (Fusion PN-Schottky) device according to a known embodiment is shown in top view and cross-sectional view, respectively;

[0017] Figure 2 shows an MPS device according to another known embodiment;

[0018] Figure 3 shows an MPS device according to another known embodiment;

[0019] Figure 4A and Figure 4B An MPS (Fusion PN-Schottky) device according to an embodiment of the present invention is shown in top view and cross-sectional view respectively;

[0020] Figure 4C Shown in top view Figure 4A An MPS (fused PN-Schottky) device of an alternative embodiment of the embodiment;

[0021] Figure 5 and Figure 6 Shown in top view Figure 4A Alternative layouts of the layout;

[0022] Figure 7-11 The cross-sectional view shows the method for manufacturing Figure 4A 、 Figure 4B the steps of the MPS device; and

[0023] Figure 12 An MPS (Fusion PN Schottky) device according to a further embodiment of the present invention is shown in a top view. DETAILED DESCRIPTION

[0024] exist Figures 1A-3 In the same reference system of the X, Y, and Z axes, Figure 4A A top view (ie, in the XY plane) of a fused PN-Schottky (specifically, MPS) device 30 is shown in accordance with one embodiment of the present invention. Figure 4B Shown in the same reference frame along Figure 4A In order to improve the Figure 4A It is understood that the anode metallization is not shown, but is present, as per Figure 4B The diagram is obvious.

[0025] Figure 4B The transverse cross-sectional view (i.e., in the XZ plane) is substantially the same as Figure 1B Similar elements are identified by the same reference numerals and are not described in detail again.

[0026] However, when considering Figure 4A When viewing the top view of the plurality of Schottky diodes 32, those skilled in the art will appreciate that each Schottky diode 32 includes a corresponding Schottky cell (or dot) 33, which has a square shape in the top view on the XY plane; the Schottky cells 33 are arranged in a grid-like pattern, in particular, forming an array of symmetrical Schottky cells 33. More particularly, each Schottky cell 33 includes a surface region of the drift layer 2 having N-type conductivity and an N-doping concentration. Along the X and Y directions, the Schottky cells 33 are separated from each other by implanted regions 19' of P conductivity extending in the drift layer 2. The implanted regions 19' form a set of squares, each square being a Schottky cell 33. Therefore, in the top view, each Schottky cell 33 is completely surrounded by a corresponding one of the implanted regions 19'.

[0027] An ohmic contact 19" (eg, nickel silicide - Ni2Si) is formed at each implantation region 19', thereby forming a corresponding JB element 19. Figure 4AIn the top view of FIG, on the XY plane, the ohmic contact 19 ″ includes stripes along the X-axis direction, which intersect with the stripes along the Y-axis direction to form a continuous grid. Figure 4B As shown in FIG, each implant region 19' laterally surrounding one Schottky cell 33 is electrically connected to the other implant regions 19' below the ohmic contact 19". As a result, the implant regions 19' form a continuous grid extending below the grid of ohmic contacts 19".

[0028] In one embodiment of the present disclosure, each Schottky unit 33 is separated from the adjacent Schottky unit 33 by a distance d in the range of 0.5 μm to 5 μm along the X-axis direction. X Each Schottky unit 33 is separated from the adjacent Schottky unit 33 by a distance d in the range of 0.5 μm-5 μm along the Y-axis direction Y In particular, the distance d X and d Y Equal to each other.

[0029] The portion of the MPS device 30 that forms the Schottky cell 33 is the active region 14 of the MPS device 30 .

[0030] Optionally, a guard ring or edge termination region 10 may be present that completely surrounds the active region 14. In the illustrated embodiment, the guard ring 10 extends as a continuation of the implanted region 19'. In other words, the implanted region 19' and the guard ring 10 are connected to each other without any interruption. Obviously, a continuous guard ring 10 completely surrounding the active region 14 could be omitted; in this case, the implanted region 19' would terminate at the outer edge of the active region 14.

[0031] The Schottky cells 33 are formed with the anode metallization 8 extending above them and in direct electrical contact with them. Figure 4B The Schottky diode 32 is graphically shown in FIG.

[0032] According to one embodiment of the present disclosure, the layout of the MPS device 30 in a top view is symmetrical about any symmetry line passing through the centroid of the geometric shape defined by the guard ring 10. In the absence of the guard ring 10, the layout of the MPS device 30 in a top view is symmetrical about any symmetry line passing through the centroid of the geometric figure defined by the outer edge of the grid-like pattern (array) of the Schottky cells 33 (or similarly, the outer edge of the active region 14).

[0033] Notice, Figure 4A The guard ring 10 in the embodiment has a quadrilateral shape with rounded corners 10a. In order to avoid the current crowding effect at the corners and reduce the overall size of the device, Figure 4A In the embodiment of FIG. 1 , no Schottky unit exists at the rounded corner 10 a .

[0034] like Figure 4C Other embodiments are possible where the Schottky cells 33 are present at the rounded corners 10 a as shown in FIG. 1 (in which case the guard ring 10 can be removed from the active area 14 , which increases the size of the device 30 but avoids undesirable current crowding effects at the corners 10 a ).

[0035] Figure 5 An embodiment of an MPS device 30' is shown in which Schottky cells 33' corresponding in function to Schottky cells 33 of MPS device 30 each have a quadrilateral shape with rounded corners. Other elements of MPS device 30' that are common to elements of MPS device 30 are identified with the same reference numerals and are not described further. Figure 5 The cross-sectional view of the MPS device 30' taken along line IV-IV in FIG. Figure 4B sectional view and is therefore not shown.

[0036] Figure 6 An embodiment of an MPS device 30 ″ is shown in which Schottky cells 33 ″ corresponding in functionality to Schottky cells 33 of MPS device 30 each have a circular shape. Other elements of MPS device 30 ″ that are common to elements of MPS device 30 are identified with the same reference numerals and are not described further.

[0037] Along Figure 6 The cross-sectional view of the MPS device 30" taken along line IV-IV in FIG. Figure 4B sectional view and is therefore not shown.

[0038] According to the present disclosure, a method for manufacturing an MPS device 30 is also provided (see Figure 7-11 ). The method disclosed herein can also be applied to manufacture the Figure 5 MPS device 30' and MPS device 30".

[0039] Figure 7-11 The processing steps of a wafer 100 of semiconductor material are illustrated in a transverse cross-sectional view. Figure 7-11 Shown in Figure 4A-4B The wafer 100 is arranged in a three-axis system with mutually orthogonal axes X, Y, and Z.

[0040] refer to Figure 7 The wafer 100 includes a substrate 3 of a semiconductor material, in particular silicon carbide (SiC) having a first conductivity type (in this embodiment, N-type doping), provided with a front side 3 a and a back side 3 b, which are opposite to each other along the Z axis. The resistivity of the substrate 30 is, for example, between 5 mΩ·cm and 40 mΩ·cm.

[0041] A drift layer 2 of silicon carbide is formed on the front side 3a of the substrate 3, for example by epitaxial growth, which has a first conductivity type (N) and a dopant concentration lower than that of the substrate 3, for example, at 1·10 14 atoms / cm 3 and May 10 16 atoms / cm 3 The drift layer 2 is made of SiC, in particular, 4H-SiC, but other polytypes such as 2H, 6H, 3C and / or 15R may be used.

[0042] Alternatively, the substrate 3 and the drift layer 2 may be made of other semiconductor materials, such as GaN, GaAs, or Ge.

[0043] The drift layer 2 extends between an upper side 2 a and an underside 2 b (the underside 2 b being in direct contact with the front side 3 a of the substrate 3 ).

[0044] Then, Figure 8 A hard mask 50 is formed on the upper side 2a of the drift layer 2, for example by deposition of a photoresist or TEOS or other material. The hard mask 50 has a thickness between 0.5 μm and 2 μm, or in any case has a thickness for shielding the same as that referred to below. Figure 8 The hard mask 34 thus formed extends in the region of the wafer 100 where the active region 14 of the MPS device 30 will be formed in a subsequent step.

[0045] In a top view, on the XY plane, the hard mask 50 covers the region of the upper side 2a of the drift layer 2 where the Schottky cell 33 will be formed, and leaves exposed the region of the upper side 2a of the drift layer 2 where the implantation region 19' will be formed. Figure 4A and Figure 4B Marking.

[0046] A step of implanting a dopant species (for example boron or aluminum) of the second conductivity type (here P) is now performed (implantation is indicated by arrow 52 in the figure) using the hard mask 50. An implanted region 19' is thereby formed.

[0047] During the above-mentioned implantation step, the guard ring 10 (if present) is also formed.

[0048] In one embodiment, Figure 8 The step comprises one or more implantations of a dopant species having a second type of conductivity, the implantation having an implantation energy between 30 keV and 400 keV and having a relative density between 1·10 12 atoms / cm 2 and 1.10 15 atoms / cm 2between doses in order to form a 18 atoms / cm 3 The implanted region 19' has a dopant concentration of .

[0049] Next, Figure 9 , remove the mask 50, and perform a thermal annealing step to diffuse and activate the Figure 8 For example, thermal annealing is performed at a temperature higher than 1600° C. (for example, between 1700° C. and 1900° C., or even higher in some cases). After thermal annealing, the implanted region 19′ has a density of about 1·10 17 atoms / cm 3 and 1.10 20 atoms / cm 3 The dopant concentration between 1 and 2 is thus formed. Thus, the implantation region 19' is formed. At the same time, a Schottky cell 33 is formed, which is a portion of the drift layer 2 extending transversely to the implantation region 19', or in other words, in Figure 8 Portions of the N-type drift layer 2 are masked during the implantation step.

[0050] Then, an ohmic contact 19" (eg, an ohmic contact of nickel silicide - Ni2Si) is formed at each implanted region 19', thereby facilitating the formation of the corresponding JB element 19. Note that, as shown in FIG. Figure 4A As can be understood from the top view, the implanted region 19' visible in the cross-sectional view is actually a uniform region. Therefore, an ohmic contact 19" is also formed as a contact electrically connected to the implanted region 19'. Therefore, the Schottky cells 33 are also separated from each other in the X and Y directions by the ohmic contacts 19" extending over the implanted region 19'. As described above, the ohmic contacts 19" form a continuous grid covering the grid of the implanted region 19' and are therefore fully connected to each other.

[0051] An ohmic contact is also formed at the guard ring 10 , and is electrically connected to the ohmic contact 19 ″.

[0052] The formation of the ohmic contact 19" includes forming a hard mask of a thin oxide (for example, in the range of 100μm to 500μm); then performing photolithography and etching steps to etch the area where the ohmic contact 19" is to be formed; then, depositing a metal material and performing a subsequent heat treatment (for example, at a temperature of 900°C-1100°C for a time interval of 10 minutes-120 minutes). The metal thus deposited reacts with the surface SiC material to form Ni2Si (i.e., ohmic contact), while the metal in contact with the oxide does not react. A step of removing the unreacted metal is then performed, and then a step of removing the oxide metal is performed.

[0053] Then, Figure 11, performing the step of forming the anode metallization portion.

[0054] To this end, an interface layer 57 of a metal material (such as titanium, nickel, molybdenum) is deposited on the drift layer 2. The interface layer 57 is deposited via sputtering and has a thickness between about 10 nm and 500 nm. The interface layer 57 extends through the ohmic contact 19" to contact the injection region 19', and contacts the exposed region 33 (i.e., the Schottky cell 33) of the drift layer 32 between the ohmic contacts 19". In particular, the interface layer 57 helps to form a Schottky contact / Schottky barrier with the exposed region 33 of the drift layer 32, and helps to form a junction barrier (JB) element with the injection region 19' through the ohmic contact 19".

[0055] Next, a further metal layer 58 is formed over and in direct contact with the interface layer 57. The metal layer 58 is, for example, aluminum or copper and has a thickness of a few micrometers, for example between 1 μm and 10 μm.

[0056] The interface layer 57 and the metal layer 58 form a whole Figure 4B Anodic metallization denoted by reference numeral 8 in FIG.

[0057] Therefore, if Figure 11 As represented in , a plurality of metal-semiconductor junctions 32 of Schottky type are formed between the anode metallization 8 and the regions of the drift layer 2 having the first conductivity type (N).

[0058] In an alternative embodiment (not shown), the interface layer 57 is omitted, so that the anode metallization 8 coincides with the metal layer 58 , which extends in direct contact with the drift layer 2 .

[0059] A cathode contact 6 is then formed on the back side 3 b of the substrate 3 , for example by depositing a layer of metallic material suitable for forming an ohmic contact with the substrate 3 .

[0060] Along the axis Z, the region of the drift layer 2 extending between the Schottky junction and the cathode is the active region 14 of the diode 30 (ie the region where the drift of charge occurs). Figure 11 ) surrounds the active region 14 .

[0061] On the same wafer 100, multiple MPS devices 30 are formed. A final step of die singulation is performed to physically isolate one MPS device 30 from another MPS device 30. Figure 4A 、 Figure 4B MPS device 30.

[0062] By examining the features of the present disclosure provided in accordance with the present disclosure, the advantages it provides are apparent.

[0063] Finally, it is clear that modifications and variations may be made to what has been described and illustrated herein without departing from the scope of the present disclosure.

[0064] In particular, Figure 12 A further embodiment of the present disclosure is shown, in which the guard ring 10 has a quadrangular shape, and the Schottky cells 33 are also present at the inner corners of the guard ring 10 .

[0065] The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above detailed description. Generally, in the appended claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and claims, but rather should be construed to include all possible embodiments and the full scope of equivalents to which such claims are entitled. Therefore, the claims are not limited by the disclosure.

Claims

1. A fused PN Schottky MPS diode, comprising: a semiconductor substrate having N-type conductivity and a first doping level; a drift layer of semiconductor material on the semiconductor substrate, having a bottom surface facing the semiconductor substrate and a top surface opposite the bottom surface, having N-type conductivity and a second doping level lower than the first doping level; a doped region of P-type conductivity extending in the drift layer at the top surface; an ohmic contact in direct electrical contact with the doped region at the top surface; a plurality of cells of N-type conductivity and the second doping level extending in the drift layer within and through the doped region and facing the top surface, the doped region comprising a continuous grid that defines the plurality of cells relative to an upper portion of the drift layer, the plurality of cells being an array of quadrilateral cells having rows of cells and columns of cells, and the grid separating the rows of cells from one another and separating the columns of cells from one another; as well as an anode metallization on the top surface in contact with the ohmic contact and in contact with the cell so as to form a junction barrier JB diode with the doped region and a Schottky diode with the cell, the JB diode and the Schottky diode defining an active area of ​​the MPS diode, wherein: In a top view, the doped regions have a grid-shaped layout defining the plurality of cells; Each cell has the same geometric shape among a quadrilateral, a quadrilateral with rounded corners, and a circle; and The ohmic contacts extend continuously along the grid-shaped layout at the doped regions. 2 . The MPS diode of claim 1 , wherein the grid-shaped layout is symmetric about an axis of symmetry that passes through a centroid of a geometric shape defined by outer edges of the active region.

3. The MPS diode according to claim 1 , wherein the doped region is formed of a plurality of first elongated regions and a plurality of second elongated regions, the plurality of first elongated regions each having a respective main extension direction parallel to a first axis, the plurality of second elongated regions each having a respective main extension direction parallel to a second axis orthogonal to the first axis, the first elongated regions and the second elongated regions being designed to separate each unit cell from each other in a top view, and being designed to shape the units in such a manner that each unit cell has a shape selected from the group consisting of a quadrilateral, a quadrilateral with rounded corners, and a circle in a top view. The MPS diode of claim 1 , wherein each cell is a portion of the drift layer that is free of the doped region. The MPS diode of claim 1 , wherein both the semiconductor substrate and the drift layer are silicon carbide or gallium nitride.

6. The MPS diode of claim 1 , wherein each of the cells has a thickness of 1 μm at the top surface. 2 -100μm 2 The area within the range. 7 . The MPS diode of claim 1 , further comprising an edge termination region completely surrounding the active region and serving as an elongated extension of the doped region.

8. A method for manufacturing a fused PN Schottky MPS diode, comprising: forming a drift layer of semiconductor material on a semiconductor substrate, the semiconductor substrate having N-type conductivity and a first doping level, and the drift layer having N-type conductivity and a second doping level lower than the first doping level, wherein a top surface of the drift layer is opposite to a bottom surface of the drift layer, the bottom surface facing the semiconductor substrate; forming a doped region of P-type conductivity in the drift layer at the top surface; forming an ohmic contact at the top surface in direct electrical contact with the doped region; forming a plurality of cells of N-type conductivity and the first doping level, the plurality of cells being within and through the doped region in the drift layer and facing the top surface; as well as An anode metallization is formed on the top surface, the anode metallization being in electrical contact with the doped region via an ohmic contact and in direct electrical contact with the cell so as to form a junction barrier JB diode with the doped region and a Schottky diode with the cell, the JB diode and the Schottky diode defining an active area of ​​the MPS diode, wherein: Forming the doped regions and forming the plurality of cells includes: implanting dopant substances according to a grid-shaped layout to define portions of the drift layer forming corresponding cells; The implantation is performed using an implantation mask shaped so that each cell is formed to have the same geometric shape among a quadrilateral, a quadrilateral with rounded corners, and a circle; and Forming the ohmic contact includes continuously depositing a metal material along a grid-shaped layout at the doped region.

9. The method according to claim 8, wherein forming the doped region comprises: A layout of the grid shape is formed to be symmetrical about an axis of symmetry that passes through a centroid of a geometric shape defined by outer edges of the active area.

10. The method according to claim 8, wherein forming the doped region comprises: forming a plurality of first elongated regions, each of the plurality of first elongated regions having a respective main extension direction parallel to the first axis; and forming a corresponding plurality of second elongated regions, each of the plurality of second elongated regions having a corresponding main extension direction parallel to a second axis orthogonal to the first axis, the first elongated regions and the second elongated regions separating each of the plurality of units from each other, and shaping the units so that each unit has the shape selected from the group consisting of a quadrilateral, a quadrilateral with rounded corners, and a circle in a top view.

11. The method of claim 10, wherein forming the cell comprises: An array of quadrilateral cells is formed having rows parallel to the first axis and columns parallel to the second axis. 12 . The method of claim 8 , wherein both the substrate and the drift layer are silicon carbide or gallium nitride.

13. The method according to claim 8, further comprising: An edge termination region of P-type conductivity is formed, the edge termination region completely surrounding the active area and serving as an extension of the doped region, wherein forming the edge termination and forming the doped region are performed in context.

14. A fused PN Schottky MPS diode, comprising: a semiconductor substrate having a first conductivity type and a first doping level; a semiconductor drift layer of a first conductivity type on the substrate, the drift layer having a top surface and having a second doping level lower than the first doping level; a doped region of a second conductivity type extending in the drift layer at the top surface, the doped region forming a continuous first grid, the first grid defining a plurality of cells, the plurality of cells being an upper portion of the drift layer, the cells forming a quadrilateral array of cells, the quadrilateral array of cells having rows of cells and columns of cells, the first grid separating the rows of cells from one another and separating the columns of cells from one another; an ohmic contact in direct electrical contact with the doped region at the top surface, the ohmic contact forming a continuous second grid that overlays the first grid and extends continuously between the rows of cells and the columns of cells; as well as An anode metallization on the top surface is in contact with the ohmic contact and with the cell so as to form a junction barrier JB diode with the doped region and a Schottky diode with the cell.

15. The MPS diode of claim 14 , further comprising a guard ring of the second conductivity type formed in the drift region and completely laterally surrounding the plurality of cells and defining an active area, wherein the grid-shaped layout is symmetrical about an axis of symmetry passing through a centroid of a geometric shape defined by the guard ring. The MPS diode of claim 15 , wherein the guard ring is formed as an elongated extension of the doped region. 17 . The MPS diode of claim 14 , wherein in a top view, each unit cell has a shape selected from among a quadrilateral, a quadrilateral with rounded corners, and a circle.

18. The MPS diode of claim 14, wherein both the substrate and the drift layer are silicon carbide or gallium nitride.

19. The MPS diode of claim 14, wherein each of the cells has a thickness of 1 μm at the top surface. 2 -100μm 2 The area within the range.

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