An intelligent power module

Abstract

The present application provides an intelligent power module, comprising: an HVIC chip, which includes a VSS port, a high-side output port, and a low-side output port, wherein the high-side output ports are only HO1 and HO2, and the low-side output ports are only LO1 and LO2; an inverter unit, wherein the inverter unit is only composed of a first insulated gate bipolar transistor, a second insulated gate bipolar transistor, a third insulated gate bipolar transistor, and a fourth insulated gate bipolar transistor. The intelligent power module provided by the present application uses a single HVIC chip to control a single-phase full-bridge circuit formed by two groups of insulated gate bipolar transistors, thereby reducing the chip area occupied and improving space utilization.

Description

Technical Field

[0001] The present application relates to the field of circuits, and in particular to an intelligent power module. Background Art

[0002] An intelligent power module (IPM) is a power drive product that combines power electronics and integrated circuit technology. It integrates power switching devices and high-voltage drive circuits, and also includes built-in fault detection circuits for overvoltage, overcurrent, and overheating. The IPM receives control signals from the MCU to drive subsequent circuits and transmits system status signals back to the MCU. Compared to traditional discrete solutions, IPMs are gaining a growing market share due to their high integration and reliability. They are particularly well-suited for motor drive inverters and various inverter power supplies, making them ideal power electronics devices for variable-frequency speed regulation, metallurgical machinery, electric traction, servo drives, and variable-frequency home appliances.

[0003] Currently, for small-power motors, the IPM circuit topology does not have a single-phase full-bridge structure. When a three-phase full-bridge driver IC is used, two channels are wasted. Although a single-phase full-bridge circuit can be realized by using two half-bridge driver ICs, each half-bridge driver IC needs to be designed with undervoltage, overcurrent, enable, error and other protection circuits. The duplication of protection circuits causes waste of module area. In addition, each IC requires non-functional areas such as dicing lanes and SEALRING (i.e., sealing rings). The more ICs there are, the larger the proportion of non-functional areas, which cannot achieve the most effective use of IC area.

[0004] Therefore, the existing technology has defects and is in urgent need of improvement. Summary of the Invention

[0005] The purpose of the embodiments of the present application is to provide an intelligent power module that can increase the effective use area of ​​the chip.

[0006] An embodiment of the present application provides an intelligent power module, including:

[0007] An HVIC chip comprising a VSS port, a high-side output port, and a low-side output port, wherein the high-side output port comprises only an HO1 port and an HO2 port, and the low-side output port comprises only an LO1 port and an LO2 port;

[0008] an inverter unit, wherein the inverter unit comprises only a first insulated gate bipolar transistor, a second insulated gate bipolar transistor, a third insulated gate bipolar transistor, and a fourth insulated gate bipolar transistor;

[0009] The first insulated gate bipolar transistor has a gate connected to the HO1 port, a drain connected to point P, and a source connected to point A;

[0010] The second insulated gate bipolar transistor has a gate connected to the LO1 port, a drain connected to the source of the first insulated gate bipolar transistor, and a source connected to the VSS port of the HVIC chip;

[0011] The third insulated gate bipolar transistor has a gate connected to the HO2 port, a drain connected to the drain of the first insulated gate bipolar transistor, and a source connected to point B;

[0012] The fourth insulated gate bipolar transistor has a gate connected to the LO2 port, a drain connected to the source of the third insulated gate bipolar transistor, and a source connected to the source of the second insulated gate bipolar transistor.

[0013] Preferably, the intelligent power module of the embodiment of the present application further includes a first bootstrap capacitor;

[0014] The HVIC chip further includes a VB1 port and a VS1 port; the VB1 port is connected to the VS1 port via the first bootstrap capacitor.

[0015] Preferably, the intelligent power module of the embodiment of the present application further includes a second bootstrap capacitor; the HVIC chip further includes a VB2 port and a VS2 port;

[0016] The VB2 port is connected to the VS2 port via a second bootstrap capacitor.

[0017] Preferably, the intelligent power module of the embodiment of the present application further includes a sampling resistor;

[0018] The second insulated gate bipolar transistor is connected to the VSS port through the sampling resistor;

[0019] The HVIC chip is provided with an overcurrent protection circuit for stopping operation when the current collected by the sampling resistor exceeds a set threshold.

[0020] Preferably, in the intelligent power module of the embodiment of the present application, an over-temperature protection switch is further provided in the HVIC chip.

[0021] Preferably, in the intelligent power module of the embodiment of the present application, an overvoltage protection switch is further provided in the HVIC chip.

[0022] Preferably, the intelligent power module of the embodiment of the present application further includes a first fast recovery diode;

[0023] An anode of the first fast recovery diode is connected to a source of the first insulated gate bipolar transistor, and a cathode of the first fast recovery diode is connected to a drain of the first insulated gate bipolar transistor.

[0024] Preferably, the intelligent power module of the embodiment of the present application further includes a second fast recovery diode;

[0025] An anode of the second fast recovery diode is connected to the source of the second insulated gate bipolar transistor, and a cathode of the second fast recovery diode is connected to the drain of the second insulated gate bipolar transistor.

[0026] Preferably, the intelligent power module of the embodiment of the present application further includes a third fast recovery diode;

[0027] An anode of the third fast recovery diode is connected to the source of the third insulated gate bipolar transistor, and a cathode of the third fast recovery diode is connected to the drain of the third insulated gate bipolar transistor.

[0028] Preferably, the intelligent power module of the embodiment of the present application further includes a fourth fast recovery diode;

[0029] An anode of the fourth fast recovery diode is connected to the source of the fourth insulated gate bipolar transistor, and a cathode of the fourth fast recovery diode is connected to the drain of the fourth insulated gate bipolar transistor.

[0030] The intelligent power module provided in the embodiment of the present application uses a single HVIC chip to control a single-phase full-bridge circuit formed by two groups of insulated gate bipolar transistors, which can reduce the occupied chip area and improve space utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 This is a structural diagram of an intelligent power module in an embodiment of the present application.

[0033] Figure 2 This is a schematic diagram of an HVIC chip of an intelligent power module in an embodiment of the present application. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application.

[0035] In the description of this application, it should be noted that the terms "inner" and "outer" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or the orientations or positional relationships in which the product of this application is typically placed when in use. These terms are intended solely to facilitate the description of this application and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" and the like are used solely for distinction and should not be construed as indicating or implying relative importance.

[0036] It should also be noted that, unless otherwise expressly specified or limited, the terms "disposed" and "connected" should be understood broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to direct connections, indirect connections through an intermediate medium, or internal connections between two components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0037] Please also refer to Figure 1 , Figure 1 This is a circuit structure diagram of an intelligent power module in some embodiments of the present application. It should be noted that: Figure 1The outer frame lines 88 in the figure are merely schematic packaging lines of the intelligent power module of the embodiment of the present application and do not refer to the connection lines of the various components or pins in the intelligent power module of the embodiment of the present application. The intelligent power module includes: an HVIC chip 10, which includes a VSS port, a high-side output port, and a low-side output port. The high-side port includes and only includes the HO1 port and the HO2 port, and the low-side output port includes and only includes the LO1 port and the LO2 port; an inverter unit, which includes and only includes a first insulated gate bipolar transistor 20, a second insulated gate bipolar transistor 30, a third insulated gate bipolar transistor 40, and a fourth insulated gate bipolar transistor 50. Among them, the first insulated gate bipolar transistor 20 has its gate connected to the HO1 port, its drain connected to point P, and its source connected to point A; the second insulated gate bipolar transistor 30 has its gate connected to the LO1 port, its drain connected to the source of the first insulated gate bipolar transistor 20, and its source connected to the VSS port of the HVIC chip 10; the third insulated gate bipolar transistor 40 has its gate connected to the HO2 port, its drain connected to the drain of the first insulated gate bipolar transistor 20, and its source connected to point B; the fourth insulated gate bipolar transistor 50 has its gate connected to the LO2 port, its drain connected to the source of the third insulated gate bipolar transistor 40, and its source connected to the source of the second insulated gate bipolar transistor 30. In practical applications, the HO1 port, the HO2 port, the LO1 port, and the LO2 port correspond to control signal input terminals of the first IGBT 20 , the second IGBT 30 , the third IGBT 40 , and the fourth IGBT 50 , respectively.

[0038] Among them, such as Figure 1 As shown, point P is the high-voltage input terminal of the intelligent power module of the embodiment of the present application, point A is the first output terminal A of the intelligent power module of the embodiment of the present application, point B is the second output terminal B of the intelligent power module of the embodiment of the present application, and point N is the low-voltage reference terminal of the intelligent power module of the embodiment of the present application. In actual applications, the first output terminal A and the second output terminal B are interfaces for the motor load, while point P is used to connect to the power supply of the motor load, and point N is connected to the source of the second insulated gate bipolar transistor 30 and the fourth insulated gate bipolar transistor 50.

[0039] In some embodiments, the HVIC chip 10 further includes a VCC port, a HIN1 port, a HIN2 port, a LIN1 port, and a LIN2 port. The VCC port, HIN1 port, HIN2 port, LIN1 port, and LIN2 port are respectively connected to the VCC pin, HIN1 pin, HIN2 pin, LIN1 pin, and LIN2 pin of the entire intelligent power module. The VSS port is connected to the VSS pin of the entire intelligent power module. The VCC pin, VSS pin, HIN1 pin, HIN2 pin, LIN1 pin, and LIN2 pin are all connected to the MCU for receiving corresponding control signals provided by the MCU. Among them, the VCC pin is the power signal terminal of the HVIC chip, and the VSS pin is the common ground terminal of the intelligent power module. In actual applications, the voltage between the VCC pin and the VSS pin is generally set to 15V. Of course, the voltage there can be set according to actual needs, and this is not limited here.

[0040] It should be noted that, referring to Figure 1 and Figure 2 , Figure 2 This is a schematic diagram of an HVIC chip 10 of an intelligent power module in some embodiments of the present application. The VCC pin of the intelligent power module is connected to the power supply circuit inside the HVIC chip 10 through the VCC port of the HVIC chip 10 to provide working power to the HVIC chip 10. The HIN1 pin of the intelligent power module is connected to the first high-side drive circuit inside the HVIC chip 10 through the HIN1 port of the HVIC chip 10, and outputs a control signal through the HO1 port of the HVIC chip 10 to determine the on / off of the first insulated gate bipolar transistor 20; the HIN2 pin of the intelligent power module is connected to the second high-side drive circuit inside the HVIC chip 10 through the HIN2 port of the HVIC chip 10, and outputs a control signal through the HO2 port of the HVIC chip 10 to determine the on / off of the third insulated gate bipolar transistor 40; The LIN1 pin of the intelligent power module is connected to the first low-side drive circuit inside the HVIC chip 10 through the LIN1 port of the HVIC chip 10, and outputs a control signal through the LO1 port of the HVIC chip 10 to determine the on / off of the second insulated gate bipolar transistor 30; the LIN2 pin of the intelligent power module is connected to the second low-side drive circuit inside the HVIC chip 10 through the LIN2 port of the HVIC chip 10, and outputs a control signal through the LO2 port of the HVIC chip 10 to determine the on / off of the fourth insulated gate bipolar transistor 50. Among them, the HIN1 pin, HIN2 pin, LIN1 pin, and LIN2 pin of the intelligent power module receive input signals of 0V or 5V. Of course, input signals of other voltage amplitudes can be received according to actual needs, and the specific selection is based on the actual devices connected to the circuit.

[0041] It should be further explained that the HVIC chip 10 is also internally provided with a power undervoltage protection circuit, which is connected to the power circuit to protect the intelligent power module and devices. Furthermore, the two high-side drive circuits are also connected to the high-side undervoltage protection circuit to protect the intelligent power module and devices.

[0042] The second insulated gate bipolar transistor 30 and the first insulated gate bipolar transistor 20 form a full-bridge circuit A1. The third insulated gate bipolar transistor 40 and the fourth insulated gate bipolar transistor 50 form a full-bridge circuit A2. In full-bridge circuit A1, only one of the first insulated gate bipolar transistor 20 and the second insulated gate bipolar transistor 30 can be turned on; in full-bridge circuit A2, only one of the third insulated gate bipolar transistor 40 and the fourth insulated gate bipolar transistor 50 can be turned on. Therefore, the first insulated gate bipolar transistor 20 and the fourth insulated gate bipolar transistor 50 form a group of paths, driven by the same set of signals and turned on / off simultaneously; the third insulated gate bipolar transistor 40 and the second insulated gate bipolar transistor 30 form another group of paths, driven by the same set of signals and turned on / off simultaneously.

[0043] It should be noted that, accordingly, interlocking and dead zone circuits are provided between the first high-side drive circuit and the first low-side drive circuit, and between the second high-side drive circuit and the second low-side drive circuit inside the HVIC chip 10, so as to ensure that only one of the two insulated gate bipolar transistors in the full-bridge circuit can be turned on to prevent short circuit.

[0044] Furthermore, in some embodiments, the intelligent power module further includes a first bootstrap capacitor 101 and a second bootstrap capacitor 102. The HVIC chip 10 further includes a VB1 port and a VS1 port, and a VB2 port and a VS2 port. The VB1 port is connected to the VS1 port via the first bootstrap capacitor 101. The VB2 port is connected to the VS2 port via the second bootstrap capacitor 102. The VB1 port is the positive power supply terminal of the first bootstrap capacitor 101, and the VS1 port is the negative power supply terminal of the first bootstrap capacitor 101; the VB2 port is the positive power supply terminal of the second bootstrap capacitor 102, and the VS2 port is the negative power supply terminal of the second bootstrap capacitor 102. The first bootstrap capacitor 101 and the second bootstrap capacitor 102 are used for energy storage and power supply (or voltage boosting), providing a voltage boost for the power supply of the HVIC chip 10. The intelligent power module also includes two bootstrap diodes. The VCC port of the HVIC chip 10 is connected to the anodes of the two bootstrap diodes through the power circuit. The cathodes of the two bootstrap diodes are connected to the first bootstrap capacitor 101 and the second bootstrap capacitor 102 via the VB1 port and the VB2 port, respectively. The bootstrap diodes are used for rectification to prevent current backflow and protect the power circuit. In existing intelligent power modules, the configuration is mostly a three-way three-phase full-bridge driver IC + six insulated gate bipolar transistors, which makes the module package area too large and difficult to place the high-power device bootstrap capacitor inside the module. The only way is to connect the corresponding bootstrap capacitor externally through pins. However, the external bootstrap capacitor makes the module less usable and less reliable.

[0045] In some embodiments, the intelligent power module further includes a sampling resistor 55. The VSS port of the HVIC chip 10 is sequentially connected to the source 30 of the second insulated gate bipolar transistor, the source of the fourth insulated gate bipolar transistor 50, and the low voltage reference terminal N of the intelligent power module via the sampling resistor 55. Furthermore, the HVIC chip 10 is provided with an ITRIP port, which leads to the ITRIP pin of the intelligent power module. The ITRIP pin of the intelligent power module serves as an overcurrent protection terminal. The HVIC chip 10 is provided with an overcurrent protection circuit that connects the ITRIP port to the VSS port, and the sampling resistor 55 is connected to the overcurrent protection circuit via the VSS port. When the sampling resistor 55 detects the voltage at the low voltage reference terminal N of the intelligent power module, it feeds the voltage back to the MCU through the ITRIP terminal of the intelligent power module. The MCU converts the voltage into a corresponding current and compares it with the set current threshold. If the current exceeds the set threshold, the MCU inputs a corresponding control signal through the ITRIP terminal to control the overcurrent protection circuit to stop the operation of the HVIC chip 10, and then stop the operation of the intelligent power module, thereby protecting the device.

[0046] Of course, it is understandable that in some embodiments, the HVIC chip 10 is further provided with an overtemperature protection switch, an overvoltage protection switch, an enable protection switch, an error reporting circuit, and the like. For the overtemperature protection switch, overvoltage protection switch, enable protection switch, and error reporting circuit, the HVIC chip 10 is provided with a VTS port, an OV port, an EN port, and a FO port. These VTS port, OV port, EN port, and FO port are connected to the VTS pin, OV pin, EN pin, and FO pin of the intelligent power module, and these VTS pins, OV pins, EN pins, and FO pins receive or feed back corresponding signals to the MCU. The overtemperature protection switch is a positive temperature coefficient temperature protection switch.

[0047] Of course, it is understandable that in some embodiments, the intelligent power module further includes a first fast recovery diode 60, a second fast recovery diode 70, a third fast recovery diode 80, and a fourth fast recovery diode 90. The anode of the first fast recovery diode 60 is connected to the source of the first insulated gate bipolar transistor 20, and the cathode of the first fast recovery diode 60 is connected to the drain of the first insulated gate bipolar transistor 20. The anode of the second fast recovery diode 70 is connected to the source of the second insulated gate bipolar transistor 30, and the cathode of the second fast recovery diode 70 is connected to the drain of the second insulated gate bipolar transistor 30. The anode of the third fast recovery diode 80 is connected to the source of the third insulated gate bipolar transistor 40, and the cathode of the third fast recovery diode 80 is connected to the drain of the third insulated gate bipolar transistor 40. The anode of the fourth fast recovery diode 90 is connected to the source of the fourth insulated gate bipolar transistor 50, and the cathode of the fourth fast recovery diode 90 is connected to the drain of the fourth insulated gate bipolar transistor 50.

[0048] In practical applications, the intelligent power module of the present invention operates as follows: the module receives level signals sent by the MCU via the HIN1, HIN2, LIN1, and LIN2 pins, and outputs these level signals via the HO1, H02, LO1, and LO2 ports of the HVIC chip 10 to control the on / off of four insulated gate bipolar transistors. One path, formed by the first and fourth insulated gate bipolar transistors 20 and 50, and another path, formed by the third and second insulated gate bipolar transistors 40 and 30, is then turned on, thereby achieving variable frequency drive of a low-power motor.

[0049] The intelligent power module of the embodiment of the present application adopts a single HVIC chip to control a single-phase full-bridge circuit formed by two groups of insulated gate bipolar transistors, and is suitable for low-power motor loads with two interfaces. Among them, a single HVIC chip has only two high-side drive circuits and two low-side drive circuits. When it is suitable for small-power motor loads, there is no waste, and a single HVIC chip integrates four drive circuits, an enable circuit, an undervoltage protection circuit, an overcurrent protection circuit, an overvoltage protection circuit, an overtemperature protection circuit, an error reporting circuit and other functional circuits, as well as a bootstrap circuit. The module also integrates insulated gate bipolar transistors, fast recovery diodes, bootstrap capacitors, and sampling resistors to form a functional IPM circuit, realizing the complete function of a single-phase full-bridge IPM, without the need for external bootstrap capacitors, sampling resistors, etc., and can make the most effective use of chip area without causing repeated design of protection functions, minimizing the proportion of area occupied by dicing lanes, SEALRINGs, etc., thereby improving space utilization.

[0050] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. An intelligent power module, characterized in that: include: An HVIC chip comprising a VSS port, a high-side output port, and a low-side output port, wherein the high-side output port comprises only an HO1 port and an HO2 port, and the low-side output port comprises only an LO1 port and an LO2 port; an inverter unit, wherein the inverter unit comprises only a first insulated gate bipolar transistor, a second insulated gate bipolar transistor, a third insulated gate bipolar transistor, and a fourth insulated gate bipolar transistor; The first insulated gate bipolar transistor has a gate connected to the HO1 port, a drain connected to point P, and a source connected to point A; The second insulated gate bipolar transistor has a gate connected to the LO1 port, a drain connected to the source of the first insulated gate bipolar transistor, and a source connected to the VSS port of the HVIC chip; The third insulated gate bipolar transistor has a gate connected to the HO2 port, a drain connected to the drain of the first insulated gate bipolar transistor, and a source connected to point B; the fourth insulated gate bipolar transistor, having a gate connected to the LO2 port, a drain connected to the source of the third insulated gate bipolar transistor, and a source connected to the source of the second insulated gate bipolar transistor; The second insulated gate bipolar transistor and the first insulated gate bipolar transistor form a full-bridge circuit A1, and the third insulated gate bipolar transistor and the fourth insulated gate bipolar transistor form a full-bridge circuit A2; Interlocking and dead zone circuits are respectively provided between the first high-side drive circuit and the first low-side drive circuit, and between the second high-side drive circuit and the second low-side drive circuit inside the HVIC chip, so as to ensure that only one of the two insulated gate bipolar transistors in the full-bridge circuit can be turned on.

2. The intelligent power module according to claim 1, characterized in that: Also including a first bootstrap capacitor; The HVIC chip further includes a VB1 port and a VS1 port; the VB1 port is connected to the VS1 port via the first bootstrap capacitor.

3. The intelligent power module according to claim 2, characterized in that: Also including a second bootstrap capacitor; The HVIC chip further includes a VB2 port and a VS2 port; the VB2 port is connected to the VS2 port via a second bootstrap capacitor.

4. The intelligent power module according to claim 1, wherein: Also includes a sampling resistor; The second insulated gate bipolar transistor is connected to the VSS port through the sampling resistor; The HVIC chip is provided with an overcurrent protection circuit for stopping operation when the current collected by the sampling resistor exceeds a set threshold.

5. The intelligent power module according to claim 1, wherein: An over-temperature protection switch is also provided in the HVIC chip.

6. The intelligent power module according to claim 1, characterized in that: An overvoltage protection switch is also provided in the HVIC chip.

7. The intelligent power module according to claim 1, characterized in that: Also included is a first fast recovery diode; An anode of the first fast recovery diode is connected to a source of the first insulated gate bipolar transistor, and a cathode of the first fast recovery diode is connected to a drain of the first insulated gate bipolar transistor.

8. The intelligent power module according to claim 1, wherein: Also including a second fast recovery diode; An anode of the second fast recovery diode is connected to the source of the second insulated gate bipolar transistor, and a cathode of the second fast recovery diode is connected to the drain of the second insulated gate bipolar transistor.

9. The intelligent power module according to claim 1, wherein: Also included is a third fast recovery diode; An anode of the third fast recovery diode is connected to the source of the third insulated gate bipolar transistor, and a cathode of the third fast recovery diode is connected to the drain of the third insulated gate bipolar transistor.

10. The intelligent power module according to claim 1, wherein: Also included is a fourth fast recovery diode; An anode of the fourth fast recovery diode is connected to the source of the fourth insulated gate bipolar transistor, and a cathode of the fourth fast recovery diode is connected to the drain of the fourth insulated gate bipolar transistor.

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