A medium and high voltage variable frequency speed regulation circuit without transformer isolation and control method

Abstract

The present invention provides a medium- and high-voltage frequency conversion speed regulation system circuit and control method without transformer isolation, which belongs to a scheme for realizing medium- and high-voltage frequency conversion speed regulation technology and its control technology. The scheme cancels the industrial frequency transformer used in traditional medium- and high-voltage frequency converters and the high-frequency isolation DC / DC conversion link in a new generation of medium- and high-voltage frequency converters based on a cascade multilevel converter without an industrial frequency transformer. In the scheme, each phase cascade rectifier constitutes a pair of common medium- and high-voltage DC busbars, which can be directly connected to a diode clamped or capacitor clamped inverter circuit; and the frequency converter itself does not need electrical isolation, and electrical isolation between three-phase inverters is achieved by using the three-phase stator winding of an AC motor, which greatly reduces the volume and weight of the frequency converter, greatly reduces the system structure and control complexity of the medium- and high-voltage frequency converter, as well as the loss during operation and the hardware cost, and also greatly improves the system reliability and overall efficiency, and is particularly suitable for the field of medium- and high-voltage high-power frequency conversion speed regulation.

Description

Technical Field

[0001] The present invention belongs to the technical field of medium and high voltage frequency conversion speed regulation, and particularly relates to a medium and high voltage frequency conversion speed regulation circuit and control method without transformer isolation, which is formed by organically integrating a high-power cascade multi-level converter without isolation transformer and an AC motor. Background Art

[0002] In recent years, "multilevel power converters" have been successfully applied more and more in the fields of medium and high voltage high power frequency conversion speed regulation, active power filtering, high voltage direct current (HVDC) transmission and reactive power compensation of power systems. The basic circuit topology of multilevel converters can be roughly divided into two categories: clamped type and unit cascade type. For example, the diode clamped three-level medium and high voltage converters produced by Siemens or ABB, which are widely used in industry, and the cascaded H-bridge medium and high voltage converters produced by Robincon or Leader Harvest are typical representatives of these two types of products. In both types of medium and high voltage converters, in order to use low-voltage power electronic devices to complete high voltage power conversion, it is necessary to use a bulky, complex wiring, and expensive power frequency phase-shifting transformer on the rectifier input side to achieve electrical isolation, which limits its application in many industrial occasions.

[0003] The cascaded multilevel converter without power frequency transformer has received extensive attention in the field of power electronics technology in recent years and is considered to be a new generation of medium and high voltage inverter implementation. This type of converter uses a high-frequency transformer to replace the power frequency phase-shifting transformer in the traditional cascade converter to achieve electrical isolation. When used for bidirectional power transmission, the intermediate stage uses a high-frequency isolated bidirectional DC / DC converter to transmit energy in both directions. The cascaded fully controlled H-bridge multilevel power converter structure is used on both sides or the high-voltage side. When used for unidirectional power transmission, the intermediate stage uses a high-frequency isolated unidirectional DC / DC converter to transmit energy, the rectifier side uses a unidirectional cascaded multilevel power converter structure (including: cascaded diode + Boost rectifier circuit, cascaded bridgeless rectifier circuit, cascaded VIENNA rectifier circuit, etc.), and the inverter side uses a cascaded multilevel power converter structure (clamped type or unit cascade type). Compared with traditional medium and high voltage inverters, this new generation of medium and high voltage inverter implementation can effectively reduce system volume, weight and manufacturing cost. However, this type of converter also has obvious disadvantages, mainly manifested in: the DC / DC conversion stage composed of high-frequency isolation transformers makes the entire system structure complex and increases the loss during operation. The existence of this link is a key factor that hinders the entire system from further reducing costs, improving efficiency, reducing volume and weight, and improving reliability. Obviously, eliminating the high-frequency isolation DC / DC conversion link in this new generation of medium and high voltage inverters will bring great benefits to the application of this type of converter in actual industry. However, the reason why this new generation of medium and high voltage inverters must use high-frequency isolated DC / DC conversion links is that: 1) Each phase of N cascade modules will generate N groups of DC output terminals, and these N groups of DC output terminals cannot be directly connected in series to form a pair of common DC output busbars. However, the clamped inverter circuit, whether it is a diode clamped type or a capacitor clamped type, needs to be powered by a common DC busbar, so these N groups of DC output terminals cannot be directly connected to the clamped inverter circuit, and the cascade inverter circuit composed of N H-bridge circuits requires N isolated and independent DC power supplies, and these N groups of DC output terminals are not isolated and independent N groups of DC power supplies, so they cannot be directly connected to the cascaded H-bridge inverter circuit, otherwise it will cause multiple short circuits in the circuit; 2) There is no common DC output busbar for the three-phase cascade rectifier. If there is no high-frequency isolated DC / DC conversion link, the cascaded three-phase inverter is directly connected to the stator winding of the star-connected or delta-connected AC motor, which will also cause multiple short circuits in the system. Make the entire system unable to work normally.

[0004] In addition, in the clamped inverter circuit powered by an independent DC power supply, compared with the capacitor clamped circuit, the diode clamped multi-level inverter circuit is widely used in various fields of industry because it does not need to use a lot of capacitors, has a simple structure, high reliability, and is easy to control. However, the diode clamped multi-level inverter circuit is difficult to achieve the balanced control of the input side capacitor voltage by itself. Theoretically, it is proved that without a special control strategy, the diode clamped multi-level inverter circuit will eventually degenerate into a three-level inverter circuit due to the imbalance of the input side capacitor voltage. This is why only the diode clamped three-level inverter circuit has been successfully applied in industry. Summary of the invention

[0005] In order to solve the above problems, the present invention provides a medium-high voltage frequency conversion speed regulation circuit and control method without transformer isolation, which can cancel the high-frequency isolation DC / DC conversion link in the above-mentioned new generation medium-high voltage frequency converter based on the cascade multi-level converter without power frequency transformer. Different from the traditional medium-high voltage frequency converter using power frequency transformer to achieve electrical isolation, and different from the above-mentioned new generation medium-high voltage frequency converter using high-frequency transformer to achieve electrical isolation, the present invention provides a medium-high voltage frequency conversion speed regulation circuit and control method without transformer isolation, 1) each phase cascade rectifier can form a common DC bus, so it can be directly connected to the clamped inverter circuit (diode clamped type or capacitor clamped type); 2) the inverter itself does not need electrical isolation, and the three-phase stator winding of the AC motor is used to achieve electrical isolation between each phase of the three-phase inverter. Thereby, the volume, weight and cost of the medium-high voltage frequency converter based on the cascade multi-level converter without power frequency transformer can be greatly reduced, and the system efficiency is greatly improved.

[0006] The invention object of the present invention is achieved by the following technical scheme, a medium and high voltage frequency conversion speed regulation circuit and control method without transformer isolation, characterized in that:

[0007] To achieve the above-mentioned purpose, a medium- and high-voltage frequency conversion speed regulation circuit and control method without transformer isolation are provided, characterized in that: it includes three high-frequency filters and a three-phase AC-DC-AC converter circuit, the three-phase AC-DC-AC converter circuit includes three single-phase AC-DC-AC converter circuits, the single-phase AC-DC-AC converter circuit includes a single-phase rectifier stage circuit, the single-phase rectifier stage circuit includes a single-phase rectifier and N cascaded control module units, wherein N≥1 is a positive integer, the single-phase rectifier stage circuit provides a pair of common high-voltage output DC busbars, the single-phase AC-DC-AC converter circuit includes a single-phase inverter stage circuit, the single-phase inverter stage circuit includes an N+1 level cascade inverter unit, the DC input end of the N+1 level cascade inverter unit is directly connected to the pair of common high-voltage output DC busbars provided by the single-phase rectifier stage circuit, and the single-phase rectifier stage circuit of the single-phase AC-DC-AC converter circuit has two AC input ends. The single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits have a total of six AC input terminals, the first AC input terminals of the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits constitute a group of terminals, and the second AC input terminals of the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits constitute another group of terminals, one of which is connected to a common neutral point, and the other is connected in series with the three high-frequency filters, respectively, and connected to the three-phase power grid to form a star connection; the single-phase inverter stage circuit of the single-phase AC-DC-AC converter circuit has two AC output terminals, constituting a group of AC output terminals, and the three single-phase inverter stage circuits of the three single-phase AC-DC-AC converter circuits have a total of six AC output terminals, constituting three groups of AC output terminals, and the three groups of AC output terminals of the three single-phase inverter stage circuits of the three single-phase AC-DC-AC converter circuits are connected to the three stator windings of the three-phase AC motor in an open winding connection.

[0008] The control method of the medium- and high-voltage variable-frequency speed regulation circuit without transformer isolation comprises the following steps:

[0009] (1) The three-phase sinusoidal reference voltage signal of the inverter circuit is given by the following formula:

[0010]

[0011] Where V * is the command voltage signal, v a * 、v b * 、v c * is the three-phase sinusoidal reference voltage signal, ωt is V * The rotation angle of

[0012] (2) The pulse width modulation voltage waveform v of each phase inverter circuit in each sectora * 、v b * 、v c * Calculated by the following formula:

[0013]

[0014]

[0015] T S =2(T0+T a +T b )

[0016] Where T0 is the zero vector action time, T s is the switching period, V d is the DC side voltage of each phase inverter, T a , T b They are the hysteresis command voltage signal V * The vector action time and the leading instruction voltage signal V * The vector action time;

[0017] (3)T a , T b The calculation formula of ωt is as follows: when the command voltage signal V * When in sector 5:

[0018]

[0019] The above formula α is V * At the angle of each sector, put the above formula T a , T b , ωt is brought into the v of the fifth sector in step (2) ao * 、v bo * 、v co * In the equation, we get:

[0020]

[0021] When the command voltage signal V * When located in the first, second, third, fourth, and sixth sectors, place the upper T a , T b Substituting the expressions of ωt into the first, second, third, fourth, and sixth sectors in step (2) yields v ao * 、v bo * 、vco * The expressions in the first, second, third, fourth, and sixth sectors are as follows:

[0022]

[0023]

[0024] (4) According to the v of each sector in step (3) ao * 、v bo * 、v co * The following formula is obtained:

[0025]

[0026]

[0027] (5) The three-phase pulse width modulation waveform v in the range of 0≤ωt≤2π in step (4) is ao * 、v bo * 、v co * The three-phase pulse width modulation waveform v is obtained in the range of 0≤ωt≤2kπ by period extension. ao * 、v bo * 、v co * , k ≥ 1 is a positive integer;

[0028] (6) Define the peak value of the sinusoidal voltage that needs to be inverted by each phase inverter circuit as V ac The signal involved in the PWM modulation of each phase inverter circuit is v am * 、v bm * 、v cm * ,make Where V d is the DC side voltage of each phase inverter in step (2);

[0029] (7) When g<1 in step (6), the signal v participating in the PWM modulation of each phase inverter circuit is am * 、v bm * 、v cm * for:

[0030]

[0031] When g≥1 in step (6), the signal v participating in the PWM modulation of each phase inverter circuit is am * 、v bm * 、v cm * for:

[0032]

[0033] Where v ao * 、v bo * 、v co * is the three-phase pulse width modulation waveform v in the range of 0≤ωt≤2kπ in step (5) ao * 、v bo * 、v co * ;

[0034] (8) Since each phase inverter stage circuit adopts N+1 level cascade inverter units, N≥1 is a positive integer, N different triangular carrier signals are required. These N different triangular carrier signals have the same frequency and amplitude, and are continuously vertically distributed in space and symmetrically distributed on both sides of the time axis. The phases of the N different triangular carrier signals differ by 180° in sequence. The period of these N different triangular carrier signals is the switching period T in step (2). s , the amplitude is Where V m is the PWM modulated signal v of each phase inverter circuit in step (7) am * 、v bm * 、v cm * The amplitude of

[0035] (9) The PWM modulation signal v of each phase inverter circuit in step (7) is converted into am * 、v bm * 、v cm * The PWM signal of each phase inverter circuit is obtained by comparing with the N triangular carrier signals in step (8), thereby controlling the power switch tube of each phase inverter circuit.

[0036] The following is a detailed description with reference to the accompanying drawings in conjunction with embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a structural diagram of a medium and high voltage frequency conversion speed regulation circuit without transformer isolation;

[0038] Figure 2 It is the traditional space vector pulse width modulation sector diagram;

[0039] Figure 3 It is a pulse width modulation waveform when the command voltage signal of the traditional space vector control is located in the fifth sector;

[0040] Figure 4 It is a control block diagram of a medium and high voltage frequency conversion speed regulation circuit without transformer isolation;

[0041] Figure 5 A reference diagram for one cycle PWM modulation of each phase inverter circuit; DETAILED DESCRIPTION

[0042] The following is a further description of the embodiments and working principles of the present invention in conjunction with the accompanying drawings:

[0043] Reference Figure 1 A medium- and high-voltage frequency conversion speed regulation circuit without transformer isolation includes three high-frequency filters and a three-phase AC-DC-AC converter circuit, the three-phase AC-DC-AC converter circuit includes three single-phase AC-DC-AC converter circuits, the single-phase AC-DC-AC converter circuit includes a single-phase rectifier stage circuit and a single-phase inverter stage circuit, the single-phase rectifier stage circuit includes a single-phase rectifier and N cascaded control module units, wherein N≥1 is a positive integer, the single-phase rectifier stage circuit provides a pair of common high-voltage output DC busbars, the single-phase inverter stage circuit includes an N+1 level cascaded inverter unit, the DC input end of the N+1 level cascaded inverter unit is connected to the single-phase rectifier stage circuit A pair of common high-voltage output DC busbars are directly connected, a single-phase rectifier stage circuit of a single-phase AC-DC-AC converter circuit has two AC input terminals, and the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits have a total of six AC input terminals. The first AC input terminals of the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits constitute a group of wiring terminals, and the second AC input terminals of the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits constitute another group of wiring terminals, one group of wiring terminals is connected to a common neutral point, and the other group of wiring terminals are respectively connected in series with the three high-frequency filters and connected to the three-phase power grid to form a star connection.

[0044] Reference Figure 1 A medium- and high-voltage variable-frequency speed regulation circuit without transformer isolation includes a three-phase AC motor. Each phase stator winding of the three-phase AC motor is respectively connected to the AC output end of an N+1 level cascade inverter unit in three single-phase AC-DC-AC converter circuits to form an open winding connection to achieve electrical isolation between the three-phase power flows.

[0045] Reference Figure 1 , Figure 2 , Figure 3 , Figure 4 and Figure 5 , a control method for a medium and high voltage variable frequency speed regulation circuit without transformer isolation, the steps are as follows:

[0046] (1) In order to improve the DC voltage utilization rate of the inverter stage circuit and obtain the same control effect as the traditional space vector pulse width modulation, it is assumed that the three-phase sinusoidal reference voltage signal of each phase inverter stage circuit is given by the following formula:

[0047]

[0048] Where V * is the traditional space vector pulse width modulation command voltage signal, v a * 、v b * 、v c * is the three-phase sinusoidal reference voltage signal, ωt is V * The rotation angle of

[0049] (2) According to the traditional space vector pulse width modulation waveform and area equivalence principle, the pulse width modulation voltage waveform v of each phase inverter circuit in each sector is obtained ao * 、v bo * 、v co * The expressions are:

[0050]

[0051] T S =2(T0+T a +T b )

[0052] Where T0 is the zero vector action time, T s is the switching period, V d is the DC side voltage of each phase inverter, T a , T b They are the hysteresis command voltage signal V * The vector action time and the leading instruction voltage signal V * The vector action time;

[0053] (3) Assume that the command voltage signal V in step (1) * Located in the fifth sector:

[0054]

[0055] The above formula α is V * At the angle of each sector, put the above formula T a 、T b , ωt is brought into the v of the fifth sector in step (2) ao * 、v bo * 、v co * In the equation, we get:

[0056]

[0057] When the command voltage signal V * When it is located in the first, second, third, fourth, and sixth sectors, the above T a 、T b Substitute the expressions of ωt into the first, second, third, fourth, and sixth sectors in step (2) to find v ao * 、v bo * 、v co * The expressions in the first, second, third, fourth, and sixth sectors are as follows:

[0058]

[0059] The v of each sector in step (3) ao * 、v bo * 、v co * The following formula is obtained:

[0060]

[0061] (5) The three-phase pulse width modulation waveform v in the range of 0≤ωt≤2π in step (4) is ao * 、v bo * 、v co * Extending for one cycle, the three-phase pulse width modulation waveform v is obtained in the range of 0≤ωt≤2kπ ao * 、v bo * 、v co * , k ≥ 1 is a positive integer;

[0062] (6) Assume that the peak value of the sinusoidal voltage that needs to be inverted by each phase inverter circuit is Vac The signal involved in the PWM modulation of each phase inverter circuit is v am * 、v bm * 、v cm * ,make Where V d is the DC side voltage of each phase inverter in step (2);

[0063] (7) When g<1 in step (6), the signal v participating in the PWM modulation of each phase inverter circuit is am * 、v bm * 、v cm * for:

[0064]

[0065] When g≥1 in step (6), the signal v participating in the PWM modulation of each phase inverter circuit is am * 、v bm * 、v cm * for:

[0066]

[0067] v ao * 、v bo * 、v co * is the three-phase pulse width modulation waveform v in the range of 0≤ωt≤2kπ in step (5) ao * 、v bo * 、v co * ;

[0068] (8) Since each phase inverter stage circuit adopts N+1 level cascade inverter units, N≥1 is a positive integer, N different triangular carrier signals are required. These N different triangular carrier signals have the same frequency and amplitude, and are continuously vertically distributed in space and symmetrically distributed on both sides of the time axis. The phases of the N different triangular carrier signals differ by 180° in sequence. The period of these N different triangular carrier signals is the switching period T in step (2). s , the amplitude is Where V m is the PWM modulated signal v of each phase inverter circuit in step (7)am * 、v bm * 、v cm * The amplitude of

[0069] (9) The PWM modulation signal v of each phase inverter circuit in step (7) is converted into am * 、v bm * 、v cm * By comparing with the N triangular carrier signals in step (8), the PWM signal of each phase inverter stage circuit is obtained, and then the power switch tube of each phase inverter stage circuit is controlled. This control strategy improves the DC voltage utilization rate within a certain output voltage range and achieves the same control effect as traditional space vector pulse width modulation.

[0070] The embodiments described above are merely descriptions of preferred implementations of the present invention, and are not intended to limit the concept and scope of the present invention. Without departing from the design of the present invention, various modifications and improvements made to the technical solution of the present invention by ordinary engineering technicians in the field should fall within the protection scope of the present invention. The technical contents for which protection is sought in the present invention have all been recorded in the claims.

Claims

1. A control method for a medium- and high-voltage variable-frequency speed regulation circuit without transformer isolation, a medium- and high-voltage variable-frequency speed regulation circuit without transformer isolation, comprising three high-frequency filters and a three-phase AC-DC-AC converter circuit, wherein the three-phase AC-DC-AC converter circuit comprises three single-phase AC-DC-AC converter circuits, wherein the single-phase AC-DC-AC converter circuit comprises a single-phase rectifier stage circuit, wherein the single-phase rectifier stage circuit comprises a single-phase rectifier and N cascaded control module units, wherein N≥1 is a positive integer, wherein the single-phase rectifier stage circuit provides a pair of common high-voltage output DC busbars, wherein the single-phase AC-DC-AC converter circuit comprises a single-phase inverter stage circuit, wherein the single-phase inverter stage circuit comprises an N+1 level cascaded inverter unit, wherein the DC input end of the N+1 level cascaded inverter unit is directly connected to a pair of common high-voltage output DC busbars provided by the single-phase rectifier stage circuit, wherein the single-phase rectifier stage circuit of the single-phase AC-DC-AC converter circuit has two AC Input end, the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits have a total of six AC input ends, the first AC input ends of the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits constitute a group of terminals, and the second AC input ends of the single-phase rectifier stage circuits of the three single-phase AC-DC-AC converter circuits constitute another group of terminals, one of which is connected to a common neutral point, and the other group of terminals is respectively connected in series with the three high-frequency filters and connected to the three-phase power grid to form a star connection; the single-phase inverter stage circuit of the single-phase AC-DC-AC converter circuit has two AC output ends, constituting a group of AC output ends, and the three single-phase inverter stage circuits of the three single-phase AC-DC-AC converter circuits have a total of six AC output ends, constituting three groups of AC output ends, and the three groups of AC output ends of the three single-phase inverter stage circuits of the three single-phase AC-DC-AC converter circuits are connected to the three stator windings of the three-phase AC motor in an open winding connection; A control method for a medium- and high-voltage frequency conversion speed regulation circuit without transformer isolation, characterized in that: The following steps are involved: (1) The three-phase sinusoidal reference voltage signal of the inverter circuit is given by the following formula: Where V * is the command voltage signal, v a * 、v b * 、v c * is the three-phase sinusoidal reference voltage signal, ωt is V * The rotation angle of (2) The pulse width modulation voltage waveform v of each phase inverter circuit in each sector a * 、v b * 、v c * Calculated by the following formula: T S =2(T0+T a +T b ) Where T0 is the zero vector action time, T s is the switching period, V d is the DC side voltage of each phase inverter, T a , T b They are the hysteresis command voltage signal V * The vector action time and the leading instruction voltage signal V * The vector action time; (3)T a , T b The calculation formula of ωt is as follows: when the command voltage signal V * When in sector 5: Where α is V * At each sector angle, set T a , T b , ωt is brought into the v of the fifth sector in step (2) ao * 、v bo * 、v co * In the equation, we get: When the command voltage signal V * When located in the first, second, third, fourth, and sixth sectors, set T a 、T b Substituting the expressions of ωt into the first, second, third, fourth, and sixth sectors in step (2) yields v ao * 、v bo * 、v co * The expressions in the first, second, third, fourth, and sixth sectors are as follows: (4) According to the v of each sector in step (3) ao * 、v bo * 、v co * The following formula is obtained: (5) The three-phase pulse width modulation waveform v in the range of 0≤ωt≤2π in step (4) is ao * 、v bo * 、v co * The three-phase pulse width modulation waveform v is obtained in the range of 0≤ωt≤2kπ by period extension. ao * 、v bo * 、v co * , k ≥ 1 is a positive integer; (6) Define the peak value of the sinusoidal voltage that needs to be inverted by each phase inverter circuit as V ac The signal involved in the PWM modulation of each phase inverter circuit is v am * 、v bm * 、v cm * ,make Where V d is the DC side voltage of each phase inverter in step (2); (7) When g<1 in step (6), the signal v participating in the PWM modulation of each phase inverter circuit is am * 、v bm * 、v cm * for: When g≥1 in step (6), the signal v participating in the PWM modulation of each phase inverter circuit is am * 、v bm * 、v cm * for: Where v ao * 、v bo * 、v co * is the three-phase pulse width modulation waveform v in the range of 0≤ωt≤2kπ in step (5) ao * 、v bo * 、v co * ; (8) Since each phase inverter stage circuit adopts N+1 level cascade inverter units, N≥1 is a positive integer, N different triangular carrier signals are required. These N different triangular carrier signals have the same frequency and amplitude, and are continuously vertically distributed in space and symmetrically distributed on both sides of the time axis. The phases of the N different triangular carrier signals differ by 180° in sequence. The period of these N different triangular carrier signals is the switching period T in step (2). s , the amplitude is Where V m is the PWM modulated signal v of each phase inverter circuit in step (7) am * 、v bm * 、v cm * The amplitude of (9) The PWM modulation signal v of each phase inverter circuit in step (7) is converted into am * 、v bm * 、v cm * The PWM signal of each phase inverter circuit is obtained by comparing with the N triangular carrier signals in step (8), thereby controlling the power switch tube of each phase inverter circuit.

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