A test circuit and control method for the output characteristics of a GaN power device

Abstract

A circuit and control method for testing the output characteristics of GaN power devices according to the present invention. The circuit includes: an isolated drive chip, a GaN power switch device VT1, a first RC absorption protection circuit, an inductor L, a drive bead F ZB , a resistor R, a GaN power switch device VT2 to be tested, a second RC absorption protection circuit, a DC power supply Vd, and a high-isolation power supply. The circuit provided by the present invention can implement the test of the output characteristics of GaN power devices on a very small tooling board, effectively avoid electromagnetic interference and parasitic parameters caused by control signals and main circuit connection wires, and improve the accuracy of test results.

Description

Technical Field

[0001] The present invention relates to the field of power electronics testing, and particularly relates to a test circuit and a control method for the output characteristics of GaN power devices. Background Art

[0002] The development of the performance of silicon power devices has reached its limit. Compared with traditional silicon power devices, the performance of wide-bandgap power semiconductors is much superior. Among them, the most representative wide-bandgap power semiconductor device should be the gallium nitride power device. The gallium nitride power device adopts a high electron mobility transistor structure, and the switching process is very fast, enabling high-frequency switching. Compared with traditional silicon power devices, under the same withstand voltage, the gallium nitride die has a much smaller volume and a smaller parasitic capacitance, which helps to improve the switching speed. However, the performance research of gallium nitride power devices is not yet perfect, and the output characteristic data provided by device manufacturers is limited. Therefore, it is necessary to further study the output performance of gallium nitride power devices.

[0003] Currently, the research on the output characteristics of gallium nitride power devices starts from the internal structure of the gallium nitride power device, builds a certain parasitic parameter model, and calculates the parasitic parameter values by testing the voltage and current waveforms of the gallium nitride power device. This method is complex and time-consuming, and does not start from the application perspective of the gallium nitride power device, resulting in inaccurate test results. Summary of the Invention

[0004] Aiming at the deficiencies of the prior art, the purpose of the present invention is to be able to test the output characteristics of GaN power devices on a very small tooling board, effectively avoid electromagnetic interference and parasitic parameters brought by control signals and main circuit connection lines, and improve the accuracy of test results.

[0005] The purpose of the present invention is achieved by adopting the following technical solutions:

[0006] A test circuit for the output characteristics of a GaN power device, wherein the improvement lies in that the circuit includes:

[0007] An isolation drive chip, a GaN power switch device VT1, a first RC absorption protection circuit, an inductor L, a drive bead F ZB , a resistor R, a GaN power switch device VT2 to be tested, a second RC absorption protection circuit, a DC power supply Vd, and a high isolation power supply;

[0008] The secondary power supply terminal of the isolation drive chip is connected to the positive voltage output terminal of the high isolation power supply; the secondary ground terminal of the isolation drive chip is connected to the negative voltage output terminal of the high isolation power supply; the ground terminal of the high isolation power supply is connected to the source electrode of the GaN power switch device VT2 to be tested;

[0009] The output terminal of the isolation driving chip and one end of the driving magnetic bead F ZB are connected; the other end of the driving magnetic bead F ZB is respectively connected to the gate of the GaN power switch device VT2 to be measured and one end of the resistor R; the other end of the resistor R is connected to the source of the GaN power switch device VT2 to be measured; the GaN power switch device VT2 to be measured is connected in parallel with the second RC absorption protection circuit;

[0010] The gate of the GaN power switch device VT1 is connected to its source; the GaN power switch device VT1 is respectively connected in parallel with the first RC absorption protection circuit and the inductor L;

[0011] The source of the GaN power switch device VT1 is connected to the drain of the GaN power switch device VT2 to be measured;

[0012] The first RC absorption protection circuit and the second RC absorption protection circuit are connected in series;

[0013] The positive pole of the DC power supply Vd is connected to the drain of the GaN power switch device VT1; the negative pole of the DC power supply Vd is connected to the source of the GaN power switch device VT2 to be measured.

[0014] Preferably, the high isolation power supply includes:

[0015] An input power supply, a Boost boost circuit, a push-pull circuit, a positive voltage regulation circuit, and a negative voltage regulation circuit;

[0016] The input power supply, the Boost boost circuit, and the push-pull circuit are connected in sequence; the positive voltage regulation circuit is connected to one output terminal of the push-pull circuit, and the negative voltage regulation circuit is connected to the other output terminal of the push-pull circuit;

[0017] The Boost boost circuit is used to boost the voltage input by the input power supply to 50V and provide a 50V input voltage for the push-pull circuit;

[0018] The push-pull circuit is used to convert the 50V voltage output by the Boost boost circuit into a positive voltage output and a negative voltage output;

[0019] The positive voltage regulation circuit is used to regulate the positive voltage output by the push-pull circuit into a positive voltage in the range of 5V to 20V;

[0020] The negative voltage regulation circuit is used to regulate the negative voltage output by the push-pull circuit into a negative voltage in the range of -0.1V to -5V.

[0021] Preferably, the voltage range of the input power supply is 10V to 30V.

[0022] Preferably, the isolation drive chip uses an SI8230 drive chip.

[0023] Preferably, the first RC absorption protection circuit includes:

[0024] A first resistor R1 and a first capacitor C1 connected in series with the first resistor.

[0025] Preferably, the second RC absorption protection circuit includes:

[0026] A second resistor R2 and a second capacitor C2 connected in series with the second resistor.

[0027] An improvement of a control method for the above test circuit is that the method includes:

[0028] Input a drive pulse signal for controlling the GaN power switch device VT2 to be measured to the input end of the isolation drive chip, and adjust the positive voltage output by the high isolation power supply to a preset positive drive voltage and the negative voltage output to a preset negative drive voltage;

[0029] When the drive pulse signal for controlling the GaN power switch device VT2 to be measured is positive, obtain the voltage across the drain-source and the drain current of the GaN power switch device VT2 to be measured under the preset positive drive voltage;

[0030] When the drive pulse signal for controlling the GaN power switch device VT2 to be measured is negative, obtain the voltage across the drain-source and the drain current of the GaN power switch device VT2 to be measured under the preset negative drive voltage.

[0031] Preferably, the voltage range of the preset positive drive voltage is 5V to 20V; the voltage range of the preset negative drive voltage is -0.1V to -5V.

[0032] Compared with the closest prior art, the beneficial effects of the present invention are:

[0033] The present invention provides a test circuit and a control method for the output characteristics of a GaN power device. The test circuit provided by the present invention integrates a high isolation power supply, a drive circuit, and a main circuit for testing the output characteristics of a GaN power device, and can realize the test of the output characteristics of a GaN power device on a very small tooling board, which can effectively avoid electromagnetic interference and parasitic parameters brought by control signals and main circuit connection lines, and improve the accuracy of test results; the RC absorption protection circuit is added to the test circuit provided by the present invention, which can effectively suppress the voltage spike during turn-off;

[0034] The high-isolation power supply provided by the present invention can achieve continuous adjustment of positive and negative voltages. The isolation driving chip is powered by the high-isolation power supply, so that the driving signal can be continuously adjusted. Both the isolation driving chip and the high-isolation power supply adopted by the present invention can withstand an isolation voltage of 5 kV, avoiding the interference of the control signal on the GaN power device in the high-frequency state and improving the accuracy of the test results. Description of the Drawings

[0035] Figure 1 is a test circuit for the output characteristics of a GaN power device provided by the present invention;

[0036] Figure 2 is a block diagram of the high-isolation power supply provided by the present invention;

[0037] Figure 3 is a schematic diagram of the positive voltage regulation circuit provided by an embodiment of the present invention;

[0038] Figure 4 is a schematic diagram of the negative voltage regulation circuit provided by an embodiment of the present invention;

[0039] Figure 5 is a schematic diagram of the test principle of the test circuit provided by an embodiment of the present invention. Detailed Embodiments

[0040] The following further describes in detail the specific embodiments of the present invention with reference to the drawings.

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. Apparently, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0042] The present invention provides a test circuit for the output characteristics of a GaN power device, as Figure 1 shown, including:

[0043] an isolation driving chip, a GaN power switching device VT1, a first resistor R1, a first capacitor C1, an inductor L, a driving bead F ZB , a resistor R, a GaN power switching device VT2 to be tested, a second resistor R2, a second capacitor C2, a DC power supply Vd, and a high-isolation power supply;

[0044] The secondary power supply terminal of the isolated drive chip is connected to the positive voltage output terminal of the high isolation power supply; the secondary ground terminal of the isolated drive chip is connected to the negative voltage output terminal of the high isolation power supply; the ground terminal of the high isolation power supply is connected to the source electrode of the GaN power switch device VT2 to be measured;

[0045] The gate electrode of the GaN power switch device VT1 is connected to its source electrode; the drain electrode of the GaN power switch device VT1 is respectively connected to one end of the first resistor R1 and one end of the inductor L;

[0046] The other end of the first resistor R1 is connected to one end of the first capacitor C1; the other end of the first capacitor C1 is connected to one end of the second resistor R2; the other end of the second resistor R2 is connected to one end of the second capacitor C2; the other end of the second capacitor C2 is connected to the source electrode of the GaN power switch device VT2 to be measured;

[0047] The output terminal of the isolated drive chip is connected to one end of the drive bead F ZB ; the other end of the drive bead F ZB is respectively connected to the gate electrode of the GaN power switch device VT2 to be measured and one end of the resistor R; the other end of the resistor R is connected to the source electrode of the GaN power switch device VT2 to be measured; the drain electrode of the GaN power switch device VT2 to be measured is respectively connected to one end of the second resistor R2 and the other end of the first capacitor C1;

[0048] The source electrode of the GaN power switch device VT1 is connected to the drain electrode of the GaN power switch device VT2 to be measured;

[0049] The positive electrode of the DC power supply Vd is connected to the drain electrode of the GaN power switch device VT1; the negative electrode of the DC power supply Vd is connected to the source electrode of the GaN power switch device VT2 to be measured.

[0050] The high isolation power supply includes:

[0051] An input power supply with a voltage range of 10V to 30V, a Boost boost circuit, a push-pull circuit, a positive voltage regulation circuit, and a negative voltage regulation circuit;

[0052] The input power supply, the Boost boost circuit, and the push-pull circuit are connected in sequence; the positive voltage regulation circuit is connected to one output terminal of the push-pull circuit, and the negative voltage regulation circuit is connected to the other output terminal of the push-pull circuit;

[0053] The Boost boost circuit is used to boost the input voltage of 10V to 30V to 50V and provide an input voltage of 50V for the push-pull circuit;

[0054] The push-pull circuit is used to convert the 50V voltage output by the Boost boost circuit into a positive voltage output and a negative voltage output;

[0055] The positive voltage regulation circuit is used to regulate the positive voltage output by the push-pull circuit into a positive voltage within the range of 5V to 20V;

[0056] The negative voltage regulation circuit is used to regulate the negative voltage output by the push-pull circuit into a negative voltage within the range of -0.1V to -5V.

[0057] For example, as Figure 2 shown, the input voltage of the preferred input power supply of the present invention is 24V. The 24V input voltage is boosted to a stable 50V voltage by the Boost boost circuit. This 50V voltage is converted into positive and negative voltage outputs through a high-isolation push-pull circuit. By adjusting the resistance value of the sliding rheostat in the positive voltage regulation circuit or the resistance value of the sliding rheostat in the negative voltage regulation circuit, the output positive voltage of the high-isolation power supply is regulated within the range of 5V to 20V, and the output negative voltage is regulated within the range of -0.1V to -5V.

[0058] As Figure 3 shown, the schematic diagram of the positive voltage regulation circuit provided in this embodiment includes a switch-type chip of the LM2576-ADJ type, a first diode D1, a third capacitor C3, a first inductor L1, a resistor R11, and a sliding rheostat R12;

[0059] The output terminal of the LM2576-ADJ chip, the cathode of the first diode D1, and one end of the first inductor L1 are connected;

[0060] The on / off control terminal of the LM2576-ADJ chip, the ground terminal of the LM2576-ADJ chip, the anode of the first diode D1, one end of the third capacitor C3, and one end of the resistor R11 are all connected to the ground terminal of the external power supply;

[0061] The other end of the third capacitor C3, the other end of the first inductor L1, and the A terminal of the sliding rheostat R12 are connected to the positive electrode of the external power supply;

[0062] The other end of the resistor R11, the B terminal of the sliding rheostat R12, the P terminal of the sliding rheostat, and the feedback terminal of the LM2576-ADJ chip are connected.

[0063] As Figure 4 shown, the schematic diagram of the negative voltage regulation circuit provided in this embodiment includes a switch-type chip of the LM2576-ADJ type, a second diode D2, a fourth capacitor C4, a second inductor L2, a resistor R21, and a sliding rheostat R22;

[0064] The output terminal of the LM2576-ADJ chip, the cathode of the first diode D1, and one end of the first inductor L1 are connected;

[0065] The on / off control terminal of the LM2576-ADJ chip, the ground terminal of the LM2576-ADJ chip, the anode of the second diode D2, one end of the fourth capacitor C4, and one end of the resistor R21 are connected to the positive pole of the external power supply;

[0066] The other end of the fourth capacitor C4, the other end of the second inductor L2, and the A end of the slide rheostat R22 are all connected to the ground terminal of the external power supply;

[0067] The other end of the resistor R21, the B end of the slide rheostat R22, the P end of the slide rheostat, and the feedback terminal of the LM2576-ADJ chip are connected.

[0068] The isolation drive chip adopts the SI8230 drive chip, which is a two-channel independent isolation drive chip. The isolation voltage can reach 5 kV, the drive capacity can reach 4 A, and the delay time is only 45 ns. In the test circuit of the present invention, VT2 is the main test device, and VT1 only uses its reverse characteristic to provide a freewheeling circuit for the current on the inductor when VT2 is turned off. The specific implementation process is as Figure 5 shown, where Vds is the voltage across the drain-source of the GaN power switch device VT2 to be tested, Vgs is the gate drive voltage of the GaN power switch device VT2 to be tested, and id is the drain current of the GaN power switch device VT2 to be tested.

[0069] Input a drive pulse signal for controlling the GaN power switch device VT2 to be tested to the input terminal of the isolation drive chip, and adjust the positive voltage output by the high-isolation power supply to a preset positive drive voltage, and the negative voltage output to a preset negative drive voltage;

[0070] During t0 - t1, when the drive pulse signal for controlling the GaN power switch device VT2 to be tested is positive, the GaN power switch device VT2 to be tested is turned on, the voltage of the DC power supply is applied across the GaN power switch device VT2 to be tested and the inductor L, and the drain current on the GaN power switch device VT2 to be tested gradually increases, and the voltage across the drain-source and the drain current of the GaN power switch device VT2 to be tested under the preset positive drive voltage are obtained;

[0071] During t1 - t2, when the driving pulse signal for controlling the to - be - tested GaN power switch device VT2 is negative, the to - be - tested GaN power switch device VT2 turns off, and the GaN power switch device VT1 and the inductor L form a loop to conduct free - wheeling for the current on the inductor L, and the voltage across the drain - source terminals and the drain current of the to - be - tested GaN power switch device VT2 under the preset negative driving voltage are obtained.

[0072] Those skilled in the art should understand that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer - usable storage media (including but not limited to disk memory, CD - ROM, optical memory, etc.) containing computer - usable program code.

[0073] The present application is described with reference to the flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram can be implemented by computer program instructions, and the combination of the flows and / or blocks in the flowchart and / or block diagram can also be implemented. These computer program instructions can be provided to the processor of a general - purpose computer, a special - purpose computer, an embedded processor, or other programmable data - processing devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data - processing devices generate means for implementing the specified functions in Figure 1 one or more of the flows Figure 1 or blocks.

[0074] These computer program instructions can also be stored in a computer - readable memory that can direct a computer or other programmable data - processing device to work in a specific manner, so that the instructions stored in the computer - readable memory generate a manufactured article including instruction means, and the instruction means implements the specified functions in Figure 1 one or more of the flows Figure 1 or blocks.

[0075] These computer program instructions can also be loaded onto a computer or other programmable data - processing device, so that a series of operation steps are executed on the computer or other programmable device to generate a computer - implemented process. Thus, the instructions executed on the computer or other programmable device provide steps for implementing the specified functions in Figure 1 one or more of the flows Figure 1 or blocks.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications or equivalent substitutions can still be made to the specific implementation manners of the present invention, and any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.

Claims

1. A test circuit for the output characteristics of a GaN power device, characterized in that, The circuit includes: Isolation drive chip, GaN power switch device VT1, first RC absorption protection circuit, inductor L, drive bead F ZB , resistor R, GaN power switch device VT2 to be measured, second RC absorption protection circuit, DC power supply Vd and high isolation power supply; The secondary power supply terminal of the isolated drive chip is connected to the positive voltage output terminal of the high-isolation power supply; the secondary ground terminal of the isolated drive chip is connected to the negative voltage output terminal of the high-isolation power supply; the ground terminal of the high-isolation power supply is connected to the source electrode of the GaN power switch device VT2 to be measured; The output terminal of the isolation driving chip and one end of the driving bead F ZB are connected; the other end of the driving bead F ZB is respectively connected to the gate of the GaN power switch device VT2 to be measured and one end of the resistor R; the other end of the resistor R is connected to the source of the GaN power switch device VT2 to be measured; the GaN power switch device VT2 to be measured is connected in parallel with the second RC absorption protection circuit; The gate electrode of the GaN power switch device VT1 is connected to its source electrode; the GaN power switch device VT1 is respectively connected in parallel with the first RC absorption protection circuit and the inductor L; The source electrode of the GaN power switch device VT1 is connected to the drain electrode of the GaN power switch device VT2 to be measured; The first RC absorption protection circuit and the second RC absorption protection circuit are connected in series; The positive electrode of the DC power supply Vd is connected to the drain electrode of the GaN power switch device VT1; the negative electrode of the DC power supply Vd is connected to the source electrode of the GaN power switch device VT2 to be measured; The first RC absorption protection circuit includes: a first resistor R1 and a first capacitor C1 connected in series with the first resistor; The second RC absorption protection circuit includes: a second resistor R2 and a second capacitor C2 connected in series with the second resistor.

2. The circuit according to claim 1, characterized in that, The high-isolation power supply includes: An input power supply, a Boost boost circuit, a push-pull circuit, a positive voltage regulation circuit, and a negative voltage regulation circuit; The input power supply, the Boost boost circuit, and the push-pull circuit are connected in sequence; the positive voltage regulation circuit is connected to one output terminal of the push-pull circuit, and the negative voltage regulation circuit is connected to the other output terminal of the push-pull circuit; The Boost boost circuit is used to boost the voltage input by the input power supply to 50V and provide a 50V input voltage for the push-pull circuit; The push-pull circuit is used to convert the 50V voltage output by the Boost boost circuit into a positive voltage output and a negative voltage output; The positive voltage regulation circuit is used to regulate the positive voltage output by the push-pull circuit to a positive voltage in the range of 5V to 20V; The negative voltage regulation circuit is used to regulate the negative voltage output by the push-pull circuit to a negative voltage in the range of -0.1V to -5V.

3. The circuit according to claim 2, characterized in that, The voltage range of the input power supply is 10V to 30V.

4. The circuit according to claim 1, characterized in that, The isolated drive chip uses an SI8230 drive chip.

5. A control method for the test circuit according to any one of claims 1-4, characterized in that, The method includes: Input a drive pulse signal for controlling the GaN power switch device VT2 to be measured to the input terminal of the isolated drive chip, and adjust the positive voltage output by the high-isolation power supply to a preset positive drive voltage and the negative voltage output to a preset negative drive voltage; When the drive pulse signal for controlling the GaN power switch device VT2 to be measured is positive, obtain the voltage across the drain-source and the drain current of the GaN power switch device VT2 to be measured under the preset positive drive voltage; When the drive pulse signal for controlling the GaN power switch device VT2 to be measured is negative, obtain the voltage across the drain-source and the drain current of the GaN power switch device VT2 to be measured under the preset negative drive voltage.

6. The method according to claim 5, wherein The voltage range of the preset forward driving voltage is 5V to 20V; the voltage range of the preset negative driving voltage is -0.1V to -5V.

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