Chopper-Stabilized Current Feedback Amplifier

Abstract

A chopper-stabilized current feedback amplifier (200, Figure 2) includes an input buffer (204, Figure 2) having a non-inverting input and an inverting input. A first set of chopper circuits (CH1-CH4, Figure 2) modulates the currents at the non-inverting input and the inverting input. The current feedback amplifier further includes a plurality of current mirrors (M1, M2, Figure 2) coupled to the input buffer. A second set of chopper circuits (CH5-CH12, Figure 2) modulates the currents in the current mirrors. The current feedback amplifier further includes a phase detector circuit (P1, P2, Figure 2) coupled to the current mirrors and configured to detect a transition current in the current mirrors. The current feedback amplifier further includes a switched capacitor filter (220, Figure 2) having an input coupled to the current mirrors. The switched capacitor filter is turned off in response to the phase detector circuit detecting the transition current. The current feedback amplifier further includes an output stage (208, Figure 2) having an input coupled to the switched capacitor filter and configured to generate an output signal.

Description

Technical Field

[0001] The present invention generally relates to current feedback amplifiers, and more particularly to chopper-stabilized current feedback amplifiers. Background Art

[0002] Current feedback amplifiers are used in video drivers, equalization filters, input drivers, and communication devices. A current feedback amplifier has a high-impedance non-inverting input and a low-impedance inverting input. In response to an error current at one of its inputs, the current feedback amplifier generates a corresponding output voltage. The current feedback amplifier provides a fast transient response and has a bandwidth that is relatively independent of the closed-loop gain. However, due to the relatively high input bias current and relatively high offset voltage, the DC accuracy of the current feedback amplifier is poor. Accordingly, there is a need to improve current feedback amplifiers. Summary of the Invention

[0003] Aspects of the present disclosure relate to chopper-stabilized current feedback amplifiers. In one aspect of the present disclosure, a current feedback amplifier includes an input buffer having a non-inverting input and an inverting input. A first set of chopper circuits is configured to modulate the currents at the non-inverting and inverting inputs. The current feedback amplifier further includes a plurality of upper current mirrors coupled between a voltage source and the input buffer. A second set of chopper circuits is configured to modulate the currents passing through the upper current mirrors. The current feedback amplifier further includes a plurality of lower current mirrors coupled between the input buffer and ground. A third set of chopper circuits is configured to modulate the currents passing through the lower current mirrors. The current feedback amplifier further includes first and second phase detector circuits configured to conduct current in response to a transition current through at least one of the upper current mirrors and the lower current mirrors. The current feedback amplifier further includes a logic circuit having inputs coupled to the first and second phase detector circuits. The logic circuit is operable to output a logic 1 (one) if at least one of the first and second phase detectors conducts current, and the logic circuit is operable to output a logic 0 (zero) if neither of the first and second phase detectors conducts current. The current feedback amplifier further includes a switched-capacitor filter having an input coupled to the outputs of the upper current mirrors and the lower current mirrors and having an input coupled to the output of the logic circuit. The switched-capacitor filter is configured to be closed in response to a logic 1 (one) and to be open in response to a logic 0 (zero). The switched-capacitor filter generates a first filtered signal. The current feedback amplifier further includes an output stage having an input coupled to receive the first filtered signal and configured to generate an output signal for the current feedback amplifier.

[0004] In another aspect of the present disclosure, a current feedback amplifier includes a plurality of upper current mirrors coupled between a voltage source and an upper cascode circuit. A first set of chopper circuits is configured to modulate the current through the upper current mirrors and the upper cascode circuit. The current feedback amplifier further includes a plurality of lower current mirrors coupled between a lower cascode amplifier circuit and ground. A second set of chopper circuits is configured to modulate the current through the lower current mirrors and the lower cascode circuit. The current feedback amplifier further includes an input buffer having a non-inverting input and an inverting input and coupled between the upper cascode circuit and the lower cascode circuit. A third set of chopper circuits is configured to modulate the current at the non-inverting and inverting inputs. The current feedback amplifier further includes first and second phase detector circuits configured to conduct current in response to a transition current through at least one of the upper current mirrors and the lower current mirrors. The current feedback amplifier further includes a logic circuit having inputs coupled to the first and second phase detector circuits. The logic circuit is operable to output a logic 1 (one) if at least one of the first and second phase detectors conducts current, and the logic circuit is operable to output a logic 0 (zero) if neither of the first and second phase detectors conducts current. The current feedback amplifier further includes a switched-capacitor filter having an input coupled to the outputs of the upper current mirrors and the lower current mirrors and an input coupled to the output of the logic circuit. The switched-capacitor filter is configured to be closed in response to a logic 1 (one) and open in response to a logic 0 (zero). The switched-capacitor filter generates a first filtered signal. The current feedback amplifier further includes an output stage having an input coupled to receive the first filtered signal and configured to generate an output signal for the current feedback amplifier.

[0005] In another aspect of the present disclosure, a current feedback amplifier includes an input buffer having a non-inverting input and an inverting input. A first set of chopper circuits is configured to modulate the current at the non-inverting and inverting inputs. The current feedback amplifier further includes a plurality of current mirrors coupled to the input buffer. A second set of chopper circuits is configured to modulate the current through the current mirrors. The current feedback amplifier further includes a phase detector circuit coupled to the current mirrors and configured to detect a transition current through the current mirrors. The current feedback amplifier further includes a switched-capacitor filter having an input coupled to the output of the current mirrors. The switched-capacitor filter is closed in response to the phase detector circuit's detection of the transition current. The switched-capacitor filter is configured to generate a first filtered signal. The current feedback amplifier further includes an output stage having an input coupled to receive the first filtered signal and configured to generate an output signal for the current feedback amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 Shows a functional block diagram of a current feedback amplifier according to the disclosed embodiments.

[0007] Figure 2 Shows a current feedback amplifier according to the disclosed embodiments.

[0008] Figure 3 Shows Figure 2 the output waveform of the current feedback amplifier. Detailed implementation

[0009] In this document, various embodiments of the present disclosure may be described in terms of devices and functional components. The functional components may be implemented by any number of hardware or structural components configured to perform specific functions. For example, embodiments may employ integrated components such as buffers, current mirrors, choppers, phase detectors, and logic devices including transistors, resistors, capacitors, diodes, etc., the values of which may be appropriately configured for various intended purposes. Exemplary embodiments may be practiced in any integrated circuit application. For illustrative purposes only, exemplary embodiments may be described herein in connection with a current feedback amplifier within an integrated circuit.

[0010] Figure 1 Shows a functional block diagram of a current feedback amplifier 100 according to the disclosed embodiments. The current feedback amplifier 100 generally includes an input buffer 104 that provides a non-inverting input INP and an inverting input INN. A chopper circuit 108 is coupled to the input buffer 104 to modulate the current to a lower offset voltage at the input terminal.

[0011] Referring Figure 1 , the current feedback amplifier 100 includes a mirroring circuit 112 configured to mirror the current from the input buffer 104. A chopper circuit 116 is coupled to the mirroring circuit 112 to modulate the current in the mirroring circuit 112. A filter 128 is added to the signal path to filter the ripple noise caused by the chopping action of the chopper circuit. The filter 128 may include a switched-capacitor type filter.

[0012] The current feedback amplifier 100 includes a phase detector circuit 120 configured to detect a transition current in the mirror circuit 112. In response to the phase detector circuit 120 detecting the transition current, the logic circuit 124 turns off the filter 128 by closing a plurality of switches in the filter 128. If the phase detector circuit 120 does not detect a transition current in the mirror circuit 112, the switches are operated (i.e., switched) at an appropriate frequency. The current feedback amplifier 100 includes an output stage 132 having an input coupled to receive the filtered signal from the filter 128 and providing an output signal Vout for the current feedback amplifier 100. A feedback resistor 136 is coupled between the output and the inverting input INN to provide a feedback loop.

[0013] Figure 2 A current feedback amplifier 200 in accordance with the disclosed embodiments is shown. The current feedback amplifier 200 generally includes an input buffer 204, an upper current mirror M1, M2, a lower current mirror M3, M4, first and second phase detectors P1, P2, and an output stage 208.

[0014] Referring again to Figure 2 , the input buffer 204 includes a pair of NMOS transistors Q1 and Q2 and a pair of PMOS transistors Q3 and Q4 connected in a configuration that provides a non-inverting input INP and an inverting input INN. The chopper circuits CH1-CH4 modulate the currents through the non-inverting input INP and the inverting input INN to a lower offset voltage at the input terminals. The NMOS transistors Q1 and Q2 and the PMOS transistors Q3 and Q4 drive the upper current mirror M1, M2 and the lower current mirror M3, M4, which provide mirrored currents to the output stage 208.

[0015] The upper current mirror M1, M2 is coupled between a DC voltage source Vcc and an upper cascode 212. The upper current mirror M1 includes PMOS transistors Q5-Q8, and the upper current mirror M2 includes PMOS transistors Q9-Q12.

[0016] The chopper circuits CH5-CH8 modulate the current through the upper current mirror M1, and the chopper circuits CH9-CH12 modulate the current through the upper current mirror M2. The chopper circuits CH13-CH16 modulate the current through the upper cascode 212.

[0017] The lower current mirrors M3 and M4 are coupled between ground and the lower cascode 216. The lower current mirror M3 includes NMOS transistors Q13 - Q16, and the lower current mirror M4 includes NMOS transistors Q17 - Q20. The chopper circuits CH17 - CH24 modulate the current passing through the lower current mirrors M3 and M4. The chopper circuits CH25 - CH28 modulate the current passing through the lower cascode 216. The input buffer 204 is coupled between the upper cascode 212 and the lower cascode 216. The upper cascode 212 and the lower cascode 216 reduce the channel error in the input buffer 204, thereby increasing the accuracy of the upper current mirrors M1, M2 and the lower current mirrors M3, M4.

[0018] The upper current mirrors M1, M2 and the lower current mirrors M3, M4 can include any configuration that mirrors the current from the input buffer 204 to the output stage 208. The output stage 208 can include any output buffer configuration for providing an output signal to the current feedback amplifier 200.

[0019] Reference Figure 2 , the non - inverting input INP is the high - impedance input of the input buffer 204, while the inverting input INN is its low - impedance output. The input buffer 204 allows the error current to flow into or out of the inverting input INN, and the unity gain forces the inverting input INN to track the non - inverting input INP. The error current is mirrored to a high - impedance node, where it is converted to a voltage and buffered at the output.

[0020] Due to the mismatch of NMOS and PMOS devices in the gain stage of the current feedback amplifier 200, an offset voltage is formed at the input buffer 204. The offset voltage is amplified by the gain stage of the current feedback amplifier 200. To reduce the offset voltage, the chopper circuits independently modulate the current passing through the transistors. However, due to the chopping of the chopper circuits, ripple noise is generated, and the ripple noise is filtered by a switched - capacitor filter 220 (also known as a ripple filter) in the signal path before the output stage 208. The switched - capacitor filter 220 generates a filtered signal, which is applied to the input of the output stage 208. The switched - capacitor filter 220 includes switches S1, S2, S3 and S4 and capacitors C1, C2 and C3.

[0021] Although the switched - capacitor filter 220 is effective in reducing the ripple noise created by the chopper, the switches S1, S2, S3 and S4 and the capacitors C1, C2 and C3 act as an R - C equivalent filter defined by the switching frequency. As a result, the filter 220 reduces the slew rate of the current feedback amplifier 200 by adding latency to the signal path. The effect is a reduced high - to - low and low - to - high transition response of the current feedback amplifier 200.

[0022] To address the conversion rate reduction caused by the filter 220, a first phase detector P1 and a second phase detector P2 are provided within the signal path. The first phase detector P1 includes PMOS transistors Q30, Q32 and NMOS transistors Q34, Q35. The second phase detector P2 includes PMOS transistors Q36, Q37 and NMOS transistors Q38, Q39. The first phase detector P1 and the second phase detector P2 detect the transition currents in the upper and lower current mirrors M1, M2, M3 and M4. In response to a current transition from high to low or from low to high in the current mirror, at least one of the first phase detector P1 and the second phase detector P2 conducts current.

[0023] The first phase detector P1 and the second phase detector P2 can include any configuration for detecting the transition currents in the current mirrors M1, M2, M3 and M4. For example, the first phase detector P1 and the second phase detector P2 can be configured as phase comparators that generate an output signal representing the phase difference between an input signal and a reference signal.

[0024] The current feedback amplifier 200 includes a logic circuit 232 coupled to the first phase detector P1 and the second phase detector P2. The logic circuit 232 includes a current mirror M5 for mirroring the current from the first phase detector P1, and includes a current mirror M6 for mirroring the current from the second phase detector P2. Resistors R1 and R2 are coupled to the respective current mirrors M5 and M6 and to ground. In response to the current flowing in the current mirror M5 and / or M6, a voltage appears across the resistor R1 and / or R2.

[0025] The logic circuit 232 includes a logic OR gate 236 having inputs coupled to the current mirrors M5, M6 and the resistors R1, R2. In response to the voltage across the resistor R1 and / or R2, the OR gate 236 outputs a logic 1 (1). If no current flows through R1 and R2, the OR gate 236 outputs a logic 0 (0). Thus, if the phase detector P1 and / or the phase detector P2 detects a transition current in any of the current mirrors M1, M2, M3 and M4, the logic circuit 232 outputs a logic 1 (1), and if the phase detectors P1, P2 do not detect a transition current in any of the current mirrors, the logic circuit 232 outputs a logic 0 (0).

[0026] According to the disclosed embodiments, the operation of filter 220 is controlled by logic circuit 232. If logic circuit 232 outputs a logic 1 (high) in response to detecting a transition current in at least one of current mirrors M1, M2, M3, and M4, switches S1, S2, S3, and S4 are closed, which turns off the switched-capacitor filter. If logic circuit 232 outputs a logic zero (low) in response to not detecting a transition current in any of current mirrors M1, M2, M3, and M4, switches S1, S2, S3, and S4 operate (i.e., switch) at an appropriate frequency. Thus, when there is a transition current through any of current mirrors M1, M2, M3, and M4, filter 220 stops operating as a switched-capacitor filter and operates as a switched-capacitor filter only during time periods when there is no transition current. The effect is an improved slew rate of current feedback amplifier 200.

[0027] Output stage 208 has an input coupled to receive the filtered signal from filter 220. Capacitor C4 is coupled between the output and the input of output stage 208. Feedback resistor R3 is coupled between the output of current feedback amplifier 200 and the inverting input INN. Feedback resistor R3 forms a feedback loop and determines the overall gain of current feedback amplifier 200. Output stage 208 is configured to provide an output signal Vout for current feedback amplifier 200.

[0028] According to the disclosed embodiments, bias current source Ib is coupled between the drains of PMOS transistor Q7 and NMOS transistor Q13. Bias current source Ib compensates for any current flowing through the inverting input INN of input buffer 204 due to mismatches between the NMOS and PMOS transistors in current feedback amplifier 200.

[0029] Figure 3 Output waveform 304 of current feedback amplifier 200 and output waveform 308 of a non-chopped-stabilized current feedback amplifier are shown. During the transition from high to low, the slew rate of waveform 304 is greater than the slew rate of waveform 308. Thus, current feedback amplifier 200 demonstrates an improved slew rate in response to a square-wave input.

[0030] Within the scope of the present disclosure, variations of current feedback amplifier 200 are possible. For example, current feedback amplifier 200 can be modified such that cascode amplifiers 212, 216 are not included. Thus, in some variations within the scope of the present disclosure, input buffer 204 can be directly coupled to current mirrors M1, M2, M3, and M4.

[0031] Various illustrative components, blocks, modules, circuits, and steps have been described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. The described functionality may be implemented in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0032] For simplicity and clarity, not all of the complete structure and operation of all systems applicable to the present disclosure have been depicted or described herein. Instead, only most of the systems that are unique to or necessary for understanding the present disclosure have been depicted and described.

Claims

1. A current feedback amplifier, comprising: An input buffer having a non-inverting input and an inverting input, the non-inverting input and the inverting input having a first set of chopper circuits configured to modulate currents at the non-inverting input and the inverting input; A plurality of upper current mirrors coupled between a voltage source and the input buffer, the upper current mirrors having a second set of chopper circuits configured to modulate currents in the upper current mirrors; A plurality of lower current mirrors coupled between the input buffer and ground, the lower current mirrors having a third set of chopper circuits configured to modulate currents in the lower current mirrors; A first phase detector circuit and a second phase detector circuit configured to conduct current in response to a transition current in at least one of the upper current mirrors and the lower current mirrors; A logic circuit having inputs coupled to the first phase detector circuit and the second phase detector circuit, and outputting a logic 1 if at least one of the first phase detector and the second phase detector conducts current, and outputting a logic 0 if neither the first phase detector nor the second phase detector conducts current; A switched-capacitor filter having an input coupled to outputs of the upper current mirrors and the lower current mirrors, and an input coupled to an output of the logic circuit, the switched-capacitor filter configured to be closed in response to the logic 1 and opened in response to the logic 0, the switched-capacitor filter configured to generate a first filtered signal; And An output stage having an input coupled to receive the first filtered signal and configured to generate an output signal for the current feedback amplifier.

2. The current feedback amplifier according to claim 1, wherein the switched-capacitor filter comprises a plurality of switches, and wherein the switches are closed in response to the logic 1.

3. The current feedback amplifier according to claim 1, further comprising a feedback resistor coupled between the output of the current feedback amplifier and the inverting input.

4. The current feedback amplifier according to claim 1, further comprising a bias current source coupled between the upper current mirrors and the lower current mirrors.

5. The current feedback amplifier according to claim 1, wherein the input buffer comprises a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, and a second PMOS transistor, and wherein the input buffer is configured to drive the upper current mirrors and the lower current mirrors.

6. The current feedback amplifier according to claim 1, wherein the upper current mirrors comprise a plurality of PMOS transistors, and wherein the lower current mirrors comprise a plurality of NMOS transistors, and wherein the upper current mirrors and the lower current mirrors are configured to mirror currents from the input buffer to the output stage.

7. The current feedback amplifier according to claim 1, wherein the logic circuit further comprises: A first current mirror configured to mirror a current from the first phase detector; A second current mirror configured to mirror a current from the second phase detector; And An OR gate having inputs coupled to the first current mirror and the second current mirror, wherein the OR gate outputs the logic 1 in response to a current in at least one of the first current mirror and the second current mirror, and outputs the logic 0 in the absence of current in the first current mirror and the second current mirror.

8. The current feedback amplifier according to claim 1, further comprising a capacitor coupled between the output of the output stage and the input.

9. A current feedback amplifier comprising: A plurality of upper current mirrors coupled between a voltage source and an upper cascode circuit, the upper current mirrors and the upper cascode circuit having a first set of chopper circuits configured to modulate the current passing through the upper current mirrors and the upper cascode circuit; A plurality of lower current mirrors coupled between a lower cascode circuit and ground, the lower current mirrors and the lower cascode circuit having a second set of chopper circuits configured to modulate the current in the lower current mirrors and the lower cascode circuit; An input buffer having a non-inverting input and an inverting input and coupled between the upper cascode circuit and the lower cascode circuit, the non-inverting input and the inverting input having a third set of chopper circuits configured to modulate the current at the non-inverting input and the inverting input; A first phase detector circuit and a second phase detector circuit configured to conduct current in response to a transition current in at least one of the upper current mirror and the lower current mirror; A logic circuit having inputs coupled to the first phase detector circuit and the second phase detector circuit, and outputting the logic 1 if at least one of the first phase detector and the second phase detector conducts current, and outputting the logic 0 if neither the first phase detector nor the second phase detector conducts current; A switched-capacitor filter having an input coupled to the outputs of the upper current mirror and the lower current mirror and an input coupled to the output of the logic circuit, the switched-capacitor filter configured to be closed in response to the logic 1 and open in response to the logic 0, the switched-capacitor filter configured to generate a first filtered signal; And An output stage having an input coupled to receive the first filtered signal and configured to generate an output signal for the current feedback amplifier.

10. The current feedback amplifier according to claim 9, wherein the switched-capacitor filter includes a plurality of switches, and wherein the switches close in response to the logic 1.

11. The current feedback amplifier according to claim 9, further comprising a feedback resistor coupled between the output of the current feedback amplifier and the inverting input.

12. The current feedback amplifier according to claim 9, further comprising a bias current source coupled between the upper current mirror and the lower current mirror.

13. The current feedback amplifier according to claim 9, wherein the input buffer includes a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, and a second PMOS transistor, and wherein the input buffer is configured to drive the upper current mirror and the lower current mirror.

14. The current feedback amplifier according to claim 9, wherein the upper current mirror includes a plurality of PMOS transistors, and wherein the lower current mirror includes a plurality of NMOS transistors, and wherein the upper current mirror and the lower current mirror are configured to mirror the current from the input buffer to the output stage.

15. The current feedback amplifier according to claim 9, wherein the logic circuit further comprises: a first current mirror configured to mirror the current from the first phase detector; a second current mirror configured to mirror the current from the second phase detector; and an OR gate having inputs coupled to the first current mirror and the second current mirror, wherein the OR gate outputs a logic 1 in response to the current in at least one of the first current mirror and the second current mirror, and outputs a logic 0 in the absence of current in the first current mirror and the second current mirror.

16. A current feedback amplifier comprising: an input buffer having a non-inverting input and an inverting input, the non-inverting input and the inverting input having a first set of chopper circuits configured to modulate the current at the non-inverting input and the inverting input; a plurality of current mirrors coupled to the input buffer, the current mirrors having a second set of chopper circuits configured to modulate the current in the current mirrors; a phase detector circuit coupled to the current mirrors and configured to detect whether there is a transition current in the current mirrors; a switched-capacitor filter having an input coupled to the output of the current mirrors, wherein the switched-capacitor filter is turned off in response to the phase detector circuit detecting the transition current, and the switched-capacitor filter is configured to generate a first filtered signal; and an output stage having an input coupled to receive the first filtered signal and configured to generate an output signal for the current feedback amplifier.

17. The current feedback amplifier according to claim 16, further comprising a logic circuit having an input coupled to the phase detector circuit, and outputting a logic 1 in response to the phase detector circuit detecting the transition current, and outputting a logic 0 in the absence of the phase detector circuit detecting the transition current.

18. The current feedback amplifier according to claim 16, further comprising a feedback resistor coupled between the output of the current feedback amplifier and the inverting input.

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