Built-in UHF frequency reduction circuit and frequency converter

Abstract

The present invention discloses a built-in UHF frequency reduction circuit and frequency reducer, including a satellite signal receiving circuit, a ground wave signal receiving circuit and a signal output interface, wherein the satellite signal receiving circuit includes a primary amplifier I, a primary amplifier II, a secondary amplifier I, a bandpass microstrip filter, a phase lock and a frequency selection circuit I, the ground wave signal receiving circuit includes a primary amplifier III, a secondary amplifier II and a frequency selection circuit II, and the signal output interface is respectively connected to the output end of the frequency selection circuit I and the output end of the frequency selection circuit II. The circuit of the present invention can receive satellite TV signals and ground wave TV signals, does not need to add an additional UHF amplifier, is convenient to use, and the ground antenna is connected to the primary amplifier III and the secondary amplifier II, which is conducive to improving the amplification strength of the ground signal.

Description

Technical Field

[0001] The present invention relates to the technical field of frequency reducers, and in particular to a built-in UHF frequency reducer circuit and a frequency reducer. Background Art

[0002] With the advancement of science and technology and the improvement of living standards, televisions have become popular around the world. With the development of communication technology, the proportion of households with televisions that watch satellite TV is increasing, and the downconverter is one of the necessary equipment for watching satellite TV. However, the existing downconverter only has the function of receiving satellite signals. In fact, in addition to watching TV programs and radio programs through satellite signals, you can also watch TV programs and radio programs through terrestrial signals. The resources of terrestrial wave signals are very rich. At present, there are still many countries and regions that transmit TV programs and radio programs within the bandwidth of UHF (ultra-high frequency) and VHF (very high frequency). When the existing downconverter receives satellite TV signals, if you want to receive terrestrial TV signals and radio signals, you need to add additional UHF or VHF amplifiers, switch converters and other equipment, which is inconvenient to use and costly. Summary of the invention

[0003] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides a built-in UHF frequency reduction circuit and frequency reducer, which can receive satellite TV signals and terrestrial TV signals.

[0004] In the first aspect, the built-in UHF frequency reduction circuit according to the embodiment of the present invention includes a first-stage amplifier I, whose input end is used to connect to a horizontally polarized antenna; a first-stage amplifier II, whose input end is used to connect to a vertically polarized antenna; a second-stage amplifier I, whose input end is respectively connected to the output end of the first-stage amplifier I and the output end of the first-stage amplifier II; a bandpass microstrip filter, whose input end is connected to the output end of the second-stage amplifier I; a phase lock, whose input end is connected to the output end of the bandpass microstrip filter; a frequency selection circuit I, whose input end is connected to the output end of the phase lock; a first-stage amplifier III, whose input end is used to connect to a ground antenna; a second-stage amplifier II, whose input end is connected to the output end of the first-stage amplifier III; a frequency selection circuit II, whose input end is connected to the output end of the second-stage amplifier II; and a signal output interface, which is respectively connected to the output end of the frequency selection circuit I and the output end of the frequency selection circuit II.

[0005] The built-in UHF frequency reduction circuit according to the embodiment of the present invention has at least the following beneficial effects:

[0006] The circuit of the present invention can receive satellite TV signals and terrestrial TV signals without the need for an additional UHF amplifier, and is easy to use. The ground antenna is connected to the primary amplifier III and the secondary amplifier II, which is beneficial to improving the amplification strength of the ground signal.

[0007] According to some embodiments of the present invention, the first-level amplifier I and the first-level amplifier II each include a MOS tube, the gate of the MOS tube is connected to a first current limiting resistor, and is connected to the first power supply output end of the phase lock through the first current limiting resistor, the first current limiting resistor is also connected to a first filter capacitor, and is grounded through the first filter capacitor, the source of the MOS tube is grounded, the drain of the MOS tube is connected to the second power supply output end of the phase lock, the MOS tube is connected to a second filter capacitor, and is grounded through the second filter capacitor, and the drain of the MOS tube is also connected to the secondary amplifier I.

[0008] According to some embodiments of the present invention, a first microstrip inductor is connected in series between the gate of the MOS tube and the first current limiting resistor, and a second microstrip inductor is connected in series between the drain of the MOS tube and the second power supply output terminal of the phase lock.

[0009] According to some embodiments of the present invention, the input end of the secondary amplifier I is connected to a microstrip duplexer, and is respectively connected to the primary amplifier I and the primary amplifier II through the microstrip duplexer.

[0010] According to some embodiments of the present invention, a ceramic filter is connected in series between the phase lock and the frequency selection circuit I.

[0011] According to some embodiments of the present invention, the first-stage amplifier III and the second-stage amplifier II respectively include a triode, the base of the triode is connected to a first coupling capacitor and is connected to a previous-stage circuit through the first coupling capacitor, the base of the triode is also connected to a second current limiting resistor and is connected to a working voltage through the second current limiting resistor, the emitter of the triode is grounded, the collector of the triode is connected to a third microstrip inductor and is connected to a third current limiting resistor through the third microstrip inductor, the third current limiting resistor is connected to the working voltage, the collector of the triode is also connected to a second coupling capacitor and is connected to a subsequent-stage circuit through the second coupling capacitor.

[0012] According to some embodiments of the present invention, a potentiometer is connected between the primary amplifier III and the secondary amplifier II.

[0013] According to some embodiments of the present invention, the frequency selection circuit II includes an inductor L2 and capacitors C22, C24, C23, C28 and C27 connected in series, the inductor L2 is connected in parallel to both ends of the capacitor C28, and the fourth microstrip inductor L17 and the fifth microstrip inductor L18 are connected in parallel to both ends of the capacitor C24 and the capacitor C27, respectively.

[0014] According to some embodiments of the present invention, the built-in UHF frequency reduction circuit also includes a voltage stabilizing circuit, the input end of the voltage stabilizing circuit is connected to a magnetic core inductor L1, and is connected to the signal output interface through the magnetic core inductor L1, and the output end of the voltage stabilizing circuit is respectively connected to the phase lock, the first-level amplifier III and the second-level amplifier II.

[0015] In a second aspect, a built-in UHF downconverter according to an embodiment of the present invention includes the above-mentioned built-in UHF downconverter circuit.

[0016] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0018] Figure 1 It is a principle block diagram of a built-in UHF frequency reduction circuit according to an embodiment of the present invention;

[0019] Figure 2 The figure is a circuit schematic diagram of a built-in UHF frequency reduction circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0021] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of first, second, I, II, III, it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0022] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0023] Please refer to Figure 1The present embodiment discloses a built-in UHF frequency reduction circuit, including a satellite signal receiving circuit, a ground wave signal receiving circuit and a signal output interface 300, wherein the satellite signal receiving circuit includes a primary amplifier I 110, a primary amplifier II 120, a secondary amplifier I 130, a bandpass microstrip filter 140, a phase lock 150 and a frequency selection circuit I 160, the input end of the primary amplifier I 110 is used to connect the horizontal polarization antenna 111, the input end of the primary amplifier II 120 is used to connect the vertical polarization antenna 112, the input end of the secondary amplifier I 130 is respectively connected to the output end of the primary amplifier I 110 and the output end of the primary amplifier II 120, the input end of the bandpass microstrip filter 140 is connected to the output end of the secondary amplifier I 130, the input end of the phase lock 150 is connected to the output end of the bandpass microstrip filter 140, and the input end of the frequency selection circuit I 160 is connected to the output end of the phase lock 150; the ground wave signal receiving circuit includes a primary amplifier III 210, a secondary amplifier II 210, a secondary amplifier II 210, a secondary amplifier I 220, a secondary amplifier I 23 ... 220 and frequency selection circuit II 230, the input end of the first-stage amplifier III 210 is used to connect to the ground antenna 211, the input end of the second-stage amplifier II 220 is connected to the output end of the first-stage amplifier III 210, and the input end of the frequency selection circuit II 230 is connected to the output end of the second-stage amplifier II 220; the signal output interface 300 is respectively connected to the output end of the frequency selection circuit I 160 and the output end of the frequency selection circuit II 230.

[0024] The first-level amplifier I 110 and the first-level amplifier II 120 receive satellite TV signals through the horizontal polarization antenna 111 and the vertical polarization antenna 112 respectively, and can switch between the horizontal polarization mode and the vertical polarization mode according to actual needs. The first-level amplifier III 210 receives terrestrial wave TV signals, such as UHF band signals, through the ground antenna 211. According to actual application needs, it can switch between satellite TV signals and terrestrial wave TV signals, which greatly enriches TV programs and radio programs. The frequency reduction circuit of this embodiment does not require an additional UHF amplifier, which is easy to use, and can avoid the cumbersome installation and mismatch between equipment and accessories caused by the different specifications, quality and amplification factors of the accessories of the external UHF amplifier on the market, which is conducive to improving user experience. The ground antenna 211 of this embodiment is connected to the first-level amplifier III 210 and the second-level amplifier II 220, which can amplify up to 30dB, has high-intensity amplification performance, and is conducive to improving the amplification intensity of the terrestrial signal.

[0025] Please refer to Figure 2In some embodiments, the first-stage amplifier I 110 and the first-stage amplifier II 120 each include a MOS tube, such as a MOS tube Q1 and a MOS tube Q2, the gate of the MOS tube is connected to a first current limiting resistor, such as a resistor R2 and a resistor R1, and is connected to the first power supply output end of the phase lock 150 through the first current limiting resistor, the first current limiting resistor is also connected to a first filter capacitor, such as a capacitor C2 and a capacitor C1, and is grounded through the first filter capacitor, the source of the MOS tube is grounded, the drain of the MOS tube is connected to the second power supply output end of the phase lock 150, the MOS tube is connected to a second filter capacitor, such as a capacitor C3 and a capacitor C6, and is grounded through the second filter capacitor, and the drain of the MOS tube is also connected to the second-stage amplifier I 130. In this embodiment, the gate and drain voltages of the MOS tube are both level-controlled by the phase lock 150, which is beneficial to adjusting the power of the primary amplifier I 110 and the primary amplifier II 120, thereby reducing the power consumption of the frequency reduction circuit and the frequency reducer, and can also reduce the signal crosstalk between the primary amplifier I 110 and the primary amplifier II 120, thereby improving the isolation between the horizontal polarization and the vertical polarization.

[0026] Please refer to Figure 2 In order to improve the anti-interference ability of the circuit, a first microstrip inductor, such as inductor L11 and inductor L12, is connected in series between the gate of the MOS tube and the first current limiting resistor, and a second microstrip inductor, such as inductor L13 and inductor L14, is connected in series between the drain of the MOS tube and the second power supply output end of the phase lock 150. The first microstrip inductor and the second microstrip inductor can reduce the influence of the interference signal on the MOS tube, which is beneficial to improving the stability of the first-stage amplifier I 110 and the first-stage amplifier II 120.

[0027] Please refer to Figure 2 The input end of the secondary amplifier I 130 is connected to a microstrip duplexer 131, and is respectively connected to the primary amplifier I and the primary amplifier II 120 through the microstrip duplexer 131. The satellite TV signal is amplified by the primary amplifier I 110 or the primary amplifier II 120 and then transmitted to the microstrip duplexer 131. The microstrip duplexer 131 integrates the horizontal polarization signal and the vertical polarization signal and outputs them to the secondary amplifier I 130 for secondary amplification. The microstrip duplexer 131 can be implemented by wiring on a circuit board, which can save component cost and wiring space, and is conducive to reducing cost and design difficulty.

[0028] Please refer to Figure 2 A ceramic filter 161 is connected in series between the phase lock 150 and the frequency selection circuit 1 160. In this embodiment, the RF transmission end adopts a bandpass microstrip filter 140, and the intermediate frequency output end adopts a ceramic filter 161, which can filter interference signals of some bands, such as 5G signals, and is conducive to improving the anti-interference ability of the circuit.

[0029] Please refer to Figure 2 In some embodiments, the first-stage amplifier III 210 and the second-stage amplifier II 220 each include a triode, such as a triode Q5 and a triode Q4, the base of the triode is connected to a first coupling capacitor, such as a capacitor C25 and a capacitor C26, and is connected to the front-stage circuit through the first coupling capacitor, the base of the triode is also connected to a second current limiting resistor, such as a resistor R12 and a resistor R11, and is connected to the working voltage through the second current limiting resistor, and the working voltage is provided by the voltage stabilizing chip IC2, the emitter of the triode is grounded, the collector of the triode is connected to a third microstrip inductor, such as an inductor L15 and an inductor L16, and is connected to a third current limiting resistor, such as a resistor R9 and a resistor R10, through the third microstrip inductor, the third current limiting resistor is connected to the working voltage, the collector of the triode is also connected to a second coupling capacitor, such as a capacitor C17 and a capacitor C22, and is connected to the back-stage circuit through the second coupling capacitor. The first coupling capacitor and the second coupling capacitor can filter out the DC interference signal in the circuit, and the third microstrip inductor can filter out the interference of the input AC component on the transistor collector, which is beneficial to improving the anti-interference ability and stability of the circuit.

[0030] In actual use, since the external amplifier needs to select an external amplifier with different amplification factors according to factors such as user-end allocation and cable signal loss, it is very difficult for users without professional knowledge to replace the external amplifier. In this embodiment, a potentiometer 221 is connected between the first-level amplifier III 210 and the second-level amplifier II 220, and the intensity of the output signal can be flexibly adjusted according to different signal environments, which is beneficial to avoid amplification saturation and ensure the required amplification power.

[0031] Please refer to Figure 2 The frequency selection circuit II 230 includes an inductor L2 and capacitors C22, C24, C23, C28 and C27 connected in series, the inductor L2 is connected in parallel to both ends of the capacitor C28, and the fourth microstrip inductor L17 and the fifth microstrip inductor L18 are connected in parallel to both ends of the capacitor C24 and the capacitor C27, respectively. By adjusting the parameters of the capacitor and the inductor according to different application requirements, the output signal frequency of the frequency selection circuit II 230 can be adjusted, which is conducive to improving the flexibility of using the frequency reduction circuit.

[0032] Please refer to Figure 2The built-in UHF frequency reduction circuit also includes a voltage stabilizing circuit 400. The input end of the voltage stabilizing circuit 400 is connected to a magnetic core inductor L1, and is connected to the signal output interface 300 through the magnetic core inductor L1. The output end of the voltage stabilizing circuit 400 is respectively connected to the phase lock 150, the first-level amplifier III 210 and the second-level amplifier II 220. The magnetic core inductor L1 can isolate the satellite TV signal and the terrestrial TV signal to avoid signal crosstalk, which is beneficial to improving the signal isolation. The magnetic core inductor L1 can also reduce the influence of the satellite TV signal and the terrestrial TV signal on the voltage stabilizing circuit 400, reduce interference signals, and is beneficial to improving the stability of the working voltage.

[0033] The embodiment of the present invention also discloses a built-in UHF downconverter, including the above-mentioned built-in UHF downconverter circuit, which can receive satellite TV signals and terrestrial TV signals without the need for an additional UHF amplifier, and is easy to use. The ground antenna 211 is connected to the first-level amplifier III 210 and the second-level amplifier II 220, which is conducive to improving the amplification strength of the ground signal.

[0034] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the relevant technical field without departing from the purpose of the present invention.

Claims

1. A built-in UHF frequency reduction circuit, characterized in that: include: A first-stage amplifier I (110), the input end of which is used to connect to a horizontally polarized antenna (111); A first-stage amplifier II (120), the input end of which is used to connect to the vertically polarized antenna (112); A secondary amplifier I (130), the input end of which is respectively connected to the output end of the primary amplifier I (110) and the output end of the primary amplifier II (120); A bandpass microstrip filter (140), the input end of which is connected to the output end of the secondary amplifier I (130); A phase lock (150), the input end of which is connected to the output end of the bandpass microstrip filter (140); A frequency selection circuit I (160), the input end of which is connected to the output end of the phase lock (150); A first-stage amplifier III (210), whose input end is used to connect to a ground antenna (211); A secondary amplifier II (220), the input end of which is connected to the output end of the primary amplifier III (210); A frequency selection circuit II (230), the input end of which is connected to the output end of the secondary amplifier II (220); The signal output interface (300) is connected to the output end of the frequency selection circuit I (160) and the output end of the frequency selection circuit II (230) respectively.

2. The built-in UHF frequency reduction circuit according to claim 1, characterized in that: The first-stage amplifier I (110) and the first-stage amplifier II (120) each comprise a MOS tube, wherein the gate of the MOS tube is connected to a first current limiting resistor and is connected to a first power supply output terminal of the phase lock (150) via the first current limiting resistor, the first current limiting resistor is also connected to a first filter capacitor and is grounded via the first filter capacitor, the source of the MOS tube is grounded, the drain of the MOS tube is connected to a second power supply output terminal of the phase lock (150), the MOS tube is connected to a second filter capacitor and is grounded via the second filter capacitor, and the drain of the MOS tube is also connected to the second-stage amplifier I (130).

3. The built-in UHF frequency reduction circuit according to claim 2, characterized in that: A first microstrip inductor is connected in series between the gate of the MOS tube and the first current limiting resistor, and a second microstrip inductor is connected in series between the drain of the MOS tube and the second power supply output end of the phase lock (150).

4. The built-in UHF frequency reduction circuit according to claim 1, characterized in that: The input end of the secondary amplifier I (130) is connected to a microstrip duplexer (131), and is respectively connected to the primary amplifier I (110) and the primary amplifier II (120) through the microstrip duplexer (131).

5. The built-in UHF frequency reduction circuit according to claim 1, characterized in that: A ceramic filter (161) is connected in series between the phase lock (150) and the frequency selection circuit I (160).

6. The built-in UHF frequency reduction circuit according to claim 1, characterized in that: The first-stage amplifier III (210) and the second-stage amplifier II (220) each include a triode, wherein the base of the triode is connected to a first coupling capacitor and is connected to a front-stage circuit via the first coupling capacitor, the base of the triode is also connected to a second current-limiting resistor and is connected to a working voltage via the second current-limiting resistor, the emitter of the triode is grounded, the collector of the triode is connected to a third microstrip inductor and is connected to a third current-limiting resistor via the third microstrip inductor, the third current-limiting resistor is connected to the working voltage, the collector of the triode is also connected to a second coupling capacitor and is connected to a rear-stage circuit via the second coupling capacitor.

7. The built-in UHF frequency reduction circuit according to claim 1 or 6, characterized in that: A potentiometer (221) is connected between the first-stage amplifier III (210) and the second-stage amplifier II (220).

8. The built-in UHF frequency reduction circuit according to claim 1, characterized in that: The frequency selection circuit II (230) comprises an inductor L2 and capacitors C22, C24, C23, C28 and C27 connected in series, wherein the inductor L2 is connected in parallel to both ends of the capacitor C28, and both ends of the capacitor C24 and the capacitor C27 are respectively connected in parallel to a fourth microstrip inductor L17 and a fifth microstrip inductor L18.

9. The built-in UHF frequency reduction circuit according to claim 1, characterized in that: It also includes a voltage stabilizing circuit (400), wherein the input end of the voltage stabilizing circuit (400) is connected to a magnetic core inductor L1 and is connected to the signal output interface (300) via the magnetic core inductor L1, and the output end of the voltage stabilizing circuit (400) is respectively connected to the phase lock (150), the first-level amplifier III (210) and the second-level amplifier II (220).

10. A built-in UHF downconverter, characterized in that: The invention comprises a built-in UHF frequency reduction circuit as claimed in any one of claims 1 to 9.

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