Estimation of an unknown electronic load

Abstract

The present disclosure relates to systems and methods related to test and measurement systems, and more particularly to a source measurement unit (SMU) for estimating or identifying a load attached to the SMU. A test and measurement instrument includes a voltage source configured to output a source voltage, a current sensor, and one or more processors. The one or more processors are configured to determine an estimate of the load of an unknown device under test (DUT) connected thereto based on the source voltage, the current sensor, and the voltage of the connected DUT without any prior knowledge of the connected DUT.

Description

[0001] Priority

[0002] This disclosure claims the benefit of U.S. Provisional Application No. 62 / 863,809, filed on June 19, 2019, entitled "Estimation of Unknown Electronic Load", the entire content of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to systems and methods related to test and measurement systems, and particularly to a source measurement unit (SMU) for estimating or identifying a load attached to the SMU. Background Art

[0004] One problem with an SMU is that the circuitry within the SMU used to measure current can interfere with and / or delay an attempt to apply a voltage to a device under test (DUT). Similarly, when attempting to apply a current to the DUT, the DUT can interfere with and / or delay the attempt to apply that current.

[0005] Generally, it is difficult to program and generate an optimal signal response in an SMU because the DUT is provided by the user of the SMU and is thus unknown to the SMU. The DUT can represent one of several different devices, such as resistors, diodes, transistors, capacitors of various sizes, some of which can have time-varying and level-changing characteristics. In the example of a general-purpose SMU, it is usually hardly known what device may ultimately be connected to the SMU.

[0006] Some conventional SMUs will make one or more assumptions about the device, such as specifying a maximum load capacitance, and then use various forms of compensation circuitry to create a loop response that is stable for loads within the assumed parameter(s) in many cases. However, the compensation circuitry itself can introduce undesirable behavior in the SMU.

[0007] Embodiments of the present disclosure address these and other deficiencies of the prior art. Brief Description of the Drawings

[0008] Aspects, features, and advantages of embodiments of the present disclosure will become apparent from the following description of embodiments with reference to the accompanying drawings, in which:

[0009] Figure 1 is an example circuit of a conventional test and measurement instrument with a compensation circuit;

[0010] Figure 2 is an example circuit diagram of a test and measurement instrument for estimating a load according to some embodiments of the present disclosure;

[0011] Figure 3 is a flowchart illustrating an example operation for estimating a load attached to a test and measurement instrument according to some embodiments of the present disclosure;

[0012] Figure 4 is another example circuit diagram of a test and measurement instrument for estimating a load according to some embodiments of the present disclosure;

[0013] Figure 5 is a set of graphs illustrating an example response of SMU load estimation according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0014] Traditionally, when designing an SMU, certain assumptions are made about the load or the DUT attached, such as specifying a maximum capacitive or inductive load. Figure 1 Illustrated is an example of a conventional SMU circuit designed using these assumptions, including a compensation circuit for creating a loop response that is stable for most different types of attached loads or DUTs within the assumed parameters.

[0015] In some embodiments, Figure 1 includes a source V1 100 that is an input to an operational amplifier U1 102. The operational amplifier U1 102 also receives a voltage 104 across the DUT 114, labeled V m . A sense resistor 106 R m is used to measure the current through the DUT 114. A voltage 108 labeled V o is output by the operational amplifier 102. The compensation circuit is represented by capacitors 110 and 112 labeled C c and C min respectively.

[0016] However, the compensation circuit may introduce undesirable behavior in the SMU. For example, capacitor 112 may cause slow settling performance for a DUT with a low current, low capacitance connection. Capacitor 110 may result in a limited bandwidth for current measurement and may also cause current overshoot, which requires the use of capacitor 112 to compensate. Further, when the voltage across the sense resistor 106 changes compared to the various load voltage ranges that can be applied to the DUT 114, the capacitance values of both capacitors 110 and 112 must be changed to maintain an appropriate ratio. If the capacitance values of capacitors 110 and 112 are not changed, then for certain combinations of voltage and current ranges, the performance of the test and measurement instrument will degrade.

[0017] Some methods have been developed to attempt to allow manual tuning of the SMU to account for the actual load of the DUT 114. These methods allow or require manual tuning of the forward integrator gain bandwidth and the feedback compensation zero-pole pair to tune the output response. This requires the user to spend a significant amount of time characterizing the DUT 114, configuring the settings, and then requires changing the configuration for different DUTs or accepting a non-optimal configuration for slightly different DUTs.

[0018] Other methods to maximize SMU performance include generating a test excitation signal and sending the test excitation signal to the DUT 114 to measure the response of the DUT 114 and develop a model of the DUT 114. However, if the DUT 114 is not designed to receive such test signals, these test excitation signals may damage the DUT 114. The selected test excitation signal may also not accurately excite the DUT 114 within the same range that will ultimately be tested during measurement, which may reduce the accuracy of the created model.

[0019] As will be discussed in more detail below, embodiments of the present disclosure employ user-specified test signals and can run in the background while a user test sequence is running to estimate the load of the DUT attached to the test and measurement instrument. That is, embodiments of the present disclosure allow the test and measurement instrument to detect the characteristics of the connected DUT and modify the behavior of the test and measurement instrument to drive the connected DUT. Figure 2 An example circuit diagram of such a system in accordance with an embodiment of the present disclosure is illustrated.

[0020] Figure 2 A simplified example of an SMU connected to a DUT 200 in accordance with an embodiment of the present disclosure is illustrated. The adjustable voltage source 202 provides a voltage V1 to the input of the operational amplifier 204. A feedback loop provided by the current sensor 206 (R m ) causes the other input of the operational amplifier 204 to also reach the value of the voltage V1. Figure 2 The current sensor 206 is illustrated as a sense resistor. However, the current sensor 206 can include any device capable of measuring current, such as but not limited to Hall effect sensors, logarithmic elements, etc. Note that the feedback loop is also the source of the current through the DUT 200. As a result, the voltage drop across the current sensor 206 is proportional to the current through the DUT 200.

[0021] Although not shown, in some embodiments, the operational amplifier 204 is omitted and the voltage V1 is received directly at the current sensor 206 from the voltage source.

[0022] The control and measurement unit 208 may include one or more processors 209, which may direct the adjustable voltage source 202 to output an expected value V1. The control and measurement unit 208 also includes the ability to measure the value of voltage V m 210 and the current through the DUT 200, which may include digitizing the measured values. As those skilled in the art will appreciate, Figure 2 the circuit diagrams illustrated in are simplified circuit diagrams, and the test and measurement instrument may include additional components such as a display 212, a memory 214, and a user input 216. The memory 214 may also store instructions for execution by one or more processors in the control and measurement unit 208 to, for example, perform any methods, operations, and / or associated steps indicated by those instructions. For example, the memory 214 may include instructions for: writing protocols and debugging protocols, including visually displaying the results of protocol definitions for known analog signals. As those of ordinary skill in the art will appreciate, the memory 214 may include one or more memories such as, but not limited to, processor caches, random access memory (RAM), read-only memory (ROM), solid-state memory, (one or more) hard disk drives, or any other memory type.

[0023] The user input 216 is coupled to the control and measurement unit 208. The user input 216 may include a keyboard, a mouse, a trackball, a touch screen, and / or any other controls that a user may use to interact with a graphical user interface (GUI) on the display 212. The display 212 may be a digital screen, a cathode ray tube-based display, or any other monitor for displaying waveforms, measured values, and other data to the user. Additionally, as those skilled in the art will appreciate, there may also be additional components such as one or more analog-to-digital converters.

[0024] The DUT 200 is inherently represented in the control and measurement unit 208 as a resistor 218 in parallel with a capacitor 220. However, as those of ordinary skill in the art will appreciate, the actual attached DUT may have many different electrical components. However, the control and measurement unit 208 models the DUT 200 as a resistor 218 in parallel with a capacitor 220 to estimate the load of the DUT 200, as Figure 2 illustrated therein.

[0025] The assumption of representing the DUT 200 as a parallel resistor 218 and capacitor 220 represents a small-signal linearization for most typical DUTs encountered. Using this simplified model of the SMU and the attached DUT 200, the dynamic equation (1) can be determined, which provides one equation with two unknown components R L and C L where R Lis the resistance of resistor 218 and C L is the capacitance of capacitor 220:

[0026] (1).

[0027] Voltage V o 222 represents the voltage applied by operational amplifier 204 to current sensor 206. As mentioned above, voltage V m 210 represents the voltage at the circuit node between current sensor 206 and DUT 200, and the resistance R of resistor 218 L and the capacitance C of capacitor 220 L are usually unknown.

[0028] As understood by those of ordinary skill in the art, using Equation (1), the error function can be determined. Then, this error function can be used to develop a least squares estimate that minimizes the deviation of the estimates of R L and C L from their true values.

[0029] Applying the least squares method results in two normal equations that should equal zero when the estimates of R L and C L converge to their actual values. The normal equations are as follows:

[0030] (2); and

[0031] (3).

[0032] Theoretically, knowing the values of R m , V m and V c at two discrete and known sampling times would allow the calculation of the unique values of R L and C L However, in actual operation, due to the presence of noise and other interferences that may lead to poor estimates, and the desire to avoid time-consuming multiple iterations in each step or recursion, embodiments of the present disclosure step gradually towards the true value of the estimate in the background while the user test sequence is running.

[0033] The calculation or determination can be run once at each sampling point, and by continuously or repeatedly iterating once at each sampling point, an estimate of R L and C L can be made that ultimately converges to the actual value.

[0034] Figure 3FIG. illustrates a flowchart of an example operation for estimating a connected DUT 200 or load without any prior knowledge of the load of the DUT 200 according to an embodiment of the present disclosure.

[0035] Initially, in operation 300, arbitrary starting values are selected for R L and C L Since ideally these values should be close to the expected values, in some embodiments, the initial arbitrary starting values can be selected by the user using the user input 216 of the test and measurement instrument. However, if no user selection is provided, the control and measurement unit 208 can arbitrarily select a large R L and a small C L , which approximates the condition where the test and measurement output is not connected to any device. The arbitrary values are used only once and the values of R L and C L are updated in each iteration of the illustrated method.

[0036] In operation 302, the values of voltage V o 222 and voltage V m 210 are acquired simultaneously. In some embodiments, the control and measurement unit 208 may know the output of voltage V o 222 and does not need to measure it. Voltage V m 210 can be measured by using an analog-to-digital converter (not shown) designed to measure the voltage across the DUT 200. In operation 302, the values of voltage V o 222 and voltage V m 210 should preferably be time-aligned, as sequential sampling can result in incorrect or poor results.

[0037] In operation 304, calculate . This can be done using equation (4), where is equal to the time between samples of voltage V m 210:

[0038] (4).

[0039] In operation 306, the calculated value, the latest values of R L and C L and the known value R m of the current sensor 206 are used to determine the values of the normal equations (2) and (3) discussed above. In some embodiments, R mThe value is the nominal or calibrated value, which depends on the current range and the specific test and measurement instrument used. However, this value is known in each embodiment. In the case where the current sensor 206 is not a resistor, the measured current value can be algebraically substituted into the normal equation to replace , which represents the measured current value.

[0040] The control and measurement unit 208 determines the next operation based on whether the result of each of the normal equations (2) and (3) is positive or negative. In operation 308, the control and measurement unit 208 determines whether the result of the capacitance equation is positive or negative. In operation 310, if the result of the capacitance equation is negative, the current value of C L is stepped in the negative direction. In operation 312, if the result of the capacitance equation is positive, the current value of C L is stepped in the positive direction.

[0041] For example, if the normal equation (2) is equal to +10000, the value of C L is stepped in the positive direction, for example, from 101 picofarads (pF) to 102 pF. However, if the normal equation (2) is negative, the value of C L is stepped in the negative direction, for example, from 101 pF to 100 pF.

[0042] Similarly, in operation 314, the control and measurement unit 208 determines whether the result of the resistance equation is positive or negative. In operation 316, if the result of the resistance equation is negative, the current value of R L is stepped in the negative direction. In operation 318, if the result of the resistance equation is positive, the current value of R L is stepped in the positive direction.

[0043] The step size to be used is a balance between quickly determining the load of the attached DUT 200 and the errors that may occur due to noise or unmodeled interference. In some embodiments, the step size can be a function of the current estimated values of the parameters R L and C L . For example, if the current value of R L is a large value, a larger step size can be used. When R L becomes smaller, a smaller step size can be used. This can allow for quick convergence with similar relative accuracy over a wide dynamic range. In other embodiments, a predetermined step increment is used regardless of the values of the parameters R L and C L . The predetermined step increment can be automatically set by the control and measurement unit 208, or can be set by the user in the user input 216.

[0044] Once R is adjusted L and C L values, the control and measurement unit 208 returns to operation 302 and proceeds with the new values of R L and C L If there is sufficient excitation signal at the output 222, the estimated values of R L and C L should start to converge to the actual values of the small-signal resistance and capacitance represented by the load. If the assumed and / or estimated values of the two parameters R L and C L differ significantly from the actual values, one value may diverge temporarily until the other value approaches the correct value. Continuing the operation should result in the convergence of the two estimated values.

[0045] In some embodiments, upper and lower limits may be set for the estimated values of R L and C L For example, there may be values for which further changes in R L and C L do not cause a significant change in the system dynamics. There may also be such bounds within which the time constants affected by these values are much slower than the system dynamics or much faster than the sampling period, such that further changes to these values are effectively "constant" or "instantaneous", respectively. If the load characteristics change, limiting the estimates of R L and C L to a finite range can be helpful in ensuring a quick response and also in preventing any problems related to mathematical properties such as quantization errors or division by zero.

[0046] The upper and lower limits may be set by the user. For example, if the user realizes that a device is being tested only between specific ranges of capacitance and / or resistance, the user may set the upper and lower limits based on that information. For example, in other embodiments, the control and measurement unit 208 may set the bounds based on other factors such as the sampling rate.

[0047] The absolute or relative magnitudes of the input signals V o 、V m and the resulting may be tested and used to adjust the step size of R L when the signal is relatively stable or settled, and to adjust C LThe step size. In fact, once the output signal has fully settled, it becomes difficult or impossible to determine the capacitance located in the DUT. A certain degree of noise in the system may help indicate this, but once the system has settled, a certain movement threshold is required to prevent the estimated capacitance value from moving towards zero. Similarly, a certain output bias voltage threshold is required to accurately estimate the DUT resistance value. These tests can help ensure that when the DUT does not have sufficient excitation signal, the estimated value of the load remains stable and does not start to diverge.

[0048] As mentioned above, embodiments of the present disclosure do not require any prior knowledge of the characteristics of the DUT 200 and can develop an estimate representing the linear small-signal model of the attached DUT 200. Further, no specific characterization signal required to determine the characteristics of the DUT 200 is applied. Instead, only the user-specified test signal is used as the excitation for the attached DUT 200, which can prevent damage to the DUT 200 because the user-specified test signal is ensured to be within the range set by the user that will not damage the DUT 200.

[0049] Embodiments of the present disclosure can run in the background while the user test sequence is running, or can occur as a calibration before performing the tests and measurements of the attached DUT 200. This allows for optimizing the performance according to the attached DUT 200, rather than applying a single "typical" characterization and compensation characteristic to a large number of devices, which may cause variations resulting in performance degradation. Once the test and measurement instrument knows the load characteristics, the load characteristics can be used to improve the performance and behavior of the test and measurement instrument for driving the load.

[0050] However, embodiments of the present disclosure are not limited to DUTs that can be represented by a resistor and a capacitor in parallel. In some embodiments, the DUT can be represented by a resistor and a capacitor in series. In other embodiments, an inductive DUT can be represented by a resistor and an inductor in series or a resistor and an inductor in parallel.

[0051] Figure 4 The circuit diagram illustrates the analog DUT 400 having an inductor 402 in series with a resistor 404. Figure 4 Many components of Figure 2 are the same as the components illustrated and discussed above. Accordingly, these components are given the same reference numerals and will not be discussed further in reference to Figure 4 Similarly to Figure 2 , in some embodiments, the operational amplifier 204 can be removed, and the current sensor 206, although depicted as a sense resistor in Figure 4 , can be any device capable of measuring current.

[0052] The current sensed by current sensor 206 is I RM . In Figure 4 , V m is equal to:

[0053] (5).

[0054] Using Equation 5 and applying the same processing as discussed above for Equation 1, the normal equations for the DUT with an inductor and a resistor in series are:

[0055] (6); and

[0056] (7).

[0057] For the case of a resistive current sensor 206, the following Equation (8) can be used for any of Equations (5), (6), or (7):

[0058] (8).

[0059] Similar to the embodiments discussed above, whether the normal equations (6) and (7) are positive or negative will change the direction of the inductor and resistor steps, as Figure 3 discussed. That is, whether the load is modeled as a capacitor and a resistor in parallel or in series, or an inductor and a resistor in parallel or in series, the control and measurement unit 208 can select any starting value for the load, and then based on the current sensor 206 and the measured voltage, the control and measurement unit 208 can step the load towards the actual load value based on whether the normal equation is positive or negative.

[0060] Figure 5 Illustrates a possible example of performance improvement using an embodiment of the present disclosure. Figure 5 Illustrates that there are oscillations and / or overshoots in the initial pulse step on the DUT, and as the estimates of the capacitive load and the resistive load converge towards their actual values, these oscillations and / or overshoots are reduced or eliminated.

[0061] Figure 500 illustrates the set output voltage 502 and the actual output voltage 505 of the test and measurement instrument over time. As can be seen, in the initial pulse, there are overshoots and oscillations in the actual output voltage 505, but as the estimated capacitance 522 in Figure 520 approaches the actual capacitance 525 over time, and the estimated resistance 532 in Figure 530 approaches the actual resistance 535, the actual output voltage 505 approaches the set output voltage 502, with very small overshoots and oscillations.

[0062] The same occurs for the current output by the test and measurement instrument, as illustrated in FIG. 510. As the estimated load value converges to the actual load value over time, the oscillations and overshoots in the actual output current 512 tend to settle between the current limits 514 and 516.

[0063] Aspects of the present disclosure may operate on specially created hardware, firmware, a digital signal processor, or on a specially programmed computer including a processor operating according to programming instructions. The term "controller" or "processor" as used herein is intended to include a microprocessor, a microcomputer, an application specific integrated circuit (ASIC), and a dedicated hardware controller. One or more aspects of the present disclosure may be embodied in computer-usable data and computer-executable instructions, such as in one or more program modules executed by one or more computers (including a monitoring module) or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc., which perform particular tasks or implement particular abstract data types when executed by a processor in a computer or other device. The computer-executable instructions may be stored on a computer-readable storage medium, such as a hard disk, an optical disk, a removable storage medium, a solid state memory, a random access memory (RAM), etc. As will be appreciated by those skilled in the art, the functions of the program modules may be combined or distributed as desired in various aspects. Additionally, the functions may be embodied in whole or in part in firmware or hardware equivalents such as integrated circuits and FPGAs. Specific data structures may be used to more effectively implement one or more aspects of the present disclosure, and such data structures are contemplated within the scope of the computer-executable instructions and computer-usable data described herein.

[0064] In some cases, the disclosed aspects may be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried by or stored on one or more computer-readable storage media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. As discussed herein, a computer-readable medium refers to any medium that can be accessed by a computing device. By way of example and not limitation, a computer-readable medium may include computer storage media and communication media.

[0065] A computer storage medium refers to any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital video disc (DVD) or other optical disc storage devices, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, and any other volatile or non-volatile, removable or non-removable media implemented in any technology. A computer storage medium does not include the signal itself and transient forms of signal transmission.

[0066] A communication medium refers to any medium that can be used for the communication of computer-readable information. By way of example and not limitation, communication media may include coaxial cables, fiber optic cables, air, or any other medium suitable for the communication of electrical, optical, radio frequency (RF), infrared, acoustic or other types of signals.

[0067] Examples

[0068] Illustrative examples of the technologies disclosed herein are provided below. Embodiments of the technologies may include any one or more of the examples described below and any combination of the examples.

[0069] Example 1, a test and measurement instrument, comprising: a voltage source configured to output a source voltage; a current sensor configured to sense a current passing through a connected device under test; and one or more processors configured to determine an estimate of the load of the connected unknown device under test based on the source voltage, the current, and the voltage of the connected unknown device under test.

[0070] Example 2 is the test and measurement instrument of Example 1, wherein the one or more processors are further configured to iteratively determine an estimate of the load.

[0071] Example 3 is the test and measurement instrument of Example 2, wherein the estimate of the load includes an estimate of resistance and capacitance or an estimate of resistance and inductance.

[0072] Example 4 is the test and measurement instrument of Example 3, wherein the one or more processors are further configured to iteratively adjust the value of the resistance based on whether the output of the normal resistance equation is positive or negative, and to adjust the value of the capacitance or inductance based on whether the output of the normal capacitance or inductance equation is positive or negative.

[0073] Example 5 is the test and measurement instrument of Example 4, wherein when the output of the normal resistance equation is positive, the value of the resistance is adjusted upward, and wherein when the output of the normal capacitance or inductance equation is positive, the value of the capacitance or inductance is adjusted upward.

[0074] Example 6 is the test and measurement instrument of Example 5, where the adjustment amount of the value of the resistor is based on the current estimated value of the resistor, and where the adjustment amount of the value of the capacitor or inductor is based on the current estimated value of the capacitor or inductor.

[0075] Example 7 is the test and measurement instrument of Example 5, where the adjustment amount of the value of the resistor is a predetermined incremental value, and where the adjustment amount of the value of the capacitor or inductor is a predetermined incremental value.

[0076] Example 8 is the test and measurement instrument of any one of Examples 2-7, where the one or more processors are further configured to iteratively determine an estimate of the load by selecting an arbitrary starting value for the load; simultaneously determine the source voltage and the voltage of the connected device under test; based on the source voltage, the voltage of the connected device under test, and the arbitrary starting value of the load, determine whether to adjust the estimated value of the resistor of the load in the positive or negative direction, and whether to adjust the estimated value of the capacitor or inductor of the load in the positive or negative direction; and adjust the arbitrary starting values of the resistor and the capacitor or inductor in the positive or negative direction such that the adjusted values represent an estimate of the load.

[0077] Example 9 is the test and measurement instrument of Example 8, where the one or more processors are further configured to: iteratively determine an estimate of the load by simultaneously determining another output voltage from the voltage source and the voltage of the attached device under test; based on the output voltage, the voltage of the attached device under test, and the adjusted value of the load, determine whether to adjust the estimated value of the resistor in the positive or negative direction, and whether to adjust the estimated value of the capacitor or inductor in the positive or negative direction; and adjust the estimated values of the resistor and the capacitor or inductor in the positive or negative direction such that the adjusted estimated value represents an accurate estimate of the load.

[0078] Example 10 is the test and measurement instrument of Example 8, where the one or more processors are further configured to limit the adjusted value of the resistor based on an upper limit and a lower limit, and limit the adjusted value of the capacitor or inductor based on an upper limit and a lower limit.

[0079] Example 11 is the test and measurement instrument of Example 10, where the upper limit and the lower limit of the values of the resistor and the capacitor or inductor are set by the user.

[0080] Embodiment 12 is the test and measurement instrument of any one of Embodiments 7-11, where the arbitrary starting value is selected to approximate the condition where no device under test is attached.

[0081] Example 13 is a method for estimating an unknown load coupled to a test and measurement instrument, including: obtaining a voltage at a circuit node between a current sensor and a device under test, where the device under test presents an unknown load to the test and measurement instrument; determining an output voltage applied to the current sensor; using the current sensor to determine a current through the device under test; and determining an estimated value of the load based on the voltage, current, and output voltage at the circuit node.

[0082] Example 14 is the method of Example 13, further including iteratively determining a new estimated value of the load, where the load includes a resistor and a capacitor or a resistor and an inductor.

[0083] Example 15 is the method of Example 14, where determining a new estimated value of the resistor and capacitor or inductor of the attached device under test includes selecting any starting values for the resistor and capacitor or inductor; simultaneously determining the output voltage and the voltage at the circuit node; based on the output voltage, the voltage at the circuit node, and any starting values of the resistor and capacitor or inductor, determining whether to adjust the value of the resistor in the positive or negative direction, and whether to adjust the value of the capacitor or inductor in the positive or negative direction; and creating a new estimated value of the resistor and capacitor or inductor by adjusting the any starting values in the positive or negative direction.

[0084] Example 16 is the method of Example 15, where determining the estimation of the resistor and capacitor of the attached device under test further includes simultaneously determining another output voltage and the voltage at the circuit node; based on the output voltage, the voltage at the circuit node, and the new estimated values of the resistor and capacitor or inductor, determining whether to adjust the value of the resistor in the positive or negative direction, and whether to adjust the value of the capacitor or inductor in the positive or negative direction; and adjusting the new estimated values of the resistor and capacitor or inductor in the positive or negative direction.

[0085] Example 17 is the method of any one of Examples 14 - 16, where the new estimated value of the resistor is limited based on an upper limit and a lower limit, and the new estimated value of the capacitor or inductor is limited based on an upper limit and a lower limit.

[0086] Example 18 is the method of Example 17, where the upper limit and the lower limit of the values of the resistor and capacitor or inductor are set by the user.

[0087] Example 19 is the method of any one of Examples 14 - 18, where the any starting values are selected to approximate the condition when no device under test is attached.

[0088] Example 20 is the method of any one of Examples 14 - 19, where determining the estimation of the resistor and capacitor or inductor includes adjusting the estimated resistor value based on whether the output of the normal resistor equation is positive or negative, and adjusting the estimated capacitor or inductor value based on whether the output of the normal capacitor or inductor equation is positive or negative.

[0089] Previous described versions of the disclosed subject matter have numerous advantages that have been described or are obvious to one of ordinary skill in the art. Even so, not all versions of the disclosed apparatus, system, or method require these advantages or features.

[0090] Additionally, the written description mentions specific features. It should be understood that the disclosure in this specification includes all possible combinations of those specific features. When a specific feature is disclosed in the context of a particular aspect or example, that feature can also be used, to the extent possible, in the context of other aspects and examples.

[0091] Furthermore, when a method having two or more defined steps or operations is recited in this application, the defined steps or operations can be performed in any order or simultaneously, unless the context excludes those possibilities.

[0092] Although specific examples of the invention have been illustrated and described for purposes of illustration, it should be understood that various modifications can be made without departing from the spirit and scope of the invention. Accordingly, the invention should not be limited except as by the appended claims.

Claims

1. A test and measurement instrument, comprising: A voltage source configured to output a source voltage; A current sensor configured to sense a current passing through a connected device under test; And One or more processors configured to: Iteratively determine an estimate of the load of a connected unknown device under test based on the source voltage, the current, and the voltage of the connected unknown device under test, wherein the estimate of the load includes an estimate of resistance and capacitance or an estimate of resistance and inductance, and Iteratively adjust the value of the resistance based on whether the output of the normal resistance equation is positive or negative, and iteratively adjust the value of the capacitance or inductance based on whether the output of the normal capacitance or inductance equation is positive or negative.

2. The test and measurement instrument according to claim 1, wherein when the output of the normal resistance equation is positive, the value of the resistance is adjusted upward, and wherein when the output of the normal capacitance or inductance equation is positive, the value of the capacitance or inductance is adjusted upward.

3. The test and measurement instrument according to claim 2, wherein the amount of adjustment of the value of the resistance is based on the current estimated value of the resistance, and wherein the amount of adjustment of the value of the capacitance or inductance is based on the current estimated value of the capacitance or inductance.

4. The test and measurement instrument according to claim 2, wherein the amount of adjustment of the value of the resistance is a predetermined incremental value, and wherein the amount of adjustment of the value of the capacitance or inductance is a predetermined incremental value.

5. The test and measurement instrument according to claim 1, wherein the one or more processors are further configured to iteratively determine an estimate of the load by: Selecting an arbitrary starting value for the load; Simultaneously determining the source voltage and the voltage of the connected device under test; Based on the source voltage, the voltage of the connected device under test, and the arbitrary starting value of the load, determining whether to adjust the estimated value of the resistance of the load in the positive or negative direction, and whether to adjust the estimated value of the capacitance or inductance of the load in the positive or negative direction; and Adjusting the arbitrary starting values of the resistance and the capacitance or inductance in the positive or negative direction such that the adjusted values represent an estimate of the load.

6. The test and measurement instrument according to claim 5, wherein the one or more processors are further configured to iteratively determine an estimate of the load by: Simultaneously determining another output voltage from the voltage source and the voltage of the connected device under test; Based on the output voltage, the voltage of the attached device under test, and the adjusted value of the load, determining whether to adjust the estimated value of the resistance in the positive or negative direction, and whether to adjust the estimated value of the capacitance or inductance in the positive or negative direction; and Adjusting the estimated values of the resistance and the capacitance or inductance in the positive or negative direction such that the adjusted estimated values represent an accurate estimate of the load.

7. The test and measurement instrument according to claim 5, wherein the one or more processors are further configured to limit the adjusted value of the resistance based on upper and lower limits, and limit the adjusted value of the capacitance or inductance based on upper and lower limits.

8. The test and measurement instrument according to claim 7, wherein the upper and lower limits of the values of the resistance and capacitance or inductance are set by the user.

9. The test and measurement instrument according to claim 5, wherein the arbitrary starting value is selected to approximate the condition where the device under test is not attached.

10. A method for estimating an unknown load coupled to a test and measurement instrument, comprising: obtaining a voltage at a circuit node between a current sensor and a device under test, wherein the device under test presents an unknown load to the test and measurement instrument; determining an output voltage applied to the current sensor; using the current sensor to determine a current passing through the device under test; and determining an estimated value of the load based on the voltage, current, and output voltage at the circuit node, wherein the method further comprises iteratively determining a new estimated value of the load, the load comprising a resistance and a capacitance or a resistance and an inductance, and wherein determining the estimate of the resistance and capacitance or the resistance and inductance comprises adjusting the value of the estimated resistance based on whether the output of a normal resistance equation is positive or negative, and adjusting the value of the estimated capacitance or inductance based on whether the output of a normal capacitance or inductance equation is positive or negative.

11. The method according to claim 10, wherein determining a new estimated value of the resistance and capacitance or inductance of the attached device under test comprises: selecting an arbitrary starting value for the resistance and capacitance or inductance; simultaneously determining the output voltage and the voltage at the circuit node; determining whether to adjust the value of the resistance in the positive or negative direction, and whether to adjust the value of the capacitance or inductance in the positive or negative direction, based on the output voltage, the voltage at the circuit node, and the arbitrary starting value of the resistance and capacitance or inductance; and creating a new estimated value of the resistance and capacitance or inductance by adjusting the arbitrary starting value in the positive or negative direction.

12. The method according to claim 11, wherein determining the estimate of the resistance and capacitance of the attached device under test further comprises: simultaneously determining another output voltage and the voltage at the circuit node; determining whether to adjust the value of the resistance in the positive or negative direction, and whether to adjust the value of the capacitance or inductance in the positive or negative direction, based on the output voltage, the voltage at the circuit node, and the new estimated value of the resistance and capacitance or inductance; and adjusting the new estimated value of the resistance and capacitance or inductance in the positive or negative direction.

13. The method according to claim 10, wherein the new estimated value of the resistance is limited based on upper and lower limits, and the new estimated value of the capacitance or inductance is limited based on upper and lower limits.

14. The method according to claim 13, wherein the upper and lower limits of the resistance and capacitance or inductance values are set by the user.

15. The method according to claim 11, wherein the arbitrary starting value is selected to approximate the condition where the device under test is not attached.

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