Display device

Abstract

A display device is provided. The display device includes: a display panel including a display area and a non-display area, data lines, drive lines, power lines, and pixels connected to the data lines, drive lines, and power lines are located at the display area; a data driver for generating data signals supplied to the pixels; a power supply for generating power signals supplied to the pixels; and a drive circuit located at the non-display area and for generating drive signals supplied to the pixels, the drive circuit including a stage for providing drive signals to at least two of the drive lines, wherein a data fan-out line connected to the data driver is connected to the data line through a first connection line, a second connection line, a third connection line, and a fourth connection line, a power supply line connected to the power supply is connected to the power line, and the drive circuit is connected to the drive line.

Description

Technical Field

[0001] Aspects of the present disclosure relate to a display panel and a display device including the display panel. Background Art

[0002] Recently, various flat panel display devices with reduced weight and volume relative to cathode ray tube (CRT) display devices have been developed. Flat panel display devices include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), and organic light emitting displays (OLEDs).

[0003] Typically, a display panel of an organic light emitting display includes a plurality of pixels and a signal line configured to provide a signal to the pixel. The pixel may receive a drive signal from a signal driver configured to provide a signal. For example, a pixel of the display panel may be provided with a data signal from a data driver, a scan signal from a scan driver, a light emitting control signal from a light emitting controller, and a power signal from a power supply. As the shape of the pixel structure and the display panel diversify, various means of connecting the signal line to the signal driver have been studied. Summary of the invention

[0004] Aspects of the embodiments are directed to a display panel in which a signal line and a signal driver are easily connected.

[0005] Aspects of the embodiments are directed to a display device in which a signal line of a display panel and a signal driver are easily connected.

[0006] According to some embodiments, a display device is provided, comprising: a display panel including a display area configured to display an image and a non-display area surrounding the display area, wherein data lines, drive lines, power lines, and pixels connected to the data lines, drive lines, and power lines are located at the display area; a data driver configured to generate data signals supplied to the pixels; a power supply configured to generate power signals supplied to the pixels; and a driving circuit located at the non-display area and configured to generate driving signals supplied to the pixels, the driving circuit comprising a stage configured to provide driving signals to at least two of the driving lines, wherein a data fan-out line connected to the data driver is connected to the data line, a power line connected to the power supply is connected to the power line, and the driving circuit is connected to the driving line through a first connecting line, a second connecting line, a third connecting line, and a fourth connecting line.

[0007] In some embodiments, the display area has a rectangular shape with rounded corners, and the non-display area has a shape corresponding to the shape of the display area, and the non-display area includes: a first area corresponding to the rounded corners located at the lower side of the display area; and a second area corresponding to the side surfaces of the display area and the rounded corners located at the upper side of the display area.

[0008] In some embodiments, the data fan-out line includes a first fan-out line and a second fan-out line located at different layers, the first fan-out line and the second fan-out line being connected to the first connection line in the first region.

[0009] In some embodiments, in the first region, the third connection line connects the power source to the power line, the fourth connection line connects the driving circuit to one of the driving lines, and the second connection line connects the driving circuit to another of the driving lines.

[0010] In some embodiments, the second connection line connects the driving circuit to one of the driving lines in the first region.

[0011] In some embodiments, the driving circuit includes a first driving circuit including a first stage configured to generate a first driving signal among the driving signals, and a second driving circuit including a second stage configured to generate a second driving signal among the driving signals.

[0012] In some embodiments, in the second region, a first connection line connects the first drive circuit to a first drive line of the drive lines, a second connection line connects the second drive circuit to one of the second drive lines of the drive lines, a third connection line connects the power supply to the power line, and a fourth connection line connects the second drive circuit to another one of the second drive lines.

[0013] In some embodiments, the fourth connection line connects the second driving circuit to one of the second driving lines of the driving lines in the second region.

[0014] In some embodiments, the first driving signal includes a scan signal, and the second driving signal includes a light emitting control signal.

[0015] In some embodiments, the first connection line and the second connection line are located at different layers.

[0016] In some embodiments, the first connection line is located at a same layer as a gate electrode of a driving transistor in one of the pixels, and the second connection line is located at a same layer as an electrode of a capacitor in the pixel.

[0017] In some embodiments, the third connection line and the fourth connection line are located at the same layer as the source-drain electrode of the driving transistor in one of the pixels.

[0018] According to some embodiments, a display panel is provided, comprising: a substrate comprising a display area and a non-display area surrounding the display area; a plurality of pixels located in the display area; a data line connected to the pixel; a drive line connected to the pixel; a power line connected to the pixel; a data fan-out line located in the non-display area and configured to receive a data signal; a power line located in the non-display area and configured to receive a power signal; and a stage located in the non-display area and configured to generate a drive signal supplied to the pixel and provide the drive signal to at least two of the drive lines, wherein the data fan-out line is connected to the data line, the power line is connected to the power line, and the stage is connected to the drive line through a first connection line, a second connection line, a third connection line, and a fourth connection line.

[0019] In some embodiments, the display area has a rectangular shape with rounded corners, and the non-display area has a shape corresponding to the shape of the display area, wherein the non-display area includes: a first area corresponding to the rounded corners located at the lower side of the display area; and a second area corresponding to the side surfaces of the display area and the rounded corners located at the upper side of the display area.

[0020] In some embodiments, the data fan-out line includes a first fan-out line and a second fan-out line located at different layers, the first fan-out line and the second fan-out line being connected to the first connection line in the first region.

[0021] In some embodiments, in the first region, the third connection line connects the power source to the power line, the fourth connection line connects the driving circuit to one of the driving lines, and the second connection line connects the driving circuit to another of the driving lines.

[0022] In some embodiments, the second connection line connects the driving circuit to one of the driving lines in the first region.

[0023] In some embodiments, the display panel also includes a driving circuit, the driving circuit includes a first driving circuit and a second driving circuit, the first driving circuit includes a first stage configured to generate a first driving signal, and the second driving circuit includes a second stage configured to generate a second driving signal.

[0024] In some embodiments, in the second region, a first connection line connects the first drive circuit to a first drive line of the drive lines, a second connection line connects the second drive circuit to one of the second drive lines of the drive lines, a third connection line connects the power supply to the power line, and a fourth connection line connects the second drive circuit to another one of the second drive lines.

[0025] In some embodiments, the fourth connecting line connects the second driving circuit to one of the second driving lines in the second region.

[0026] According to some embodiments, in a display panel and a display device including the display panel, a data fan-out line is connected to a data line through a first connection line located at a lower portion of the display panel, and a second connection line is used as a wiring. Therefore, the signal line and the signal driver can be easily connected. In addition, according to some embodiments, in a display panel and a display device including the display panel, a fourth connection line is used as a wiring at a side of the display panel, so that the signal line and the signal driver can be easily connected. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0028] Figure 1 are plan views illustrating display devices according to some example embodiments of the present invention.

[0029] Figure 2 It is shown Figure 1 A block diagram of a display device.

[0030] Figure 3 It is shown that the Figure 2 A circuit diagram of an example of a pixel in a display device.

[0031] Figure 4 It is shown that the Figure 1 A plan view of a portion of a first area of ​​a display panel in a display device.

[0032] Figure 5A is along Figure 4 A cross-sectional view taken along line II'.

[0033] Figure 5B is along Figure 4 A cross-sectional view taken along line II-II'.

[0034] Figure 6 It is shown that the Figure 1 FIG. 1 is a view of an example of a driving circuit unit in a display device. DETAILED DESCRIPTION

[0035] Hereinafter, a display panel and a display device according to embodiments will be explained in detail with reference to the accompanying drawings.

[0036] Figure 1 are plan views illustrating display devices according to some example embodiments of the present invention.

[0037] Figure 2 It is shown Figure 1 A block diagram of a display device.

[0038] Figure 3 It is shown that the Figure 2A circuit diagram of an example of a pixel in a display device.

[0039] Reference Figure 1 and Figure 2 , the display device 100 may include a display panel 110 , a timing controller 120 , a data driver 130 , a driving circuit unit (eg, a driving circuit) 140 , and a power supply 150 .

[0040] The display panel 110 may include a display area DA and a non-display area NDA. Data lines DL, drive lines DRL, and power lines PL may be formed in the display area DA. A plurality of pixels PX connected to the data lines DL, the drive lines DRL, and the power lines PL may be formed in the display area DA. Each of the pixels PX may emit light in response to a signal supplied through the data lines DL, the drive lines DRL, and the power lines PL. An image may be displayed in the display area DA by the operation of the pixels PX. Figure 1 and Figure 2 As shown in , the display area DA of the display panel 110 may have a rectangular shape with rounded corners.

[0041] The data fan-out line DFO connected to the data driver 130 configured to generate a data signal, the driving circuit unit 140 configured to generate a driving signal, the power line PPL connected to the power supply 150, etc. may be set in the non-display area NDA. In addition, the first connection line, the second connection line, the third connection line, and the fourth connection line that connect the data fan-out line DFO to the data line DL, the power line PPL to the power line PL, and the driving circuit unit 140 to the driving line DRL may be formed in the non-display area NDA. The data fan-out line DFO may include a first fan-out line and a second fan-out line. The first fan-out line and the second fan-out line may be formed at different layers. In addition, the first connection line, the second connection line, the third connection line, and the fourth connection line may be formed at different layers. For example, the first connection line may be formed at the same layer as the gate electrode of the transistor included in the pixel PX, and the second connection line may be formed at the same layer as the first electrode or the second electrode of the capacitor included in the pixel PX. In addition, the third connection line and the fourth connection line may be formed at the same layer as the source electrode and the drain electrode of the transistor included in the pixel PX. As Figure 1 and Figure 2As shown in , the non-display area NDA of the display panel 110 may correspond to the shape of the display area DA. In other words, the non-display area NDA of the display panel 110 may have a shape corresponding to the shape of the display area DA. The non-display area NDA may include a first area 1ST AR corresponding to a rounded corner located at the lower side of the display area DA and a second area 2ND AR corresponding to a side of the display area DA and a rounded corner located at the upper side of the display area DA. For example, the data fan-out line DFO may be connected to the data line DL in the first area 1STAR of the non-display area NDA, and in the second area 2ND AR of the non-display area NDA, the driving circuit unit 140 may be connected to the driving line DRL, and the power line PPL may be connected to the power line PL.

[0042] The timing controller 120 may convert image data IMG supplied from an external device into input image data IDATA, and may generate a first control signal CTL1 and a second control signal CTL2 that control driving of the input image data IDATA. The timing controller 120 may convert image data IMG supplied from an external device into input image data IDATA by applying an algorithm configured to correct the image quality of the image data IMG, such as dynamic capacitance compensation (DCC). When the timing controller 120 does not include an algorithm for improving image quality, the image data IMG may be output as unchanged input image data IDATA. The timing controller 120 may provide the input image data IDATA to the data driver 130. The timing controller 120 may receive an input control signal CON from an external device, and may generate a first control signal CTL1 provided to the data driver 130 and a second control signal CTL2 provided to the driving circuit unit 140.

[0043] The data driver 130 may generate an analog type data voltage based on the input image data IDATA received from the timing controller 120. The data driver 130 may supply the data voltage through the data fan-out line DFO.

[0044] The driving circuit unit 140 may be an embedded circuit disposed in the non-display area NDA of the display panel 110. In one embodiment, the driving circuit unit 140 is a scan driver configured to generate a scan signal. In another embodiment, the driving circuit unit 140 is a light-emitting controller configured to generate a light-emitting control signal. In another embodiment, the driving circuit unit 140 includes a scan driver configured to generate a scan signal and a light-emitting controller configured to generate a light-emitting control signal. The driving circuit unit 140 may include a plurality of stages STD. Each of the plurality of stages STD may generate a driving signal based on a second control signal CTL2 received from the timing controller 120. The driving signal generated in each of the plurality of stages STD may be provided to at least two driving lines DRL. Although Figure 2 The driving circuit unit 140 is shown to be disposed at the non-display area NDA located at the left side of the display area DA, but the position of the driving circuit unit 140 is not limited thereto. For example, the driving circuit unit 140 may be disposed at the non-display area NDA located at the right side of the display area DA, or at the non-display area NDA located at both the left and right sides of the display area DA. Figure 2 An example is shown in which each stage STD generates one driving signal, but each stage STD included in the driving circuit unit 140 may generate at least one driving signal. For example, when the driving circuit unit 140 is a scan driver, each stage STD may generate a first scan signal and a second scan signal.

[0045] The power supply 150 may generate a power signal supplied to the pixel PX. For example, the power supply 150 may generate a high power voltage ELVDD, a low power voltage ELVSS, an initialization voltage VINIT, etc. supplied to the pixel PX. The power supply 150 may supply the power signal through a power line PPL formed in the display panel 110.

[0046] Reference Figure 3, the pixel PX may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7, a first capacitor Cst, a second capacitor Cpr, and an organic light emitting diode OLED. The first transistor T1 may include a gate electrode connected to the first node N1, a first electrode connected to the fifth transistor T5, and a second electrode connected to the second node N2. The second transistor T2 may include a gate electrode provided with (e.g., configured to receive) a first scan signal GW1, a first electrode connected to the third node N3, and a second electrode provided with (e.g., configured to receive) a data voltage VDATA. The third transistor T3 may include a gate electrode provided with (e.g., configured to receive) a second scan signal GW2, a first electrode connected to the first node N1, and a second electrode connected to the second node N2. The fourth transistor T4 may include a gate electrode provided with (e.g., configured to receive) a light emitting control signal EM, a first electrode provided with (e.g., configured to receive) a high power voltage ELVDD, and a second electrode connected to the third node N3. The fifth transistor T5 may include a gate electrode provided with (e.g., configured to receive) a light emitting control signal EM, a first electrode provided with (e.g., configured to receive) a high power voltage ELVDD, and a second electrode connected to the first transistor T1. The sixth transistor T6 may include a gate electrode provided with (e.g., configured to receive) a light emitting control signal EM, a first electrode connected to the second node N2, and a second electrode connected to the fourth node N4. The seventh transistor T7 may include a gate electrode provided with (e.g., configured to receive) a second scan signal GW2, a first electrode provided with (e.g., configured to receive) an initialization voltage VINIT, and a second electrode connected to the fourth node N4. The first capacitor Cst may include a first electrode provided with (e.g., configured to receive) a high power voltage ELVDD and a second electrode connected to the first node N1. The second capacitor Cpr may include a first electrode connected to the second node N2 and a second electrode connected to the third node N3. The organic light emitting diode OLED may include an anode electrode connected to the fourth node N4 and a cathode electrode provided with (e.g., configured to receive) a low power voltage ELVSS. As Figure 3As shown in , the scan signals GW1 and GW2 generated by the scan driver or the light emitting control signal EM generated by the light emitting controller can be provided to at least two pixels PX. Therefore, the number of drive lines DRL for supplying drive signals (i.e., the scan signals GW1 and GW2 and the light emitting control signal EM) of the display panel 110 increases, and therefore, the connection lines for connecting the drive circuit unit (i.e., the scan driver and the light emitting controller) 140 to the drive lines DRL may be insufficient in the non-display area NDA. In the display device 100 according to some embodiments of the present invention, the first to fourth connection lines are used as wiring located in the first area 1ST AR and the second area 2ND AR of the display panel 110, so that the data fan-out line DFO, the drive circuit unit 140 and the power line PPL formed in the non-display area NDA and the data line DL, the drive line DRL and the power line PL formed in the display area DA can be easily connected to each other.

[0047] In a display device 100 according to some embodiments of the present invention, a first fan-out line and a second fan-out line formed at different layers in a first area 1ST AR are connected to the same line (i.e., a first connection line). In the prior art, the first fan-out line and the second fan-out line formed at different layers are connected to the first connection line and the second connection line formed at different layers. In a display device 100 according to some embodiments of the present invention, the first fan-out line and the second fan-out line are connected to the first connection line in the first area 1STAR so that the second connection line can be used as a wiring. For example, the first fan-out line and the second fan-out line can be connected to the first connection line in the first area 1ST AR. The first connection line can extend in the display area DA to connect the fan-out line to the data line DL. In addition, in the first area 1ST AR, the third connection line can connect the power line PPL to the power line PL, the fourth connection line can connect the driving circuit unit 140 to one of the driving lines DRL, and the second connection line can connect the driving circuit unit 140 to another of the driving lines DRL. Although reference has been made to Figure 1 and Figure 2A third connection line for connecting the power line PPL to the power line PL in the first region 1ST AR and a fourth connection line for connecting the driving circuit unit 140 to one of the driving lines DRL are described, but the configuration of the third connection line and the fourth connection line is not limited thereto. For example, the third connection line and the fourth connection line may connect the power line PPL to the power line PL, and supply different power signals (such as the low power voltage ELVSS and the initialization voltage VINIT) to the power line PL. As described above, in the display device 100 according to some embodiments of the present invention, the first fan-out line and the second fan-out line included in the data fan-out line DFO located in the first region 1ST AR are connected to the data line DL of the display area DA through the first connection line, and the second connection line may be used as a wiring for connecting the driving circuit unit 140 to one of the driving lines DRL, so that the signal line (ie, the data line DL, the driving line DRL and the power line PL) can be easily connected to the signal driver (ie, the data driver 130, the driving circuit unit 140 and the power supply 150) in the first region 1ST AR.

[0048] According to some embodiments, in the display device 100, the fourth connection line is connected to one of the driving lines DRL and the driving circuit unit in the second area 2ND AR. The fourth connection line may connect the power line PPL to the power line PL in the first area 1ST AR, and may connect the driving circuit unit 140 to one of the driving lines DRL in the second area 2ND AR. The fourth connection line located in the first area 1ST AR and the fourth connection line located in the second area 2ND AR may be formed at the same layer, but may not be connected to each other. In the display device 100 according to some embodiments of the present invention, the fourth connection line is used as a wiring for connecting the driving circuit unit 140 to one of the driving lines DRL in the second area 2ND AR. For example, the first connection line may connect the driving circuit unit 140 to one of the driving lines DRL, the second connection line may connect the driving circuit unit 140 to another of the driving lines DRL, the third connection line may connect the power line PPL to the power line PL, and the fourth connection line may connect the driving circuit unit 140 to another of the driving lines DRL. In other words, each of the multiple stages STD of the driving circuit unit 140 can be connected to three driving lines DRL. In some embodiments, the driving circuit unit 140 includes a first stage and a second stage configured to generate a first driving signal and a second driving signal, respectively, and at least one of the first stage and the second stage is connected to two driving lines DRL. For example, the driving circuit unit 140 may include a first driving circuit unit and a second driving circuit unit, the first driving circuit unit including a first stage configured to generate a first driving signal, and the second driving circuit unit including a second stage configured to generate a second driving signal. In the second area 2ND AR, when each of the first stages is connected to one driving line DRL and each of the second stages is connected to two driving lines DRL, the first connection line may connect the first driving circuit unit to the first driving line DRL, the second connection line may connect the second driving circuit unit to one of the second driving lines DRL, the third connection line may connect the power line PPL to the power line PL, and the fourth connection line may connect the second driving circuit unit to the other of the second driving lines DRL. As described above, in the display device 100 according to some embodiments of the present invention, the fourth connecting line is used as a wiring located in the second area 2ND AR, so that the signal line (i.e., the drive line DRL and the power line PL) can be easily connected to the signal driver (i.e., the drive circuit unit 140 and the power supply 150) in the second area 2ND AR.

[0049] Figure 4 It is shown that the Figure 1 A plan view of a portion of a first area of ​​a display panel in a display device. Figure 5A It is along Figure 4 A cross-sectional view taken along line II'. Figure 5B It is along Figure 4 A cross-sectional view taken along line II-II'.

[0050] Reference Figure 4 , the data fan-out line, the first connection line CL1, and the data line DL may be connected to each other in the first area 1ST AR of the non-display area NDA. The data fan-out line may include a first fan-out line FO1 and a second fan-out line FO2. The first fan-out line FO1 and the second fan-out line FO2 may be formed at different layers. The first fan-out line FO1 may be connected to (e.g., electrically connected to) the first connection line CL1 through a first contact CNT1, and the second fan-out line FO2 may be connected to (e.g., electrically connected to) the first connection line CL1 through a third contact CNT3. The first connection line CL1 connected to the first fan-out line FO1 may be connected to (e.g., electrically connected to) the data line DL through a second contact CNT2, and the first connection line CL1 connected to the second fan-out line FO2 may be connected to (e.g., electrically connected to) the data line DL through a fourth contact CNT4. Because the positions of the first contact CNT1 and the third contact CNT3 may be moved in the y-axis direction (e.g., moved in the y-axis direction during the layout design stage), the line arrangement of the display device 100 including the display area DA having rounded corners may be easily implemented. In addition, the third connection line CL3 may connect (e.g., electrically connect) the power line PPL to the power line PL in the first region 1ST AR, and the fourth connection line CL4 may connect (e.g., electrically connect) the driving circuit unit 140 to one of the driving lines DRL. In some embodiments, the third connection line CL3 and the fourth connection line CL4 located in the first region 1ST AR connect (e.g., electrically connect) the power line PPL to the power line PL.

[0051] Reference Figure 5A and Figure 5B , the display panel may include a substrate SUB, a first insulating layer IL1, a second insulating layer IL2, a third insulating layer IL3, and a fourth insulating layer IL4. The first insulating layer IL1, the second insulating layer IL2, the third insulating layer IL3, and the fourth insulating layer IL4 may be sequentially formed on the substrate SUB (e.g., stacked on the substrate SUB). The first fan-out line FO1 may be formed on the first insulating layer IL1, and the second fan-out line FO2 may be formed on the second insulating layer IL2.

[0052] Reference Figure 5A, the first connection line CL1 may be formed on the first insulating layer IL1, and the data line DL may be formed on the third insulating layer IL3. The first fan-out line FO1 may be connected to the first connection line CL1 through the first contact CNT1, and the first connection line CL1 may be connected to the data line DL through the second contact CNT2. For example, the first contact CNT1 may be formed at the same layer as the data line DL.

[0053] Reference Figure 5B , the first connection line CL1 may be formed on the first insulating layer IL1, and the data line DL may be formed on the third insulating layer IL3. The second fan-out line FO2 may be connected to the first connection line CL1 through the third contact CNT3, and the first connection line CL1 may be connected to the data line DL through the fourth contact CNT4. For example, the third contact CNT3 may be formed at the same layer as the data line DL.

[0054] The second connection line may be formed on the second insulating layer IL2. The second connection line may be used as a wiring for connecting the driving circuit unit 140 to one of the driving lines DRL.

[0055] Figure 6 It is shown that the Figure 1 FIG. 1 is a view of an example of a driving circuit unit in a display device.

[0056] Reference Figure 6 , the driving circuit unit (e.g., driving circuit) 140 may include a plurality of stages STD[N], STD[N+1], and STD[N+2]. In one embodiment, the driving circuit unit 140 is a scan driver, and the driving signal is a scan signal. In another embodiment, the driving circuit unit 140 is a light emitting controller, and the driving signal may be a light emitting control signal. In another embodiment, the driving circuit unit 140 includes a scan driver and a light emitting controller, and generates a scan signal and a light emitting control signal.

[0057] Each of the stages STD[N], STD[N+1], and STD[N+2] may generate a drive signal. The drive signal generated in one stage may be provided to at least two drive lines DRL. For example, the drive signal generated in the Nth stage STD[N] may be provided to the drive line DRL connected to the Nth pixel row and the drive line DRL connected to the N+1th pixel row; the drive signal generated in the N+1th stage STD[N+1] may be provided to the drive line DRL connected to the N+1th pixel row and the drive line DRL connected to the N+2th pixel row; and the drive signal generated in the N+2th stage STD[N+2] may be provided to the drive line DRL connected to the N+2th pixel row and the drive line DRL connected to the N+3th pixel row. Although Figure 6The driving circuit unit 140 including stages STD[N], STD[N+1], and STD[N+2] connected to two driving lines DRL is shown, but the driving circuit unit 140 is not limited thereto. For example, the driving circuit unit 140 may include stages connected to three driving lines DRL.

[0058] As described above, when the number of driving lines DRL connected to the driving circuit unit 140 increases, the connection lines may be insufficient. In the display device 100 according to some embodiments of the present invention, the first connection line, the second connection line, and the fourth connection line are used as wiring for connecting the driving circuit unit 140 to the driving lines DRL in the second area 2ND AR of the non-display area NDA, so that the connection between the signal line and the signal driver in the second area 2ND AR can be facilitated.

[0059] The display device according to the embodiment can be applied to an electronic device including the display device. For example, the display device according to the embodiment can be applied to a television, a computer monitor, a notebook computer, a digital camera, a mobile phone, a smart phone, a smart board, a tablet personal computer (PC), a personal digital assistant (PDA), a portable media player (PMP), an MP3 player, a navigator, a video phone, a head mounted display (HMD), etc.

[0060] It will be understood that, although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the spirit and scope of the inventive concept, the first element, component, region, layer or part discussed below may be named as the second element, component, region, layer or part.

[0061] For ease of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used here to describe the relationship between an element or feature and another (other) element or another (other) feature as shown in the figure. It will be understood that the spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation depicted in the figure. For example, if the device in the figure is turned over, the element described as "below" or "below" or "below" other elements or features will then be positioned as "above" the other elements or features. Therefore, the exemplary terms "below" and "below" can include both above and below orientations. The device can be positioned otherwise (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used here should be interpreted accordingly. In addition, it will also be understood that when a layer is referred to as "between" two layers, the layer can be the only layer between the two layers, or one or more intermediate layers may also be present.

[0062] The terms used here are for the purpose of describing specific embodiments and are not intended to be limitations of the inventive concept. As used here, unless the context clearly indicates otherwise, the singular forms "one" and "one (kind / person)" are also intended to include plural forms. It will also be understood that when the terms "include" and / or "comprise" are used in this specification, the stated features, wholes, steps, operations, elements and / or components are indicated, but the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups are not excluded. As used here, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items.

[0063] For the purpose of the present disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be interpreted as any combination of only X, only Y, only Z, or two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ for example.

[0064] Furthermore, the use of “may” when describing embodiments of the inventive concept means “one or more embodiments of the inventive concept.” Furthermore, the term “exemplary” is intended to mean an example or instance.

[0065] It will be understood that when an element or layer is referred to as being "on," "connected to," "bound to," or "adjacent to" another element or layer, the element or layer may be directly on, directly connected to, directly bound to, or directly adjacent to the other element or layer, or one or more intervening elements or layers may be present. When an element or layer is referred to as being "directly on," "directly connected to," "directly bound to," or "immediately adjacent to" another element or layer, there are no intervening elements or layers.

[0066] As used herein, the term "use" may be considered synonymous with the term "utilize."

[0067] Although the display panel and the display device according to the embodiments have been described with reference to the accompanying drawings, the illustrated embodiments are merely examples of the inventive concept and may be modified and changed in appropriate manners recognized by a person of ordinary skill in the relevant technical field without departing from the spirit and scope of the present invention as defined by the claims and their equivalents.

Claims

1. A display device, comprising: A display panel comprising a display area configured to display an image and a non-display area surrounding the display area, wherein data lines, drive lines, power lines, and pixels connected to the data lines, the drive lines, and the power lines are located at the display area; a data driver configured to generate a data signal supplied to the pixel; a power supply configured to generate a power signal supplied to the pixel; and a driving circuit located at the non-display area and configured to generate a driving signal supplied to the pixel, the driving circuit comprising a stage configured to provide the driving signal to at least two of the driving lines, wherein, through a first connection line, a second connection line, a third connection line, and a fourth connection line, a data fan-out line connected to the data driver is connected to the data line, a power line connected to the power source is connected to the power line, and the drive circuit is connected to the drive line, wherein, in a first area of ​​the non-display area, the data fan-out line includes a first fan-out line located at a first layer and a second fan-out line located at a second layer, the first fan-out line and the second fan-out line are connected to the first connection line located at the same layer different from the second layer, and Wherein, in the first region, the second connecting line is located in the second layer, and connects the driving circuit to one or more of the driving lines.

2. The display device according to claim 1, wherein: The display area has a rectangular shape with rounded corners, and the non-display area has a shape corresponding to the shape of the display area, The first area of ​​the non-display area corresponds to the rounded corner located at the lower side of the display area, and The non-display area further includes: a second area corresponding to the side surface of the display area and the rounded corner located at the upper side of the display area.

3. The display device according to claim 1, wherein: In the first region, the third connection line connects the power source to the power line, the fourth connection line connects the drive circuit to one of the drive lines, and the second connection line connects the drive circuit to the other of the drive lines.

4. The display device according to claim 2, wherein: The driving circuit includes a first driving circuit including a first stage configured to generate a first driving signal among the driving signals, and a second driving circuit including a second stage configured to generate a second driving signal among the driving signals.

5. The display device according to claim 4, wherein: In the second region, the first connection line connects the first drive circuit to a first drive line among the drive lines, the second connection line connects the second drive circuit to one of the second drive lines among the drive lines, the third connection line connects the power supply to the power line, and the fourth connection line connects the second drive circuit to the other of the second drive lines.

6. The display device according to claim 4, wherein: The fourth connection line connects the second drive circuit to one of the second drive lines of the drive lines in the second region.

7. The display device according to claim 1, wherein: The first connection line and the second connection line are located at different layers.

8. The display device according to claim 7, wherein: The first connection line is located at the same layer as a gate electrode of a driving transistor in one of the pixels, and the second connection line is located at the same layer as an electrode of a capacitor in the one pixel.

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