A broadband class F power amplifier based on ultra-compact output network and design method

Abstract

The present invention provides a broadband class F power amplifier based on an ultra-compact output network and a design method, including an input matching circuit, a gate bias circuit, a transistor, a drain bias circuit, and an output matching circuit. The input end of the input matching network is connected to the power input end, the output end is connected to the gate of the transistor, the gate bias circuit is connected in parallel with the gate, the drain of the transistor is connected to the output matching circuit, the drain bias circuit is connected in parallel with the drain, and the output end of the output matching circuit is used as the power output. Compared with the prior art, the ultra-compact broadband class F power amplifier implemented by the present invention using a single-section microstrip line achieves the same broadband and high efficiency, and realizes a compact output network. The circuit structure is simple, easy to implement, reduces costs, and has good application prospects.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency communication technology, and in particular to a broadband class F power amplifier based on an ultra-compact output network and a design method thereof. Background Art

[0002] With the continuous development of science and technology, wireless communication plays an increasingly important role, and the performance of the RF power amplifier, as a key component in the communication system, plays a vital role in the entire wireless communication system. With the advent of 5G communication, higher transmission rates, larger data transmission volumes, and better linearity are required for the communication system, as well as certain requirements for the size of the power amplifier. As the frequency band of the communication frequency becomes higher and higher, the size of the power amplifier should also be reduced. At present, there have been many reports on broadband Class F power amplifiers. In 2019, Gao Kailun, Ye Yan, Xie Jin and others found that the parasitic effects and high-order harmonics of transistors have a great influence on the efficiency of the power amplifier through their research. By adding a parasitic compensation circuit to the output circuit to reduce the influence of the parasitic effect of the transistor on the performance of the power amplifier, a high-efficiency E-1 / F class RF power amplifier for the 5G low-frequency band was designed. The measured results show that the power added efficiency of the power amplifier within the effective working bandwidth of 300MHz from 3.3 to 3.6GHz is 59.1% to 71.4%, the output power is greater than 10W, the drain efficiency exceeds 75.6%, and the gain flatness is less than 1dB. However, the output matching structure of the above method is complex, difficult to implement, large in size, and high in cost.

[0003] Therefore, it is necessary to conduct research to provide a solution to solve the defects in the prior art. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a broadband class F power amplifier based on an ultra-compact output network and a design method thereof. For the traditional broadband class F power amplifier, it is proposed to use a single-section microstrip line to realize the output matching circuit. While maintaining the same broadband and high efficiency, the volume of the output matching circuit is reduced, making the output matching circuit structure simple and easy to implement, thereby reducing the production cost. In order to further reduce the circuit volume, the input matching circuit also adopts the same design method.

[0005] In order to overcome the defects of the prior art, the present invention adopts the following technical solutions:

[0006] A broadband class F power amplifier based on an ultra-compact output network, characterized in that it includes an input matching network, a gate bias circuit, a transistor, an output matching network, a drain bias circuit, and an output matching network, wherein:

[0007] The input end of the input matching network serves as a power input end, the output end thereof is connected to the gate of the transistor, and the gate bias circuit is connected in parallel with the gate of the transistor;

[0008] The transistor drain is connected in parallel with the drain bias circuit, the transistor drain is connected to the input end of the output matching network, and the output end of the output matching network serves as the power output end;

[0009] The input matching network includes a microstrip line TL1, one end of the microstrip line TL1 is connected to the transistor gate, and the other end is connected to the power input end;

[0010] The gate bias circuit includes a λ / 4 microstrip line TL2. One end of the microstrip line TL2 is connected in parallel with the transistor, and the other end is connected to the gate power supply;

[0011] The output matching network includes a microstrip line TL3, one end of the microstrip line TL3 is connected to the transistor drain, and the other end is connected to the power output end;

[0012] The drain bias circuit includes a λ / 4 microstrip line TL4, one end of which is connected in parallel with the transistor, and the other end of which is connected to the drain power supply.

[0013] Preferably, the power amplifier is implemented using transistors.

[0014] Preferably, a gate bias circuit is provided between the input matching circuit and the transistor, and the bias voltage of the gate bias circuit is -2.8V.

[0015] Preferably, a bias circuit is provided at the drain of the transistor, and its bias voltage is 28V.

[0016] The present invention also discloses a design method of a broadband class F power amplifier based on an ultra-compact output network, comprising the following steps:

[0017] Step S1: design a standard class F power amplifier;

[0018] Step S2: Design a single-section microstrip line as a matching circuit to satisfy the F-type drain voltage and current waveform, specifically including the following steps:

[0019] The optimal fundamental impedance is calculated based on the voltage and current formula of the Class F power amplifier:

[0020] Where Vdc is the DC voltage, Imax is the maximum drain current;

[0021] At the same time, according to the voltage and current formula of a single-section microstrip line, the impedance expression of a single-section microstrip line is:

[0022] Where Z0 represents the characteristic impedance, ZL represents load impedance, β represents phase constant, and l represents electrical length;

[0023] Then let the impedance of a single microstrip line Z in =Z F ,

[0024] Right now

[0025] By solving the equation, we can obtain the values ​​of the single-section microstrip line as a matching circuit to satisfy the F-type drain voltage and current waveforms;

[0026] Step S3: Designing an output matching circuit, including the following steps:

[0027] The best fundamental impedance value is obtained by a three-frequency design method. First, load pulling is performed at the center frequency of 1.25 GHz of 0.5-2 GHz to obtain the best fundamental impedance at the center frequency of 1.25 GHz. Then, load pulling is performed at the center frequency of 0.875 GHz of 0.5-1.25 GHz to obtain the best fundamental impedance at 0.875 GHz. Similarly, the best fundamental impedance at the center frequency of 1.625 GHz of 1.25 GHz-2 GHz is obtained by load pulling. Then, the three best fundamental impedance points are connected, and the center point is selected as the best fundamental impedance value.

[0028] Then, a single-section microstrip line is used to design the matching circuit. Finally, the optimal fundamental impedance trajectory of the entire frequency band is obtained on the Smith chart through optimized tuning, and the output matching circuit is designed.

[0029] Step S4: designing a bias circuit;

[0030] Step S5: designing an input matching circuit;

[0031] Step S6: construct the overall circuit and optimize the overall circuit.

[0032] As a further improvement, in step S5, the input matching circuit adopts the same design method as the output matching circuit.

[0033] As a further improvement, the input end of the input matching network is used as the power input end, the output end thereof is connected to the transistor gate, and the gate bias circuit is connected in parallel with the transistor gate;

[0034] The drain of the transistor is connected in parallel with the drain bias circuit, the drain of the transistor is connected to the input end of the output matching network, and the output end of the output matching network serves as the power output end;

[0035] The input matching network includes a microstrip line TL1, one end of the microstrip line TL1 is connected to the transistor gate, and the other end is connected to the power input terminal;

[0036] The gate bias circuit includes a λ / 4 microstrip line TL2; one end of the microstrip line TL2 is connected in parallel with the transistor, and the other end is connected to the gate power supply;

[0037] The output matching network includes a microstrip line TL3, one end of the microstrip line TL3 is connected to the transistor drain, and the other end is connected to the power output terminal;

[0038] The drain bias circuit includes a λ / 4 microstrip line TL4; one end of the microstrip line TL4 is connected in parallel with the transistor, and the other end is connected to the drain power supply.

[0039] As a further improvement, the amplifier is implemented using transistors.

[0040] As a further improvement, a gate bias circuit is provided between the input matching circuit and the transistor, and the bias voltage of the gate bias circuit is -2.8V.

[0041] As a further improvement, a bias circuit is provided at the drain of the transistor, and its bias voltage is 28V.

[0042] Compared with the prior art, the present invention is aimed at the traditional broadband class F power amplifier and proposes a broadband class F power amplifier based on an ultra-compact output network. By theoretically analyzing the voltage and current expressions of the class F power amplifier and the voltage and current expressions of a single-section microstrip line, the output impedance expression of the class F power amplifier and the output impedance expression of the single-section microstrip line are obtained, and their impedance values ​​are made equal. Then, the value of the single-section microstrip line as a matching circuit that satisfies the voltage and current waveforms of the class F power amplifier is solved, and the same broadband and high efficiency are achieved, and a compact output network is achieved. In order to further reduce the volume, the input matching circuit also adopts the same design method, and finally an ultra-compact broadband class F power amplifier is achieved. The circuit has a simple structure, is easy to implement, reduces costs, and has a good application prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a schematic diagram of the structure of a conventional class F power amplifier in the present invention;

[0044] Figure 2 It is a block diagram of the structure of a broadband class F power amplifier based on an ultra-compact output network of the present invention;

[0045] Figure 3 is a schematic diagram of the output circuit structure of the present invention;

[0046] Figure 4 is a schematic diagram of the optimal fundamental impedance trajectory of the present invention;

[0047] Figure 5It is a diagram of the simulation results of the output power and drain efficiency of the broadband class F power amplifier based on the ultra-compact output network of the present invention. DETAILED DESCRIPTION

[0048] The following are specific embodiments of the present invention and the accompanying drawings to further describe the technical solution of the present invention, but the present invention is not limited to these embodiments.

[0049] In view of the defects of the prior art, the applicant has conducted an in-depth study on the structure of the traditional broadband Class F power amplifier in the prior art. The applicant found that the traditional broadband Class F power amplifier in the prior art has a complex structure, is difficult to implement, has a large overall size, and is costly.

[0050] In order to overcome the defects of the prior art, the present application provides a broadband class F power amplifier based on an ultra-compact output network. By theoretically analyzing the voltage and current expressions of the class F power amplifier and the voltage and current expressions of a single-section microstrip line, the output impedance expression of the class F power amplifier and the output impedance expression of the single-section microstrip line are obtained, and their impedance values ​​are made equal. Then, the single-section microstrip line is solved as a matching circuit to satisfy the values ​​of the voltage and current waveforms of the class F power amplifier, thereby achieving the same broadband and high efficiency and a compact output network. In order to further reduce the volume, the input matching circuit also adopts the same design method, and finally an ultra-compact broadband class F power amplifier is realized. The circuit has a simple structure, is easy to implement, reduces costs, and has good application prospects.

[0051] See also Figure 1 , which is a schematic diagram of the structure of a traditional class F power amplifier;

[0052] See also Figure 2 , as shown in the figure, the broadband class F power amplifier based on the ultra-compact output network of the present invention is characterized in that it includes an input matching network, a gate bias circuit, a transistor, an output matching network, and a drain bias circuit, wherein the input end of the input matching network serves as a power input end, and its output end is connected to the gate of the transistor, the gate bias circuit is connected in parallel with the gate of the transistor to provide a voltage required for the gate, the drain of the transistor is connected in parallel with the drain bias circuit to provide a voltage required for the drain, the drain of the transistor is connected to the input end of the output matching network, and the output end of the output matching network serves as a power output end to match to the required final impedance value;

[0053] See also Figure 3 , shown is the output matching structure of the broadband class F power amplifier based on the ultra-compact output network in the present invention, and the output matching circuit only includes one section of microstrip line TL3.

[0054] The drain output voltage and current expressions of the Class F RF power amplifier are:

[0055]

[0056] Where V I It represents the DC component of voltage, V m represents the output voltage amplitude, and ω0 represents the angular frequency.

[0057]

[0058] Among them I I Represents the DC component of current, I m represents the output current amplitude, and ω0 represents the angular frequency.

[0059] The fundamental impedance expression can be obtained through equations (1) and (2):

[0060]

[0061] Where Vdc is the DC voltage and Imax is the maximum drain current.

[0062] The impedance of even harmonics is made 0 and the impedance of odd harmonics is infinite.

[0063] It is known that the voltage and current expressions of a single microstrip line are:

[0064]

[0065]

[0066] in represents the voltage at z=0, Z0 represents the characteristic impedance, β represents the phase constant, Γ represents the reflection coefficient, and z represents the direction of wave propagation.

[0067] Through (4) (5), the impedance expression of a single microstrip line can be obtained as:

[0068]

[0069] Where Z0 represents the characteristic impedance, Z L represents load impedance, β represents phase constant, and l represents electrical length.

[0070] Then let the impedance of a single microstrip line Z in =Z F ,

[0071] Right now

[0072] In this way, the equations can be solved to find the values ​​of the single-section microstrip line as a matching circuit to satisfy the F-type drain voltage and current waveforms.

[0073] In the above technical scheme, by theoretically analyzing the voltage and current expressions of the class F power amplifier and the voltage and current expressions of a single-section microstrip line, the output impedance expression of the class F power amplifier and the output impedance expression of the single-section microstrip line are obtained, their impedance values ​​are made equal, and then the values ​​of the voltage and current waveforms of the class F power amplifier that the single-section microstrip line satisfies as a matching circuit are solved.

[0074] Then put the corresponding single-section microstrip line into the matching circuit for design, and design it through the three-frequency point technology. First, load pulling is performed at the center frequency of 1.25GHz of 0.5-2GHz to obtain the best fundamental impedance of the center frequency of 1.25GHz, and then load pulling is performed at the center frequency of 0.875GHz of 0.5-1.25GHz to obtain the best fundamental impedance of 0.875GHz. Similarly, the best fundamental impedance of 1.625GHz at the center frequency of 1.25GHz-2GHz is obtained through load pulling, and then the three best fundamental impedance points are connected, and the center point is selected as the best fundamental impedance value, and then optimized tuning is performed to obtain the best fundamental impedance range on the Smith chart.

[0075] See also Figure 4 , which shows the optimal fundamental impedance trajectory of the output matching circuit. This trajectory shows the fundamental impedance of the designed class F power amplifier, that is, the impedance of a single section of microstrip line under fundamental conditions, verifying that equation (7) is satisfied;

[0076] See also Figure 5 , which shows the simulation results of the output power, gain and efficiency of the broadband Class F power amplifier based on the ultra-compact output network of the present invention. The designed power amplifier has an output power of 40.1-41.4dBm, a gain of 10.1dB-11.4dB, and a drain efficiency of 61.2%-72% in the frequency band of 0.5-2GHz, showing good performance indicators.

[0077] In a preferred embodiment, the power amplifier is implemented using a GaN HEMT CGH40010F transistor from Cree;

[0078] In a preferred embodiment, a gate bias circuit is provided between the input matching circuit and the transistor, and its bias voltage is -2.8V;

[0079] In a preferred embodiment, a bias circuit is provided at the drain of the transistor, and the bias voltage thereof is 28V.

[0080] The broadband class F power amplifier based on the ultra-compact output network of the present invention is realized by the following steps:

[0081] Step S1: designing a standard class F power amplifier by load-pull and other techniques;

[0082] Step S2: First, use the voltage and current formulas (1) and (2) of the class F power amplifier to calculate the optimal fundamental impedance (3). Then, let (3) = (6), that is, By solving the equation, we can find the value of the single-section microstrip line as a matching circuit to satisfy the F-type drain voltage and current waveform;

[0083] Step S3: Designing an output matching circuit, including the following steps:

[0084] The best fundamental impedance value is obtained by a three-frequency design method. First, load pulling is performed at the center frequency of 1.25 GHz of 0.5-2 GHz to obtain the best fundamental impedance at the center frequency of 1.25 GHz. Then, load pulling is performed at the center frequency of 0.875 GHz of 0.5-1.25 GHz to obtain the best fundamental impedance at 0.875 GHz. Similarly, the best fundamental impedance at the center frequency of 1.625 GHz of 1.25 GHz-2 GHz is obtained by load pulling. Then, the three best fundamental impedance points are connected, and the center point is selected as the best fundamental impedance value.

[0085] Then, a single-section microstrip line is used to design the matching circuit. Finally, the optimal fundamental impedance trajectory of the entire frequency band is obtained on the Smith chart through optimized tuning, and the output matching circuit is designed.

[0086] Step S4: designing a bias circuit. For the bias circuit, a λ / 4 wavelength line design is adopted, the gate voltage is set to -2.8V, and the drain bias voltage is set to 28V;

[0087] Step S5: designing an input matching circuit, using the same design method as the output matching circuit, so as to further reduce the volume, and finally realize an ultra-compact broadband class F power amplifier;

[0088] Step S6: Design and build the overall circuit, simulate and debug the overall circuit, and optimize the overall circuit according to the simulation results to further expand the bandwidth and improve the efficiency.

[0089] The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for those of ordinary skill in the art, without departing from the principles of the present invention, the present invention can also be improved and modified in a number of ways, and these improvements and modifications also fall within the scope of protection of the claims of the present invention. It is obvious to those skilled in the art that various modifications to these embodiments can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown in the present application, but will conform to the widest range consistent with the principles and novel features disclosed in the present application.

Claims

1. A design method for a broadband class F power amplifier based on an ultra-compact output network, characterized in that: The following steps are involved: Step S1: design a standard class F power amplifier; Step S2: Design a single-section microstrip line as a matching circuit to satisfy the F-type drain voltage and current waveform, specifically including the following steps: The optimal fundamental impedance is calculated based on the voltage and current formula of the Class F power amplifier: Where Vdc is the DC voltage, Imax is the maximum drain current; At the same time, according to the voltage and current formula of a single-section microstrip line, the impedance expression of a single-section microstrip line is: Where Z0 represents the characteristic impedance, Z L represents load impedance, β represents phase constant, and l represents electrical length; Then let the impedance of a single microstrip line Z in =Z F , Right now By solving the equation, we can obtain the values ​​of the single-section microstrip line as a matching circuit to satisfy the F-type drain voltage and current waveforms; Step S3: Designing an output matching circuit, including the following steps: The best fundamental impedance value is obtained by a three-frequency design method. First, load pulling is performed at the center frequency of 1.25 GHz of 0.5-2 GHz to obtain the best fundamental impedance at the center frequency of 1.25 GHz. Then, load pulling is performed at the center frequency of 0.875 GHz of 0.5-1.25 GHz to obtain the best fundamental impedance at 0.875 GHz. Similarly, the best fundamental impedance at the center frequency of 1.625 GHz of 1.25 GHz-2 GHz is obtained by load pulling. Then, the three best fundamental impedance points are connected, and the center point of the three best fundamental impedance points is selected as the best fundamental impedance value. Then, a single-section microstrip line is used to design the matching circuit. Finally, the optimal fundamental impedance trajectory of the entire frequency band is obtained on the Smith chart through optimized tuning, and the output matching circuit is designed. Step S4: designing a bias circuit; Step S5: designing an input matching circuit; Step S6: construct the overall circuit and optimize the overall circuit.

2. The design method of a broadband class F power amplifier based on an ultra-compact output network according to claim 1, characterized in that: In step S5, the input matching circuit is designed using the same method as the output matching circuit.

3. The design method of a broadband class F power amplifier based on an ultra-compact output network according to claim 1, characterized in that: The input end of the input matching network serves as the power input end, the output end thereof is connected to the transistor gate, and the gate bias circuit is connected in parallel with the transistor gate; The drain of the transistor is connected in parallel with the drain bias circuit, the drain of the transistor is connected to the input end of the output matching network, and the output end of the output matching network serves as the power output end; The input matching network includes a microstrip line TL1, one end of the microstrip line TL1 is connected to the transistor gate, and the other end is connected to the power input terminal; The gate bias circuit includes a λ / 4 microstrip line TL2; one end of the microstrip line TL2 is connected in parallel with the transistor, and the other end is connected to the gate power supply; The output matching network includes a microstrip line TL3, one end of the microstrip line TL3 is connected to the transistor drain, and the other end is connected to the power output terminal; The drain bias circuit includes a λ / 4 microstrip line TL4; one end of the microstrip line TL4 is connected in parallel with the transistor, and the other end is connected to the drain power supply.

4. The design method of a broadband class F power amplifier based on an ultra-compact output network according to claim 3, characterized in that: The amplifier is implemented using transistors.

5. The design method of a broadband class F power amplifier based on an ultra-compact output network according to claim 3, characterized in that: A gate bias circuit is provided between the input matching circuit and the transistor, and its bias voltage is -2.8V.

6. The design method of a broadband class F power amplifier based on an ultra-compact output network according to claim 3, characterized in that: A bias circuit is provided at the drain of the transistor, and its bias voltage is 28V.

7. The broadband class F power amplifier based on an ultra-compact output network as described in claim 1, characterized in that: It includes an input matching network, a gate bias circuit, a transistor, an output matching network, and a drain bias circuit, wherein: The input end of the input matching network serves as a power input end, the output end thereof is connected to the gate of the transistor, and the gate bias circuit is connected in parallel with the gate of the transistor; The transistor drain is connected in parallel with the drain bias circuit, the transistor drain is connected to the input end of the output matching network, and the output end of the output matching network serves as the power output end; The input matching network includes a microstrip line TL1, one end of the microstrip line TL1 is connected to the transistor gate, and the other end is connected to the power input end; The gate bias circuit includes a λ / 4 microstrip line TL2; one end of the microstrip line TL2 is connected in parallel with the transistor, and the other end is connected to the gate power supply; The output matching network includes a microstrip line TL3, one end of the microstrip line TL3 is connected to the transistor drain, and the other end is connected to the power output end; The drain bias circuit includes a λ / 4 microstrip line TL4; one end of the microstrip line TL4 is connected in parallel with the transistor, and the other end is connected to the drain power supply.

8. The broadband class F power amplifier based on ultra-compact output network according to claim 7, characterized in that: The amplifier is implemented by transistors.

9. The broadband class F power amplifier based on ultra-compact output network according to claim 7, characterized in that: A gate bias circuit is provided between the input matching circuit and the transistor, and its bias voltage is -2.8V.

10. The broadband class F power amplifier based on ultra-compact output network according to claim 7, characterized in that: A bias circuit is provided at the drain of the transistor, and its bias voltage is 28V.

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