Comparator

Abstract

The present invention relates to an asynchronous comparator exhibiting low average power consumption and short propagation delay. The comparator bias current depends on the differential input voltage in the following way: when the differential input voltage is low, the current increases, and when the differential input voltage is high, the current decreases.

Description

Technical Field

[0001] The present invention generally relates to a comparator for comparing two different input voltages and outputting a digital signal indicating which input voltage is greater. Background Art

[0002] A comparator is a device that compares the voltage or current between two separate analog input terminals. The output of a comparator is usually a digital output that is ideally binary, for example high if the first input terminal is higher than the second input terminal and low if the opposite is true.

[0003] A comparator can be constructed from discrete components to act as a differential amplifier with high gain and can be used to measure or digitize analog signals. As such, a comparator can be used as an analog-to-digital converter.

[0004] Operational amplifiers (or op-amps for short) are widely used in the electronics industry to act as comparators. A comparator typically has a reference signal applied to one of the inputs. On the other input, a signal is applied that is compared with the reference signal. If the voltage of the signal to be compared is less than the amplitude of the reference voltage, the output of the comparator may be (approximately) equal to the positive supply voltage. On the other hand, a reverse voltage comparator may be provided by simply transposing the signal at the reverse input and the signal at the non-reversing input.

[0005] Comparators can be used in many types of applications, and in some applications, for example, the amplitude of the analog signal can change rapidly. The comparator should have a fast response time. This means that the comparator must quickly determine whether the amplitude of the analog signal is greater than or less than a predetermined reference signal used as a threshold. In many applications, it may be desirable to provide a comparator that operates at high speed. However, in many applications, it may also be desirable to provide a comparator that can operate under low voltage conditions and with low power consumption.

[0006] Conventional high-speed comparators with op-amps rely on a bias that is provided as a reference signal. For high-speed operation, additional circuitry is usually required, which is usually used to generate a bias signal that can increase the speed. The additional circuitry consumes additional area, which is very undesirable in some applications. Because of this, there is a trade-off between the space required for the additional circuitry and the increase in the operating speed of the comparator. As indicated above, operation under low voltage conditions is also challenging, and there is also a trade-off between the operating speed of the comparator and power consumption.

[0007] In view of the above, there is a need for a high speed comparator that can operate under low voltage conditions with a small number of circuit components and thus a small package. Summary of the invention

[0008] It is an object of the present invention to provide a comparator that addresses at least some of the above-mentioned drawbacks or disadvantages of the prior art.

[0009] In a first aspect of the invention, the object is provided by a comparator arranged to operate at low average power consumption to compare a first analog input signal with a second analog input signal, the comparator comprising:

[0010] - a first differential input stage comprising two input switches forming an input differential pair, the first differential input stage being used to compare transitions between a first analog input signal and a second analog input signal;

[0011] - an output stage for providing a digital output of the comparator in dependence on a difference between the first analog input signal and the second analog input signal;

[0012] - a bias current stage for providing a bias current to the differential input stage, characterized in that the bias current stage provides a bias current corresponding to the first analog input signal and the second analog input signal.

[0013] For example, comparators used in Internet of Things applications, ie, IoT applications, should be optimized to achieve low average power consumption and short propagation delay.

[0014] It is known that a comparator has a so-called bias current which depends on the difference between the analog input signals at the two inputs of the comparator. If the differential input voltage is tending towards zero, the bias current will increase. On the other hand, if the differential input voltage is increasing and moving away from zero, the bias current will decrease.

[0015] Known comparators may have a bias current generated by a transistor, wherein the gate terminal of the transistor is connected to one of the inputs.

[0016] Known comparators have the disadvantage of not being able to be controlled very accurately. In addition, they have large variations with process changes. Although adaptive bias comparators present more control over the bias current, they have limitations in terms of propagation delay and require an external current reference.

[0017] However, the comparator according to the first aspect of the invention comprises a bias current stage for providing a bias current to the differential input stage of the comparator, wherein the bias current stage provides the bias current corresponding to the first analog input signal and the second analog input signal. Therefore, there is feedback from the comparator itself as a feed for the bias current, so that no external current generator is required. Therefore, the comparator according to the first aspect of the invention can operate at low average power consumption or ultra-low average power consumption.

[0018] Typically, the propagation delay of a comparator strongly depends on the supply voltage. An increased supply and higher power consumption have a positive effect on reducing the propagation delay.

[0019] With the comparator according to the first aspect of the invention, propagation delay is also reduced, so the comparator outputs a rapid response to the voltage differential on the input terminals without negatively affecting power consumption, ie at low average power consumption or ultra-low average power consumption.

[0020] With the bias current stage of the comparator according to the first aspect of the invention, as the voltage differential across the input decreases, the bias current will increase. This is achieved by feedback from the output of the comparator to the current bias stage, rather than feedback to the input terminal of the comparator as known in the prior art.

[0021] In other examples, the bias current stage is arranged to increase the bias current to the differential input stage when the transition between the first analog input signal and the second analog input signal decreases.

[0022] The bias current stage can be configured by a single switch such as a transistor, wherein the source of the transistor is connected to Vdd and its drain is connected to the sources of the two input switches of the first differential input stage. Feedback from the comparator (i.e., from its output or more specifically from the output of the first differential input stage or the second differential input stage) is connected to the gate of the bias current stage switch to control the bias current.

[0023] In other examples, the comparator further includes:

[0024] - a further differential input stage comprising two input switches forming a further differential pair, and said further differential pair is connected to the output stage in parallel with the first differential input stage.

[0025] In other examples, the comparator further includes:

[0026] - an enabling stage connected in parallel with the first differential input stage to the output stage for enabling the comparator.

[0027] The startup stage can eliminate the uncertainty of the output of the comparator at startup. The output of the comparator can output a certain high level or low level at startup, which is unpredictable and can switch back and forth between states independently of the input. Therefore, the output can provide a fall state at startup until the power supply provides a significant power level to the comparator to operate correctly. This is particularly relevant for such a comparator in applications where the circuit to which the comparator is connected or even the comparator itself becomes unpowered or in sleep mode for a period of time.

[0028] In other examples, the comparator further includes:

[0029] - A current mirror stage connected in series between the start-up stage and the further differential input stage.

[0030] The current mirror is formed by two transistors of the bias current stage in a current mirror configuration, wherein the gates of the two transistors are connected to each other. The current mirror feeds back current to the first differential input stage.

[0031] In other examples, the comparator further includes:

[0032] - a second differential input stage comprising two input switches forming a second input differential pair, and said second differential input stage is connected in series between the first differential pair and the output stage.

[0033] The second differential input stage (particularly for use as part of feedback for the bias current stage) may also reduce the power consumption of the comparator, particularly for typical applications of the comparator.

[0034] In other examples, the comparator further includes:

[0035] - a stabilization stage comprising a switch and a resistor and connected between the further differential pair and the second input differential pair.

[0036] In other examples, the switches of the comparator are composed of MOSFETs.

[0037] In other examples, the comparator is an asynchronous comparator.

[0038] In a second aspect of the present invention, there is provided a sensor device comprising:

[0039] - a sensor arranged to take measurements and arranged to generate an analog input signal;

[0040] - a digital control unit arranged for processing the sensor measurement data;

[0041] - A comparator circuit for converting an analog input signal of sensor data into digital sensor measurement data for use by a digital control unit, and wherein the comparator circuit comprises a comparator according to any of the preceding disclosures.

[0042] In a third aspect of the invention, there is provided a comparator arranged to operate at low average power consumption to compare a first analog input signal with a second analog input signal, the comparator comprising:

[0043] a first transistor providing a bias current to the comparator, the gate of the first transistor being connected to the gate and drain of the second transistor, and the drain of the first transistor being connected to the sources of the third transistor and the fourth transistor;

[0044] - a third transistor and a fourth transistor, which form a first differential pair, and the gate of the third transistor and the gate of the fourth transistor are connected to the input node of the comparator, and the drain of the third transistor and the drain of the fourth transistor are connected to the gate and source of the fifth transistor and the gate and source of the sixth transistor, respectively, and the drain of the third transistor and the drain of the fourth transistor are connected to the output stage or the second stage of the comparator;

[0045] - a sixth transistor having a gate and a source connected to the gate of the seventh transistor;

[0046] - a seventh transistor having a drain connected to the source and the gate of the second transistor.

[0047] In other examples, the comparator further includes:

[0048] - a first resistive element connected to the source of the seventh transistor.

[0049] In other examples, the comparator further includes:

[0050] - an eighth transistor and a ninth transistor, the source of the eighth transistor and the source of the ninth transistor being connected together to the drain of the seventh transistor.

[0051] In other examples, the comparator further includes:

[0052] - a tenth transistor having its gate and source connected together to the drain of the ninth transistor.

[0053] The above and other features and advantages of the present invention will be better understood from the following description with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals represent the same components or components that perform the same or equivalent functions or operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 schematically depicts an adaptive self-biasing comparator according to an aspect of the invention;

[0055] Figure 2 schematically depicts an embodiment of an adaptive self-biasing comparator according to an aspect of the present invention;

[0056] Figure 3 shows the comparator bias current relative to the differential input voltage. DETAILED DESCRIPTION

[0057] Figure 1Comparators according to a first aspect of the invention are schematically depicted. Compared to comparators known in the art, these comparators are arranged to operate at low average power consumption, thereby drawing a non-negligible amount of power during inactive phases. The comparators according to the invention have a lower average power consumption, having the property of reducing power consumption when a first input signal moves away from a second (i.e., reference) signal and increasing power consumption when the first input signal moves more toward the second reference signal so that power consumption is reduced when the input is less critical and (relatively) increased when the input becomes more critical to approaching the reference and output changes are expected.

[0058] Comparator 10 includes input stage 20, output stage 40, and a bias current stage, but may include additional components.

[0059] The first differential input stage 20 comprises two input switches forming an input differential pair 20 for comparing transitions between a first analog input signal 21 and a second analog input signal 22. The output stage 40 of the comparator 10 is arranged for providing a digital output 41 of the comparator 10 in dependence on the difference between the first analog input signal 21 and the second analog input signal 22. The comparator further comprises feedback 30 in the form of a bias current stage 30 providing a bias current to the differential input stage 20, the bias current corresponding to the first analog input signal 21 and preferably also to the second analog input signal 22.

[0060] Figure 2 A comparator according to a first aspect of the invention is schematically depicted. The comparator is arranged to operate at low average power consumption to compare a first analog input signal with a second analog input signal (e.g., to compare an input (voltage) of an Internet of Things sensor device or a wireless sensor node with a predetermined threshold (voltage)).

[0061] The comparator 10 includes a first differential input stage 12, which includes two input switches 12a, 12b forming an input differential pair 12a, 12b for comparing the transition between the first analog input signal 11a and the second analog input signal 11b. The comparator 10 also includes an output stage 13 for providing a digital output 13a of the comparator 10 according to the difference between the first analog input signal 11a and the second analog input signal 11b. The comparator also includes a bias current stage 14 for providing a bias current 14a to the differential input stage. The bias current stage of the comparator 10 provides a bias current 14 corresponding to the first analog input signal 11a and the second analog input signal 11b.

[0062] Figure 2An adaptive self-biased comparator is schematically depicted. Transistor 2a provides a bias current to the comparator. The differential pair 1a-1b compares two input voltages connected to the gates of transistors 1a-1b. The current flowing through 1a and 1b flows through 3a and 3b respectively. The voltage on the drain of transistors 3a-3b is used by an output stage 6 to generate the output of the comparator. The drain of transistor 3b is connected to the gate of transistor 3c. Resistor 4 is connected to the source of transistor 3c. An additional differential pair formed by transistors 5a-5b is provided in FIG. Figure 2 , but is not strictly necessary. In some cases, it can reduce power consumption. The current mirror formed by transistors 2a to 2b feeds back current to the differential pair formed by transistors 1a to 1b. The ratio between transistors 2a and 2b can take any value. Resistor 4 is required to keep the circuit stable for any value of the ratio between transistors 2a and 2b. When a differential pair formed by transistors 5a to 5b is used, transistor 2c is used to maintain symmetry. A starter circuit 7 may be required to start the comparator, and the starter circuit 7 may be activated at least once.

[0063] Figure 3 Presents the expected bias current of the comparator relative to the differential input voltage for any values ​​of the components.

[0064] Although the present invention has been described with reference to specific embodiments, it will be apparent to those skilled in the art that the present invention is not limited to these specific embodiments and that the scope of the present invention is determined by the appended claims.

[0065] Expressions such as "comprise", "include", "incorporate", "contain", "is" and "have" etc. should be interpreted in a non-exclusive manner when interpreting the specification and its related claims, i.e., interpreted as allowing that other items or components not explicitly defined are also present. References to the singular should also be interpreted as references to the plural and vice versa.

[0066] In addition, the present invention may also be embodied using fewer components than those provided in the embodiments described herein, wherein one component performs multiple functions. Likewise, the present invention may also be embodied using more components than those depicted in the figures, wherein the functions performed by one component in the embodiments provided are distributed over multiple components.

[0067] Those skilled in the art will readily appreciate that each stage of the comparator includes switches, and these switches may be embodied by several types of switches known in the art, such as but not limited to transistors, field effect transistors, MOSFETs, NMOS, etc.

[0068] Other variations of the disclosed embodiments may be understood and effected by those skilled in the art in practicing the claimed invention, by studying the drawings, the disclosure and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single stage circuit or other unit may perform the functions of several items recited in a claim. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be construed as limiting the scope thereof.

Claims

1. A comparator arranged to operate at low average power consumption to compare a first analog input signal with a second analog input signal, the comparator comprising: - a first transistor, which is used to provide a bias current to the comparator, the gate of the first transistor is connected to the gate and drain of the second transistor, the drain of the first transistor is connected to the source of the third transistor and the source of the fourth transistor, and the source of the first transistor is connected to the Vdd power supply terminal; - the third transistor and the fourth transistor, which form a first differential pair, and the gate of the third transistor and the gate of the fourth transistor are connected to the input node of the comparator, the drain of the third transistor and the drain of the fourth transistor are respectively connected to the gate and source of the fifth transistor, the gate and source of the sixth transistor and the two input terminals of the output stage of the comparator, and the drain of the third transistor and the drain of the fourth transistor are connected to the output stage or the second stage of the comparator; - the sixth transistor, whose gate and source are connected to the gate of the seventh transistor; - the seventh transistor, whose drain is connected to the source and the gate of the second transistor, wherein the output terminal of the output stage is electrically connected to the gate of the first transistor, and The comparator further comprises an eighth transistor, a source of the eighth transistor being connected to a drain of the seventh transistor, A gate of the eighth transistor is electrically connected to a gate of the fourth transistor; and A drain of the eighth transistor is electrically connected to a drain of the second transistor.

2. The comparator according to claim 1, further comprising: - a first resistive element connected to the source of the seventh transistor.

3. The comparator according to claim 1 or 2, further comprising: - a ninth transistor, the source of the ninth transistor being connected to the drain of the seventh transistor; The gate of the ninth transistor is electrically connected to the gate of the third transistor; as well as The drain of the ninth transistor is electrically connected to the Vdd power supply terminal.

4. The comparator according to claim 3, further comprising: - a tenth transistor, whose drain and gate are connected together to the drain of the ninth transistor, and whose source is electrically connected to the Vdd power supply terminal.

5. A sensor device comprising: - a sensor arranged to take measurements and arranged to generate an analog input signal; - a digital control unit arranged for processing the sensor measurement data; - a comparator circuit for converting analog input signals of sensor data into digital sensor measurement data for the digital control unit, and wherein the comparator circuit comprises a comparator according to any one of claims 1 to 4.

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