Backplane footprint for high-speed, high-density electrical connectors

Abstract

The printed circuit board includes: a plurality of layers, the plurality of layers including conductive layers separated by dielectric layers; and at least one via configured for solder attachment to a connector lead of a surface mount connector, the at least one via including a conductive element extending from an upper surface of the printed circuit board through one or more of the plurality of layers, the conductive element having a recess in its surface. The recess is configured to receive a tip of a connector lead of the surface mount connector. The printed circuit board may have a via pattern including a signal via and a ground via.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority based on provisional application No. 62 / 683,146 filed on June 11, 2018, the entire contents of which are incorporated herein by reference. Background Art

[0003] The present patent application relates generally to interconnection systems for interconnecting electronic components, such as interconnection systems including electrical connectors.

[0004] Electrical connectors are used in many electronic systems. Often, it is easier and more cost-effective to manufacture the system as separate electronic components, such as printed circuit boards ("PCBs"), that can be joined together with electrical connectors. Known arrangements for joining several printed circuit boards have one printed circuit board used as a backplane. Other printed circuit boards, called "daughter boards" or "daughter cards," can be connected through the backplane.

[0005] Known base plates have the form of printed circuit boards on which many connectors can be mounted. Conductive traces in the base plate can be electrically connected to signal conductors in the connectors so that signals can be routed between the connectors. Daughter cards can also be mounted with connectors thereon. The connectors mounted on the daughter cards can be inserted into the connectors mounted on the base plate. In this way, signals can be routed among the daughter cards through the base plate. The daughter cards can be inserted into the base plate at right angles. Therefore, connectors for these applications can include right-angle bends and are commonly referred to as "right-angle connectors." Other known connectors include, but are not limited to, orthogonal midplane connectors and orthogonal connectors that are directly attached without a midplane.

[0006] Connectors can also be used in other configurations to interconnect printed circuit boards and to interconnect other types of devices, such as cables, to printed circuit boards. Sometimes, one or more smaller printed circuit boards can be connected to another larger printed circuit board. In such a configuration, the larger printed circuit board can be referred to as a "motherboard," and the printed circuit boards connected thereto can be referred to as daughterboards. In addition, boards of the same or similar size can sometimes be aligned in parallel. Connectors used in these applications are often referred to as "stacking connectors" or "mezzanine connectors."

[0007] A "midplane" configuration is also sometimes used. A midplane is similar to a backplane in that the midplane has connectors positioned to connect with multiple daughterboards. However, in a midplane, the connectors are attached to opposing surfaces of the midplane so that daughterboards can be mounted on both sides of the midplane in a system. Typically, the daughterboards on one side are orthogonal to those mounted on the other side, which can shorten the signal path from one daughterboard to another relative to aligning the daughterboards in parallel and connecting through the backplane. Specialized connectors are sometimes used for the midplane configuration, but it is also possible to create this configuration using the same connectors used in the backplane configuration.

[0008] It is also possible to create an orthogonal arrangement of daughterboards without a midplane by using connectors on a daughterboard on one side of an electronic component that can directly mate with connectors on a daughterboard on the other side of the component. This configuration is referred to as "direct-mate orthogonal." This configuration can be created by using right-angle connectors on a daughterboard on one side of the component that can be used on a daughterboard in a backplane configuration. Connectors designed for this direct-mate orthogonal configuration are used on the board on the other side of the component.

[0009] Regardless of the exact application, the design of electrical connectors must keep pace with trends in the electronics industry. Electronic systems have generally become smaller, faster, and more complex in functionality. Because of these changes, the number of circuits in a given area of ​​an electronic system and the frequency of circuit operation have increased significantly in recent years. Current systems transfer more data between printed circuit boards, and electrical connectors are required to be electrically capable of handling more data at higher speeds than connectors even a few years ago.

[0010] In high-density, high-speed connectors, electrical conductors may be so close to each other that electrical interference may exist between adjacent signal conductors. To reduce interference and otherwise provide desired electrical performance, shielding members are often placed between or around adjacent signal conductors. Shields can prevent signals carried on one conductor from creating "crosstalk" on another conductor. Shields can also affect the impedance of each conductor, which can also affect electrical performance.

[0011] Other techniques can be used to control the performance of the connector. For example, transmitting signals differentially can reduce crosstalk. The differential signal is carried on a pair of conductive paths, called a "differential pair". The voltage difference between the conductive paths represents the signal. Typically, the differential pair is designed to have preferential coupling between the pair of conductive paths. For example, the two conductive paths of the differential pair can be arranged to extend closer to each other than adjacent signal paths in the connector. It is not desirable to have shielding between the pair of conductive paths, but shielding can be used between the differential pairs. Electrical connectors can be designed for differential signals as well as for single-ended signals.

[0012] In an interconnect system, such a connector is attached to a printed circuit board, one of which can be used as a base plate for routing signals between electrical connectors and for providing a reference plane to which a reference conductor in the connector can be grounded. Typically, the base plate is formed as a multilayer assembly made of a stack of dielectric sheets sometimes referred to as "prepregs". Some or all of the dielectric sheets may have a conductive film on one or both surfaces. Some of the conductive films may be patterned using photolithography or laser printing techniques to form conductive traces for interconnection between circuit boards, circuits, and / or circuit elements. Other conductive films in the conductive film may remain substantially intact and may be used as a ground plane or power plane to provide a reference potential. The dielectric sheets may be formed into an integral board structure, for example, by pressing the stacked dielectric sheets together under pressure.

[0013] As in the case of a connector attached to a printed circuit board, the electrical performance of the printed circuit board depends at least in part on the structure of the conductive traces, ground planes, and vias formed in the printed circuit board. In addition, as the density of signal conductors and the operating frequency of the connector increase, electrical performance issues become more severe.

[0014] In order to make electrical connections to conductive traces or ground / power planes, holes may be drilled through the printed circuit board. These holes or "vias" are filled or plated with metal so that the via is electrically connected to one or more of the conductive traces or planes through which it passes.

[0015] In one method for attaching a connector to a printed circuit board, called "press-fit technology," contact pins or contact "tails" from the connector may be inserted into vias, with or without the use of solder. The vias are sized to receive the contact tails of the connector. In another method for attaching a connector to a printed circuit board, called "surface mount technology," the vias are provided with conductive pads on the surface of the printed circuit board, and the contact pins of the connector are soldered to the conductive pads. In surface mount technology, the diameter of the vias may be smaller than the diameter of the vias for receiving the contact pins of the connector.

[0016] As mentioned above, the trend of electronic systems is toward increasing miniaturization, higher speed operation, and functional complexity. In order to meet the requirements of miniaturization, the density of connector pins must be increased while avoiding degradation of electrical performance. Similarly, the printed circuit board to which the high-speed, high-density connector is attached must be miniaturized while maintaining electrical performance. In addition, the connector, the printed circuit board, and the connection between the connector and the printed circuit board must have high reliability.

[0017] A press-fit connector has a contact tail that is inserted into a hole in a corresponding via in a printed circuit board. The contact tail can be slightly deformed when it is inserted into the via hole, thereby providing a reliable electrical and mechanical connection. In addition, the contact tail can be soldered to the printed circuit board. However, the miniaturization of the press-fit connector is limited by the design of the press-fit contact tail. In other words, the press-fit contact tail has a minimum width to ensure reliable operation. In addition, a printed circuit board designed for attachment to a press-fit connector requires an area on the upper portion of the printed circuit board where the via is large enough to receive the press-fit contact tail, leaving little or no area for routing signal traces.

[0018] Surface mount connectors do not require holes for receiving contact tails. Instead, the contact pins of the surface mount connector physically contact the conductive pads on the surface of the printed circuit board. The contact pins of the connector are soldered to the conductive pads to provide electrical connection. Although the surface mount connector does not have the disadvantage of requiring sufficiently large via holes to receive the contact tails, the surface mount connector may have problems with reliable electrical contact between the conductive pads and the contact pins on the printed circuit board. In particular, due to manufacturing tolerances, the surface mount contact pins may not be coplanar. In addition, due to manufacturing tolerances, the conductive pads on the printed circuit board may not be coplanar. Therefore, when the surface mount connector is placed in contact with the printed circuit board, some of the surface mount contact pins may contact the conductive pads, while others are spaced apart above the conductive pads. In the soldering operation, the solder can bridge the gap between the contact pins and the conductive pads, but in some cases, a disconnected connection may result. Even if the solder does bridge the gap between the contact pins and the conductive pads, the connection may also be unreliable.

[0019] Therefore, a need exists for an improved printed circuit board and connector footprint for high speed, high density electrical applications. Summary of the invention

[0020] The inventors have recognized that new structures are needed for interconnection systems in order to meet the requirements for smaller size, higher operating frequency and increased complexity. An interconnection system according to an embodiment includes a surface mount connector and a printed circuit board having a structure for solder attachment to connector leads of the surface mount connector. In an embodiment, the printed circuit board includes one or more conductive elements on its upper surface for solder attachment to each connector lead of the surface mount connector. The conductive element may include a via extending through one or more layers of the printed circuit board.

[0021] Each of the conductive elements is provided with a recess that receives the tip of the connector lead. The tip of the connector lead of the surface mount connector may be tapered or otherwise configured for insertion into a recess in a conductive element of a printed circuit board. The recess enables a more reliable solder connection between the conductive element and the connector lead of the surface mount connector than a conductive element having a flat surface. The recess alleviates reliability issues caused by a lack of coplanarity of the connector leads. The interconnect system enables a reduction in area requirements compared to interconnect systems that rely on press-fitting connector pins into corresponding vias on a printed circuit board.

[0022] According to an embodiment, a printed circuit board includes: at least one dielectric layer; and at least one conductive element formed on the dielectric layer and configured for solder attachment to a connector lead of a surface mount connector, the conductive element having a recess in a surface thereof.

[0023] According to another embodiment, a printed circuit board includes: a plurality of layers, the plurality of layers including conductive layers separated by dielectric layers; and at least one via configured for solder attachment to a connector lead of a surface mount connector, the at least one via including a conductive element extending from an upper surface of the printed circuit board through one or more of the plurality of layers, the conductive element having a recess in a surface thereof.

[0024] According to another embodiment, a printed circuit board includes: a plurality of layers, the plurality of layers including conductive layers separated by dielectric layers; and via patterns formed in the plurality of layers, each of the via patterns including: a first signal via and a second signal via extending from a first surface of the printed circuit board to a breakout layer of the conductive layer; and a ground via connected to one or more of the conductive layers, wherein the signal via and the ground via each include a conductive element having a recess in a surface thereof.

[0025] In some embodiments, the recess has a depth in the range of 0.05 mm to 0.30 mm.

[0026] In some embodiments, the recess has an aspect ratio of depth to width in the range of 1-4.

[0027] In some embodiments, the via extends from the upper surface of the printed circuit board to the breakout layer of the conductive layer.

[0028] In some embodiments, the recess is located on the center of the via.

[0029] In some embodiments, the recess is offset from the center of the via.

[0030] In some embodiments, at least one via is backdrilled from the second surface of the printed circuit board.

[0031] In some embodiments, the recess comprises a tapered portion.

[0032] In some embodiments, the recess comprises a truncated conical portion.

[0033] In some embodiments, the recess comprises a cylindrical portion.

[0034] In some embodiments, the recess comprises a hemispherical portion.

[0035] In some embodiments, the via extends from the upper surface of the printed circuit board to the ground layer of the conductive layer.

[0036] In some implementations, the recess is configured to receive a tip of a connector lead of a surface mount connector.

[0037] In some implementations, the recess is configured to receive solder of a solder joint between a connector lead of the surface mount connector and the at least one via.

[0038] In some embodiments, the recess is configured to allow tips of connector leads of the surface mount connector to extend below the upper surface of the printed circuit board.

[0039] In some embodiments, the at least one via includes a conductive pad on the upper surface of the printed circuit board, and wherein the conductive pad has a larger diameter than the conductive element of the at least one via.

[0040] In some embodiments, at least one via includes a pillar-shaped conductor extending at least partially through the printed circuit board.

[0041] In some embodiments, at least one via is filled with a conductive material except for the recess.

[0042] In some implementations, at least one via is configured for attachment to a superelastic connector lead of a surface mount connector.

[0043] According to another embodiment, a method of manufacturing a printed circuit board is provided, the printed circuit board including a plurality of conductive layers separated by dielectric layers. The method includes drilling a hole through the printed circuit board; filling the hole with a conductive material to form a via; and forming a recess in the conductive material of the via at an upper surface of the printed circuit board.

[0044] According to another embodiment, an interconnect system includes: a surface mount component including surface mount leads; and a printed circuit board including conductive layers separated by dielectric layers, and vias configured for solder attachment to corresponding leads of the surface mount component, each of the vias including a conductive element having a recess in an upper surface thereof.

[0045] In some embodiments, at least 95% of the surface mount leads include distal tips extending into respective recesses. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] For a better understanding of the disclosed technology, reference is made to the drawings which are incorporated herein by reference, and in which:

[0047] Figure 1 and Figure 2 is a cross-sectional view of an interconnect system including a surface mount electrical connector and a printed circuit board according to an embodiment;

[0048] Figure 3 is a cross-sectional view of a printed circuit board showing a via according to an embodiment;

[0049] Figure 4 is a cross-sectional view of a via having a truncated cone-shaped recess according to an embodiment;

[0050] Figure 5 is a cross-sectional view of a via having a cylindrical recess according to an embodiment;

[0051] Figure 6 is a cross-sectional view of a via having a recess having a hemispherical portion and a cylindrical portion according to an embodiment;

[0052] FIG. 7A to FIG. 7C is a cross section of a printed circuit board showing solder joints between connector leads of a surface mount connector and the printed circuit board according to an embodiment;

[0053] 8A to 8C are cross-sections of a printed circuit board showing solder joints between connector leads of a surface mount connector according to the prior art and the printed circuit board; and

[0054] Fig. 9 is a top view of a printed circuit board showing a via pattern according to an embodiment. DETAILED DESCRIPTION

[0055] The inventors have recognized and appreciated that, while considerable focus has been placed on providing improved electrical connectors in order to improve the performance of interconnect systems, at some very high frequencies, significant performance improvements may be achieved through inventive designs for printed circuit boards. According to some embodiments, improvements may be achieved through inventive designs for connector footprints and for details of the connector footprints, including but not limited to vias in the connector footprints. For example, the inventive designs may improve the electrical performance of the interconnect system, may improve the reliability of the connection between the printed circuit board and the connector, and / or may facilitate further miniaturization of the interconnect system.

[0056] As used herein, the terms "connector footprint" and "backplane footprint" refer to elements of a printed circuit board configured to interact with a connector. The connector footprint may include a plurality of via patterns, and each via pattern may include one or more signal vias and one or more ground vias. Each via pattern may also include one or more additional vias configured for shielding, impedance control, etc. However, the via pattern is not limited with respect to the number or type of vias. In addition, the terms "printed circuit board" and "backplane" are used interchangeably herein to refer to a structure including alternating conductive layers and dielectric layers. However, it should be understood that the attachment techniques described herein can be used to attach a connector or any other type of electrical component to a substrate having layers and having connections between layers, the substrate including a daughter board or a midplane. These techniques can be used with substrates of any thickness.

[0057] In some embodiments, a printed circuit board may include a single dielectric layer and a single conductive layer. However, the techniques described herein may provide valuable advantages in speed and / or manufacturing cost when used with a multilayer board such as a board having more than 10 conductive layers or more than 20 layers or in some embodiments more than 40 layers carrying signal traces. Thus, in some embodiments, the techniques described herein may be applied to printed circuit boards having between 10 layers and 50 layers of signal traces.

[0058] Figure 1 and Figure 2 An example of an electrical interconnect system that can be used in an electronic system according to an embodiment is shown. The electrical connection system includes a connector that can be electrically and mechanically connected to a printed circuit board. In this example, a surface mount connector 100 is configured to be attached to a printed circuit board 110.

[0059] The surface mount connector 100 may include multiple pairs of signal leads and corresponding ground leads. Figure 1 and Figure 2Surface mount connector 100 includes signal leads 120 and 122 and corresponding ground leads 130 and 132. Signal leads 120 and 122 may form a differential pair. Additional ground leads not shown may correspond to each pair of signal leads.

[0060] like Figure 1 and Figure 2 As shown in , the signal leads 120 and 122 of the surface mount connector 100 can have beveled tips, and the ground leads 130 and 132 can have gradually tapered tips. In addition, the ground leads 130 and 132 can have curved tips. As discussed below, these features make it possible to insert the tips into the recesses in the various vias of the printed circuit board 110. Typically, the size and shape of the tips of the connector leads of the surface mount connector 100 are designed to be inserted into the corresponding recesses of the printed circuit board 110. The tips can be beveled, gradually tapered, reduced in size, or otherwise configured to be inserted into the corresponding recesses. In some cases, it may not be necessary to modify the tips of the connector leads, and the tips can be cylindrical, rectangular, or have any other suitable shape.

[0061] The printed circuit board 110 may include a plurality of conductive layers separated by dielectric layers, as described below. For example, the printed circuit board 110 may include conductive layers 136 separated by dielectric layers 138 in an alternating arrangement. The printed circuit board 110 may include signal vias 140 corresponding to the signal leads 120 and signal vias 142 corresponding to the signal leads 122. The printed circuit board 110 may also include ground vias 150 corresponding to the ground leads 130 and ground vias 152 corresponding to the ground leads 132. The signal leads 120 and 122 are electrically and mechanically connected to the respective signal vias 140 and 142 ( Figure 2 ), and the ground leads 130 and 132 are electrically and mechanically connected to the respective ground vias 150 and 152 ( Figure 2 shown).

[0062] like Figure 2As best shown in , the conductive layer 136 on the top surface of the printed circuit board 110 can be patterned to form an antipad 144. The antipad 144 is an area where the conductive layer 136 has been removed. The antipad 144 provides a gap between the signal vias 140 and 142 and the conductive layer 136, which can be connected to ground. Antipads can be provided in additional conductive layers of the printed circuit board 110 as needed. Ground vias 150 and 152 are connected to the conductive layer 136, and the signal vias 140 and 142 are isolated from the conductive layer 136. The ground vias 150 and 152 can extend through all layers of the printed circuit board 110 and can be connected to several conductive layers 136 used as ground planes.

[0063] The signal vias 140 and 142 may include conductive pads 146 and 148, respectively, on the top surface 160 of the printed circuit board 110. The signal vias 140 and 142 extend from the top surface 160 of the printed circuit board 110 to the breakout layer ( Figure 3 ), wherein signal vias 140 and 142 are connected to signal traces ( Figure 3 as shown) for interconnection with other components on a printed circuit board. Figure 1 and Figure 2 In the embodiment of FIG. 1 , the signal vias 140 and 142 are back-drilled from the bottom surface 162 of the printed circuit board 110 to a point slightly below the breakout layer. Therefore, the holes 154 and 156 below the signal vias 140 and 142 are air holes, respectively.

[0064] like Figure 1 As shown, the mounting ends of the signal leads 120 and 122 are pressed against conductive structures, here conductive pads 146 and 148, on the top surface 160 of the printed circuit board 110. Therefore, the edges of the signal leads 120 and 122 can make contact with the signal vias 140 and 142 without the signal vias 140 and 142 being large enough to accommodate a press fit or similar structure. Therefore, the diameter of the signal vias 140 and 142 can be smaller than the diameter of the signal vias in the footprint of a conventional connector, so that the diameter of the footprint of the connector can be smaller than the diameter of the footprint of a conventional connector. Figure 1 As shown, signal vias 140 and 142 are filled vias rather than plated through holes which typically require a larger diameter than filled vias.

[0065] like Figure 1 As shown, each of the signal vias 140, 142 is provided with a recess 170, and each of the ground vias 150, 152 is provided with a recess 172. Figure 1 and Figure 2 In the embodiment of FIG. 1 , each of the recesses 170 , 172 has a truncated cone shape. The recesses are described in detail below.

[0066] like Figure 2 As shown, the recesses 170 and 172 are filled with solder to form solder joints 180 and 182, respectively. The signal leads 120 and 122 are electrically and mechanically connected to the corresponding signal vias 140 and 142 through the solder joints 180, and the ground leads 130 and 132 are electrically and mechanically connected to the corresponding conductive elements 150 and 152 through the solder joints 182.

[0067] like Figure 2 As shown, solder joints 180 and 182 extend into corresponding recesses 170 and 172, and improve the reliability of the connection between the vias of the printed circuit board and the connector leads. In particular, recesses 170 and 172 provide a larger surface area for contacting solder joints 180 and 182 than vias with a flat upper surface. In addition, recesses 170 and 172 allow a larger volume of solder to be used in each solder joint compared to vias with a flat upper surface. The larger solder volume also improves the reliability of the solder joints. In addition, as discussed below, the fact that signal leads 120 and 122 and ground leads 130 and 132 can extend into corresponding recesses 170 and 172 mitigates the effect of the lack of coplanarity of the connector leads of the surface mount connector.

[0068] The features of solder joints 180 and 182, including increased solder volume, increased solder contact area, and extension of solder joints 180 and 182 into corresponding recesses, increase the shear resistance of solder joints 180 and 182. In particular, solder joints 180 and 182 are unlikely to be sheared in a direction parallel to the surface of the printed circuit board. It will be understood that the above features of solder joints 180 and 182 are not required.

[0069] The above-mentioned features of solder joints 180 and 182, including increased solder volume, increased solder contact area, and extension of the solder joint into the recess, can benefit the mechanical reliability of the solder joint, and in addition, can affect the electrical performance of the connection. For example, the impedance of the connection can be changed by increasing the solder volume. Therefore, it may be preferred that the solder joints are distributed along the length of the signal line in the direction of signal propagation. In this way, narrow deep recesses may be more preferred than wide shallow recesses. The shape of the recess may be characterized in part by the aspect ratio of depth to width. In some embodiments, the aspect ratio of the recess may be in the range of 1 to 4, but this is not restrictive.

[0070] like Figure 2 As shown, the ground leads 130 and 132 may be formed as part of a shield surrounding the signal leads 120 and 122 .

[0071] Figure 3A cross section of a printed circuit board 110 according to an embodiment is shown. The printed circuit board 110 includes a plurality of layers including conductive layers 310, 312, ..., 320 separated by dielectric layers 330, 332, ..., 340 in an alternating arrangement. The printed circuit board 110 also includes a signal via 350. Figure 3 The layered structure of the printed circuit board 110 is shown. It will be appreciated that a practical printed circuit board may include a plurality of closely spaced vias arranged in a via pattern as described below.

[0072] like Figure 3 As shown, the printed circuit board 110 includes multiple layers, each layer including a conductive layer and a dielectric layer, so that the printed circuit board 110 includes conductive layers and dielectric layers arranged alternately. Each conductive layer can be used as a ground plane, can be patterned to form conductive traces, or can include ground planes and conductive traces in different areas. These layers can be formed during assembly by stacking multiple sheets of laminates with patterned copper and prepreg, and then pressurizing them under heating conditions to melt all of the sheets. Patterning the copper can produce traces and other conductive structures within the printed circuit board. Due to the melting, these layers may not be structurally separable in the final printed circuit board. However, these layers can be identified in the molten structure based on the location of the conductive structures. Therefore, Figure 3 The separation between the layers of dielectric material is shown, even though the layers may be fused in a printed circuit board. The number of conductive and dielectric layers may vary depending on the application.

[0073] like Figure 3 As further shown, in the area around the signal via 350, except in the breakout layer 352, the conductive layers 310, 312, ..., 320 are removed. For example, an anti-pad 344 is formed between the conductive layer 310 and the signal via 350. The area around the signal via 350 where the conductive layer is removed - referred to as the anti-pad - provides a gap between the signal via 350 and those conductive layers that are not intended to be connected to the signal via 350. In the breakout layer 352, the signal trace 360 ​​is connected to the signal via 350. The signal via 350 and the signal trace 360 ​​provide a signal lead ( Figure 1 and Figure 2 ) and an electrical connection between another component of the printed circuit board 110.

[0074] like Figure 3As further shown, the signal via 350 is formed as a conductive element 362 that extends from a top surface 364 of the printed circuit board 110 at least to the breakout layer 352, wherein the signal trace 360 ​​is connected to the signal via 350. The signal via 350 may be formed by drilling a hole through the dielectric layer and the conductive layer of the printed circuit board 110 and filling the hole with a conductive material. The conductive element 362 may be generally cylindrical in shape.

[0075] Signal via 350 may be back-drilled from the rear surface of printed circuit board 110 to a level slightly below breakout layer 352. The back-drilled portion of the hole is free of conductive material and avoids forming electrical stubs that may cause undesirable resonances in the transmission characteristics of the signal line.

[0076] The signal via 350 may further include a conductive pad 370 on the top surface 364 of the printed circuit board 110. The conductive pad 370 may be formed by patterning the conductive layer 310 on the top surface 364, and is in electrical contact with the conductive element 362 of the signal via 350. The conductive pad 370 has a diameter greater than a diameter of the conductive element 362 and surrounds the conductive element 362 on the top surface 364.

[0077] like Figure 3 As shown, the signal via 350 includes a recess 380. The recess 380 extends from a top surface 382 of the signal via 350 into the printed circuit board. The recess 380 may be characterized by a maximum diameter, a maximum depth, and a shape. Figure 3 In the embodiment of the present invention, the recess 380 has a conical shape. However, this is not limiting, and other shapes can be used as discussed below.

[0078] By way of example only, the diameter of the signal via 350 may be in the range of 0.10 mm to 0.30 mm, and the conductive element 362 may extend in whole or in part through the printed circuit board 110. The diameter of the recess 380 may be in the range of 0.08 mm to 0.28 mm, and the depth may be in the range of 0.05 mm to 0.30 mm. In some embodiments, the recess 380 may have a shape that generally matches the shape of the connector lead 390 and concentrates the solder. The diameter of the recess is based on the diameter of the signal via 350 so as to maintain a minimum wall thickness of the signal via 350 in the area of ​​the recess 380. The minimum wall thickness may be in the range of 0.02 mm to 0.08 mm. It will be understood that these dimensions are given by way of example only and are not limiting.

[0079] The function of the recess 380 is to receive at least the tip of the connector lead 390 of the surface mount connector. The tip of the connector lead 390 of the surface mount connector may be tapered, beveled, or otherwise configured to enable the tip to be inserted into the recess 380. The size and shape of the recess 380 may be selected to engage the tip of the connector lead of a particular surface mount connector, and different recess sizes and shapes may be used with different surface mount connectors. The purpose of the recess 380 is not to accept the entire connector lead 390 of the surface mount connector, such as in the case where the contact tail of a press fit connector is inserted into a corresponding via of a printed circuit board. Furthermore, it is not intended that the connector lead 390 of the surface mount connector be placed on the surface of the printed circuit board without at least partially extending into the recess 380. By providing a configuration in which the tip of the connector lead 390 of the surface mount connector extends into the recess 380, advantageous features may be achieved, including but not limited to mitigating the effects of the lack of coplanarity of the connector leads and improving the reliability of the solder connection.

[0080] In some embodiments, the diameter and / or cross-section of connector lead 390 can be larger than the diameter of recess 380, except at the tip of connector lead 390. In other embodiments, the diameter and / or cross-section of the connector lead is smaller than the diameter of recess 380, and the insertion of the connector lead into recess 380 is limited by the depth of the recess. In some cases, due to the lack of coplanarity of the tips of the connector leads, not all connector leads can extend into the corresponding recess. In some embodiments, recess 380 and the tips of connector leads 390 have different sizes and shapes, so that the solder fills the space between recess 380 and connector lead 390 and increases the reliability of the solder joint.

[0081] In some embodiments, the recess 380 can be centered relative to the signal via 350. In other embodiments, the recess 380 can be offset relative to the center of the signal via 350. The offset configuration can be used to control the impedance of the signal line in the transition area between the printed circuit board and the surface mount connector. When the recess 380 is offset relative to the center of the signal via 350, the minimum wall thickness of the via is maintained to ensure the electrical continuity of the via. The recess 380 generally has a circular cross-section in a plane parallel to the top surface of the printed circuit board, but this is not limiting.

[0082] exist Figure 4 4 shows a via 410 having a truncated cone-shaped recess 420. A V-shaped recess, such as one characterized by a conical recess or a truncated cone-shaped recess, provides a gradual transition of impedance from the connector to the printed circuit board. In addition, the V-shaped recess provides self-centering of the connector lead and has a favorable depth-to-volume ratio for forming a reliable solder joint.

[0083] exist Figure 5 5 shows a via 510 having a cylindrical recess 520. The cylindrical recess with a flat bottom provides an impedance transition between the surface mount connector 100 and the printed circuit board 110. Compared to a conical or truncated conical recess, a cylindrical recess can accept a larger lead below the surface for enhanced solder joint shear resistance. A cylindrical recess allows for a larger recess depth to improve shear resistance without the wall thickness issues associated with conical and truncated conical recesses.

[0084] Figure 6 6 shows a via 610 having a recess 620. The recess 620 has a hemispherical portion 622 and a cylindrical portion 624. The recess having a rounded bottom provides an impedance transition between the surface mount connector 100 and the printed circuit board 110. Compared to conical and truncated conical recesses, the hemispherical recess can accept larger leads for enhanced solder joint shear resistance. The rounded bottom provides enhanced stress resistance by eliminating sharp corners that may act as stress concentration points during thermal cycling. In some embodiments, the cylindrical portion 624 can be omitted so that the recess 620 includes only the hemispherical portion 622.

[0085] The shape of the recess can depend in part on the process used to form the recess. For example, when drilling the recess, the shape of the recess corresponds to the shape of the drill bit. In other embodiments, the recess can be formed by laser drilling and have a shape that conforms to the laser drilling process. In addition, the size and shape of the recess can be selected based on the size and shape of the tip of the connector lead of the surface mount connector. The recess can have any size and shape that is compatible with the drilling process and that is capable of receiving the tip of the connector lead of the surface mount connector. In addition, the shape of the recess can include portions having different shapes, such as a hemispherical portion 622 and a cylindrical portion 624, such as Figure 6 As shown, a truncated cone portion and a cylindrical portion (not shown), a cone portion and a cylindrical portion (not shown), etc.

[0086] The depth of the recess is based on several factors. In the case where the bottom of the recess is not flat, the depth can be defined as the depth of the recess at its deepest point. The depth may be sufficient to compensate for the lack of coplanarity of the tips of the connector leads of the surface mount connector. For example, the depth of the recess can be based on the coplanarity specification of the surface mount connector so that the longest connector lead extends to the bottom of the recess or near the bottom of the recess, while the shortest connector lead is located at or near the top of the recess.

[0087] In some embodiments, the depth of the recess can be selected based on the following tolerance, and the distal tip of the connector lead 390 can be positioned relative to the top surface 364 when the connector is mounted on the printed circuit board. This tolerance can depend on the manufacturing tolerance of the connector and / or the printed circuit board. In some embodiments, this tolerance can be + / -0.08mm. The connector and the printed circuit board can be designed so that the tip of the connector lead 390 is nominally located 0.04mm below the surface, so that if the position of the tip of the lead 390 changes by up to 0.08mm, it will neither fail to fully fit in the recess nor fail to contact the solder in the recess. By such a design, a high percentage of the connector leads in the connector footprint will extend into the corresponding recess at least in small amounts. In some embodiments, this percentage can be greater than 95%, for example, greater than 98% or greater than 99%.

[0088] Furthermore, the depth of the recess can be based on the volume of solder required to achieve a reliable connection between the connector lead and the via. For example, the shear strength of the solder joint can be enhanced by providing a recess with a greater depth. The depth of the recess is limited in the case of a conical or truncated conical shape due to the need to maintain a minimum wall thickness of the via in the area of ​​the recess. Figure 4 As shown, the wall thickness 430 of the truncated cone-shaped via 420 decreases as the depth of the via 420 increases. In some embodiments, the depth of the recess may be in the range of 0.05 mm to 0.30 mm, but this is not limiting.

[0089] Minimum wall thickness of the via in the area of ​​the recess is maintained to ensure electrical continuity of the via. Figure 5 As shown, the via 510 has a wall thickness 530 in the area of ​​the cylindrical recess 520. The depth of the cylindrical recess 520 can be increased without reducing the wall thickness 530. However, in the case of the truncated cone recess 420 or the conical recess 380, the wall thickness 430 decreases as the depth of the recess increases. Therefore, depending on the required wall thickness and the angle of the conical portion of the recess, the depth of the conical or truncated cone recess is limited. The wall thickness of the via in the area of ​​the recess can be in the range of 0.02 mm to 0.08 mm, but this is not restrictive.

[0090] Printed Circuit Board and Surface Mount Connector Leads - Compensation for Lack of Coplanarity of Connector Leads, According to Embodiments, is Shown - FIG. 7A to FIG. 7C. A printed circuit board 710 is provided with vias 720, 722, 724, and 726, each of which has a truncated cone-shaped recess 730. Connector leads 740, 742, 744, and 746 of a surface mount connector are engaged with vias 720, 722, 724, and 726, respectively. Connector leads 740, 742, 744, and 746 lack coplanarity, such that connector lead 740 has the shortest length, connector lead 746 has the longest length, and connector leads 742 and 744 have intermediate lengths. Connector lead 746 is fully inserted into the recess of via 726, while connector lead 740 is positioned slightly higher than via 720.

[0091] exist Figure 7B A solder brick 750 formed from solder paste is shown in FIG. Figure 7C FIG. 7 shows a solder joint 760 after heating the solder brick 750. Figure 7C As shown in FIG. 1 , solder joints 760 connect each of connector leads 740, 742, 744, and 746 to a corresponding via and provide a reliable connection. Even connector lead 740, which has the shortest length, is connected to via 720 by a solder joint. Connector lead 740 is an extreme example of a connector lead that is still connected to a via.

[0092] 8A to 8C show a printed circuit board and surface mounted connector leads of the prior art. The printed circuit board 810 includes vias 820, 822, 824 and 826, each of which has a flat upper surface. Surface mounted connector leads 840, 842, 844 and 846 correspond to vias 820, 822, 824 and 826, respectively. Connector leads 840, 842, 844 and 846 can have a flat bottom surface for improved contact with each via. The configuration shown is caused by connector leads, which have broadsides connected by edges, which are bent so that the broadsides are parallel to the printed circuit board 810. Connector leads 840, 842, 844 and 846 lack coplanarity, so that connector lead 840 has the shortest length, connector lead 846 has the largest length, and connector leads 842 and 844 have intermediate lengths. A solder brick 850 is shown in Figure 8B, and a solder joint 860 after heating the solder brick is shown in Figure 8C. As shown in Figure 8C, the connector lead 840 may not make contact with the via 820 due to its short length, thereby resulting in a defective solder joint.

[0093] Solder bricks are typically made of spherical 50% metal particles and 50% flux and other volatiles. The volatiles evaporate before the end of the thermal cycle, resulting in a metal volume that is half the volume of the original solder brick. The reduction in solder brick volume poses a challenge in bridging the gaps caused by the variation in surface mount lead lengths.

[0094] A printed circuit board having vias and / or other conductive elements as described herein, which have recesses, provides enhanced reliability compared to prior art printed circuit boards. In particular, the recesses compensate for the lack of coplanarity of the tips of the connector leads of the surface mount connector. In addition, the recesses allow for increased solder volume, increased solder joint surface area, and increased shear resistance compared to prior art vias having flat surfaces, and thus improve the reliability of each solder joint. In some embodiments, when the vias are provided with recesses, the coplanarity specifications of the connector leads of the surface mount connector can be relaxed.

[0095] By eliminating the need for vias of sufficient size to receive the contact tails of a press-fit connector, the diameter of the vias in the area near the top surface of the printed circuit board can be reduced. The reduced via diameter allows for closer center-to-center spacing of the vias and allows for routing of signal traces in the area near the top surface of the printed circuit board.

[0096] exist Fig. 9 A top view of a printed circuit board with a via pattern according to an embodiment is shown in . Printed circuit board 910 includes via patterns 920, 922, 924, and 926. Each via pattern is configured for solder attachment to a connector lead of a surface mount connector as described herein. A printed circuit board may include any number of via patterns. The via patterns may be arranged in rows and columns, and the rows and / or columns may be aligned to form a grid or may be offset. In some embodiments, multiple surface mount connectors 100 may be held together with a housing or other support member as modules of a larger connector. For example, these modules may be arranged in a manner similar to Fig. 9 The pattern of vias shown matches the pattern held in the housing.

[0097] like Fig. 9 As further shown, the via pattern 920 may include signal vias 930 and 932 that form differential signal pairs, and ground vias 940, 942, 944, and 946. The via pattern 920 may also include shadow vias 950, 952, 954, and 956 that are interconnected to the ground plane of the printed circuit board but are not connected to the surface mount connector. In addition, the via pattern 920 may include an anti-pad 960, which is an area around the signal vias 930 and 932 where the conductive layer on the top surface of the printed circuit board 910 has been removed. It will be appreciated that the via pattern may have various configurations depending, at least in part, on the configuration and operating frequency of the surface mount connector.

[0098] Fig. 9 Each via pattern shown is configured for solder attachment to a surface mount connector ( Fig. 9930 and 932 and ground leads attached to corresponding ground vias 940, 942, 944, and 946. The signal vias 930 and 932 and the ground vias 940, 942, 944, and 946 may be provided with recesses as described herein to enable solder to be reliably attached between the surface mount connector and the printed circuit board 910. The shaded vias 950, 952, 954, and 956 are not attached to the surface mount connector and may not be provided with recesses.

[0099] In one example, the signal vias 930 and 932 of the via pattern 920 may have a diameter of 0.25 mm and be spaced 0.90 mm apart. The ground vias 940, 942, 944, and 946 may have a diameter of 0.20 mm and may extend through the printed circuit board 910. The entire via pattern 920 may have a size of 2.0 mm or less and may be spaced 2.0 mm or less from other via patterns. It will be understood that these dimensions are given by way of example and are not intended to be limiting.

[0100] A printed circuit board configured for attachment to a conventional press-fit connector may have Fig. 9 920, 922, 924, and 926 as shown above. However, because the press-fit connector relies on contact tails that are inserted into corresponding vias in the printed circuit board, the size of the press-fit via pattern is larger than the size of the surface mount via pattern described herein. In particular, the diameter of the ground vias and signal vias configured to receive the contact tails of the press-fit connector is larger than the diameter of the corresponding vias configured to be solder attached to the surface mount connector, and the center-to-center spacing between the vias is larger to achieve the desired impedance and limit crosstalk between the conductors. Therefore, better miniaturization can be achieved using the surface mount connectors and printed circuit boards described herein compared to press-fit connectors and corresponding printed circuit boards.

[0101] Refer again Figure 1 , the transition region 190 between the surface mount connector 100 and the printed circuit board 110 includes a lower region of the surface mount connector 100 adjacent to the printed circuit board 110 and an upper region of the printed circuit board 110 adjacent to the surface mount connector 100. In the transition region 190, it is desirable to control the impedance of the signal transmission line to avoid impedance variations and discontinuities. This may be difficult to achieve because the surface mount connector 100 and the printed circuit board 110 have different structures and different materials. In some embodiments, for example, the impedance variation can be controlled by controlling the spacing and size of the conductors in the connector 100 and in the printed circuit board 110 and by controlling the dielectric constant of the materials of the connector 100 and the printed circuit board 110.

[0102] In some embodiments, the connector leads of a surface mount connector may be formed from a superelastic material. For example, Figure 1 and Figure 2 The signal leads 120 and 122 shown in FIG. 1 may be formed of a superelastic material. The use of a superelastic material may enable the overall density of the via pattern of the printed circuit board to be increased.

[0103] Thus, having described several aspects of at least one embodiment, it is to be understood that various changes, modifications and improvements will readily occur to those skilled in the art. Such changes, modifications and improvements are intended to be a part of this disclosure and are intended to fall within the spirit and scope of the invention. Therefore, the foregoing description and drawings are by way of example only.

Claims

1. A printed circuit board, comprising: at least one dielectric layer; as well as at least one conductive element formed on the dielectric layer and configured for solder attachment to a connector lead of a surface mount connector, the conductive element having a recess in a surface thereof, wherein the recess is configured to be smaller in diameter than the connector lead and configured for insertion of only a tip of the connector lead, wherein the conductive element is part of a via extending through the dielectric layer, wherein the printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers, and the via extends from an upper surface of the printed circuit board through one or more of the plurality of layers, and wherein the via is configured for attachment to a superelastic connector lead of the surface mount connector.

2. The printed circuit board according to claim 1, wherein: The recess has a depth in the range of 0.05 mm to 0.30 mm.

3. The printed circuit board according to claim 1, wherein: The recess includes a tapered portion.

4. The printed circuit board according to claim 1, wherein: The recess includes a truncated cone-shaped portion.

5. The printed circuit board according to claim 1, wherein The recess includes a cylindrical portion.

6. The printed circuit board according to claim 1, wherein The recess includes a hemispherical portion.

7. The printed circuit board according to claim 1, wherein: The recess has a shape based on the connector lead.

8. The printed circuit board according to claim 1, wherein: The conductive element is part of a signal via extending through the dielectric layer to a breakout layer of the printed circuit board.

9. The printed circuit board according to claim 1, wherein: The conductive element is part of a ground via that extends through the dielectric layer to a ground conductor.

10. The printed circuit board according to claim 1, wherein The electrically conductive element has a wall thickness in the region of the recess in the range of 0.02 mm to 0.08 mm.

11. The printed circuit board according to claim 1, wherein: The recess includes a first portion and a second portion having different shapes.

12. The printed circuit board according to claim 1, wherein: The recess has an aspect ratio of depth to width in the range of 1-4.

13. A printed circuit board, comprising: a plurality of layers, the plurality of layers comprising conductive layers separated by dielectric layers; as well as at least one via configured for solder attachment to a connector lead of a surface mount connector, the at least one via comprising a conductive element extending from an upper surface of the printed circuit board through one or more of the plurality of layers, the conductive element having a recess in a surface thereof, wherein the conductive element is configured for solder attachment to a connector lead of the surface mount connector, and wherein the recess is configured to be smaller in diameter than the connector lead and configured for insertion of only a tip of the connector lead.

14. The printed circuit board according to claim 13, wherein: The recess has a depth in the range of 0.05 mm to 0.30 mm.

15. The printed circuit board according to claim 13, wherein: The via hole extends from the upper surface of the printed circuit board to a breakout layer of the conductive layer.

16. The printed circuit board according to claim 13, wherein: The recess is located at the center of the via hole.

17. The printed circuit board according to claim 13, wherein: The recess is offset from the center of the via hole.

18. The printed circuit board according to claim 13, wherein: The at least one via is back drilled from the second surface of the printed circuit board.

19. The printed circuit board according to claim 13, wherein: The recess includes a tapered portion.

20. The printed circuit board according to claim 13, wherein The recess includes a truncated cone-shaped portion.

21. The printed circuit board according to claim 13, wherein The recess includes a cylindrical portion.

22. The printed circuit board according to claim 13, wherein: The recess includes a hemispherical portion.

23. The printed circuit board according to claim 13, wherein: The via extends from the upper surface of the printed circuit board to a ground layer of the conductive layer.

24. The printed circuit board according to claim 13, wherein: The recess is configured to receive solder of a solder joint between the connector lead of the surface mount connector and the at least one via.

25. The printed circuit board according to claim 13, wherein: The at least one via comprises a conductive pad on the upper surface of the printed circuit board, and wherein the conductive pad has a larger diameter than the conductive element of the at least one via.

26. The printed circuit board according to claim 13, wherein: The at least one via includes a pillar-shaped conductor extending at least partially through the printed circuit board.

27. The printed circuit board according to claim 13, wherein: The at least one via hole is filled with a conductive material except for the recess.

28. The printed circuit board according to claim 13, wherein: The at least one via is configured for attachment to a superelastic connector lead of the surface mount connector.

29. The printed circuit board according to claim 25, wherein The conductive pad includes the recess and an outer periphery surrounding the recess.

30. The printed circuit board according to claim 13, wherein: The at least one via has a wall thickness in the region of the recess in the range from 0.02 mm to 0.08 mm.

31. The printed circuit board according to claim 13, wherein: The recess has an aspect ratio of depth to width in the range of 1-4.

32. A printed circuit board comprising: a plurality of layers, the plurality of layers comprising conductive layers separated by dielectric layers; as well as via patterns formed in the plurality of layers, each of the via patterns comprising: a first signal via and a second signal via extending from the first surface of the printed circuit board to a breakout layer of the conductive layer; and A ground via connected to one or more of the conductive layers, wherein the signal via and the ground via each include a conductive element having a recess in a surface thereof, wherein each conductive element is configured for solder attachment to a connector lead of a surface mount connector, and wherein the recess is configured to be smaller in diameter than the connector lead and configured for insertion of only the tip of the connector lead.

33. The printed circuit board according to claim 32, wherein: The first signal via and the second signal via form a differential signal pair.

34. The printed circuit board according to claim 32, wherein: Each of the via patterns further includes at least one anti-pad surrounding the first signal via and the second signal via.

35. The printed circuit board according to claim 32, wherein: Each recess has a depth in the range of 0.05 mm to 0.30 mm.

36. The printed circuit board according to claim 32, wherein: The signal via and the ground via each have a wall thickness in the region of the recess in the range of 0.02 mm to 0.08 mm.

37. The printed circuit board according to claim 32, wherein: Each recess has an aspect ratio of depth to width in the range of 1-4.

38. An interconnection system comprising: a surface mount component including surface mount leads; as well as A printed circuit board comprising conductive layers separated by dielectric layers, and vias configured for solder attachment to corresponding leads of the surface mount component, each of the vias comprising a conductive element having a recess in an upper surface thereof, wherein the recess in the conductive element is smaller in diameter than the surface mount lead of the surface mount component and configured for insertion of only the tip of the surface mount lead.

39. The interconnection system of claim 38, wherein: The tips of the surface mount leads are configured to be inserted into respective recesses of the printed circuit board.

40. The interconnect system of claim 38, wherein: The recessed portion includes at least one of a conical portion, a truncated conical portion, a cylindrical portion, and a hemispherical portion.

41. The interconnect system of claim 38, wherein: The surface mount lead includes a superelastic member.

42. The interconnect system of claim 38, wherein: At least 95% of the surface mount leads include distal tips extending into respective recesses.

43. A printed circuit board comprising: a plurality of layers, the plurality of layers comprising conductive layers separated by dielectric layers; as well as at least one via pattern formed in the plurality of layers, the via pattern comprising: first and second signal conductors for attaching respective first and second signal leads of a component to the upper surface of the printed circuit board and for connecting the first and second signal leads of the component to a breakout layer of the conductive layer; and at least one ground conductor for attaching to a ground lead of the component and for connecting the ground lead of the component to a ground plane of the conductive layer, wherein each of the first signal conductor and the second signal conductor and the at least one ground conductor has a recess in a surface thereof, and wherein the recess is configured to be smaller in diameter than a connector lead and is configured for insertion of only a tip of the connector lead.

44. The printed circuit board according to claim 43, wherein The first and second signal conductors are configured for connection to first and second signal leads of the component at the upper surface of the printed circuit board.

45. The printed circuit board of claim 43, wherein: The first signal conductor and the second signal conductor include signal vias extending through the layer of the printed circuit board to the breakout layer.

46. ​​The printed circuit board of claim 43, wherein: The at least one ground conductor includes a ground via extending through one or more layers of the printed circuit board to the ground plane.

47. The printed circuit board of claim 43, wherein: The first and second signal conductors are configured for solder attachment to first and second signal leads of the component.

48. The printed circuit board of claim 43, wherein: The components include a connector.

49. An interconnection system comprising: A component comprising a first signal lead and a second signal lead and at least one ground lead; as well as A printed circuit board comprising a plurality of layers including conductive layers separated by dielectric layers, the printed circuit board further comprising: first and second signal conductors for connecting respective first and second signal leads of the component to the upper surface of the printed circuit board and for connecting the first and second signal leads of the component to a breakout layer of the conductive layer; and at least one ground conductor for attaching to the at least one ground lead of the component and for connecting the ground lead of the component to a ground plane of the conductive layer, wherein the component is mounted on the printed circuit board, wherein edges of the first signal lead and the second signal lead are pressed against the first signal conductor and the second signal conductor, wherein each of the first signal conductor and the second signal conductor includes a recess in an upper surface thereof, and The recesses in the first and second signal conductors are smaller in diameter than the first and second signal leads of the component and are configured for insertion of only the tips of the first and second signal leads.

50. The interconnection system of claim 49, wherein: A first signal lead and a second signal lead of the component are connected to the first signal conductor and the second signal conductor at the upper surface of the printed circuit board.

51. The interconnect system of claim 49, wherein: The first signal conductor and the second signal conductor include signal vias extending through the layer of the printed circuit board to the breakout layer.

52. The interconnect system of claim 49, wherein: The at least one ground conductor includes a ground via extending through one or more layers of the printed circuit board to the ground plane.

53. The interconnect system of claim 49, wherein: Tips of the first signal lead and the second signal lead of the component are attached to the upper surface of the printed circuit board.

54. The interconnect system of claim 49, wherein: The components include a connector.

55. The interconnect system of claim 49, wherein: The first and second signal conductors include first and second conductive pads on the upper surface of the printed circuit board.

56. The interconnect system of claim 49, wherein: The first signal lead and the second signal lead of the component have gradually tapered tips.

57. The interconnect system of claim 49, wherein: The first and second signal conductors are connected to first and second signal leads of the component by solder attachment.

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