Boards with electronic components embedded in them

Abstract

The present invention provides a board with embedded electronic components, the board with embedded electronic components comprising: a core layer having a groove with a bottom surface; an electronic component arranged above the bottom surface of the groove and spaced apart from the bottom surface of the groove; and an insulating layer arranged on the core layer and covering at least a portion of the electronic component. The insulating layer is arranged in at least a portion of a space between the bottom surface of the groove and the electronic component.

Description

[0001] This application claims the benefit of priority from Korean Patent Application No. 10-2019-0106881 filed on August 29, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] The present disclosure relates to a board having electronic components embedded therein. Background Art

[0003] Recently, portable electronic devices such as mobile phones and tablet computers have been required to have high performance while being miniaturized and slimmed down. Therefore, a technology of electronic component-embedded boards in which electronic components such as passive elements and active elements are embedded in a printed circuit board is being developed. Summary of the invention

[0004] This summary is provided to introduce selected concepts in a simplified form, which are further described in the detailed description below. This summary is neither intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0005] An aspect of the present disclosure is to provide a board having electronic components embedded therein which can reduce the possibility of warping.

[0006] An aspect of the present disclosure is to provide a board with embedded electronic components manufactured according to a simplified process.

[0007] According to one aspect of the present disclosure, a board embedded with an electronic component includes: a core layer having a groove with a bottom surface; an electronic component disposed above the bottom surface of the groove and spaced apart from the bottom surface of the groove; and an insulating layer disposed on the core layer and covering at least a portion of the electronic component. The insulating layer is disposed in at least a portion of a space between the bottom surface of the groove and the electronic component. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and other aspects, features and advantages of the present disclosure will be more clearly understood through the following detailed description taken in conjunction with the accompanying drawings, in which:

[0009] Figure 1 is a schematic block diagram of an electronic device system according to an example;

[0010] Figure 2 schematically illustrates a perspective view of an electronic device according to an example;

[0011] Figure 3A and Figure 3Bis a schematic cross-sectional view of a board with embedded electronic components according to an example;

[0012] Figure 4 is a schematic cross-sectional view of a board with embedded electronic components according to another example;

[0013] Figure 5 is a schematic cross-sectional view of a board with embedded electronic components according to another example;

[0014] Figure 6 is a schematic cross-sectional view of a board with embedded electronic components according to another example;

[0015] 7A to 9D schematically illustrates a portion of a process for manufacturing a board with embedded electronic components according to an example; and

[0016] Fig.10 is a schematic cross-sectional view schematically illustrating an example in which a semiconductor package is mounted on an electronic component-embedded board according to an example. DETAILED DESCRIPTION

[0017] The following detailed description is provided to help the reader gain a comprehensive understanding of the methods, devices and / or systems described herein. However, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be apparent to those of ordinary skill in the art. The order of operations described herein is merely exemplary and is not limited to the order set forth herein, but changes may be made that will be apparent to those of ordinary skill in the art, except for operations that must occur in a particular order. In addition, descriptions of functions and configurations that will be known to those of ordinary skill in the art may be omitted for clarity and brevity.

[0018] The features described herein may be implemented in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein have been provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0019] Here, it is noted that the use of the term "may" with respect to an example or embodiment (e.g., with respect to what an example or embodiment may include or implement) means that there is at least one example or embodiment that includes or implements such features, but all examples and embodiments are not limited thereto.

[0020] Throughout the specification, when an element (such as a layer, a region, or a substrate) is described as being “on”, “connected to”, or “coupled to” another element, the element may be directly “on”, “connected to”, or “coupled to” another element, or one or more other elements may be present between them. In contrast, when an element is described as being “directly on”, “directly connected to”, or “directly coupled to” another element, there may be no other elements present between them.

[0021] As used herein, the term "and / or" includes any one of the associated listed items and any combination of any two or more items.

[0022] Although terms such as "first", "second", and "third" may be used herein to describe various members, components, regions, layers, or portions, these members, components, regions, layers, or portions are not limited to these terms. Rather, these terms are only used to distinguish one member, component, region, layer, or portion from another member, component, region, layer, or portion. Therefore, without departing from the teachings of the examples described herein, the first member, component, region, layer, or portion referred to in the examples may also be referred to as the second member, component, region, layer, or portion.

[0023] For ease of description, spatially relative terms such as "above", "above", "below", and "below" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. Such spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientations depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as being "above" or "above" relative to another element will then be "below" or "below" relative to the other element. Therefore, the term "above" includes both above and below orientations depending on the spatial orientation of the device. The device may also be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially relative terms used herein will be interpreted accordingly.

[0024] The terms used herein are only used to describe various examples and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms "include", "comprises", and "have" list the existence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not exclude the existence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0025] Due to manufacturing techniques and / or tolerances, the shapes shown in the drawings may vary. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings but include shape variations that occur during manufacturing.

[0026] The features of the examples described herein can be combined in various ways that will be apparent after understanding the disclosure of the present application. In addition, although the examples described herein have various configurations, other configurations that will be apparent after understanding the disclosure of the present application are feasible.

[0027] The drawings may not be to scale, and the relative size, proportions, and depiction of elements in the drawings may be exaggerated for clarity, illustration, and convenience.

[0028] Subsequently, examples are described in further detail with reference to the accompanying drawings.

[0029] Electronic Devices

[0030] Figure 1 is a schematic block diagram illustrating an example of an electronic device system.

[0031] Reference Figure 1 , the electronic device 1000 may house a mainboard 1010 therein. The mainboard 1010 may include chip-related components 1020, network-related components 1030, other components 1040, etc., which are physically or electrically connected thereto. These components may be connected to other components to be described below through various signal lines 1090.

[0032] The chip-related components 1020 may include: memory chips, such as volatile memory (e.g., dynamic random access memory (DRAM)), non-volatile memory (e.g., read-only memory (ROM)), flash memory, etc.; application processor chips, such as central processing units (e.g., central processing units (CPU)), graphics processors (e.g., graphics processing units (GPU)), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (ASICs), etc. However, the chip-related components 1020 are not limited thereto, but may also include other types of chip-related components. In addition, the chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips or electronic components.

[0033] The network-related components 1030 may include components operating according to protocols such as Wireless Fidelity (Wi-Fi) (Institute of Electrical and Electronics Engineers (IEEE) 802.11 family, etc.), Worldwide Interoperability for Microwave Access (WiMAX) (IEEE 802.16 family, etc.), IEEE 802.20, Long Term Evolution (LTE), Evolution-Data Optimized (Ev-DO), High Speed ​​Packet Access + (HSPA+), High Speed ​​Downlink Packet Access + (HSDPA+), High Speed ​​Uplink Packet Access + (HSUPA+), Enhanced Data GSM Environment (EDGE), Global System for Mobile Communications (GSM), Global Positioning System (GPS), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Digital Enhanced Cordless Telecommunications (DECT), Bluetooth, 3G protocols, 4G protocols, and 5G protocols, as well as any other wireless protocols and wired protocols specified after the above protocols. However, the network-related components 1030 are not limited thereto, but may also include components operating according to various other wireless standards or protocols or wired standards or protocols. Furthermore, the network-related component 1030 and the chip-related component 1020 may be combined with each other.

[0034] The other components 1040 may include high frequency inductors, ferrite inductors, power inductors, ferrite beads, low temperature co-fired ceramics (LTCC), electromagnetic interference (EMI) filters, multilayer ceramic capacitors (MLCC), etc. However, the other components 1040 are not limited thereto, but may also include passive components for various other purposes, etc. In addition, the other components 1040 may be combined with each other together with the chip-related components 1020 and / or the network-related components 1030.

[0035] Depending on the type of the electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically connected to the mainboard 1010. These other electronic components may include, for example, a camera 1050, an antenna 1060, a display 1070, a battery 1080, etc. However, these other electronic components are not limited thereto, but may include an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage unit (e.g., a hard disk drive), a compact disk (CD) drive, a digital versatile disk (DVD) drive, etc. In addition, these other electronic components may also include other electronic components for various purposes according to the type of the electronic device, etc.

[0036] The electronic device 1000 may be a smart phone, a personal digital assistant (PDA), a digital video camera, a digital camera, a network system, a computer, a monitor, a tablet PC, a laptop PC, a netbook PC, a television, a video game console, a smart watch, an automobile component, etc. However, the electronic device 1000 is not limited thereto, but may be any other electronic device that processes data.

[0037] Figure 2 is a schematic perspective view showing an example of an electronic device.

[0038] Reference Figure 2 , the electronic device may be, for example, a smart phone 1100. A motherboard 1110 is housed in the smart phone 1100, and various electronic components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other electronic components (such as a camera module 1130 and / or a speaker 1140) that may or may not be physically and / or electrically connected to the motherboard 1110 may be housed in the smart phone 1100. A portion of the electronic component 1120 may be the above-mentioned chip-related component, for example, may be a semiconductor package 1121, but is not limited thereto. The semiconductor package 1121 may be a surface-mount type (such as a semiconductor chip or a passive component) on a package substrate having a substrate in which a multi-layer electronic component is embedded, but its example is not limited thereto. The electronic device is not necessarily limited to the smart phone 1100, but may be another electronic device.

[0039] Boards with electronic components embedded in them

[0040] Figure 3A and Figure 3B is a schematic cross-sectional view of a board 100A embedded with electronic components according to an example.

[0041] Reference Figure 3A and Figure 3BAccording to the example, the board 100A embedded with electronic components includes: a core layer 130 having a groove 130H; an electronic component 120 disposed above and spaced apart from the bottom surface 130F of the groove 130H; a first insulating layer 111A disposed on one surface of the core layer 130 in which the groove 130H is formed, and covering at least a portion of the electronic component 120; a second insulating layer 141A disposed on the first insulating layer 111A; a first wiring layer 142A disposed on the second insulating layer 141A; a first connecting member 150 disposed on the second insulating layer 141A and the first wiring layer 142A; a third insulating layer 111A disposed on the first insulating layer 111A; a first wiring layer 142A disposed on the second insulating layer 141A; a first connecting member 150 disposed on the second insulating layer 141A and the first wiring layer 142A; and a third insulating layer 111A disposed on the first insulating layer 111A. The core layer 130 is provided on a surface of the core layer 130 opposite to a surface of the core layer 130 in which the groove 130H is formed; the second wiring layer 142B is provided on the third insulating layer 141B; the second connecting member 160 is provided on the third insulating layer 141B and the second wiring layer 142B; the via 143 penetrates the second insulating layer 141A and connects the electronic component 120 and the first wiring layer 142A to each other; and the through via 144 penetrates the first insulating layer 111A, the core layer 130, the second insulating layer 141A and the third insulating layer 141B, and connects the first wiring layer 142A and the second wiring layer 142B to each other.

[0042] The first insulating layer 111A fills at least a portion of the groove 130H. In detail, the first insulating layer 111A fills the space between the electronic component 120 and the bottom surface 130F of the groove 130H. For example, the first insulating layer 111A may fill at least a portion of the space between the electronic component 120 and the bottom surface 130F of the groove 130H. Therefore, the electronic component 120 is disposed above the bottom surface 130F of the groove 130H and is spaced apart from the bottom surface 130F of the groove 130H by the first insulating layer 111A by a predetermined distance. Therefore, the electronic component 120 and the bottom surface 130F of the groove 130H do not contact each other.

[0043] At least a portion of the electronic component 120 may be disposed in at least a portion of the groove 130H. For example, near the groove 130H, an interface between the first insulating layer 111A and the core layer 130 contacting each other may be disposed at a height between the upper and lower surfaces of the electronic component 120 .

[0044] One surface (upper surface) of the electronic component 120 may be exposed to one surface of the first insulating layer 111A. Since the space between the electronic component 120 and the bottom surface 130F of the groove 130H is filled with the first insulating layer 111A, the surface (upper surface) of the electronic component 120 opposite to the surface (lower surface) of the electronic component 120 facing the bottom surface 130F of the groove 130H may be exposed to one surface of the first insulating layer 111A. In this case, the surface (upper surface) of the electronic component 120 opposite to the surface (lower surface) of the electronic component 120 facing the bottom surface 130F of the groove 130H and one surface of the first insulating layer 111A may be substantially coplanar. The term "coplanar" in this specification means not only forming completely coplanar surfaces, but also forming substantially coplanar surfaces in consideration of manufacturing process errors.

[0045] like Figure 3A and Figure 3B As shown in , a thickness T1 of the core layer 130 surrounding the groove 130H may be greater than a thickness T2 of the first insulating layer 111A surrounding the groove 130H.

[0046] Hereinafter, various configurations of the electronic component embedded board 100A according to an example will be described in more detail.

[0047] The material of the first insulating layer 111A is not particularly limited, and any material can be used as long as it has insulating properties. For example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a thermosetting resin or a thermoplastic resin further containing a reinforcing material such as an inorganic filler and / or glass cloth (or glass fabric) (e.g., a prepreg, ABF (Ajinomoto Build-up Film), FR-4, bismaleimide triazine (BT), etc.) can be used. A photosensitive dielectric (PID) resin can also be used as needed.

[0048] In this case, refer to Figure 3A and Figure 3B A partially enlarged view of the structure, when the material of the first insulating layer 111A includes a reinforcing material such as an inorganic filler and / or glass fiber, according to the process to be described later, the reinforcing material may not fill the groove 130H. Therefore, the first insulating layer 111A disposed only in an area other than the groove 130H may include the reinforcing material, and the first insulating layer 111A in the groove 130H may include only a resin other than the reinforcing material (such as an inorganic filler and glass fiber). Therefore, the reinforcing material may be disposed between one surface of the first insulating layer 111A and the surface opposite to the surface, and one surface of the first insulating layer 111A is a surface of the first insulating layer 111A where the first insulating layer 111A is in contact with the core layer 130 around the groove 130H. In addition, the reinforcing material dispersed in the first insulating layer 111A may be in contact with the electronic component 120 (such as Figure 3A ) or spaced apart from the electronic component 120 (as shown Figure 3B More specifically, in Figure 3A In the embodiment, the first insulating layer 111A disposed in the region other than the groove 130H may include a reinforcing material, and the reinforcing material may be in contact with the electronic component 120. Figure 3B In the embodiment, the first insulating layer 111A disposed in a region other than the groove 130H may include a reinforcement material therein, and the reinforcement material may be spaced apart from the electronic component 120 .

[0049] The electronic component 120 may be a passive component such as a multilayer ceramic capacitor (MLCC), a power inductor (PI), etc., and may be an active component such as an integrated circuit (IC) chip. The electronic component 120 may include an electrode pad or an electrode unit 120P.

[0050] The material of the core layer 130 is not particularly limited, and any material can be used as long as the material has insulating properties. For example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a thermosetting resin or a thermoplastic resin further containing a reinforcing material such as an inorganic filler and / or glass cloth (or glass fabric) (e.g., a prepreg, ABF (Ajinomoto Build-up Film), FR-4, bismaleimide triazine (BT), etc.) can be used. A photosensitive dielectric (PID) resin can also be used as needed.

[0051] The first insulating layer 111A and the core layer 130 may be formed using the same material. For example, the first insulating layer 111A and the core layer 130 may be formed using a single material. In this case, the thermal properties and thermal characteristics of the single material undergoing a thermal process can be predicted, and therefore, compared with the case of using a composite material, an advantageous performance of reducing the possibility of warpage can be obtained.

[0052] The shape of the groove 130H is not particularly limited. For example, the groove 130H may have a quadrangular prism shape, a quadrangular prism shape with inclined sides, a cylindrical shape, or a cylindrical shape with inclined sides, but the shape of the groove 130H is not limited thereto.

[0053] The groove 130H may have a bottom surface 130F. In the present specification, the bottom surface 130F does not necessarily mean a flat surface, but is meant to include an inclined surface or a curved surface. The bottom surface 130F may be the substantially deepest portion in the groove 130H. However, in the case where the bottom surface 130F is inclined or curved, the depth of the bottom surface 130F in the groove 130H may be different for each measurement point.

[0054] The materials of the second insulating layer 141A and the third insulating layer 141B are not particularly limited, and any material can be used as long as the material has insulating properties. For example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a thermosetting resin or a thermoplastic resin further containing a reinforcing material such as an inorganic filler and / or glass cloth (or glass fabric) (e.g., a prepreg, ABF (Ajinomoto Build-up Film), FR-4, bismaleimide triazine (BT), etc.) can be used. A photosensitive dielectric (PID) resin can also be used as needed.

[0055] The second insulating layer 141A and the third insulating layer 141B may include the same material as that of the first insulating layer 111A and / or the core layer 130 .

[0056] As the material of each of the first wiring layer 142A and the second wiring layer 142B, a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof may be used. The first wiring layer 142A and the second wiring layer 142B may perform various functions according to the design. For example, examples of the design may include a ground (GrouND: GND) pattern, a power (PoWeR: PWR) pattern, a signal (S) pattern, and the like. In this case, the signal (S) pattern includes various signal patterns other than the ground (GND) pattern, the power (PWR) pattern, and the like, for example, including a data signal pattern and the like. In addition, the signal (S) pattern includes a via pad and the like.

[0057] The material used to form the via 143 may be a conductive material (such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), alloys thereof, etc.). The via 143 may be completely filled with the conductive material, or the conductive material may be formed along the wall of the via. The shape of the via 143 may be any shape known in the art, such as a conical shape, a cylindrical shape, etc.

[0058] The material of the through via 144 may also be a conductive material (such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or an alloy thereof). The through via 144 may be completely filled with a conductive material, or may be formed in a form in which a conductive material is formed along the wall of the through via. In the case where the through via 144 is formed in a form in which a conductive material is formed along the wall of the through via, the inner side of the wall of the through via may be filled with an insulating material or the like. In addition, the shape of the through via 144 may be any shape known in the art, such as a conical shape, a cylindrical shape, or the like.

[0059] The first connecting member 150 includes: a first insulating layer 151A; a first redistribution layer 152A, which is disposed on the first insulating layer 151A; a first via 153A, which penetrates the first insulating layer 151A and connects the first wiring layer 142A and the first redistribution layer 152A; a second insulating layer 151B, which is disposed on the first insulating layer 151A and covers the first redistribution layer 152A; a second redistribution layer 152B, which is disposed on the second insulating layer 151B; and a second via 153B, which penetrates the second insulating layer 151B and connects the first redistribution layer 152A and the second redistribution layer 152B.

[0060] However, the examples of the present disclosure are not limited thereto and may be variously modified by those skilled in the art. For example, the number of insulating layers, redistribution layers, and vias included in the first connection member 150 may be greater or less than the number of insulating layers, redistribution layers, and vias included in the first connection member 150 shown in the drawings.

[0061] The materials of the first insulating layer 151A and the second insulating layer 151B are not particularly limited, and any material can be used as long as it has insulating properties. For example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a thermosetting resin or a thermoplastic resin further containing a reinforcing material such as an inorganic filler and / or glass cloth (or glass fabric) (e.g., a prepreg, ABF (Ajinomoto Build-up Film), FR-4, bismaleimide triazine (BT), etc.) can be used. A photosensitive dielectric (PID) resin can also be used as needed.

[0062] Depending on the material and process of each insulating layer, the boundary between the first insulating layer 151A and the second insulating layer 151B may not be distinguished. For example, during the lamination process, the first insulating layer 151A and the second insulating layer 151B are integrated with each other, or the interface therebetween is not clear, and therefore, it may be difficult to visually distinguish the boundary surface therebetween in a board structure in which a complete electronic component is embedded.

[0063] The first redistribution layer 152A and the second redistribution layer 152B may be formed using conductive materials, such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or alloys thereof, respectively. The first redistribution layer 152A and the second redistribution layer 152B may perform various functions according to the design. For example, examples of the design may include a ground (GrouND: GND) pattern, a power (PoWeR: PWR) pattern, a signal (S) pattern, and the like. In this case, the signal (S) pattern includes various signal patterns other than a ground (GND) pattern, a power (PWR) pattern, and the like, for example, including a data signal pattern, and the like. In addition, the signal (S) pattern includes a via pad, a connection terminal pad, and the like.

[0064] The first via hole 153A and the second via hole 153B may be formed using a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof. The first via hole 153A and the second via hole 153B may be completely filled with a conductive material, or may be formed in a form in which a conductive material is formed along the wall of the via hole. The shape of each of the first via hole 153A and the second via hole 153B may be any shape known in the art, such as a conical shape, a cylindrical shape, etc.

[0065] The second connecting member 160 includes: a first insulating layer 161A; a first redistribution layer 162A, which is disposed on the first insulating layer 161A; a first via 163A, which penetrates the first insulating layer 161A and connects the second wiring layer 142B and the first redistribution layer 162A; a second insulating layer 161B, which is disposed on the first insulating layer 161A and covers the first redistribution layer 162A; a second redistribution layer 162B, which is disposed on the second insulating layer 161B; and a second via 163B, which penetrates the second insulating layer 161B and connects the first redistribution layer 162A and the second redistribution layer 162B.

[0066] However, the configuration of the second connection member 160 is not limited thereto and may be variously modified according to examples. For example, the number of insulating layers, redistribution layers, and vias included in the second connection member 160 may be greater or less than the number of insulating layers, redistribution layers, and vias included in the second connection member 160 shown in the drawings.

[0067] The material of each of the first insulating layer 161A and the second insulating layer 161B is not particularly limited, and any material can be used as long as it has insulating properties. For example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a thermosetting resin or a thermoplastic resin further containing a reinforcing material such as an inorganic filler and / or glass cloth (or glass fabric) (e.g., a prepreg, ABF (Ajinomoto Build-up Film), FR-4, bismaleimide triazine (BT), etc.) can be used. A photosensitive dielectric (PID) resin can also be used as needed.

[0068] Depending on the material and process of each insulating layer, the boundary between the first insulating layer 161A and the second insulating layer 161B may not be distinguished. For example, during the lamination process, the first insulating layer 161A and the second insulating layer 161B may be integrated with each other, or the interface between the first insulating layer 161A and the second insulating layer 161B may not be clear, and therefore, it may be difficult to visually distinguish the boundary surface therebetween in a board structure in which a complete electronic component is embedded.

[0069] As a material of each of the first redistribution layer 162A and the second redistribution layer 162B, a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof may be used. The first redistribution layer 162A and the second redistribution layer 162B may perform various functions according to the design. For example, examples of the design may include a ground (GrouND: GND) pattern, a power (PoWeR: PWR) pattern, a signal (S) pattern, and the like. In this case, the signal (S) pattern includes various signal patterns other than the ground (GND) pattern, the power (PWR) pattern, and the like, for example, including a data signal pattern, and the like. In addition, the signal (S) pattern includes a via pad, a connection terminal pad, and the like.

[0070] As the material of each of the first via hole 163A and the second via hole 163B, a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof may be used. The first via hole 163A and the second via hole 163B may be completely filled with a conductive material, respectively, or may be formed in a form in which a conductive material is formed along the wall of the via hole. The shape of each of the first via hole 163A and the second via hole 163B may be any shape known in the art, such as a conical shape, a cylindrical shape, etc.

[0071] The number of insulating layers and / or wiring layers included in the first connection member 150 and the second connection member 160 may be the same. For example, the number of insulating layers and / or wiring layers formed on both surfaces of the core layer 130 and the first insulating layer 111A (e.g., based on both surfaces of the core layer 130 and the first insulating layer 111A) may be the same. Therefore, the insulating layers and / or wiring layers are established on both sides in a symmetrical form, thereby obtaining a favorable effect in reducing warpage.

[0072] Figure 4 is a schematic cross-sectional view of a board 100B in which electronic components are embedded according to another example.

[0073] Reference Figure 4 In the case of the electronic component-embedded board 100B according to another example, the edge of the bottom surface 130F of the groove 130H has a rounded shape compared with the configuration of the electronic component-embedded board 100A according to the above-described example.

[0074] As described above, when the edge of the bottom surface 130F of the groove 130H has a rounded shape, the first insulating layer 111A can facilitate filling the groove 130H in a process to be described later. In addition, the possibility of voids can be reduced. The detailed process thereof will be described later.

[0075] The other details are substantially the same as those described with respect to the electronic component embedded board 100A according to the example, and a detailed description thereof will be omitted.

[0076] Figure 5 is a schematic cross-sectional view of a board 100C in which electronic components are embedded according to another example.

[0077] Reference Figure 5 In the case of the electronic component-embedded board 100C according to another example, one surface of the electronic component 120 protrudes upward from one surface of the first insulating layer 111A, compared with the configuration of the electronic component-embedded board 100A according to the example. In addition, a plurality of insulating layers 111B and 111C other than the first insulating layer 111A, a plurality of redistribution layers 112A, 112B, and 112C, and a plurality of vias 113A, 113B, and 113C covering at least a portion of the electronic component 120 may be further provided in the electronic component-embedded board 100C.

[0078] For example, a board 100C embedded with electronic components according to the example may include: a first redistribution layer 112A, which is disposed on the first insulating layer 111A; a first via 113A, which penetrates the first insulating layer 111A and connects the first wiring layer 142A and the first redistribution layer 112A; a second insulating layer 111B, which is disposed on the first insulating layer 111A and covers the first redistribution layer 112A; a second redistribution layer 112B, which is disposed on the second insulating layer 111B; a second via 113B, which penetrates the second insulating layer 111B and connects the first redistribution layer 112A and the second redistribution layer 112B; a third insulating layer 111C, which is disposed on the second insulating layer 111B and covers the second redistribution layer 112B; a third redistribution layer 112C, which is disposed on the third insulating layer 111C; and a third via 113C, which penetrates the third insulating layer 111C and connects the second redistribution layer 112B and the third redistribution layer 112C to each other. The third via 113C may also connect the electronic component 120 and the third redistribution layer 112C.

[0079] However, the examples of the present disclosure are not limited thereto, and various changes may be made. For example, the number of vias disposed on the first insulating layer 111A, the number of redistribution layers disposed on each of the plurality of insulating layers, or the number of vias penetrating each of the plurality of insulating layers may be greater than or less than the number of vias disposed on the first insulating layer 111A, the number of redistribution layers disposed on each of the plurality of insulating layers, or the number of vias penetrating each of the plurality of insulating layers as shown in the drawings.

[0080] The first wiring layer 142A and the second wiring layer 142B may be respectively disposed on both sides of the core layer 130 , and the through vias 144 may penetrate the core layer 130 to connect the first wiring layer 142A and the second wiring layer 142B.

[0081] Although not shown in the drawings, the second insulating layer (corresponding to the third insulating layer 141B in the board 100A with embedded electronic components) disposed between the core layer 130 and the second connecting member 160 may also be included in the board 100C as needed, as in the board 100A with embedded electronic components according to the example. In this case, the second wiring layer 142B may be disposed on the second insulating layer (corresponding to the third insulating layer 141B in the board 100A with embedded electronic components), and the through-hole 144 may further penetrate the second insulating layer (corresponding to the third insulating layer 141B in the board 100A with embedded electronic components).

[0082] The material of each of the first insulating layer 111A, the second insulating layer 111B, and the third insulating layer 111C is not particularly limited, and any material can be used as long as the material has insulating properties. For example, a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a thermosetting resin or a thermoplastic resin further containing a reinforcing material such as an inorganic filler and / or glass cloth (or glass fabric) (for example, a prepreg, ABF (Ajinomoto Build-up Film), FR-4, bismaleimide triazine (BT), etc.) can be used. A photosensitive dielectric (PID) resin can also be used as needed.

[0083] Depending on the material and process of each insulating layer, the boundaries between the first insulating layer 111A, the second insulating layer 111B, and the third insulating layer 111C may not be distinguished from each other. For example, during the lamination process, the first insulating layer 111A, the second insulating layer 111B, and the third insulating layer 111C are integrated with each other, or the interface therebetween is not clear, and therefore, it may be difficult to visually distinguish the boundary surfaces therebetween in a board structure in which a complete electronic component is embedded.

[0084] As a material of each of the first redistribution layer 112A, the second redistribution layer 112B, and the third redistribution layer 112C, a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof may be used. The first redistribution layer 112A, the second redistribution layer 112B, and the third redistribution layer 112C may perform various functions according to the design. For example, an example of the design may include a ground (GrouND: GND) pattern, a power (PoWeR: PWR) pattern, a signal (S) pattern, and the like. In this case, the signal (S) pattern includes various signal patterns other than the ground (GND) pattern, the power (PWR) pattern, and the like, for example, including a data signal pattern, and the like. In addition, the signal (S) pattern includes a via pad, a connection terminal pad, and the like.

[0085] A conductive material (such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof) may be used as a material for each of the first via 113A, the second via 113B, and the third via 113C. The first via 113A, the second via 113B, and the third via 113C may be completely filled with a conductive material, respectively, or may be formed in a form in which a conductive material is formed along the wall of the via. The shape of each of the first via 113A, the second via 113B, and the third via 113C may be any shape known in the art, such as a conical shape, a cylindrical shape, etc.

[0086] In addition, compared with the second connecting member 160 of the board 100A embedded with electronic components according to the example, the second connecting member 160 of the board 100C embedded with electronic components according to another example may also include: a third insulating layer 161C, which is arranged on the second insulating layer 161B and covers the second redistribution layer 162B; a third redistribution layer 162C, which is arranged on the third insulating layer 161C; and a third via 163C, which penetrates the third insulating layer 161C and connects the second redistribution layer 162B and the third redistribution layer 162C.

[0087] The other details are substantially the same as those described with respect to the electronic component embedded board 100A according to the example, and a detailed description thereof will be omitted.

[0088] Figure 6 is a schematic cross-sectional view of a board 100D in which electronic components are embedded according to another example.

[0089] Reference Figure 6 In the case of the electronic component-embedded board 100D according to another example, the edge of the bottom surface 130F of the groove 130H has a rounded shape compared with the configuration of the electronic component-embedded board 100C according to the above example.

[0090] As described above, when the edges of the bottom surface 130F of the groove 130H have a rounded shape, they can facilitate the first insulating layer 111A to fill the groove 130H in a process to be described later. In addition, the possibility of voids can be reduced. The detailed process will be described later.

[0091] The other details are substantially the same as those described with respect to the electronic component-embedded boards 100A and 100C according to the example, and thus, a detailed description thereof will be omitted.

[0092] 7A to 9D A portion of a process of manufacturing a board 100A embedded with electronic components according to an example is schematically shown.

[0093] Reference 7A to 7C , first, a core layer 130 is prepared, and then, a groove 130H is formed in the core layer 130. The groove 130H may be formed by a sandblasting method using abrasive particles, a dry etching method using plasma, or the like. However, the examples of the present disclosure are not limited thereto, and the groove 130H may be formed by mechanical drilling and / or laser drilling. In the case where the groove 130H is formed using mechanical drilling and / or laser drilling, a desmear treatment such as a permanganate method is performed to remove resin smear in the groove 130H. If necessary, the process of manufacturing the board 100A may include a process of forming a mask 210 to cover the surrounding area of ​​a portion of the core member where the groove 130H is to be formed, forming the groove 130H, and removing the mask 210.

[0094] On the other hand, the edge of the bottom surface 130F of the groove 130H may have a rounded shape instead of a rounded shape. 7A to 7C As described above, when the edge of the bottom surface 130F of the groove 130H has a rounded shape, it is easy to fill the groove 130H with the material of the first insulating layer 111A in a process to be described later. In addition, the possibility of voids can be reduced.

[0095] Reference FIG. 8A to FIG. 8C After preparing the first insulating layer 111A, a penetration portion 110H is formed to penetrate the first insulating layer 111A. The penetration portion 110H may be formed by mechanical drilling and / or laser drilling. However, the examples of the present disclosure are not limited thereto, and the formation of the penetration portion 110H may be performed by a sandblasting method using abrasive particles, a dry etching method using plasma, or the like. In the case where the penetration portion 110H is formed using mechanical drilling and / or laser drilling, a desmearing process such as a permanganate method is performed to remove resin smear in the penetration portion 110H.

[0096] The material of the first insulating layer 111A may be in an uncured state or a semi-cured state. In this case, the material of the first insulating layer 111A in an uncured or semi-cured state flows into the through portion 110H of the first insulating layer 111A and the groove 130H of the core layer 130 to fill the through portion 110H and the groove 130H in a process to be described later. In this case, in the case where the material of the first insulating layer 111A includes a reinforcing material such as an inorganic filler and / or glass fiber, the reinforcing material may not fill the groove 130H (for example, refer to Figure 3A ) or not filling the through portion 110H and the groove 130H (for example, referring to Figure 3B ). Therefore, the first insulating layer 111A disposed only in the region other than the groove 130H or in the region other than the through portion 110H and the groove 130H includes the reinforcing material, and the first insulating layer 111A disposed in the groove 130H or the through portion 110H and the groove 130H may include only the resin other than the reinforcing material (such as the inorganic filler and the glass fiber). For example, the reinforcing material may be disposed between one surface of the first insulating layer 111A, which is the surface of the first insulating layer 111A in contact with the core layer 130 around the groove 130H, and the other surface of the first insulating layer 111A as the back surface.

[0097] Next, an adhesive film 220 is attached to the other surface of the first insulating layer 111A. Any material can be used as the adhesive film 220 as long as it can fix the first insulating layer 111A, and any known tape or the like can be used as an example without limitation. A heat-curing adhesive tape whose adhesive force is weakened by heat treatment, an ultraviolet curing adhesive tape whose adhesive force is weakened by ultraviolet irradiation, and the like can be used as examples of known tapes.

[0098] Next, the electronic component 120 is disposed in the through portion 110H of the first insulating layer 111A. For example, the electronic component 120 may be attached to the adhesive film 220 disposed in the through portion 110H. In this case, the electronic component 120 may be disposed in the through portion 110H to be spaced apart from the first insulating layer 111A by a predetermined distance.

[0099] Reference 9A to 9D , a first insulating layer 111A in which the electronic component 120 is disposed and a core layer 130 in which the groove 130H is formed are laminated. As described above, the material of the first insulating layer 111A may be in an uncured state or a semi-cured state before lamination, and may be cured after lamination. Therefore, the material of the first insulating layer 111A may flow into the through-portion 110H and the groove 130H of the core layer 130 to fill the through-portion 110H and the groove 130H. In the case where the material of the first insulating layer 111A includes a reinforcing material such as an inorganic filler and / or glass fiber, the reinforcing material may not fill the groove 130H or may not fill the through-portion 110H and the groove 130H. Therefore, the first insulating layer 111A disposed only in an area other than the groove 130H or in an area other than the through portion 110H and the groove 130H includes a reinforcing material, and the first insulating layer 111A disposed in the groove 130H or the through portion 110H and the groove 130H may include only a resin other than the reinforcing material (such as an inorganic filler and glass fiber).

[0100] Next, the adhesive film 220 attached to the other surface of the first insulating layer 111A is peeled off. The peeling method is not particularly limited and can be implemented by a known method. For example, when the adhesive film 220 is a heat-curing adhesive tape whose adhesive force is weakened by heat treatment, an ultraviolet curing adhesive tape whose adhesive force is weakened by ultraviolet irradiation, etc., the peeling can be performed after weakening the adhesive force by heat-treating the adhesive film 220 or by irradiating ultraviolet light on the adhesive film 220.

[0101] like Fig. 9C As shown in FIG. 1 , a second insulating layer 141A and a third insulating layer 141B may be further laminated on the first insulating layer 111A and the core layer 130 , respectively, as necessary.

[0102] On the other hand, depending on product design or user requirements, if necessary, a case can be considered in which a board with electronic components embedded therein is formed by laminating a plurality of insulating layers of different materials and adhesive layers to match a required substrate thickness.

[0103] Therefore, in the case where the laminated material is a different type of material, it is difficult to describe and predict the thermal properties of the combined multiple materials, and thus it may be difficult to control the warpage of the board. In addition, a pre-processing process of the laminated material of laminating multiple insulating layers and adhesive layers may be required, and as the process becomes complicated, the processing time and cost may increase.

[0104] On the other hand, in the case of undergoing the manufacturing process of the board embedded with electronic components according to the example, only by adjusting the thickness of the core layer having the groove, the board embedded with electronic components can have a thickness corresponding to the product design or user requirements. In addition, when the core layer and the insulating layer are formed using the same material, the thermal performance and thermal characteristics of a single material undergoing a thermal process can be predicted, and the possibility of warping can be reduced compared to the case of using a composite material. In addition, the pretreatment process can be relatively simplified, thereby reducing the processing time and cost.

[0105] Although not shown in the drawings, the first wiring layer 142A, the second wiring layer 142B, the through vias 144, the first connection members 150, the second connection members 160, etc. may be further formed as necessary. The formation method thereof is not particularly limited, and a known method may be used.

[0106] In addition, the manufacturing process of the electronic component embedded board 100A according to the example may be changed within the range achievable by those skilled in the art. For example, the manufacturing order and / or manufacturing method of each configuration may be changed and implemented.

[0107] Fig.10 1 is a cross-sectional view schematically showing an example in which a semiconductor package is mounted on an electronic component-embedded board 100A.

[0108] Reference Fig.10 In the case of using the above-mentioned board 100A, 100B, 100C or 100D embedded with electronic components according to the examples of the present disclosure, a semiconductor package 300 in which a first semiconductor chip 311, a second semiconductor chip 312 and a third semiconductor chip 313 are mounted on an interposer 320 and electrically connected to each other is mounted on the board 100A, 100B, 100C and 100D embedded with electronic components, and an embedded electronic component 120 can be electrically connected to the first semiconductor chip 311, the second semiconductor chip 312 and the third semiconductor chip 313 of the semiconductor package 300 through a very short electrical path.

[0109] The first semiconductor chip 311 may be an application specific integrated circuit (ASIC), and the second semiconductor chip 312 and the third semiconductor chip 313 may be high bandwidth memories (HBM), but are not limited thereto.

[0110] As described above, according to an example, there is provided an electronic component embedded board that can reduce the possibility of occurrence of warpage.

[0111] The board with embedded electronic components can be manufactured according to a simplified process.

[0112] The meaning of "connection" in the present disclosure includes not only direct connection but also indirect connection. In addition, the term "electrical connection" means a concept including both physical connection and physical non-connection. In addition, the expressions "first", "second", etc. are used to distinguish one component from another component and do not limit the order and / or importance of components, etc. In some cases, without departing from the scope of the rights, a first component may be referred to as a second component, and similarly, a second component may also be referred to as a first component.

[0113] The expression "example" used in this disclosure does not mean the same embodiment, but is provided to emphasize and illustrate different unique features. However, the above examples or embodiments do not exclude the combination of features with other examples. For example, unless otherwise described or contradictory to other examples, although the description in a specific example is not described in another example, the description can be understood as a description related to another example.

[0114] The terms used in the inventive concept are only for illustrative examples and are not intended to limit the present disclosure. Unless the context clearly dictates otherwise, a singular expression includes a plural expression.

Claims

1. A board with embedded electronic components, the board comprising: a core layer having a groove with a bottom surface recessed from one surface of the core layer; an electronic component disposed above and spaced apart from the bottom surface of the slot; as well as a first insulating layer, which is disposed on a region of the one surface of the core layer surrounding the groove and extending into the groove, and covers at least a portion of the electronic component, wherein the first insulating layer is disposed in at least a portion of a space between the bottom surface of the groove and the electronic component, The first insulating layer includes a reinforcing material, and the reinforcing material is separated from the groove.

2. The plate of claim 1, wherein: An upper surface of the electronic component opposite to a lower surface of the electronic component facing the bottom surface of the groove is exposed from one surface of the first insulating layer.

3. The plate of claim 2, wherein: The upper surface of the electronic component and the one surface of the first insulating layer are substantially coplanar with each other.

4. The board of claim 1, wherein: An edge of the bottom surface of the groove has a rounded shape.

5. The board of claim 1, wherein: The thickness of the core layer surrounding the groove is greater than the thickness of a portion of the first insulating layer surrounding the groove.

6. The board of claim 1, wherein: The reinforcing material comprises inorganic filler and glass fiber.

7. The board of claim 1, wherein: The reinforcing material is disposed between one surface of the first insulating layer that contacts the core layer around the groove and another surface of the first insulating layer that faces away from the one surface of the first insulating layer.

8. The board of claim 1, wherein: The first insulating layer and the core layer are made of the same material.

9. The board of claim 1, wherein: An interface between the core layer and the first insulating layer surrounding the groove is located at a height between an upper surface and a lower surface of the electronic component. 10 . The board of claim 1 , further comprising a first connection member disposed on the first insulating layer and comprising a first redistribution layer connected to the electronic component.

11. The panel of claim 10, further comprising a second connection member disposed on the core layer and comprising a second redistribution layer. 12 . The board of claim 11 , further comprising a first through via penetrating the core layer and the first insulating layer and connecting the first redistribution layer and the second redistribution layer to each other.

13. The board of claim 1, wherein: An upper surface of the electronic component opposite to a lower surface of the electronic component facing the bottom surface of the groove protrudes from one surface of the first insulating layer.

14. The board of claim 13, further comprising: a second insulating layer, disposed on the first insulating layer and covering at least a portion of the electronic component; as well as A third redistribution layer is disposed on the second insulating layer and connected to the electronic component.

15. The panel of claim 14, further comprising a connection member disposed on the core layer and comprising a fourth redistribution layer. 16 . The board of claim 15 , further comprising a second through via penetrating the core layer and connecting the third redistribution layer and the fourth redistribution layer to each other.

17. The board of claim 1, wherein: The reinforcement material dispersed in the core layer is spaced apart from the electronic component, and the reinforcement material dispersed in the first insulating layer is spaced apart from the electronic component.

18. The panel of claim 1, wherein: The reinforcing material dispersed in the core layer is spaced apart from the electronic component, and the reinforcing material dispersed in the first insulating layer is in contact with the electronic component.

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