A wafer-level packaging method and wafer-level packaging structure for MEMS devices

Abstract

The present invention discloses a wafer-level packaging method and a wafer-level packaging structure of a MEMS device, and belongs to the field of packaging technology of MEMS devices. The wafer-level packaging method of the MEMS device includes: a silicon oxide layer is provided on the end face of the silicon body, a first metal layer is provided on the end face of the silicon oxide layer, and the first metal layer is provided on a carrier; the material of the silicon body and the silicon oxide layer is removed along the periphery of the second preset area, so that the end face of the first metal layer away from the carrier is exposed; a second metal layer is provided in the third preset area, and the second metal layer is contacted and connected with the first metal layer; the MEMS wafer is bonded to the second metal layer; the carrier is removed, the ASIC chip is bonded to the first metal layer, and solder is applied to the first metal layer. The wafer-level packaging structure of the MEMS device is made by the above-mentioned packaging method. The wafer-level packaging method and the wafer-level packaging structure of the MEMS device of the present invention have a small structure volume, low production cost, and high production efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of packaging of MEMS devices, and in particular to a wafer-level packaging method and a wafer-level packaging structure of a MEMS device. Background Art

[0002] MEMS (Micro-Electro-Mechanical System) chips are most commonly used for sensing functions, such as MEMS microphone chips and MEMS pressure chips. MEMS devices are MEMS devices formed by packaging a MEMS chip and an ASIC (Application Specific Integrated Circuit) chip together. In the prior art, the packaging structure of MEMS chips and ASIC chips mainly has the following problems: first, the ASIC chip and the MEMS chip are placed side by side on the substrate, resulting in a large size of the MEMS device; second, during the production process, the ASIC chip and the MEMS chip need to be attached to the substrate one by one, which is inefficient; third, the outer shell is made of metal stamping, and the chips are welded with gold wire balls, resulting in high production costs. Summary of the invention

[0003] An object of the present invention is to provide a wafer-level packaging method for a MEMS device, which has a small structure volume, low production cost and high production efficiency.

[0004] To achieve this object, the present invention adopts the following technical solutions:

[0005] A wafer-level packaging method for a MEMS device, comprising:

[0006] A silicon oxide layer is provided on the end surface of the silicon body, a first preset area is provided on the end surface of the silicon oxide layer, a first metal layer is provided on the first preset area, and a first resin layer is provided around the first metal layer;

[0007] The first resin layer is disposed on a carrier;

[0008] A second preset area is arranged on the end face of the silicon body away from the silicon oxide layer, and materials of the silicon body and the silicon oxide layer are removed along the periphery of the second preset area to expose the end face of the first metal layer away from the carrier; a third preset area is arranged on the surface of the second preset area of ​​the silicon body and the end face of the exposed first metal layer, and a second metal layer is arranged in the third preset area, and the second metal layer is in contact with and connected to the first metal layer; a welding bump is arranged in a fourth preset area on the second metal layer to form a transfer body with the carrier;

[0009] The MEMS wafer is bonded to the second metal layer, and the welding bumps are arranged in a one-to-one correspondence with the first conductive pillars on the MEMS wafer;

[0010] The carrier is removed, the first resin layer is arranged at the periphery of the fifth preset area and the sixth preset area, the ASIC chip is bonded to the first metal layer, and the second conductive column on the ASIC chip is connected to the fifth preset area on the first metal layer;

[0011] Solder is applied to the sixth preset area on the first metal layer to form a wafer-level packaging structure of the MEMS device.

[0012] Optionally, the step of providing a welding bump in the fourth preset area on the second metal layer also includes providing solder on the periphery of the welding bump to form a sealing ring, wherein the sealing ring is spaced apart from the welding bump.

[0013] Optionally, before solder is provided on the periphery of the welding bump to form a sealing ring, the method further includes providing a dry film on the outer ring of the sealing ring and providing the dry film between each of the welding bumps, wherein the dry film forms a sealing ring.

[0014] Optionally, after the first metal layer is disposed on the carrier, the method further comprises:

[0015] The material on the end surface of the silicon body facing away from the silicon oxide layer is removed to reduce the thickness of the silicon body.

[0016] Optionally, the silicon body is

[0017] A common silicon wafer, after removing the materials of the silicon body and the silicon oxide layer along the periphery of the second preset area, further comprising: providing an insulating layer between the surface of the silicon body and the second metal layer; or

[0018] High resistance silicon wafer.

[0019] Optionally, before setting the welding bump, the method further includes setting a second resin adhesive layer on the periphery of the fourth preset area.

[0020] Optionally, after the first metal layer is provided in the first preset area, the method further comprises: providing a first protective layer on the first metal layer;

[0021] After the second metal layer is disposed in the third preset area, the method further includes disposing a second protective layer on the second metal layer.

[0022] Optionally, the wafer-level packaging structure of the MEMS device is cut to form a packaging structure of a single MEMS device.

[0023] Another object of the present invention is to provide a wafer-level packaging structure of a MEMS device, which has a small structure volume, low production cost and high production efficiency.

[0024] To achieve this object, the present invention adopts the following technical solutions:

[0025] A wafer-level packaging structure of a MEMS device is manufactured by the above-mentioned wafer-level packaging method of a MEMS device, the packaging structure includes a MEMS wafer, an ASIC chip and a transfer body, and the transfer body includes:

[0026] Silicon body;

[0027] A first metal layer is disposed on the silicon body;

[0028] A silicon oxide layer, disposed between the silicon body and the first metal layer;

[0029] A second metal layer is arranged on the surface of the silicon body and the silicon oxide layer, the first metal layer is in contact with and connected to the second metal layer, and a welding bump is arranged on the second metal layer;

[0030] a first resin layer, disposed on the first metal layer;

[0031] The second metal layer is bonded to the MEMS wafer, the solder bumps are arranged in a one-to-one correspondence with the first conductive pillars on the MEMS wafer, the first metal layer is bonded to the ASIC chip, the second conductive pillars on the ASIC chip are connected to the first metal layer, solder is also arranged on the first metal layer, and the first resin layer is arranged along the periphery of the second conductive pillars and the periphery of the solder.

[0032] Optionally, a sealing ring is provided on the periphery of the welding bump, the sealing ring is spaced apart from the welding bump, a dry film is provided on the outer ring of the sealing ring and between each of the welding bumps, the dry film forms a sealing ring, and the MEMS wafer and the transfer body are bonded to each other via the sealing ring and the sealing ring respectively.

[0033] Beneficial effects of the present invention:

[0034] The present invention provides a wafer-level packaging method for a MEMS device. A transfer body is manufactured by a wafer-level method. An ASIC chip and a MEMS wafer are respectively stacked and connected in a longitudinal direction through the transfer body to form a wafer-level packaging structure of the MEMS device, thereby reducing the volume of the MEMS device. The MEMS wafer and the ASIC chip are respectively connected to the transfer body by a combination of metal bonding and organic material bonding, thereby improving the reliability of the structural connection, and having low manufacturing cost and good sealing performance. Optionally, the wafer-level packaging structure of the MEMS device is cut to form a packaging structure of a single MEMS device. There are as many as tens of thousands of chips on a single wafer. Each chip on the wafer is packaged at the same time and then cut, thereby improving the packaging efficiency and further improving the production efficiency. The processing feasibility is high, and the manufacturing method of this embodiment can be applied to the wafer-level packaging structure manufacturing of various MEMS devices such as silicon microphones and pressure sensors.

[0035] A wafer-level packaging structure of a MEMS device provided by the present invention is manufactured by the wafer-level packaging method of the MEMS device, that is, a transfer body is manufactured by the wafer-level method, and an ASIC chip and a MEMS wafer are respectively stacked and connected in the longitudinal direction through the transfer body to form a wafer-level packaging structure of the MEMS device, thereby reducing the volume of the MEMS device; the MEMS wafer and the ASIC chip are respectively connected to the transfer body by a combination of metal bonding and organic material bonding, thereby improving the reliability of the structural connection, and having low manufacturing cost and good sealing performance; optionally, the wafer-level packaging structure of the MEMS device is cut to form a packaging structure of a single MEMS device, with as many as tens of thousands of chips on a single wafer, and each chip on the wafer is packaged at the same time and then cut, thereby improving the packaging efficiency, thereby improving the production efficiency; the processing feasibility is high, and the manufacturing method of this embodiment can be applied to the wafer-level packaging structure manufacturing of various MEMS devices such as silicon microphones and pressure sensors. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 is a schematic structural diagram of a silicon oxide layer, a silicon body and a first metal layer provided by a specific embodiment of the present invention;

[0037] Figure 2 It is a structural schematic diagram of a first preset area of ​​a first metal layer provided by a specific embodiment of the present invention, in which a photoresist layer is provided;

[0038] Figure 3 It is a structural schematic diagram of etching the first metal layer at the periphery of the first preset area provided by a specific embodiment of the present invention;

[0039] Figure 4 It is a structural schematic diagram of removing a photoresist layer provided by a specific embodiment of the present invention;

[0040] Figure 5 is a schematic structural diagram of providing a first resin adhesive layer on a first metal layer according to a specific embodiment of the present invention;

[0041] Figure 6 It is a structural schematic diagram of installing a carrier on the first metal glue layer provided by a specific embodiment of the present invention;

[0042] Figure 7 It is a structural schematic diagram of a silicon body thinning process provided by a specific embodiment of the present invention;

[0043] Figure 8 It is a schematic diagram of a structure in which a groove is formed on a silicon body along the outer periphery of a second preset area provided by a specific embodiment of the present invention;

[0044] Fig. 9 It is a structural schematic diagram of providing an insulating layer on a silicon body provided by a specific embodiment of the present invention;

[0045] Fig.10 It is a schematic structural diagram of the insulating layer and the silicon oxide layer at the grooved position removed provided by a specific embodiment of the present invention;

[0046] Fig.11 is a schematic diagram of a structure of providing a second metal layer provided by a specific embodiment of the present invention;

[0047] Fig.12 It is a structural schematic diagram of a photoresist layer disposed in a third preset area on a second metal layer provided by a specific embodiment of the present invention;

[0048] Fig.13 is a structural schematic diagram of removing the second metal layer at the periphery of the third preset area provided by a specific embodiment of the present invention;

[0049] Fig.14 It is a structural schematic diagram of a second resin adhesive layer disposed on the periphery of the first preset area on the second metal layer provided by a specific embodiment of the present invention;

[0050] Fig.15 It is a structural schematic diagram of setting welding bumps and sealing rings in the fourth preset area provided by a specific embodiment of the present invention;

[0051] Fig.16 It is a structural schematic diagram of a sealing ring provided in a specific embodiment of the present invention;

[0052] Fig.17 yes Fig.16 A magnified image of point A;

[0053] Fig.18 is a top view of an adapter provided by a specific embodiment of the present invention;

[0054] Fig.19 It is a structural schematic diagram of the connection between a MEMS wafer and a transfer body provided by a specific embodiment of the present invention;

[0055] Fig. 20 It is a schematic diagram of the structure of removing the carrier provided by a specific embodiment of the present invention;

[0056] Fig.21 It is a structural schematic diagram of the connection between an ASIC chip and an adapter provided by a specific embodiment of the present invention;

[0057] Fig. 22 It is a structural schematic diagram of a wafer-level packaging structure of a MEMS device provided by a specific embodiment of the present invention;

[0058] Fig.23 is a top view of a wafer-level packaging structure of a MEMS device provided by a specific embodiment of the present invention;

[0059] Fig.24 It is a flow chart of a wafer-level packaging method for MEMS devices provided by a specific embodiment of the present invention.

[0060] In the figure:

[0061] 1000-MEMS device wafer-level packaging structure;

[0062] 101-silicon oxide layer; 102-silicon body; 103-first metal layer; 104-photoresist layer; 105-first resin glue layer; 106-carrier; 107-glue layer; 108-insulating layer; 109-second metal layer; 110-second resin glue layer; 111-welding bump; 112-sealing ring; 113-sealing ring; 114-tin ball;

[0063] 2-MEMS wafer;

[0064] 3-ASIC chip; 301-second conductive column. DETAILED DESCRIPTION

[0065] In order to make the technical problems solved by the present invention, the technical solutions adopted and the technical effects achieved clearer, the technical solutions of the embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0066] In the description of the present invention, unless otherwise clearly specified and limited, the terms "connected", "connected", and "fixed" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0067] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0068] This embodiment provides a wafer-level packaging method for a MEMS device, such as Figure 1-Figure 24 As shown, it includes the following steps:

[0069] S1: A silicon oxide layer 101 is provided on the end surface of the silicon body 102, a first preset area is provided on the end surface of the silicon oxide layer 101, a first metal layer 103 is provided on the first preset area, and a first resin layer 105 is provided around the first metal layer 103;

[0070] S2: The first resin layer 105 is disposed on the carrier 106;

[0071] S3: a second preset area is provided on the end surface of the silicon body 102 which is away from the silicon oxide layer 101, and materials of the silicon body 102 and the silicon oxide layer 101 are removed along the periphery of the second preset area, so that the end surface of the first metal layer 103 which is away from the carrier 106 is exposed; a third preset area is provided on the surface of the second preset area of ​​the silicon body 102 and the end surface of the exposed first metal layer 103, and a second metal layer 109 is provided in the third preset area, and the second metal layer 109 is in contact with and connected to the first metal layer 103; a welding bump 111 is provided in a fourth preset area on the second metal layer 109, so as to form a transfer body with the carrier 106;

[0072] S4: The MEMS wafer 2 is bonded to the second metal layer 109 , and the welding bumps 111 are arranged one-to-one correspondingly to the first conductive pillars on the MEMS wafer 2 ;

[0073] S5: removing the carrier 106, bonding the ASIC chip 3 to the first metal layer 103, disposing the first resin layer 105 at the periphery of the fifth preset area and the sixth preset area, and connecting the second conductive pillar 301 on the ASIC chip 3 to the fifth preset area on the first metal layer 103;

[0074] S6: soldering the sixth preset area on the first metal layer 103 to form a wafer-level packaging structure 1000 of the MEMS device.

[0075] A transfer body is manufactured by a wafer-level method, and the ASIC chip 3 and the MEMS wafer 2 are stacked and connected in the longitudinal direction through the transfer body to form a wafer-level packaging structure 1000 of the MEMS device, thereby reducing the volume of the MEMS device; optionally, the wafer-level packaging structure 1000 of the MEMS device is cut to form a packaging structure of a single MEMS device, and as many as tens of thousands of chips are on a single wafer, and packaging is performed at the same time, thereby improving production efficiency; the MEMS wafer 2 and the ASIC chip 3 are respectively connected to the transfer body by a combination of metal bonding and organic material bonding, thereby improving the reliability of the structural connection, and having low manufacturing cost and good sealing; the processing feasibility is high, and the manufacturing method of this embodiment can be applied to the wafer-level packaging structure manufacturing of various MEMS devices such as silicon microphones and pressure sensors. The carrier 106 plays an auxiliary role as an intermediate carrier. When the first metal layer 103 is exposed from the end face of the carrier 106, the silicon body 102 and the silicon oxide layer 101 are divided into small units one by one. The carrier 106 is used to connect the small units one by one, so that all the divided silicon body 102 and silicon oxide layer 101 small units can be bonded to the MEMS wafer 2 at the same time to achieve wafer-level packaging.

[0076] Specifically, the production of the adapter includes the following steps:

[0077] like Figure 1 As shown, a silicon body 102 containing a silicon oxide layer 101 is selected. Optionally, the thickness of the silicon body 102 is the original thickness, which is between 600 microns and 800 microns. Afterwards, a first metal layer 103 is arranged on the end surface of the silicon oxide layer 101. The main function of the first metal layer 103 is to prepare for the subsequent circuit. The first metal layer 103 can be an aluminum layer, an aluminum-copper layer, or a titanium-copper layer, etc. The preferred thickness is within 5 microns to avoid excessive thickness that makes the thickness of the packaging structure too large.

[0078] In this embodiment, Figure 2 As shown, according to the circuit routing design requirements, a photoresist layer 104 is coated on the first metal layer 103, and then exposed and developed to produce a photoresist pattern matching the circuit routing, and the position corresponding to the photoresist pattern is the first preset area.

[0079] In this embodiment, Figure 3As shown, the first metal layer 103 with the photoresist pattern is etched, and its function is that the area without photoresist shielding can remove the first metal layer 103 at the corresponding position through the chemical reaction of the liquid medicine. The first metal layer 103 in the area shielded by the photoresist is retained, that is, the first metal layer 103 is retained in the first preset area, and this part is the circuit wiring area; through the above steps, the first metal layer 103 is set in the first preset area, which is convenient for setting the first metal layer 103, and can ensure the position and size accuracy of the setting, thereby improving reliability.

[0080] like Figure 4 As shown, after etching, the auxiliary photoresist layer 104 is removed to avoid affecting subsequent manufacturing. To protect the first metal layer 103 and prevent it from being oxidized, optionally, after the first metal layer 103 is set in the first preset area, a first protective layer is set on the first metal layer 103. Specifically, a protective metal layer is further plated on the surface of the first metal layer 103. The protective metal can be nickel-gold or nickel-palladium.

[0081] like Figure 5 As shown, in order to protect the circuit layer from being exposed to the air and to facilitate the operation of the silicon body, the carrier 106 may be provided before the carrier 106 is provided, and a first resin glue layer 105 may be provided at the periphery of the fifth preset area and the periphery of the sixth preset area; specifically, a layer of resin glue having photoresistance is coated on the surface of the first metal layer 103, and the color of the resin glue layer is generally green or black, etc., and then the positions of the fifth preset area and the sixth preset area are opened by exposure and development, so as to facilitate subsequent welding connection and other operations.

[0082] Optionally, after the carrier 106 is arranged near one end of the first metal layer 103, the method further includes removing the material on the end surface of the silicon body 102 away from the silicon oxide layer 101 to reduce the thickness of the silicon body 102 and the thickness of the packaging structure to meet the use requirements.

[0083] Specifically, Figure 6 As shown, temporary bonding of the silicon body 102: In order to reduce the thickness of the silicon body 102 and meet the use requirements, its thickness is generally between 0.05mm-0.2mm. However, this thickness cannot operate normally in the process, so a supporting carrier 106 is added before the silicon body 102 is thinned, and an easily removable glue layer 107 is used to bond the carrier 106 to the silicon body 102.

[0084] like Figure 7 As shown, after the support carrier 106 is provided, the silicon body 102 is thinned. The carrier 106 supports the silicon body 102 to facilitate thinning operations.

[0085] like Figure 8As shown, optionally, a layer of photoresist layer 104 is coated on the surface of the thinned silicon body 102 to form a photoresist layer 104, and the photoresist layer 104 at the peripheral position of the second preset area is removed by exposure and development. The position corresponding to the second preset area is the position where the groove needs to be opened later. After that, after the etching process, the silicon body 102 at the groove position is removed to expose the end face of the silicon oxide layer 101 for subsequent use. Optionally, the angle between the groove wall of the groove and the end face of the silicon oxide layer 101 is 80°-90°, that is, the angle of the silicon body 102 at the removal position is close to 90°, so that the end face of the silicon oxide layer 101 is exposed and convenient for subsequent use. Finally, after the groove process is completed, the auxiliary photoresist layer 104 is removed.

[0086] like Fig. 9 As shown, in this embodiment, the silicon body 102 uses an ordinary silicon wafer, that is, a silicon wafer containing silicon oxide, which has a certain conductivity. After the silicon body 102 is grooved, it also includes setting an insulating layer 108 on the surface of the silicon body 102, that is, laying a layer of insulating material on the surface of the silicon body 102 with a groove structure to prevent direct conduction between the silicon body 102 and the subsequent metal, and the subsequent metal refers to the second metal layer 109, that is, setting the insulating layer 108 between the silicon body 102 and the second metal layer 109. In other embodiments, the silicon body 102 can also use a high-resistance silicon wafer, which has insulation, and the above-mentioned step of setting the insulating layer 108 on the silicon body 102 for passivation can be omitted.

[0087] like Fig.10 As shown, in this embodiment, in order to transfer the function of the first metal layer 103 to the grooved surface, the insulating layer 108 and the silicon oxide layer 101 at the grooved position are removed in sequence, and this step is completed using a dedicated silicon oxide etching device.

[0088] like Fig.11 As shown, after the silicon oxide layer 101 at the groove position is removed to expose the first metal layer 103 on the back side, a second metal layer 109 is laid on the surface along the groove structure, and the first metal layer 103 and the second metal layer 109 are in contact and connected.

[0089] like Fig.12 As shown, according to the circuit routing design requirements, a photoresist layer 104 is coated on the surface of the second metal layer 109, and then exposed and developed to produce a photoresist pattern matching the circuit routing, and the position corresponding to the photoresist pattern is the third preset area. Fig.13As shown, according to the photoresist pattern, the second metal layer 109 is removed from the area without photoresist on the surface through a chemical reaction of a liquid medicine, and the second metal layer 109 in the area blocked by the photoresist is retained, that is, the second metal layer 109 is retained in the third preset area, and this part is the circuit wiring area; through the above steps, the second metal layer 109 is set in the third preset area, which is convenient for setting the second metal layer 109, and can ensure the position and size accuracy of the setting, thereby improving reliability. Afterwards, the auxiliary photoresist layer 104 is removed.

[0090] Optionally, after the second metal layer 109 is provided in the third preset area, a second protective layer is provided on the second metal layer 109, such as Fig.14 As shown, the second metal layer 109 is protected to prevent oxidation. Specifically, a layer of protective metal is plated on the surface of the second metal layer 109. The metal may be nickel-gold or nickel-palladium.

[0091] Optionally, before setting the solder bump 111, the second resin adhesive layer 110 is also set on the periphery of the fourth preset area to protect the circuit wiring structure from being exposed to the air. Specifically, the fourth preset area is set on the second metal layer 109 or the second protective layer, and the fourth preset area is used for later soldering. Fig.14 As shown, in this embodiment, a layer of resin glue with photoresist properties is coated on the second protective layer, and the position for soldering the solder ball 114 later is opened by exposure and development, and the color of the second resin glue is generally green or black, etc.

[0092] like Fig.15 As shown, a solder bump 111 is set in the fourth preset area on the second metal layer 109. Specifically, solder paste is printed at the opening position of the second resin glue by using a high-temperature furnace to form the solder bump 111. Optionally, continue to refer to Fig.15 While setting a welding bump 111 in the fourth preset area on the second metal layer 109, a solder is set on the periphery of the welding bump 111 to form a sealing ring 112. The sealing ring 112 is spaced apart from the welding bump 111. The setting of the sealing ring 112 strengthens the bonding force between the MEMS wafer 2 and the transfer body. Specifically, the sealing ring 112 is formed by printing solder paste.

[0093] like Figure 16-Figure 18 As shown, optionally, before solder is provided on the periphery of the welding bump 111 to form the sealing ring 112, a dry film is provided on the outer ring of the sealing ring 112, and a dry film is provided between each welding bump 111, and the dry film forms a sealing ring 113, and the sealing ring 113 further strengthens the sealing performance when the subsequent adapter is connected to the MEMS wafer 2. The manufacturing of the adapter is realized through the above specific steps.

[0094] Specifically, the bonding of the transfer body with the carrier 106 and the MEMS wafer 2 includes the following specific steps:

[0095] like Fig.19 As shown, after the welding bumps 111 are aligned one by one with the positions of the conductive pillars on the MEMS wafer 2, the MEMS wafer 2 and the transfer body are bonded together by the sealing ring 112 and the sealing ring 113 in a high temperature manner. The MEMS wafer 2 and the transfer body are bonded simultaneously by metal eutectic and organic adhesive. The metal eutectic bonding realizes the interconnection of electrical signals while sealing by the sealing ring 112 and the sealing ring 113. The sealing ring 112 and the sealing ring 113 tightly bond the upper and lower layers of the MEMS wafer 2 and the transfer body together, thereby enhancing the sealing performance and bonding strength and improving the reliability of the packaging structure.

[0096] Specifically, the bonding of the transfer body with the carrier 106 and the ASIC chip 3 includes the following specific steps:

[0097] like Fig. 20 As shown, after the transfer body is bonded to the MEMS wafer 2, the carrier 106 for auxiliary support and the glue layer 107 for bonding the carrier 106 and for bonding the carrier 106 and the silicon body 102 are removed, thereby exposing the first metal layer 103. In this embodiment, the first protective layer provided on the first metal layer 103 and the first resin glue layer 105 on the first protective layer are exposed.

[0098] like Fig.21 As shown, the second conductive column 301 is firstly welded on the ASIC chip 3, and the second conductive column 301 is arranged corresponding to the fifth preset area. The ASIC chip 3 is attached to the adapter by means of patch.

[0099] like Fig. 22 As shown, specifically, soldering the sixth preset area on the first metal layer 103 includes the following specific steps: printing a layer of solder paste on the sixth preset area, forming solder balls 114 by low-temperature re-melting, and pre-setting the solder balls 114 to facilitate soldering connection with external structures. Further optionally, the solder balls 114 are arranged on the periphery of the ASIC chip 3 to facilitate connection of the solder balls 114 with the external structure.

[0100] This embodiment also provides a wafer-level packaging structure 1000 of a MEMS device, which is manufactured by the wafer-level packaging method of the MEMS device described above. Specifically, the packaging structure includes a MEMS wafer 2, an ASIC chip 3 and a transfer body, and the transfer body includes a first metal layer 103, a silicon oxide layer 101, a first resin layer 105, a silicon body 102 and a second metal layer 109 arranged in sequence, wherein the first metal layer 103 is arranged on the silicon body 102, the silicon oxide layer 101 is arranged between the silicon body 102 and the first metal layer 103, the second metal layer 109 is arranged on the surface of the silicon body 102 and the silicon oxide layer 101, and the first metal layer 103 is in contact with the second metal layer 109. , welding bumps 111 are arranged on the second metal layer 109; the first resin layer 105 is arranged on the first metal layer 103; the second metal layer 109 is bonded to the MEMS wafer 2, the welding bumps 111 are arranged one by one corresponding to the first conductive columns on the MEMS wafer 2, the first metal layer 103 is bonded to the ASIC chip 3, the second conductive columns 301 on the ASIC chip 3 are connected to the first metal layer 103, solder is also arranged on the first metal layer 103, and the first resin layer 105 is arranged along the periphery of the second conductive columns 301 and the periphery of the solder.

[0101] It can be manufactured by the wafer-level packaging method of the above-mentioned MEMS device, that is, the wafer-level method is applied to manufacture the adapter, and the ASIC chip 3 and the MEMS wafer 2 are stacked and connected in the longitudinal direction through the adapter respectively to form a wafer-level packaging structure 1000 of the MEMS device, thereby reducing the volume of the MEMS device; optionally, the wafer-level packaging structure 1000 of the MEMS device is cut to form a packaging structure of a single MEMS device, and there are as many as tens of thousands of chips on a single wafer, which are packaged at the same time, thereby improving production efficiency; the MEMS wafer 2 and the ASIC chip 3 are respectively connected to the adapter by a combination of metal bonding and organic material bonding, thereby improving the reliability of the structural connection, and the manufacturing cost is low and the sealing is good; the processing feasibility is high, and the manufacturing method of this embodiment can be applied to the manufacturing of wafer-level packaging structures 1000 of various MEMS devices such as silicon microphones and pressure sensors.

[0102] Optionally, the solder on the first metal layer 103 is a solder ball 114 , which has a good appearance and is convenient for subsequent welding connection with an external structure.

[0103] Optionally, the solder balls 114 are arranged on the periphery of the ASIC chip 3 .

[0104] Optionally, a connection area is provided on the first metal layer 103 , the connection area is connected to the second conductive column 301 , and a first resin glue layer 105 is provided on the first metal layer 103 , the first resin glue layer 105 is provided around the solder ball 114 and the connection area.

[0105] Optionally, a second resin adhesive layer 110 is disposed on the second metal layer 109 , and the second resin adhesive layer 110 is disposed on the periphery of the welding bump 111 .

[0106] Optionally, the silicon body 102 is a common silicon wafer, and an insulating layer 108 is disposed on the surface of the silicon body 102; or the silicon body 102 is a high-resistance silicon wafer. Optionally, a sealing ring 112 is disposed on the periphery of the welding bump 111, and the sealing ring 112 is spaced apart from the welding bump 111, and the MEMS wafer 2 and the transfer body are bonded respectively through the sealing ring 112.

[0107] Optionally, a dry film is provided on the outer ring of the sealing ring 112 and between each welding bump 111 , and the dry film forms a sealing ring 113 , and the MEMS wafer 2 and the transfer body are bonded respectively via the sealing ring 113 .

[0108] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A wafer-level packaging method for a MEMS device, characterized in that: include A silicon oxide layer (101) is provided on the lower end surface of a silicon body (102); a first preset area is provided on the lower end surface of the silicon oxide layer (101); a first metal layer (103) is provided on the first preset area; a photoresist layer (104) is coated on the first metal layer (103) according to circuit routing design requirements; exposure and development are then performed to produce a photoresist pattern matching the circuit routing; a position corresponding to the photoresist pattern is the first preset area; the first metal layer (103) with the photoresist pattern is etched; after etching, the photoresist of the photoresist layer (104) having an auxiliary function is removed; and before providing a carrier (106), a first resin glue layer (105) is provided on the periphery of the fifth preset area and the periphery of the sixth preset area; the first resin layer (105) is provided on the carrier (106) via a glue layer (107); A second preset area is provided on the end surface of the silicon body (102) at one end away from the silicon oxide layer (101), and materials of the silicon body (102) and the silicon oxide layer (101) are removed along the periphery of the second preset area to expose the end surface of the first metal layer (103) away from the carrier (106); a third preset area is provided on the surface of the second preset area of ​​the silicon body (102) and the exposed end surface of the first metal layer (103), and a second metal layer (109) is provided in the third preset area, and the second metal layer (109) is in contact with and connected to the first metal layer (103); a welding bump (111) is provided in a fourth preset area on the second metal layer (109), so as to form a transfer body with the carrier (106); The MEMS wafer (2) is bonded to the second metal layer (109), and the welding bumps (111) are arranged in a one-to-one correspondence with the first conductive pillars on the MEMS wafer (2); The carrier (106) is removed, the first resin layer (105) is arranged on the periphery of the fifth preset area and the sixth preset area, the ASIC chip (3) is bonded to the first metal layer (103), and the second conductive column (301) on the ASIC chip (3) is connected to the fifth preset area on the first metal layer (103); Soldering the sixth preset area on the first metal layer (103) to form a wafer-level packaging structure (1000) of a MEMS device.

2. The wafer-level packaging method of a MEMS device according to claim 1, characterized in that: While arranging the welding bump (111) in the fourth preset area on the second metal layer (109), it also includes arranging solder on the periphery of the welding bump (111) to form a sealing ring (112), and the sealing ring (112) is arranged at a distance from the welding bump (111).

3. The wafer-level packaging method of a MEMS device according to claim 2, characterized in that: Before solder is arranged on the periphery of the welding bump (111) to form a sealing ring (112), a dry film is arranged on the outer ring of the sealing ring (112), and the dry film is arranged between each welding bump (111), wherein the dry film forms a sealing ring (113).

4. The wafer-level packaging method for a MEMS device according to any one of claims 1 to 3, characterized in that: Before providing the welding bumps (111), the method further includes providing a second resin adhesive layer (110) on the periphery of the fourth preset area.

5. The wafer-level packaging method for a MEMS device according to any one of claims 1 to 3, characterized in that: After the first metal layer (103) is provided in the first preset area, the method further comprises: providing a first protective layer on the first metal layer (103); After the second metal layer (109) is arranged in the third preset area, the method further comprises: arranging a second protective layer on the second metal layer (109).

6. The wafer-level packaging method for a MEMS device according to any one of claims 1 to 3, characterized in that: The wafer-level packaging structure (1000) of the MEMS device is cut to form a packaging structure of a single MEMS device.

7. A wafer-level packaging structure of a MEMS device, characterized in that: The MEMS device is manufactured by the wafer-level packaging method according to any one of claims 1 to 6, wherein the packaging structure comprises a MEMS wafer (2), an ASIC chip (3) and a transfer body, wherein the transfer body comprises: Silicon body (102); A silicon oxide layer (101) is disposed on the silicon body (102); The first metal layer (103) is arranged at one end of the silicon oxide layer (101) away from the silicon body (102); a second metal layer (109) disposed on the surface of the silicon body (102) and the silicon oxide layer (101), the first metal layer (103) being in contact with and connected to the second metal layer (109), and a welding bump (111) being disposed on the second metal layer (109); A first resin layer (105) is disposed on the first metal layer (103); The second metal layer (109) is bonded to the MEMS wafer (2), the solder bumps (111) are arranged in a one-to-one correspondence with the first conductive pillars on the MEMS wafer (2), the first metal layer (103) is bonded to the ASIC chip (3), the second conductive pillars (301) on the ASIC chip (3) are connected to the first metal layer (103), solder is also arranged on the first metal layer (103), and the first resin layer (105) is arranged along the periphery of the second conductive pillars (301) and the periphery of the solder.

8. The wafer-level packaging structure of a MEMS device according to claim 7, characterized in that: A sealing ring (112) is arranged on the periphery of the welding bump (111), the sealing ring (112) and the welding bump (111) are arranged at intervals, a dry film is arranged on the outer ring of the sealing ring (112) and between each welding bump (111), the dry film forms a sealing ring (113), and the MEMS wafer (2) and the transfer body are bonded respectively via the sealing ring (112) and the sealing ring (113).

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