Chip packaging structure and chip packaging method

Abstract

The present invention provides a chip packaging structure and a chip packaging method, wherein the chip packaging structure comprises a substrate, a metal pad disposed on the substrate, and a metal lead welded to the metal pad, wherein the end of the metal lead is provided with a welding portion, wherein the welding portion is welded to the surface of the metal pad, wherein the surface of the metal pad is provided with a coating layer, wherein the end of the metal lead extends into the coating layer so that the welding portion is connected to the surface of the metal pad, and at least part of the welding portion is located between the coating layer and the metal pad. Compared with the prior art, the present invention greatly improves the welding effect between the metal lead and the metal pad by providing a coating layer on the surface of the metal pad and wrapping the end of the metal lead with the coating layer, thereby making the welding between the two more reliable and stable.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a chip packaging structure and a chip packaging method. Background Art

[0002] At present, there are two common interconnection methods for chip packaging: wire bonding and flip chip. Among them, wire bonding is to tightly weld metal wires (gold / silver / copper / aluminum, etc.) to the pads on the surface of the chip through heat, pressure, ultrasound, etc., so that the metal wires can establish a connection bridge between the chip and the carrier, realizing the electrical interconnection between the chip and the carrier.

[0003] During the welding process between the metal welding wire and the pad, the welding quality between the solder ball at the end of the metal welding wire and the pad is often affected by the following factors: (1) the undulation and roughness of the pad surface; (2) the oxidation or dirtiness of the pad surface; (3) the thickness and hardness of the pad metal; and (4) the adjustment of the bonding process parameters. Affected by these factors, the metal welding wire is prone to abnormalities such as false welding and cold welding, which greatly affects the quality of the chip packaging structure and has an adverse effect on the reliability of the product.

[0004] Therefore, it is necessary to provide a new chip packaging structure and a chip packaging method to improve the welding effect and packaging quality. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a chip packaging structure and a chip packaging method to improve the welding reliability and stability in the wire bonding area.

[0006] In order to solve the above technical problems, the present invention provides a chip packaging structure, including a substrate, a metal pad arranged on the substrate, and a metal lead welded to the metal pad, the end of the metal lead is provided with a welding portion, the welding portion is welded to the surface of the metal pad, the surface of the metal pad is provided with a coating layer, the end of the metal lead extends into the coating layer so that the welding portion is connected to the surface of the metal pad, and at least a portion of the welding portion is located between the coating layer and the metal pad.

[0007] Furthermore, a passivation layer and a metal pad are provided on the surface of the substrate, the passivation layer has a window corresponding to the position of the metal pad, the chip packaging structure also includes a metal seed layer connected to the metal pad, and the metal pad is provided on the surface of the metal seed layer facing away from the substrate.

[0008] Furthermore, the coating layer is arranged in a ring shape and wraps around the welding portion.

[0009] Furthermore, the coating layer does not extend beyond the metal pad in the circumferential direction.

[0010] Furthermore, the metal pad is made of one or more of metals selected from copper, gold, nickel and palladium.

[0011] Furthermore, the metal pad is an aluminum pad; and the coating layer includes metal tin.

[0012] In order to solve the above technical problems, the present invention further provides a chip packaging method, which comprises the following steps:

[0013] Prepare a metal pad, and make the surface of the metal pad have a solder area and a wire bonding area;

[0014] applying solder to the solder area;

[0015] Connecting the soldering portion of the end of the metal lead to the wire bonding area;

[0016] The solder is heated to melt and enter the wire bonding area to form a coating layer surrounding the soldering portion.

[0017] Furthermore, the solder area is arranged in a ring shape, and the wire bonding area is located inside the solder area.

[0018] Furthermore, the “preparing a metal pad” comprises the following steps:

[0019] Providing a substrate, and sequentially preparing a metal pad and a passivation layer on the surface of the substrate, wherein the passivation layer is provided with a window for exposing a portion of the surface of the metal pad to the outside;

[0020] Prepare a metal seed layer on the surface of the metal liner and the passivation layer;

[0021] Prepare a first photoresist layer on the surface of the metal seed layer;

[0022] removing the first photoresist layer at a predetermined position to form a metal pad forming area at the position;

[0023] The metal pad is manufactured in the metal pad forming area by electroplating method.

[0024] Furthermore, after the metal pad is prepared, the preparation method further comprises:

[0025] preparing a second photoresist layer covering the metal pad;

[0026] Removing the second photoresist layer from the solder area on the surface of the metal pad;

[0027] applying solder in the solder area by electroplating;

[0028] The second photoresist layer remaining on the surface of the metal pad is removed so that the wire bonding area is exposed outwardly.

[0029] Compared with the prior art, the present invention greatly improves the welding effect of the metal lead and the metal pad by providing a coating layer on the surface of the metal pad and wrapping the welding part at the end of the metal lead, making the welding between the two more reliable and stable. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a partial schematic diagram of the chip packaging structure of the present invention;

[0031] Figure 2 It is a schematic diagram of the main steps of the chip packaging method of the present invention;

[0032] Figure 3 A schematic diagram of preparing the chip packaging structure by using the chip packaging method in a specific embodiment of the present invention;

[0033] Figure 4 For the present invention Figure 3 A schematic diagram of the structure formation of step S10 in the chip packaging method shown;

[0034] Figure 5 For the present invention Figure 3 A schematic diagram of the structure formation of step S20 in the chip packaging method shown;

[0035] Figure 6 For the present invention Figure 3 The schematic diagram of the structure formation of steps S30 and S40 in the chip packaging method is shown. DETAILED DESCRIPTION

[0036] The present application will be described in detail below in conjunction with the implementation shown in the accompanying drawings. However, the implementation does not limit the present application, and any structural, methodological, or functional changes made by a person of ordinary skill in the art based on the implementation are all included in the protection scope of the present application.

[0037] See also Figure 1 As shown, the present invention provides a chip packaging structure, which can reliably connect a chip to an external carrier (not shown) and has a good welding effect. Specifically, the chip packaging structure includes a substrate 10, a metal pad 20 located on the surface of the substrate 10, a metal lead 30 welded to the metal pad 20, and a coating layer 40 covering the surface of the metal pad 20, wherein a welding portion 31 is provided at the end of the metal lead 30, and the welding portion 31 (which can be a solder block or a solder ball) is welded to the surface of the metal pad 20, and the coating layer 40 covers the surface of the metal pad 20 and wraps at least a portion of the welding portion 31.

[0038] Preferably, the coating layer 40 is provided in an annular shape to better wrap the welding portion 31, and the coating layer 40 does not extend beyond the metal pad 20 in the circumferential direction. The end of the metal lead 30 extends into the coating layer 40 so that the welding portion 31 can be reliably and stably welded to the metal pad 20. The other end of the metal lead 30 away from the substrate 10 extends to the external carrier and is connected to the external carrier, so that the metal lead 30 establishes a connection channel between the substrate 10 and the external carrier.

[0039] A metal pad 11, a passivation layer 12 and a metal seed layer 13 are further provided between the substrate 10 and the metal pad 20. The metal pad 11 is directly formed on the substrate 10. The passivation layer 12 covers the metal pad 11 and has a window C at a position corresponding to the metal pad 11, so that the metal pad 11 can be exposed in the window C. The metal seed layer 13 is directly deposited on the surface of the passivation layer 12 and the metal pad 11, and the upper surface of the metal seed layer 13 is directly in contact with the metal pad 20, and the lower surface is directly in contact with the passivation layer 12 and the metal pad 11, thereby forming a stacked structure.

[0040] The metal pad 11 is a metal layer arranged on the surface of the substrate 10, preferably an aluminum pad, and can also be made of other metals such as copper. The passivation layer 12 can be made of inorganic thin film materials such as silicon nitride and silicon oxide or organic polymer materials such as polyimide. The metal seed layer 13 can be made of metals such as copper, nickel, tin, silver, gold, and aluminum. Here, the metal pad 20 is an electroplating layer, which is formed on the top of the metal seed layer 13 by an electroplating process. It can be made of one or more of metal copper Cu, gold Au, nickel Ni, and palladium Pd. For ease of description, the electroplating layer is set as the first electroplating layer. Similarly, the coating layer 40 can also be made of a second electroplating layer on the first electroplating layer by an electroplating process, and then heated and melted to form the coating layer 40. The thickness of the metal pad 20 (first electroplating layer) is generally 3 to 30 μm.

[0041] The second electroplating layer is first formed on the metal pad 20 (i.e., the first electroplating layer) by an electroplating process, and a wire bonding area 21 is formed inside the metal pad 20. After the welding portion 31 at the end of the metal lead 30 is welded to the wire bonding area 21, it is heated to melt, so as to wrap the welding portion 31 of the metal lead in the wire bonding area 21 and the surface of the metal pad 20, thereby forming a coating layer 40, the composition of which can be metal tin Sn. It should also be noted that the material (e.g., Sn) used for the coating layer 40 is not limited to being formed on the metal pad 20 by electroplating.

[0042] It can be seen that the present invention melts the second electroplating layer at high temperature to form a coating layer 40 that wraps around the welding portion 31 at the end of the metal lead 30, so that the solder joint that was originally only surface-bonded is expanded to be integrally bonded, which greatly improves the bonding strength of the solder joint in the lead bonding area 21, thereby improving product quality and reliability; moreover, since the metal pad 20 is prepared by an electroplating process, it has good surface flatness and fineness, which helps to avoid abnormalities such as false welding and cold welding that may occur in the bonding process, thereby improving the product yield and avoiding the risk of customer complaints.

[0043] In view of the above chip packaging structure, the present invention also provides a chip packaging method, referring to Figures 2 to 6 As shown, the chip packaging method at least includes the following steps:

[0044] Prepare a metal pad 20, and make the surface of the metal pad have a solder area B and a wire bonding area 21;

[0045] Applying solder 22 in solder area B;

[0046] Connecting the welding portion 31 at the end of the metal lead to the wire bonding area 21;

[0047] The solder 22 is heated to melt and enter the wire bonding area 21 to form a coating layer 40 that wraps the soldering portion 31 .

[0048] The above is the chip packaging method of the present invention. In order to explain the application of the packaging method in a specific embodiment in more detail, a specific embodiment based on the above packaging method is described in detail below. Figure 3 As shown, in this specific embodiment, the chip packaging process includes the following specific steps:

[0049] S10: preparing a metal pad 20;

[0050] S20: preparing solder 22 in solder area B on the surface of metal pad 20, and forming wire bonding area 21 inside solder 22;

[0051] S30: Connecting the welding portion 31 at the end of the metal lead 30 to the metal pad 20 in the wire bonding area 21;

[0052] S40 : heating and melting the solder 22 to form a coating layer 40 that wraps the soldering portion 31 .

[0053] Preferably, the solder area B is arranged in a ring shape, surrounding the wire bonding area 21 . The solder area B is not limited to a continuous ring shape, but may also be an annular area with a gap along the circumferential direction.

[0054] Among them, the "preparation of metal pad 20" in step S10 specifically includes the following steps (refer to Figure 4 ):

[0055] S11: providing a substrate 10, and sequentially preparing a metal pad 11 and a passivation layer 12 on the surface thereof, wherein the passivation layer 12 is provided with a window C for exposing a portion of the surface of the metal pad 11 to the outside;

[0056] S12: preparing a metal seed layer 13 on the surface of the metal pad 11 and the passivation layer 12;

[0057] S13: preparing a first photoresist layer 14 on the surface of the metal seed layer 13, wherein the thickness of the first photoresist layer 14 is preferably set to exceed the predetermined height of the metal pad 20 by 5-10 μm;

[0058] S14: removing the first photoresist layer 14 at a predetermined position to form a metal pad forming area A at the position;

[0059] S15: preparing a first electroplating layer, namely, a metal pad 20, by electroplating in the metal pad forming area A;

[0060] S16 : removing the first photoresist layer 14 around the first electroplating layer, so that the first electroplating layer protrudes from the surface of the substrate 10 , forming a metal pad 20 .

[0061] Among them, step S20 of "preparing solder 22 in solder area B on the surface of metal pad 20, and forming wire bonding area 21 inside the solder" specifically includes the following steps (refer to Figure 5 ):

[0062] S21: preparing a second photoresist layer 15 on the substrate 10 so as to completely cover the substrate 10 and the metal pad 20. The thickness of the second photoresist layer 15 is also preferably set to exceed the height of the solder 22 by 5-10 μm.

[0063] S22: removing the second photoresist layer 15 at the edge of the surface of the metal pad 20 to form a solder region B at the edge;

[0064] S23: applying solder 22 in the solder area B;

[0065] S24 : removing the remaining second photoresist layer 15 , forming a wire bonding area 21 in the inner area of ​​the solder 22 , and exposing the metal pad 20 in the wire bonding area 21 .

[0066] It is worth mentioning that, preferably, the solder 22 is a second electroplating layer prepared by an electroplating process, and its component is metal tin Sn, which surrounds the periphery of the wire bonding area 21.

[0067] Recombination Figure 6 As shown, in step S30, “connecting the welding portion 31 at the end of the metal lead 30 to the metal pad 20 in the wire bonding area 21” specifically includes:

[0068] S31: removing the metal seed layer 13 in the peripheral area of ​​the metal pad 20;

[0069] S32: Weld the welding portion 31 at the end of the metal lead 30 to the metal pad 20 in the wire bonding area 21 , wherein the wire bonding area 21 is usually arranged in a circular shape, and the wire diameter of the metal lead 30 is usually arranged not to exceed 1 / 4 of the diameter of the wire bonding area 21 .

[0070] For example, the heating in step S40 specifically refers to reflow soldering of the solder 22, with the peak temperature set between 245°C and 265°C, and the reflow soldering process places the solder 22 in a nitrogen-protected environment. If necessary, flux can be sprayed before reflow soldering to assist in removing oxides.

[0071] The present invention forms a metal pad 20 by electroplating, and sets solder 22 on the surface of the metal pad 20, so that the solder 22 surrounds the lead bonding area 21 (that is, surrounds the end of the metal lead 30), and finally through high-temperature reflow, the coating layer 40 can wrap at least a part of the welding part 31 at the end of the metal lead 30, which greatly improves the welding effect of the metal lead 30 and the metal pad 20, making the welding between the two more reliable and stable.

[0072] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0073] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present application. They are not intended to limit the scope of protection of the present application. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present application should be included in the scope of protection of the present application.

Claims

1. A chip packaging structure, comprising a substrate, a metal pad disposed on the substrate, and a metal lead welded to the metal pad, wherein a welding portion is disposed at an end of the metal lead, and the welding portion is welded to a surface of the metal pad, characterized in that: The surface of the metal pad is provided with a coating layer, and the end of the metal lead extends into the coating layer so that the welding portion is connected to the surface of the metal pad, and at least part of the welding portion is located between the coating layer and the metal pad; The surface of the metal pad has a solder area, a wire bonding area, and solder located in the solder area. The solder area is arranged in a ring shape, and the wire bonding area is located inside the solder area. After the welding part of the metal lead is connected to the wire bonding area, the solder is heated to melt it and enter the wire bonding area to form a coating layer that wraps the welding part.

2. The chip packaging structure according to claim 1, characterized in that: A passivation layer and a metal pad are arranged on the surface of the substrate. The passivation layer has a window corresponding to the position of the metal pad. The chip packaging structure also includes a metal seed layer connected to the metal pad. The metal pad is arranged on the surface of the metal seed layer on one side away from the substrate.

3. The chip packaging structure according to claim 1, characterized in that: The coating layer is arranged in a ring shape and wraps the welding portion.

4. The chip packaging structure according to claim 1 or 3, characterized in that: The cladding layer does not extend beyond the metal pad in the circumferential direction.

5. The chip packaging structure according to claim 1, characterized in that: The metal pad is made of one or more of metals selected from copper, gold, nickel and palladium.

6. The chip packaging structure according to claim 1, characterized in that: The metal pad is an aluminum pad; the coating layer includes metal tin.

7. A chip packaging method, characterized in that: The method comprises the following steps: Prepare a metal pad, and make the surface of the metal pad have a solder area and a wire bonding area; the solder area is arranged in a ring shape, and the wire bonding area is located inside the solder area; applying solder to the solder area; Connecting the soldering portion of the end of the metal lead to the wire bonding area; The solder is heated to melt and enter the wire bonding area to form a coating layer surrounding the soldering portion.

8. The chip packaging method according to claim 7, wherein: The "preparing a metal pad" comprises the following steps: Providing a substrate, and sequentially preparing a metal pad and a passivation layer on the surface of the substrate, wherein the passivation layer is provided with a window for exposing a portion of the surface of the metal pad to the outside; Prepare a metal seed layer on the surface of the metal liner and the passivation layer; Prepare a first photoresist layer on the surface of the metal seed layer; removing the first photoresist layer at a predetermined position to form a metal pad forming area at the position; The metal pad is manufactured in the metal pad forming area by electroplating method.

9. The chip packaging method according to claim 8, wherein: After the metal pad is prepared, the preparation method further comprises: preparing a second photoresist layer covering the metal pad; Removing the second photoresist layer from the solder area on the surface of the metal pad; applying solder in the solder area by electroplating; The second photoresist layer remaining on the surface of the metal pad is removed so that the wire bonding area is exposed outwardly.

Images